What's lightweight, secure and tailored to small mechatronic ECUs, such as sensors and actuators? Our MICROSAR IO software solution! Small mechatronic ECUs place very specific demands on software: compact, safe and highly efficient. Until now, there hasn’t been a dedicated platform focused on this exact use-case. Now MICROSAR IO fills the gap. 👉 With our new MICROSAR IO Evaluation Bundle, test our software in it’s entirety using Infineon Technologies PSoC™4 Drive Core platform. What’s inside: ✅ Three pre-configured demo projects ✅ IoT-like development workflow ✅ Works with the IAR Compiler ✅ Runs on Infineon PSoC™4 hardware Whether you're an embedded developer, system architect, or innovation scout – this bundle is your entry point into modern, scalable automotive software development. Give it a go and experience how MICROSAR IO supports resource-constrained ECUs and complements companion controllers in zonal architectures. Quick, easy and non-binding - Get your Evaluation Bundle here 👉 https://lnkd.in/eaqYNhbj . . #MICROSARIO #SDV #SoftwareDefinedSystems
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Ubitium’s Universal Processor The modern #automotive #industry exemplifies a critical challenge facing embedded systems across multiple sectors. Where vehicles once contained perhaps two chips, today’s cars house approximately 200 processing units. The software complexity has grown exponentially alongside this hardware proliferation, with modern #vehicles containing 150 million lines of code compared to the 10,000 lines found in earlier systems. “Some estimates say that modern cars could reach a billion lines of code,” notes Hyun Shin Cho, CEO and Co-Founder of Ubitium, reflecting on discussions in an exclusive interview with Embedded.com. This complexity originates from what Cho describes as “a patchwork of different specialized processors or different specialized processing cores.” Each system typically combines #CPUs for general processing, #GPUs for parallel computation, DSPs for signal processing, and #FPGAs for specialized tasks. [....] Ubitium’s response to this complexity crisis is their UB410 universal processor, a chip designed to handle multiple processing paradigms within a single architecture. Full article: https://lnkd.in/gX9xC4FX #embedded
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Gain an expert insight into Tessent MemoryBIST and its expansion to include NVRAM, in this SemiWiki.com article. Mike Gianfagna examines the Memory BIST journey with Etienne Racine, Product Manager for Tessent MemoryBIST at Siemens EDA. The article illustrates how Tessent MemoryBIST software and IP deliver a complete solution for at-speed test, diagnosis, repair, debug and characterization of silicon memories of all types. The ability to address this broad class of problem with one comprehensive solution provides significant benefits. The Tessent platform has recently been extended to handle the unique requirements of embedded non-volatile RAM, or NVRAM. Since embedded NVRAM use is on the rise, this is seen as a significant addition. Some of the reasons that Tessent MemoryBIST is acknowledged as the Industry-leading solution for memory built-in self-test include its hierarchical architecture that enables the addition of built-in self-test and self-repair capabilities at both the individual core level and the top level. Both software and enabling IP are included. Read the full article today to discover the full range of capabilities delivered by Tessent MemoryBIST software and IP. https://sie.ag/6WiSB6 #TessentMemoryBIST #MemoryBIST #DFT #Tessent #NVRAM #semiconductor
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Our market-leading J-Link debug probes and Flasher in-system programmers can now be used with Geehy Semiconductor’s G32R50x series of real-time microcontrollers. Based on the Arm® Cortex®-M52 core, the G32R50x MCUs deliver computational efficiency, precise sensing, and reliable peripheral control. They are designed for demanding applications such as photovoltaics, industrial automation, commercial power systems, and electric or new-energy vehicles. “We are proud to have our J-Link and Flasher product families support Geehy’s G32R50x series, which also includes the G32R501 — the first dual-core Cortex®-M52-based processor in the world. Both Geehy and SEGGER have a strong reputation for excellence in the industry, and this close partnership further solidifies that status.” 💬 Guowei CHEN, General Manager, SEGGER China Find more information here: https://lnkd.in/eTpTSqSJ
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In the world of supercomputing, air is no longer enough. Next-generation GPUs, CPUs, and AI accelerators generate extreme heat, unlocking their full potential requires far more than a standard cooling solution. COOLTECH srl steps in by 𝐝𝐞𝐬𝐢𝐠𝐧𝐢𝐧𝐠 𝐚𝐧𝐝 𝐦𝐚𝐧𝐮𝐟𝐚𝐜𝐭𝐮𝐫𝐢𝐧𝐠 𝐡𝐢𝐠𝐡-𝐩𝐞𝐫𝐟𝐨𝐫𝐦𝐚𝐧𝐜𝐞 𝐜𝐨𝐥𝐝-𝐩𝐥𝐚𝐭𝐞𝐬 𝐚𝐧𝐝 𝐰𝐚𝐭𝐞𝐫-𝐛𝐥𝐨𝐜𝐤𝐬, delivering custom thermal solutions that push every platform to its limits. In the field of precision engineering, we use advanced CFD simulations to design micro-structured solutions that maximize heat transfer and minimize thermal resistance. We work with 𝐡𝐢𝐠𝐡-𝐩𝐞𝐫𝐟𝐨𝐫𝐦𝐚𝐧𝐜𝐞 𝐦𝐚𝐭𝐞𝐫𝐢𝐚𝐥𝐬 compatible with all types of fluids. Our advanced manufacturing processes - including precision brazing, friction stir welding (FSW), and high-precision CNC machining - ensure exceptional flatness and surface finish for perfect thermal contact. Beyond component supply, we offer in-depth technical consulting for complete system integration, from loop design to flow balancing. #Supercomputing #DirectLiquidCooling #HPC #AI #ThermalManagement #ColdPlates #WaterBlocks #DataCenterCooling
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🚀 New blog post: #FMI just leveled up—and it’s ready for real network traffic. MachineWare’s Virtual Platforms now support the FMI Layered Standard for Network Communication (FMI LS-BUS), enabling seamless simulation over CAN, Ethernet, FlexRay, and LIN. And yes, it integrates seamlessly with dSPACE VEOS. 💡 Why this matters: - Simulate networked systems with multiple VPs—no hardware needed - Use dSPACE VEOS to orchestrate complex co-simulations - Monitor everything in real time with ControlDesk This is a game-changer for early-stage validation of distributed embedded systems. Whether you're testing ECUs, communication protocols, or full system behavior—this setup gives you full control, full visibility, and zero excuses. 🎤 Bonus news: Lukas Jünger, CEO of MachineWare, will be at the 📍 16th International Modelica & FMI Conference 📅 September 8–10, 2025 🌍 Lucerne, Switzerland Come say hi, talk FMI LS-BUS, and maybe even debate which network protocol is the most elegant. 👉 Full blog post here: https://lnkd.in/eMJp-5Sb #FMI #FMI3 #FMI_LS_BUS #dSPACE #VEOS #VirtualPrototypes #Modelica2025 #EmbeddedSystems #Simulation #SystemC #TLM #vECU
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Exciting to see the FMI Layered Standard for buses in action! 🤩 In a recent blog post, MachineWare GmbH showed how the FMI-LS-BUS can be used to easily connect its virtual platforms to the dSPACE software-in-the-loop (SIL) tool chain. 👉 This integration demonstrates how open standards like FMI-LS-BUS accelerate virtual validation workflows and foster interoperability across simulation platforms. Curious about how the standard helps build up co-simulation scenarios? Read the article now 👇 🔍 Learn more about our SIL tool chain: https://lnkd.in/ehGdJ3zz #SIL #FMI #VirtualValidation #SoftwareDevelopment #dSPACE
🚀 New blog post: #FMI just leveled up—and it’s ready for real network traffic. MachineWare’s Virtual Platforms now support the FMI Layered Standard for Network Communication (FMI LS-BUS), enabling seamless simulation over CAN, Ethernet, FlexRay, and LIN. And yes, it integrates seamlessly with dSPACE VEOS. 💡 Why this matters: - Simulate networked systems with multiple VPs—no hardware needed - Use dSPACE VEOS to orchestrate complex co-simulations - Monitor everything in real time with ControlDesk This is a game-changer for early-stage validation of distributed embedded systems. Whether you're testing ECUs, communication protocols, or full system behavior—this setup gives you full control, full visibility, and zero excuses. 🎤 Bonus news: Lukas Jünger, CEO of MachineWare, will be at the 📍 16th International Modelica & FMI Conference 📅 September 8–10, 2025 🌍 Lucerne, Switzerland Come say hi, talk FMI LS-BUS, and maybe even debate which network protocol is the most elegant. 👉 Full blog post here: https://lnkd.in/eMJp-5Sb #FMI #FMI3 #FMI_LS_BUS #dSPACE #VEOS #VirtualPrototypes #Modelica2025 #EmbeddedSystems #Simulation #SystemC #TLM #vECU
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Impulse Embedded has launched the AAEON PICO-ARU4 Pico-ITX board in the UK – a powerful, compact solution designed for industrial edge applications. #EmbeddedSystems #EdgeComputing #PicoITX #IndustrialIoT #UKTech #Innovation #powerelectronics #powermanagement #powersemiconductor https://lnkd.in/ga2_xiCS
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Tessent MemoryBIST Expands to Include NVRAM Game-changer in semiconductor testing! Siemens Digital Industries Software has expanded their industry-leading Tessent™ MemoryBIST platform to include embedded non-volatile RAM (NVRAM) support - addressing a critical gap as AI workloads drive unprecedented NVRAM adoption. Key highlights: - Breaking barriers: First comprehensive BIST automation solution for emerging NVRAM technologies like MRAM - Advanced capabilities: Automated trimming/calibration sequences that were previously manual processes - Future-ready architecture: Support for 2.5D/3D stacked memory configurations and external memory testing - Proven platform: Hierarchical IEEE 1687-2014 (IJTAG) network enables lifecycle management from manufacturing to field deployment - Cost efficiency: Reduces manufacturing costs while improving reliability and test coverage With Flash memory struggling to scale to advanced process nodes, this NVRAM support couldn't come at a better time. The platform's ability to define custom waveforms for new NVRAM technologies positions teams to stay ahead of rapid memory evolution. Why this matters: As embedded NVRAM becomes essential for AI/ML applications, having robust, automated testing solutions is crucial for maintaining quality and time-to-market advantages. #Siemens #Siemenseda #SiemensSoftware #EDA #SiemensDigital #SiemensDigitalIndustries #MemoryBIST #NVRAM #MRAM #SemiconductorTesting #ElectronicDesignAutomation #TessentMemoryBIST #EmbeddedMemory #NonVolatileMemory #FlashMemory #MemoryTesting #MemoryArchitecture #3DMemory #StackedMemory #MemoryDesign #MemoryReliability #MemoryDebug #SemiconductorIndustry #ChipDesign #ICDesign #SiliconTesting #DFT #DesignForTest #ManufacturingTest #SiliconDebug #YieldOptimization #DefectCoverage #BIST #BuiltInSelfTest #AutomatedTesting #TestAutomation #QualityAssurance #ReliabilityTesting #ManufacturingQuality #TestCoverage #ValidationTesting #CharacterizationTesting #AIChips #MachineLearning #ArtificialIntelligence #AIWorkloads #MLAccelerators #ComputeIntensive #HighPerformanceComputing #EdgeComputing #AIHardware #AdvancedProcessNodes #SemiconductorManufacturing #ProcessTechnology #ManufacturingCosts #TimeToMarket #ProductionTesting #FieldTesting #LifecycleManagement #IEEE1687 #IJTAG #TestStandards #IndustryStandards #TestProtocols #AccessNetworks #TestInfrastructure #TechInnovation #ProductDevelopment #EngineeringSolutions #TechnologyLeadership #SemiconductorNews #TechTrends #IndustryNews #Innovation #TechUpdates #B2BTech #AutomotiveSemiconductors #IoTChips #DataCenterMemory #MobileProcessors #ConsumerElectronics #IndustrialIoT #5GChips #AutonomousVehicles
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XCP Protocol – Universal Measurement & Calibration for Automotive Embedded Systems In the world of ECU development and testing, engineers need precise access to internal variables for measurement, tuning, and calibration. This is where the XCP Protocol (Universal Measurement and Calibration Protocol, ASAM standard) plays a crucial role. 🔍 Introduction to XCP Protocol XCP is a communication protocol used in automotive embedded systems for measuring, calibrating, and flashing ECUs. It allows real-time data exchange between ECUs and calibration tools via CAN, FlexRay, Ethernet, or USB. 🕒 History of XCP Protocol Developed by ASAM (Association for Standardisation of Automation and Measuring Systems) Introduced as a successor to CCP (CAN Calibration Protocol) Extended beyond CAN to support multi-transport layers (CAN, FlexRay, Ethernet, USB, etc.) ⭐ Features of XCP Protocol ✔ Universal transport layer support – CAN, FlexRay, Ethernet, USB ✔ Real-time calibration & measurement – adjust ECU parameters live ✔ Standardized by ASAM – global acceptance ✔ Flashing support – reprogram ECUs efficiently ✔ Lightweight protocol – minimal ECU overhead 💡 Need for XCP Protocol ECU Development & Validation → Engineers calibrate control algorithms in real time HIL/SIL Testing → Enables observation of ECU behavior under different conditions Flashing ECUs → Seamless software updates Flexibility → Works across multiple network layers (CAN FD, Ethernet, etc.) 🧩 XCP Frame Format (Simplified) Command Code → Defines the type of request (e.g., read, write, upload) Parameters → Address, size, etc. Data Field → ECU variable values or calibration data Response → Sent back to calibration tool 🔄 Types of XCP Transport Layers 1️⃣ XCP on CAN 2️⃣ XCP on FlexRay 3️⃣ XCP on Ethernet (XCP on TCP/UDP) 4️⃣ XCP on USB 📱 Download Now from Google Play 👉 https://lnkd.in/g_HZyHZZ 🌍 Visit for more: 👉 https://pievcore.com/ #XCP #XCPProtocol #UniversalMeasurement #Calibration #ASAM #CANape #INCA #Automotive #AutomotiveEmbedded #EmbeddedSystems #ECUTesting #ECUDevelopment #ECUCalibration #VehicleElectronics #AutomotiveEngineering #AutomotiveSoftware #AutomotiveTechnology #AutomotiveInnovation #ControlSystems #Diagnostics #Flashing #SoftwareUpdate #CANProtocol #CANFD #AutomotiveEthernet #FlexRay #UDS #ADAS #AutonomousVehicles #ConnectedCars #ElectricVehicles #HybridVehicles #SoftwareDefinedVehicles #HILTesting #SILTesting #EmbeddedHardware #RealTimeSystems #AutomotiveTesting #FutureMobility #AutomotiveStandards #SmartVehicles
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❔ Are You Overthinking Component Date Codes? 🤔 https://hubs.la/Q03Csl4g0 In the 1960s, semiconductor date codes were introduced for part traceability, considering manufacturing dates and a 2-to-3-year "sell-by" period. While once thought to indicate usability, these codes no longer reliably reflect component quality and may prevent the use of perfectly viable components. 👉 Why general date code restrictions are becoming obsolete: https://hubs.la/Q03Csl4g0 #RochesterElectronics #RochesterElectronicsUS #datecodes #datecoderestrictions #semiconductor #authorizedsemiconductors #semiconductors
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Hallo Sophie, welche Plattformen werden aktuell schon unterstützt? Ich finde die die NXP Semiconductors S32 sehr interessant, die HDQFP sind gut wenn's eng auf der Leiterplatte wird und man Leads für die Zuverlässigkeit haben will. Ich hoffe ja dass Infineon Technologies die PSOC wie den PSOC-5LP etc. analog ausbaut, so dass man mehr von der CPU in Analogrechner, SC-Filter etc. offloaden kann. Als ich noch bei Vibracoustic war hatten wir einen Call mit Prof. Dr. Bernd Ulmann von anabrid GmbH, dem deutschen "Titanen" der Analogrechner-Welt, und X-FAB, die hervorragende Analogprozesse haben. Ich beobachte das Thema aktiv, das Potential der Hybridrechner ist enorm, wenn auch kaum genutzt. Analogrechner könnten eine schwäbische Domäne sein, denn sie sind sehr sparsam. 😊 Grüße, Sebastian