ARM Cortex R series
ARM based processors and silicon chips are know as one of the industry's power efficient and high computation devices.
The range varies from normal computation ARM Cortex M series to high computation for running an operating system on the device itself ie ARM Cortex A series of processors.
Today, I will be discussing about the Cortex R series processors.
From the instruction execution point of view, Cortex A, Cortex R both execute and support the ARM 32 instruction mode and Thumb mode.
However, the Cortex M series has a catch here wherein it uses the Thumb-2 instruction set architecture wherein the overall code density increases and execution time of the given application reduces.
Coming back to the Cortex R series, one of the main difference between Cortex R series and Cortex A series of processors is the support of Virtual Memory, as the Cortex A series of processors provides full virtual memory support using Virtual Memory System Architecture VMSA which uses the translation tables located in the memory and Translation Lookaside Buffer (TLB), this helps to run complex application and operating system on system.
However, the Cortex R series do not have any support for the VMSA since the application area for Cortex R series have focus on the Real Time systems and time critical systems wherein the latency due to any page miss could be critical for the system, hence, the R series are not provided with any TLB.
Furthermore, like Cortex A series, Cortex R series do support MPU and the main reason for using the Memory Protection Unit is to make sure that the Real Time application running does not make any unwanted changes in the application code or in the kernel code itself.
Since, the application code and the kernel code are bonded closely in Real-Time applications, hence, the scheme to implement Memory Protection unit is different. Cortex R series implements Protected Memory System Architecture (PMSA). This PMSA eliminates the need of TLB hence the non-deterministic behavior of the system because of page misses is avoided in the Real-Time applications.
- Aman Kanwar