Improving VHDL Testbench Design with Message Passing
Lars Asplund
![Lars Asplund]()
Lars Asplund
Main author and maintainer of VUnit. ASIC/FPGA/DSP Developer consulting for Q-Free ASA
VUnit, the free and open source test framework for HDL, provides a message passing mechanism for VHDL that can take your testbench to the next level. Message passing can simplify your design, make it easier to read and maintain, and also improve on performance. Read more...
Avionics Firmware Architect at NLR | High-Performance DSP and High-Speed Communication | Innovating Next-Gen Avionics & FSO/Satellite Communication Systems
4ybroken link, when I click Read more
FPGA Consultant at Netnod
5yHi Lars! Thank you for this article. I wonder if the example code available?