Intel Pushes Foundry Business Forward
Naga Chandrasekaran, Intel Foundry chief technology and operations officer, at Intel Foundry Direct Connect

Intel Pushes Foundry Business Forward

Intel’s recent challenges are undoubtedly familiar to anyone who has paid even the slightest bit of attention to the semiconductor market. The company’s issues were a big part of the reason that it recently appointed semiconductor industry veteran Lip-Bu Tan as its new CEO. Some even speculated that the company would be spinning off its chip-making foundry business.

At the company’s recent Direct Connect conference, however, the new Intel CEO made it clear that not only do they have no intention of doing so, but they’re actually doubling down to regain their world-class foundry heritage. The company used the event to update the market on its forthcoming 18A process (which Intel’s products group will use for its Panther Lake line of mobile CPUs to be released later this year) and highlighted numerous technological advancements in both its main process technologies as well as its advanced packaging capabilities. Intel didn’t announce any new foundry clients at Direct Connect—as some hoped might happen—but it did make it clear that there’s a new degree of focus on customer service and on delivering what potential clients want.

To that end, Intel announced a few new variations to both the 18A and 14A process nodes that had previously been introduced. Both 18A-P and 18A-PT use the same GAA (Gate All Around) transistors and PowerVia backside power delivery technology that 18A offers as well as several new enhancements. The biggest change is a wider range of supported voltage levels that Intel Foundry’s new chief global operations officer, Dr. Naga Chandrasekaran, explained will allow for applications outside of high-performance computing. In addition, 18A-P has better support for skew corner variations, which refer to the range of acceptable performance levels in different parts of the chip. Together, these and other advancements deliver up to an 8% performance/watt improvement for the new process, while maintaining design rule compatibility with chips originally intended for 18A. In real-world terms, it means that most 3rd party designs that are targeting the 18A process will likely use 18A-P, which will come online in 2026. The 18A-PT process, which is scheduled for 2028, incorporates TSVs (Through Silicon Vias), making it a good choice for applications such as the base dies for complex chiplet designs.

For 14A, Intel provided more details about the process and explained several important changes. Notably, many of these changes reflect the company’s significantly expanded support for the wider semiconductor ecosystem. In fact, new CEO Lip-Bu Tan spent most of the first hour of the event interacting with partners from the EDA (Electronic Design Automation) industry, who create software for designing chips. In the past, Intel primarily used proprietary EDA tools, but started changing with 18A and expanded partner tool support even more extensively with 14A. As a result, CEOs from Synopsys, Cadence, and Siemens all chatted with Lip-Bu about the work they’re doing on their tools to optimize them for Intel’s latest foundry offerings. While seemingly minor, this is a big change that should make it easier for 3rd parties to design chips for Intel’s manufacturing sites. More importantly, it also clearly reflects the kind of changed attitude that Intel is now taking with its manufacturing business.

At the event, Intel also disclosed more details about expected performance for 14A vs. 18A, and the numbers sound impressive: 15-20% performance/watt increase, 1.3x improvements in transistor density, and 25-35% reductions in power. The company pointed out that 14A, which is expected to go into production in 2027, will take a number of learnings acquired from developing 18A to improve the process even further. These include second-generation RibbonFET transistors, improved backside power delivery options, and more. The company also disclosed a 14A-E variation that’s expected to have even lower options for power consumption, making it better suited for cutting-edge mobile chip designs.

One of Intel Foundry’s widely recognized advantages over its other chip-making competitors is the packaging technologies it has developed and perfected. These are specifically targeted at enabling the creation of more sophisticated chiplets that combine multiple dies, often made at different vendors on different process nodes. Given the limits of how large individual chips can be made, it’s becoming common to discuss how traditional Moore’s Law type improvements (1.5-2x every two years) are now only possible when looking at chiplet system designs. And, in truth, today’s most sophisticated AI processors are massive chiplets that integrate multiple chips together and depend on advanced packaging technologies to make them work.

Within that context, Intel unveiled several new variations on both its EMIB chip-to-chip connection and its Foveros chip-stacking technologies at Direct Connect. The new versions include lower-cost, higher-speed and different types of interconnect options. Intel was also quick to point out that these packaging technologies can be used with chip dies built at other fabs, with dies built at Intel fabs, or any combination of the two.  

Given the dominance that Taiwan’s TSMC currently has for advanced node semiconductor manufacturing technology, Intel still has a tough road ahead of it. But based on the announcements the company made at its Direct Connect event, it is making a point to listen to its potential customers’ and partners’ needs more closely and to act differently as a result. It’s also returning to its core technological focus and working to build out a more complete set of technical Lego blocks that it believes will be more attractive for potential foundry customers to use.

With the incredible importance of semiconductor supply chains now becoming more widely understood, the continued geopolitical challenges currently unfolding, and the unique role that Intel has as the only remaining US company producing advanced logic chips, it’s critical that the company figures these challenges out and push its foundry business forward. Of course, the threat of confusing tariffs isn’t helping matters right now. However, with some solid execution and strong leadership, Intel looks to have as good an opportunity as ever to bring itself back to a position of semiconductor manufacturing prominence. It won’t be easy, and there’s a lot riding on it, but the company certainly appears to be moving in the right direction.

Bob O’Donnell is the president and chief analyst of TECHnalysis Research, LLC a market research firm that provides strategic consulting and market research services to the technology industry and professional financial community. You can follow him on LinkedIn at Bob O’Donnell or on Twitter @bobodtech.

Alain-Philippe Roclore

Co-Founder - Partner at Rocland Enterprises LLC

2mo

Maybe then, now would be a good time for Intel Corporation to re-assess the clients' interest in fully CMOS-compatible new materials to reach breakthrough performance in #networking devices speed (> #400G /L) and power consumption (#AI customers ask <1V / L) while facilitating #optical #hybridintegration and / #CPO ... like some in the Asian ecosystem seem to be investigating #AI #DataCenters #1600G #3200G #transceivers #switches #MRR #Perkinamine Lightwave Logic, Inc.

Krishna Prasad Sharma

Seasoned Software Architect & Senior Software Engineer

3mo

Intel's renewed focus on advanced processes and packaging positions it for a strong comeback in semiconductor manufacturing.

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