Singh , Satinder Paul (薩丁德·保羅·辛格)

Singh , Satinder Paul (薩丁德·保羅·辛格)

Metropolregion München
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Info

I'm a technologist and strategist with 20+ years of experience turning next-gen ideas…

Artikel von Singh , Satinder Paul (薩丁德·保羅·辛格)

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Aktivitäten

Berufserfahrung

  • Hermes Semiconductors Pvt Ltd Grafik

    Hermes Semiconductors Pvt Ltd

    Munich, Bavaria, Germany

  • -

  • -

    Dublin, County Dublin, Ireland

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    Edinburgh, Scotland, United Kingdom

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    Copenhagen, Capital Region, Denmark

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    Munich, Bavaria, Germany

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    Munich Area, Germany

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    Munich , Germany

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    Eindhoven Area, Netherlands

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    San Jose , Bangalore , Frankfurt, Tokyo

Bescheinigungen und Zertifikate

  • Intellectual Property Protection in VLSI Designs

    -

    Ausgestellt:

Veröffentlichungen

  • Design Challenges in the era of IoT & M2M applications

    ChipEx 2016 , Israel

    Veröffentlichung anzeigen

  • Entering into new Lean Fabless Semiconductor Business Model

    X-Fest 2014 Munich

  • Changing Dimensions in Technology Management

    X-Fest 2013 Munich

  • Assessment of Supply Chain Management in ASIC/SoC Industry

    EET 2007

  • Challenges in Logic Synthesis and Formal Verification of SystemVerilog RTL

    SNUG Munich 2010

  • Multi Voltage Implementation Flow in ASIC Designs

    SoC Central Symposium, Bangalore

  • Path-based Analysis: A Realistic Solution to Unrealistic Timing Paths in Complex ASICs

    SNUG Munich 2011

  • SoC Synthesis – Challenges and Techniques

    ASIC Tech Forum 2006

  • SystemC –The Next Level of Abstraction

    ASIC Tech Forum 2005

  • Using Primetime DMSA for Timing Analysis, Power Recovery and Hold Time Fixing for a Multi-Million Gate, Multi-Mode ASIC Design

    SNUG Munich 2010

Mitglied werden, um alle Veröffentlichungen anzuzeigen

Kurse

  • Build OVM & UVM Testbenches

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  • CMOS Analog Circuit Design

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  • Circuit Design & SPICE Simulations

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  • Clock Tree Synthesis

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  • Custom Layout

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  • ESD - An Analog Design Viewpoint

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  • Functional Hardware Verification

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  • High Level Synthesis

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  • IC Compiler

    -

  • Intellectual Property Protection in VLSI Designs

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  • Mixed Signal Methodology

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  • Physical Design Flow

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  • SOC Verification using SystemVerilog

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  • Signal Integrity

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  • SystemVerilog - Design and Verification

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  • SystemVerilog Assertions and Coverage

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  • UVM Adopter Class

    -

Auszeichnungen/Preise

  • Key Note Speaker

    TSMC Netherlands, 2016

  • Key Note Speaker

    ChipEx Israel, 2016

  • Right first time – 1st Silicon Success

    Oracle Corporation

    Awarded “Right first time – 1st Silicon Success” award from Oracle for SOL ASIC support.

  • Spark Award

    LSI Corporation

    Awarded Blue Spark Award from LSI for contribution in Dolomiti ASIC.

  • Best Paper Award

    SNUG Technical Committee

    Awarded Best paper award by Technical Committee of SNUG Munich 2011 for paper on PBA.

  • Chairman Innovation Award

    Wipro Technical innovation Committee.

    Awarded the Wipro’s Chairman’s Innovation Award (2004-05) for contribution in WLAN IP team.

  • Best Six Sigma Project

    Wipro Quality Assurance Group

    Received Wipro's best "Six sigma project" award in 2004 for achieving very high standards in Quality Assurance ISO audit.

  • United Nations Scholarship

    United Nations

    United Nations Scholar of 1996-97 batches.

  • Merit Certificate

    Central Board of Secondary Education

    Outstanding academic performance and for being among top 0.1% of successful candidates in Mathematics (Scoring 100/100 in Mathematics)

  • National Talent Search Examination (N.T.S.E.) Scholarship

    National Council of Educational Research and Training, Government of India.

    National Talent Search Examination (N.T.S.E.) Scholarship (1996) awarded by National Council of Educational Research and Training, Government of India.

  • All India Rank -2

    National Mathematics Olympiad Contest

    Second topper of National Mathematics Olympiad Contest (N.M.O.C.) (1995).

  • Merit Certificate

    Central Board of Secondary Education

    Outstanding academic performance and for being among top 0.1% of successful candidates in Mathematics (Scoring 100/100 in Mathematics)

Prüfungsergebnisse

  • GMAT

    Prüfungsergebnis: 740/800

Sprachen

  • English

    Muttersprache oder zweisprachig

  • German

    Verhandlungssicher

  • French

    Fließend

  • Punjabi

    Muttersprache oder zweisprachig

  • Hindi

    Muttersprache oder zweisprachig

  • Sanskrit

    Fließend

Organisationen

  • Morocco Microelectronics Cluster

    Executive Member

    –Heute

  • European Semiconductor Industry Association

    Executive Member

  • Global Semiconductor Alliance (GSA)

    Executive Member

  • India Electronics & Semiconductor Association (IESA)

    Executive Member

  • SEMI - Europe

    Corporate Member

  • Semiconductor Research Corporation

    Member

  • SIA: Semiconductor Industry Association

    Technology Road Map Committee

  • SIAJ - Semiconductor Industry Association Japan

    Executive Member

  • Singapore Semiconductor Industry Association (SSIA)

    Member

  • VLSI Society of India

    Associate Member

  • World Semiconductor Council (WSC)

    Member

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