I am pursuing PG Diploma Course at RV-VLSI in the RTL Design Verification stream. As I will be doing projects related to verification of protocols using SystemVerilog and UVM to gain expertise, I am interested to work in ASIC Design Verification. This would be helpful to utilize my Educational Qualifications and experience to the best.
I am pursuing PG Diploma Course at RV-VLSI in the RTL Design Verification stream. As I will be doing projects related to verification of protocols using SystemVerilog and UVM to gain expertise, I am interested to work in ASIC Design Verification. This would be helpful to utilize my Educational Qualifications and experience to the best.
