I'm amused that it's just a PC motherboard, and that it uses ISA to talk to the generator hardware itself. Makes perfect sense; nothing needs high data rates there, and it's really easy to interface with. I just wouldn't have necessarily predicted it before seeing the case open.
Many modern measurement hardware is built this way - motherboard with custom PCIe boards. It dramatically simplifies GUI design using standard tools and keeps the complexity separated on the external boards. The PCIe boards also can be designed for one/two measurement channels making the equipment rather modular and customizable.
A lot of hardware is built like this. Separating the GUI from the real time or safety-critical aspects of the system is a common enough need that there are many System-on-Module (SoM) boards that can run Linux or Windows and also include an ARM processor for real time behavior on the same die.
Your UI can be built in Python/Qt/Tk while the safety critical stuff is programmed in C running on an RTOS.
I meant safety critical, although a similar design decision is often made for time critical behavior.
In some cases, e.g., for IEC-62304 compliance, software is designated as various safety classes based on likelihood of causing Harm. If you can extract the more safety critical software from the rest of the system and prove that it is sufficiently segregated (e.g., by putting it on a separate processor), you can substantially reduce your Verification and documentation burden.
I haven't done it myself... yet... but these days it's not that horrible to DIY PCIe with an FPGA. There's even a fully open source PCIe core, and there are example designs for it: https://github.com/enjoy-digital/litepcie.
