Prisma’s Post

Why do we need MMU in the kernel? 1.Memory protection between multiple processes . Whenever a process runs the kernel assigns a dedicated virtual addresses space ,at run time the MMu maps/translates virtual addresses to physical memory in RAM. hence it avoids overlapping of other processes code segment.which helps to avoid incorrect data or code access.

Check out these improvements for the IDA debugger, which will be part of the upcoming 9.2 release. ➥ A redesigned register subview that provides a much richer context.   ➥ A more accurate call stack reconstruction mechanism for certain x64 PE files. https://lnkd.in/gqgFwd72

Jan now runs faster on CUDA. We updated llama.cpp with the latest improvements and fixed a CUDA backend bug upstream. Jan stays pinned to v6324 due to flash-attention changes. If you have auto-update on, you'll get this automatically - if not, we recommend turning it on.

Ever had a microservice dependency fail and bring down your entire application with it? It's a common problem in distributed systems, but one that can be solved with the Circuit Breaker pattern. I'm excited to share my new Dart package, dart_circuit_breaker, now available on pub.dev. It provides a simple, state-driven solution to prevent cascading failures and keep your services healthy. Learn how to build more robust applications and add it to your project today! 🔗 https://lnkd.in/dFKargyV #Dart #Flutter #SystemDesign #DistributedSystems #ResilientSystems #CircuitBreaker #SoftwareArchitecture

For those of you who use Hexagonal-/Onion-Architecture in your applications: 1. What’s your primary reason/goal for using it? 2. How do you assign code to the abstraction elements (ports, adapters, rings)?

Just implemented high-performance matrix multiplication in C++ using OpenMP, benchmarked it on multiple matrix sizes, and visualized the speedup with multi-threading. 💡Key takeaways: Parallelization can drastically reduce execution time for large matrices Even simple HPC projects help understand CPU cores, threads, and scaling Visualizing results makes performance insights clear and impactful. Check out the project here: - https://lnkd.in/gscpn9Kr #HPC #OpenMP

Did you know that since #Angular V20, you can make your host element type-safe 🤩 You simply add typeCheckHostBindings to your tsconfig and your host element becomes fully type-safe 🎉 Stop using @HostBinding and @HostListener, and start using the host element inside your component decorator ✅

🚀 Day 64 of #100DaysOfCode Today, I worked on building an Instruction Pipeline Simulator — a visual way to understand how CPU instructions move through the classic stages: ➡️ IF → ID → EX → MEM → WB 🔍 What I Learned & Implemented   • Instruction Pipeline Basics   • IF (Instruction Fetch): Get the instruction from memory.   • ID (Instruction Decode): Understand what to execute.   • EX (Execute): Perform the operation (ALU).   • MEM (Memory Access): Load/Store if required.   • WB (Write Back): Save the result. Pipeline Hazards & Solutions   • Structural Hazards → Resource conflicts when two stages need the same hardware.   • Data Hazards → One instruction depends on the result of a previous one.   • Control Hazards → Branch instructions cause uncertainty. Github repo : https://lnkd.in/gGWjyfZ9 #100DaysOfCode #React #TailwindCSS #ComputerArchitecture #LearningByDoing #Gamification #PipelineSimulator

Playing around with Rust on ESP32 microcontrollers again. So on the ESP-RS board it is easy, this board is made for Rust and uses the ESP32-C3 chip which uses the riscv target so it just works with the latest stable Rust compiler. But some other boards I have are ESP32-S3 (dual core), but it also turns out they are not riscv but Extensa cores and need a special Espressif version of the Rust compiler. I thought this was going to be a pain, but it seems to be easy to install: cargo install espup --locked And then: espup install Followed by: esp-generate --chip esp32s3 projectname I'm hoping to write some drivers for various i2c based sensors I have using this framework: https://lnkd.in/gHCyAFhy Hopefully it won't be too much of a challenge getting it working on both ESP32-C3 and S3 boards. edit: I also had to install the Extensa linker xtensa-esp32s3-elf-gcc https://lnkd.in/gaPu5h5z

Made an async coroutine-based Rust implementation of traversal over filesystems. Features Barriers, Sequences, Futures, Triggers, and Timed version of each of those. Source at https://lnkd.in/gPrV4hcf I'll make a fully threaded demo to compare overhead.