Personal Information
Organization / Workplace
Dehra Dun Area, India India
Occupation
Asst. Professor at GKV Haridwar
Industry
Education
Tags
heman pathak
michel j. quinn
parallel algorithms
multiprocessor
pram
simplification of boolean function
sum on hypercube
sum of n numbers
simple graph
task graph
nondeterministic model
deterministic model
dynamic scheduling
grahams scheduling algorithm
dynamic load balancing
static scheduling
dialation-1 embadding
embedding of graph
mapping
cost optimal prefix sum
sum on shuffle exchange
sum on mesh
sum on uma
broadcasting on muticomputers
prefix sum on multicomputer
staggering of matrix
matrix multiplication on mesh
matrix multiplication on hypercube
matrix multiplication on multiprocessor
block oriented matrix multiplication
matrix multiplication on multicomputer
row column oriented matrix multiplication
parallel computing
parallel processing
kgc
multi computer
pipelining
flynn's classification
throughput
speedup
list ranking
merging of two sorted list
prefix sum parallel algorithm
preorder tree traversal
ram
suffix sum
graph coloring
fortran 90
sequent c
fork
barrier synchronization
mutual exclusion synchronization
parallel programming languages
multiconputer
uma
cost
cost optimal
brent's theorem
cost optimal reduction algorithm
boolean algebra
flip-flops
characteristic equation
characteristic table
excitation table
rs-flip-flop
d-flip-flop
jk-flip-flop
t-flip-flop
register
shift register
ripple counter
asynchronous counter
synchronous counter
mod-10 ripple counter
bcd-counter
ring counter
johnson's counter
cpu
general register organization
stack organization
reverse polish notation
postfix
infix to postfix
instruction formats
risc
cisco
addressing modes
mesh
hypercube
logic gates
minterms
maxterms
standard form
canonical form
venn diagram
truth table
boolean function
logical operators
conversion from standard to canonical
principle of duality
de morgan's law
law of complementation
karnaugh map
k-map
nand gate
nor gate
adder
subtractor
binary parallel adder
decimal adder
magnitude comparator and decoder
decoder
encoder
multiplexer
exclusive-or and equivalence expressions
priority encoder
parity checker
parity generator
shuffle exchange
See more
Presentations
(16)Personal Information
Organization / Workplace
Dehra Dun Area, India India
Occupation
Asst. Professor at GKV Haridwar
Industry
Education
Tags
heman pathak
michel j. quinn
parallel algorithms
multiprocessor
pram
simplification of boolean function
sum on hypercube
sum of n numbers
simple graph
task graph
nondeterministic model
deterministic model
dynamic scheduling
grahams scheduling algorithm
dynamic load balancing
static scheduling
dialation-1 embadding
embedding of graph
mapping
cost optimal prefix sum
sum on shuffle exchange
sum on mesh
sum on uma
broadcasting on muticomputers
prefix sum on multicomputer
staggering of matrix
matrix multiplication on mesh
matrix multiplication on hypercube
matrix multiplication on multiprocessor
block oriented matrix multiplication
matrix multiplication on multicomputer
row column oriented matrix multiplication
parallel computing
parallel processing
kgc
multi computer
pipelining
flynn's classification
throughput
speedup
list ranking
merging of two sorted list
prefix sum parallel algorithm
preorder tree traversal
ram
suffix sum
graph coloring
fortran 90
sequent c
fork
barrier synchronization
mutual exclusion synchronization
parallel programming languages
multiconputer
uma
cost
cost optimal
brent's theorem
cost optimal reduction algorithm
boolean algebra
flip-flops
characteristic equation
characteristic table
excitation table
rs-flip-flop
d-flip-flop
jk-flip-flop
t-flip-flop
register
shift register
ripple counter
asynchronous counter
synchronous counter
mod-10 ripple counter
bcd-counter
ring counter
johnson's counter
cpu
general register organization
stack organization
reverse polish notation
postfix
infix to postfix
instruction formats
risc
cisco
addressing modes
mesh
hypercube
logic gates
minterms
maxterms
standard form
canonical form
venn diagram
truth table
boolean function
logical operators
conversion from standard to canonical
principle of duality
de morgan's law
law of complementation
karnaugh map
k-map
nand gate
nor gate
adder
subtractor
binary parallel adder
decimal adder
magnitude comparator and decoder
decoder
encoder
multiplexer
exclusive-or and equivalence expressions
priority encoder
parity checker
parity generator
shuffle exchange
See more