Mips architecture
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This document discusses computer instruction sets and the MIPS instruction set architecture. It covers the different types of instructions in MIPS including R-format for register arithmetic, I-format for immediate operations and load/store, and J-format for jumps. The key components of MIPS instructions, such as opcode, register fields, and immediate constants are described. MIPS instructions are encoded in 32-bit binary formats to perform common arithmetic, logical, and data movement operations in a regular and simple manner.
Mips architecture
- 1. Chapter 2 Instructions: Language of the Computer
- 2. Summary of the previous Computer Architecture = Instruction set architecture + Computer organization Why we study computer architecture To increase computer performance Response Time (Execution Time) Bandwidth (Throughput) Chapter 2 — Instructions: Language of the Computer — 2
- 3. Chapter 2 — Instructions: Language of the Computer — 3 Instruction Set The group of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers had very simple instruction sets Simplified implementation Many modern computers also have simple instruction sets §2.1Introduction
- 4. Chapter 2 — Instructions: Language of the Computer — 4 The MIPS Instruction Set Used as the example throughout the book Stanford MIPS commercialized by MIPS Technologies (www.mips.com) Large share of embedded core market Applications in consumer electronics, network/storage equipment, cameras, printers, … Typical of many modern ISAs See MIPS Reference Data tear-out card, and Appendixes B and E
- 5. Chapter 2 — Instructions: Language of the Computer — 5 Arithmetic Operations Add and subtract, three operands Two sources and one destination add a, b, c # a gets b + c All arithmetic operations have this form Design Principle 1: Simplicity favours regularity Regularity makes implementation simpler Simplicity enables higher performance at lower cost §2.2OperationsoftheComputerHardware
- 6. Chapter 2 — Instructions: Language of the Computer — 6 Arithmetic Example C code: f = (g + h) - (i + j); Compiled MIPS code: add t0, g, h # temp t0 = g + h add t1, i, j # temp t1 = i + j sub f, t0, t1 # f = t0 - t1
- 7. Chapter 2 — Instructions: Language of the Computer — 7 Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Register numbers $t0 – $t7 are reg’s 8 – 15 $s0 – $s7 are reg’s 16 – 23 $t8 – $t9 are reg’s 24 – 25 §2.5RepresentingInstructionsintheComputer
- 8. Chapter 2 — Instructions: Language of the Computer — 8 MIPS R-format Instructions Instruction fields op: operation code (opcode) rs: first source register number rt: second source register number rd: destination register number shamt: shift amount (00000 for now) funct: function code (extends opcode) op rs rt rd shamt funct 6 bits 6 bits5 bits 5 bits 5 bits 5 bits
- 9. Chapter 2 — Instructions: Language of the Computer — 9 R-format Example add $t0, $s1, $s2 special $s1 $s2 $t0 0 add 0 17 18 8 0 32 000000 10001 10010 01000 00000 100000 000000100011001001000000001000002 = 0232402016 op rs rt rd shamt funct 6 bits 6 bits5 bits 5 bits 5 bits 5 bits
- 10. Chapter 2 — Instructions: Language of the Computer — 10 MIPS I-format Instructions Immediate arithmetic and load/store instructions rt: destination or source register number Constant: –215 to +215 – 1 Address: offset added to base address in rs E.g lw $t1, 50($t2) op rs rt constant or address 6 bits 5 bits 5 bits 16 bits
- 11. Chapter 2 — Instructions: Language of the Computer — 11 MIPS j-format Instructions Opcode = 6 bits Address = 26 bits E.g. J 1000
- 12. Chapter 2 — Instructions: Language of the Computer — 12
- 13. Chapter 2 — Instructions: Language of the Computer — 13