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Basic Computer
Architecture
Yong Heui Cho @ Mokwon University
2
Basic Computer Design
1. History of Computers
2. Introduction to Arduino
3. Basic Computer Architecture
4. Combinational Logic Circuit
3
Computer Components
• Input/output units
• Memory/storage units
• CPU (Central Processing Unit)
4
Motherboard Diagram
• Northbridge
– Connected to CPU in high
speed
• Southbridge
– Connected in low speed
• Bus
– Related to “omnibus”
– Communication system
between components
5
Computer System
6
Connection of Components
Northbridge
South
bridge
7
CPU Architecture
8
von Neumann Architecture
9
Harvard Architecture
10
CPU: 3 Major Components
• ALU (Arithmetic Logic Unit)
– Performs calculations and comparisons (data changed)
• CU (Control Unit): performs fetch/execute cycle
– Functions:
• Moves data to and from CPU registers and other hardware comp
onents (no change in data)
• Accesses program instructions and issues commands to the ALU
– Subparts:
• Memory management unit: supervises fetching instructions and d
ata
• I/O Interface: sometimes combined with memory management u
nit as Bust Interface Unit
• Registers
– Example: Program Counter (PC) or instruction pointer determi
nes next instruction for execution
□ Courtesy to Basic Computer Architecture, slideshare.
11
Machine Cycle
• Fetch-decode-execute-store
12
Concept of Registers
• Small, permanent storage locations withi
n the CPU used for a particular purpose
• Manipulated directly by the CU
• Wired for specific function
• Size in bits or bytes (not MB like memor
y)
• Can hold data, an address or an instructi
on
□ Courtesy to Basic Computer Architecture, slideshare.
13
Register Operations
• Stores values from other locations (regist
ers and memory)
• Addition and subtraction
• Shift or rotate data
• Test contents for conditions such as zero
or positive
□ Courtesy to Basic Computer Architecture, slideshare.
14
Registers in CPU
• Program
Counter (PC)
register
• Instruction
Register (IR)
• Status register:
status, flags
15
Cache Memory
• Cache level
– L1 cache: fastest and smallest
– L2 cache: next fastest and smallest
16
Operation of Memory
• Each memory location has a unique addr
ess
• Address from an instruction is copied to
the MAR (Memory Address Register) whi
ch finds the location in memory
• CPU determines if it is a store or retrieval
• Transfer takes place between the MDR (
Memory Data Register) and memory
• MDR is a two way register
□ Courtesy to Basic Computer Architecture, slideshare.
17
MAR, MDR, Memory
Address Data
□ Courtesy to Basic Computer Architecture, slideshare.
18
MAR-MDR Example
□ Courtesy to Basic Computer Architecture, slideshare.
19
Individual Memory Cell
□ Courtesy to Basic Computer Architecture, slideshare.
20
Memory Capacity
• Determined by two factors
1. Number of bits in the MAR
• 2K where K = width of the register in bits
2. Size of the address portion of the instruction
• 4 bits allows 16 locations
• 8 bits allows 256 locations
• 32 bits allows 4,294,967,296 or 4 GB
• Important for performance
– Insufficient memory can cause a processor to w
ork at 50% below performance
□ Courtesy to Basic Computer Architecture, slideshare.
21
Random Access Memory
• DRAM (Dynamic RAM)
– Most common, cheap
– Volatile: must be refreshed (recharged with pow
er) 1000’s of times each second
• SRAM (Static RAM)
– Faster than DRAM and more expensive than DR
AM
– Volatile
– Frequently small amount used in cache memory
for high-speed access used
□ Courtesy to Basic Computer Architecture, slideshare.
22
Read Only Memory
• Non-volatile memory to hold software th
at is not expected to change over the life
of the system
• Magnetic core memory
• EEPROM
– Electrically Erasable Programmable ROM
– Slower and less flexible than Flash ROM
• Flash ROM
– Faster than disks but more expensive
– Uses
• BIOS: initial boot instructions and diagnostics
• Digital cameras
□ Courtesy to Basic Computer Architecture, slideshare.
23
CMOS Memory
• CMOS (Complimentary Metal Oxide
Semiconductor) TR (Transistor)
– Low power consumption, cheap TR
• BIOS (Basic I/O System) and system
settings that users can change
24
Arduino: 직렬 통신으로 문자 받기
25
Arduino: 기계 엡실론 구하기

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Basic Computer Architecture

  • 1. Basic Computer Architecture Yong Heui Cho @ Mokwon University
  • 2. 2 Basic Computer Design 1. History of Computers 2. Introduction to Arduino 3. Basic Computer Architecture 4. Combinational Logic Circuit
  • 3. 3 Computer Components • Input/output units • Memory/storage units • CPU (Central Processing Unit)
  • 4. 4 Motherboard Diagram • Northbridge – Connected to CPU in high speed • Southbridge – Connected in low speed • Bus – Related to “omnibus” – Communication system between components
  • 10. 10 CPU: 3 Major Components • ALU (Arithmetic Logic Unit) – Performs calculations and comparisons (data changed) • CU (Control Unit): performs fetch/execute cycle – Functions: • Moves data to and from CPU registers and other hardware comp onents (no change in data) • Accesses program instructions and issues commands to the ALU – Subparts: • Memory management unit: supervises fetching instructions and d ata • I/O Interface: sometimes combined with memory management u nit as Bust Interface Unit • Registers – Example: Program Counter (PC) or instruction pointer determi nes next instruction for execution □ Courtesy to Basic Computer Architecture, slideshare.
  • 12. 12 Concept of Registers • Small, permanent storage locations withi n the CPU used for a particular purpose • Manipulated directly by the CU • Wired for specific function • Size in bits or bytes (not MB like memor y) • Can hold data, an address or an instructi on □ Courtesy to Basic Computer Architecture, slideshare.
  • 13. 13 Register Operations • Stores values from other locations (regist ers and memory) • Addition and subtraction • Shift or rotate data • Test contents for conditions such as zero or positive □ Courtesy to Basic Computer Architecture, slideshare.
  • 14. 14 Registers in CPU • Program Counter (PC) register • Instruction Register (IR) • Status register: status, flags
  • 15. 15 Cache Memory • Cache level – L1 cache: fastest and smallest – L2 cache: next fastest and smallest
  • 16. 16 Operation of Memory • Each memory location has a unique addr ess • Address from an instruction is copied to the MAR (Memory Address Register) whi ch finds the location in memory • CPU determines if it is a store or retrieval • Transfer takes place between the MDR ( Memory Data Register) and memory • MDR is a two way register □ Courtesy to Basic Computer Architecture, slideshare.
  • 17. 17 MAR, MDR, Memory Address Data □ Courtesy to Basic Computer Architecture, slideshare.
  • 18. 18 MAR-MDR Example □ Courtesy to Basic Computer Architecture, slideshare.
  • 19. 19 Individual Memory Cell □ Courtesy to Basic Computer Architecture, slideshare.
  • 20. 20 Memory Capacity • Determined by two factors 1. Number of bits in the MAR • 2K where K = width of the register in bits 2. Size of the address portion of the instruction • 4 bits allows 16 locations • 8 bits allows 256 locations • 32 bits allows 4,294,967,296 or 4 GB • Important for performance – Insufficient memory can cause a processor to w ork at 50% below performance □ Courtesy to Basic Computer Architecture, slideshare.
  • 21. 21 Random Access Memory • DRAM (Dynamic RAM) – Most common, cheap – Volatile: must be refreshed (recharged with pow er) 1000’s of times each second • SRAM (Static RAM) – Faster than DRAM and more expensive than DR AM – Volatile – Frequently small amount used in cache memory for high-speed access used □ Courtesy to Basic Computer Architecture, slideshare.
  • 22. 22 Read Only Memory • Non-volatile memory to hold software th at is not expected to change over the life of the system • Magnetic core memory • EEPROM – Electrically Erasable Programmable ROM – Slower and less flexible than Flash ROM • Flash ROM – Faster than disks but more expensive – Uses • BIOS: initial boot instructions and diagnostics • Digital cameras □ Courtesy to Basic Computer Architecture, slideshare.
  • 23. 23 CMOS Memory • CMOS (Complimentary Metal Oxide Semiconductor) TR (Transistor) – Low power consumption, cheap TR • BIOS (Basic I/O System) and system settings that users can change