Arm v8 instruction overview android 64 bit briefing
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The document provides an overview of ARM64 and 64-bit Android. It discusses the benefits and drawbacks of 64-bit, the 64-bit Android ecosystem including CPUs, compilers, file formats, and runtime. It also outlines the ARM64 instruction set including registers, calling convention, and memory operations. Finally, it reviews the current state of 64-bit Android with 64-bit kernels, compilers, and emulators ready but 64-bit apps and infrastructure software still in development.
Arm v8 instruction overview android 64 bit briefing
- 1. M E R C K H UN G < M E R C K H UN G @ G M A I L . C O M > ARM V8 INSTRUCTION OVERVIEW & 64-BIT ANDROID BRIEFING
- 2. OUTLINE âą Benefit of 64-bit âą Drawback of 64-bit âą 64-bit Android ecosystem âą 64-bit ELF file format âą AARCH32 & AARCH64 states âą AARCH64 register files âą AARCH64 calling convention âą AARCH64 runtime ABI (AEABI) âą AARCH64 instructions âą Summary of AARCH64 âą State of 64-bit Android
- 4. BENEFIT OF 64-BIT âą Larger virtual address space (AARCH64 -> 49 bits) (Wind down overlaying issues of larger programs) âą Wider width memory access bus (Reduce memory latency) âą Wider width of register files (Better for 64-bit lengthy arithmetic) âą More register files (Reduce register spilling) âą New instruction set & new wider I/O peripherals (New feature) âą New marketing momentum âą Opportunities to power consumption reduces
- 6. DRAWBACK OF 64-BIT âą Larger size of program files (On disk format) âą Larger size of pointers (In memory format) (32-bit -> 64-bit, 4bytes -> 8bytes in size) âą Mode switching overhead (T32, A32, and A64 execution environment) âą Ecosystem migration & backward compatibility (Upgrade to 64-bit, compiler, software vendors, validations, time to market, SoC vendors, âŠetc.)
- 8. 64-BIT ANDROID ECOSYSTEM âą 64-bit CPUs, SoCs & Reference Designs (ARM, Apple, Samsung, nVidia, QCOM, Intel, âŠetc.) âą 64-bit Compiler (Linaro, LLVM/GNU and community) âą On Disk Format (ELF64 format) âą In Memory Format (Program Loader/Linker) âą Runtime (Linux kernel itself, SYSCALL, ART/DALVIK, Calling convention) âą 64-bit native core, framework, shared/static library, and SW vendor support (Mono, AIR, Unity, âŠetc.) âą Marketing & time to popularity of 64-bit APPs âą Validation efforts of 64-bit system & APPs
- 9. 64-bit ELF file format
- 10. 64-BIT ELF FILE FORMAT âą ELF for the ARM 64-bit Architecture (AArch64) (http://infocenter.arm.com/help/topic/com.arm.doc.ihi0056b/IHI0056B_aaelf64.pdf) âą 64-bit header format (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, âŠetc.) âą Larger GOT/PLT entries & addresses âą New relocation types for 64-bit âą 64-bit DRAWF format of debugging info.
- 12. AARCH32 & AARCH64 STATES
- 13. AARCH32 & AARCH64 STATES
- 14. AARCH32 & AARCH64 STATES (T32 AND A32 MODES)
- 16. AARCH64 REGISTER FILES âą 64-BIT ARM INTRODUCTION TO PORTING (http://people.linaro.org/~rikuvoipio/aarch64-talk/) âą Integral registers X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30/LR SP/ZERO
- 17. AARCH64 REGISTER FILES âą 64-BIT ARM INTRODUCTION TO PORTING (http://people.linaro.org/~rikuvoipio/aarch64-talk/) âą SCALAR/SIMD REGISTERS 32 bit float registers: S0 ... S31 64 bit double registers: D0 ... D31 128 bit SIMD registers: V0 ... V31 SIMD and Scalar share register bank S0 is bottom 32 bits of D0 which is the bottom 64 bits of V0. âą There are 32 S registers and 32 D registers. The S registers are not packed into D registers, but occupy the low 32 bits of the corresponding D register. For example S31=D31<31:0>, not D15<63:32>
- 18. AARCH64 REGISTER FILES âą Introducing the 64-bit ARMv8 Architecture http://andrew.wafaa.eu/files/EuroBSDConARMv8.pdf
- 19. AARCH64 REGISTER FILES (HIGHLIGHT) âą Zero register (Read from R31) âą Stack pointer (Write to R31) âą PC (Program Counter) is never accessible âą Zero extended to 64-bits in A32 mode âą General purpose registers extended from 15 to 31 âą FP registers kept 32 in amount, changed to non- packed
- 21. AARCH64 CALLING CONVENTION âą Procedure Call Standard for the ARM 64-bit Architecture (AArch64) http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf
- 22. AARCH64 CALLING CONVENTION âą Procedure Call Standard for the ARMÂź Architecture http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
- 24. AARCH64 runtime ABI (AEABI)
- 25. AARCH64 RUNTIME ABI (AEABI) âą Run-time ABI for the ARMÂź Architecture http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf âą C++ Application Binary Interface Standard for the ARM 64-bit Architecture http://infocenter.arm.com/help/topic/com.arm.doc.ihi0059b/IHI0059B_cppabi64.pdf âą Floating-point library (Removed, Built-in vFP) âą Long long helper functions (Removed, native 64-bit) âą Other C and assembly lang. helper functions (Kept) âą C++ helper function (Kept, Reinforced C++ ABI)
- 26. AARCH64 RUNTIME ABI (AEABI) (LONG LONG HELPERS)
- 27. AARCH64 RUNTIME ABI (AEABI) (LONG LONG HELPERS)
- 29. AARCH64 INSTRUCTIONS âą Conditional instructions âą Addressing features 1. Register indexed 2. PC-relative âą The program counter âą Memory Load-Store 1. Bulk transfers 2. Exclusive accesses 3. Load-Acquire, Store-Release âą Integer Multiply/Divide (for addressing 64-bit)
- 30. AARCH64 INSTRUCTIONS (CONDITIONAL INSTRUCTIONS) âą Modern branch predictors work well enough âą In order to justify OPCODE space and impl. COST âą Only a very small set of âconditional data processingâ instr. are provided 1. Conditional branch 2. Add/substract 3. Conditional select with increment, negate or invert (Select (move) or Set) 4. Conditional compare
- 31. AARCH64 INSTRUCTIONS (ADDRESSING FEATURES) âą Register indexed addressing Extended T32 addressing modes, allowing 64-bit index and base registers to obtain addresses âą PC-relative addressing PC-relative literal loads (+- 1MB) Most conditional branches (+- 1MB) Unconditional branches (+- 128MB) PC-relative load/store by only 2 instructions (+- 4GB)
- 32. AARCH64 INSTRUCTIONS (THE PROGRAM COUNTER) âą In AARCH32, R15 = PC, writing to R15 means change the program counter âą In AARCH64, R15 != PC, PC can be changed by neither writing values to R15 nor other instructions âą In AARCH64, PC can only be read by computing a PC-relative address (ADR, ADRP, literal load, and direct branch), and branch-and-link instructions (BL and BLR) âą In AARCH64, PC can only be written by conditional/unconditional branches and exception handle/return
- 33. AARCH64 INSTRUCTIONS (MEMORY LOAD-STORE) âą Bulk transfers 1. LDM, STM, PUSH, and POP removed 2. LDP and STP added (Paired dest. registers) 3. LDNP and STNP added (streaming and non- temporal) 4. PRFM (prefetch memory) added âą Exclusive accesses (atomic operations) âą Load-acquire, Store-release (Release-consistency, RCsc), reducing the need for explicit memory barriers
- 36. SUMMARY OF AARCH64 âą New instruction set (decoding) & 32-bit fixed length âą Larger number of register files (31GPs, 32FPs) âą 64-bit pointer and integral registers âą Interoperability of AARCH32 (T32/A32) & AARCH64 âą Mandate vFP and Advanced SIMD (built-in) âą LDM/STM removed, LDP/STP added âą Conditional instructions are reduced, few left âą PC-relative addressing âą Memory ordering (new LDRA/STRL, Load- Acquire/Store-Release)
- 37. State of 64-bit Android
- 38. STATE OF 64-BIT ANDROID âą ARM64 CPUs, SoCs & Reference Designs 1. Samsung Exynos 5433 (Samsung Galaxy Note 4) 2. Qualcomm Snapdragon 8916 (Next upcoming) 3. nVidia Tegra K1(N9) âą X86_64 CPUs, SoCs & Reference Designs 1. Intel Baytrail-T ATOM SoC 2. Intel Moorefield ATOM SoC âą ARM64 Compiler GCC (Ready, by Linaro and communities) LLVM (Ready, by Apple for iOS development) âą X86_64 Compiler GCC and LLVM (Ready)
- 39. STATE OF 64-BIT ANDROID âą ELF64 Format for ARM64 (On Disk) ARM64 (Ready) X86_64 (Ready) âą ELF64 Program Loader/Linker (In Memory) ARM64 GNU Linker (Ready, by Linaro) x86_64 GNU Linker (Ready) âą 64-bit Calling Convention ARM64 (Ready) X86_64 (Ready) âą 64-bit Linux Kernel & ABI ARM64 (Ready, by Linaro) X86_64 (Ready)
- 40. STATE OF 64-BIT ANDROID âą 64-bit Android ART Runtime ARM64 (Ready) X86_64 (Ready) âą 64-bit Android Emulator ARM64 (Ready) X86_64 (Ready) âą 64-bit native core, framework, shared/static library ARM64 (Ready) X86_64 (Ready)
- 41. STATE OF 64-BIT ANDROID âą 64-bit Android SW infrastructure software (Mono, AIR, Unity, âŠetc.) ARM64 (Not available yet) X86_64 (Not available yet) âą 64-bit Android APPs ARM64 (Not available yet) X86_64 (Not available yet) âą RenderScript ARM64 (Not available yet) X86_64 (Not available yet)
- 42. THANK YOU