03 Mcu Day 2009 (C2000) 8 13 Editado

Editor's Notes

• #6: The 28x CPU is a low-cost 32-bit fixed point processing core This device draws from the best features of digital signal processing, reduced instruction set computing (RISC), and microcontroller architectures, firmware, and tool sets CPU features a modified Harvard architecture and circular addressing RISC features are single-cycle instruction execution, register-to-register operation, and modified Harvard architecture (useable in Von Neumann mode) Microcontroller features include ease of use through an intuitive instruction set, byte packing and unpacking, and bit manipulation The modified Harvard architecture of the CPU enables instruction and data fetches to be performed in parallel. The CPU can read instructions and data while it writes data simultaneously to maintain the single-cycle instruction operation across the pipeline CPU architecture Protected pipeline. CPU implements and 8-phase pipeline. Independent register space – system-control, math registers, data pointers ALU – performs 2s complement arithmetic and Boolean logic operations Address register arithmetic unit – generates data memory addresses and increments/decrements points in parallel with ALU operations Barrel shifter – performs all left and right shifts of data Multiplier – performs 32x32 2s complement multiplication w/ a 64-bit result. The following debug events can cause a break in program execution and allow more flexibility than software breaks: Breakpoint initiated by ESTOP instructions An access to a specified memory location Request from debug host or other hardware
• #7: Native floating point brings many advantages, not only performance-wise. Floating point is more robust, meaning it is less error-prone that fixed point math. It can also do the same math operations or functions as fixed-point with significantly fewer instructions, resulting in easier development and faster time-to-market. Engineers usually start development in floating-point, then translate the code into fixed-point before implementing them in their final designs. Eliminating the need for this conversion reduces development time as well as prevents any possible scaling and saturation issues. Through benchmarks against other C28x processors, floating-point instructions can help reduce the cycle count for math functions by 52%. C2834x’s on-board RAM instead of Flash leads to reduced memory access time, further reducing the cycle count for math loops to a 64% improvement. The FPU on Delfino devices adds a secondary pipeline to the C28x core. When the CPU realizes a FPU instruction is being processed (in decode stage 2), it passes the instruction off to the FPU instruction pipeline where the floating-point hardware execution units are used. Floating point instructions are enabled when the programmer sets a compiler switch to fpu mode. Without enabling this switch, the compiler will continue to generate the assembly code using the fixed-point support libraries. Another implementation difference between fixed-point and floating point is during function calls. In fixed-point mode, the values to be passed are stored on the stack. In floating-point mode, the values are stored in separate FP registers. Another point of note is that Delfino devices require the floating-point version of libraries to run using the FPU instructions( ex. IQMath, Flash API). The FPU on Delfino devices (F2833x, C2834x) natively supports IEEE single-precision 754 (double-precision requires support libraries).
• #8: The ADC’s just-in-time interrupts are basically early interrupt calls so that the context switch is finished at exactly the same time that the result register is populated, resulting in zero delay.
• #10: The enhanced pulse width modulator peripheral is a key element in controlling many of the power electronic systems found in both commercial and industrial equipment. The ePWM performs a digital to analog (DAC) function, where the duty cycle is equivalent to a DAC analog value. An effective PWM peripheral must be able to generate complex pulse width waveforms with minimal CPU overhead and intervention. It needs to be highly programmable and very flexible (while being easy to understand and use). The ePWM unit described here addresses these requirements by allocating all needed timing and control resources on a per PWM channel basis. This modular approach results in an orthogonal architecture and provides a more transparent view of the peripheral structure – helping users to understand its operation quickly. Sub-module Overview Time Base A 16-bit counter is located in the time base module and passes on the time information to the counter Compare (CC) module and the action qualifier (AQ) modules. The time base module contains logic for synchronizing with subsequent or preceding ePWM modules. Counter Compare Specify the PWM duty cycle for both PWM outputs -- which can be programmed independently. Specify the time at which switching events occur on each output. The CC module can also capture the timer value on a rising edge event, functioning as a 16-bit input capture. Action Qualifier The actual PWM signal is generated by the Action Qualifier module based on info from the CC and timer base modules. AQ module can be programmed to force the pin to 1, 0, or toggle depending on four different conditions: count = 0, count = max, CompA and CompB. The output can also be manually set with software. The AQ also can generate interrupt/ADC conversions and pass the event to the Event Trigger and Interrupt module. Dead Band Generator Control of the traditional complementary dead-band relationship between upper and lower switches. The first is the original signal, the rising edge of which undergoes a programmable delay in its expansion over time (rising edge delay, RED). The second signal is likewise subjected to a freely programmable delay, this time at the falling edge (falling edge delay, FED). It is now possible to choose how the two signals are to behave relative to each other, i.e. whether the two signals are “active high”/“active low”or “complementary active high” / “complementary active low”. Or Bypass the dead-band module entirely – PWM passed through without modification PWM Chopper The PWM chopper divides up the pulse of a PWM signal – i.e. the logical-1 part – further into single pulses (e.g. in certain transformer applications). The chopper frequency may assume certain specific values between 1.6 and 12.5 MHz and have fixed pulse widths of 12.5%, 25%, 37.5%, ..., 87.5%. Moreover, the width of the first pulse of a chopper pulse series can be programmed separately from the other pulses, e.g. in order to precharge a capacitor to a certain voltage. Or Bypass the PWM chopper module entirely – PWM passed through without modification Trip Zone Generator The Trip Zone module consists of six zones or pins that can be freely assigned to a specific EPWM module. The primary function of this module is to react as quickly as possible to a fault or an error in the application and to disable the PWM signals or switch one or more PWM pins to a high-ohm mode (one shot mode). This is controlled by the hardware and takes place with minimal delay as soon as an edge has been registered on the trip zone pin. Such circuitry allows a trip zone pin to be offered a rising edge which adjusts itself if, say, the current exceeds a certain threshold at a particular point in the application. Alternatively, the trip zone module can also be set such that the length of a single pulse of a PWM is automatically limited by an edge at the trip pin (cycle-by-cycle mode), if the assessed current exceeds a threshold at a certain point. This can take place continuously and without intervention by the software; in contrast, in one shot mode the system is usually disabled in the case of a trip event and the software must evaluate how serious the fault is. Channel A can be sent to the High Resolution module for up to 65ps resolution on C2834x, 150ps resolution on others. Piccolo devices have an additional digital compare submodule that compares signals external to the ePWM module to directly generate events to trigger trips or events.
• #11: The High Resolution PWM extends the time resolution capabilities of the conventionally derived digital pulse width modulator (PWM). The HRPWM is typically used with the PWM resolution falls below ~9-10 bits. The effective resolution for a conventionally generated PWM is a function of PWM frequency (or period) and system clock frequency. As the switching frequency of the PWM increases, the effective resolution decreases. The HRPWM is based on micro edge positioner (MEP) technology which is capable of positioning an edge very finely by sub-dividing one coarse system clock of a conventional PWM generator. The time step accuracy is 150ps for Piccolo devices.
• #12: Piccolo uses a part-pipelined, part SAR ADC. The basic structure is similar to the previous, fully pipelined ADC, but the control interface is different. this ADC is not sequencer based. Instead, it is SOC based. (The term SOC is configuration set defining the single conversion of a single channel. In that set there are three configurations: the trigger source that starts the conversion, the channel to convert, and the acquisition (sample) window size. Each SOC is independently configured and can have any combination of the trigger, channel, and sample window size available. Multiple SOC’s can be configured for the same trigger, channel, and/or acquisition window as desired.) This provides a very flexible means of configuring conversions ranging from individual samples of different channels with different triggers, to oversampling the same channel using a single trigger, to creating your own series of conversions of different channels all from a single trigger. Basically, you can program your own auto-sequencer. The Piccolo ADC also brings new features. First, both fixed range and ratio-metric inputs are supported, meaning the input will not always be based on 0-3V. This brings flexibility and more accuracy to the conversions. A second new feature is adjustable acquisition windows. External drivers vary in their ability to drive an analog signal quickly and effectively. Some circuits require longer times to properly transfer the charge into the sampling capacitor of an ADC. To address this, the ADC supports control over the sample window length for each individual SOC configuration. Third, the concept of early interrupts eliminates system latency. The ADC has the ability to call an interrupt before the conversion actually finishes. This way, the CPU can start switching contexts while the ADC finishes the conversion. The early interrupt is timed such that the conversion is ready to be read immediately before the interrupt code starts executing. The advantage of having two sample-and-holds is that you can measure two values simultaneously, even if they are converted sequentially by the ADC. This is useful in applications like current and voltage measurements, where a dual sample-and-hold gets the accuracy of two separate ADCs. With the superior speed of the ADC module, such a solution is just as good, if not better, than having two independent ADCs.
• #13: The comparator module is a true analog voltage comparator in the VDDA domain. Can accommodate two external analog inputs or one external analog input using the internal DAC reference for the other input (Each comparator block contains a 10-bit voltage DAC reference that can be used to supply the inverting input of the comparator) The output of the comparator can be passed asynchronously or qualified and synchronized to the system clock period The comparator output is routed to both the ePWM Trip Zone Modules, as well as the GPIO output multiplexer Synchronization can delay the output signal until the next clock cycle. Qualification can delay the output signal for a pre-programmed duration (in clock cycles). DAC is not externally available to user.
• #14: The eCAP module is used in systems where accurate timing of external events is important. Uses for eCAP include: Speed measurements of rotating machinery (e.g. toothed sprockets sensed via Hall sensors) Elapsed time measurements between position sensor pulses Period and duty cycle measurements of pulse train signals Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors The Enhanced Capture unit is also based off of a 32-bit pre-scaled time base. The eCAP can be used in two modes: input capture and PWM output Input Capture: Each enhanced capture module has one pin, but it allows discrete times for four events to be recorded. This is useful for reading successive inputs, such as signals from a remote control, without having to interrupt the CPU after each trigger. Each of the four events can be configured independently as rising or falling edge triggers. A 4-state sequencer in the Event Qualifier keeps track of which register to store the timestamp in. The Event Qualifier can record the timestamp in one of two modes: delta mode (where the counter is reset after each trigger) or absolute mode (where the counter keeps incrementing as the captures take place). The eCAP can operate in one-shot or continuous modes. In one-shot, once all four registers are filled, the contents are frozen until the user finishes reading from them and enables the capture again. In continuous mode, the sequencer automatically resets and cycles back around to put new capture timestamps in the registers as they occur. The interrupt is also flexible, as it can be configured to flag an interrupt after any of the four capture events or on counter overflow. PWM Output : The eCAP can also be configured as a basic PWM signal generator. Two of the CAPx registers contain the period data and the remaining two serve as shadow registers. The eCAP modules can be phase synchronized with each other as well as the ePWM modules. The interrupt is can also be flagged by PWM events. To obtain advanced functionality like deadband generation or complimentary outputs, the signal can be connected to external logic.
• #15: The enhanced quadrature encode pulse module is used for direct interface with a linear or rotary incremental encoder to get position, directoin, and speed information from a rotating machine for use in a high-performance motion and position-control system. The eQEP module supports four inputs: two source pins, an index (or 0 marker) pin, and a strobe input pins. A quadrature encoder from a motor typically has a minimum of two signals – A and B. In quadrature-clock mode, the eQEP module can use these two signals to determine the direction of rotation and a clock signal (speed). Some motors have hardware that decodes A and B internally, and directly outputs a clock and direction signal, which should be used with the eQEP’s direction-count mode. In both of these modes, a 32-bit register keeps track of the position by incrementing when the motor is spinning in one direction and decrementing when the motor is spinning in the other direction (the polarity is adjustable). In the Up-count or down-count modes, the counter direction signal is hard-wired for up count (or down count). In these two modes, the position counter is used to measure the frequency (speed) of the input, which is useful in high-speed motors (it is faster than XCLK) The third signal, EQEPxI, is the index signal. Some motors have this output to tell microprocessors when one full revolution has occurred. A pulse is sent through this signal whenever the rotation passes the index point. The fourth signal, EQEPxS, is the strobe signal. This is an external signal provided by the system to the microcontroller when the motor has reached a certain physical position, for example, the carriage-return position and home position on a typewriter. The MCU receives the signal and takes the appropriate action. The Position Counter and Control Unit (PCCU) initializes the position counter, keeps track of motor position, and triggers interrupts based on position. The position counter can be set to restart in 4 ways – on an index event (after every rotation), on a pre-programmed maximum position, on index event for the very first index only and then by maximum position, and on unit time out. Each of these modes represent different use cases. The PCCU also has a pulse stretcher for easy synchronization with outside signals. The Quadrature Capture Unit (or Edge Capture Unit) is used to measure elapsed time between the unit position events, useful for low-speed measurement. Each eQEP module contains a 16-bit watchdog timer that monitors the q-clock to indicate proper operation of the system. If no q-clock event is detected until a period match, the watchdog timer will time out and an interrupt flag will be set. The time-base in eQEP modules is a 32-bit timer that is used to generate periodic interrupts for velocity calculations. The QEP watchdog monitors the quadrature clock and sets an interrupt flag when no event is detected after a programmable time-out value.
• #18: On-chip peripherals offer lower system cost Same high-perf core, throttled performance, same efficiency, code compatible, math algorithms (Alex will provide benchmarks for the core and core + CLA) PWM ease of use example (ADC, Sampling and conversion time, PWM, duty cycle and period) CPU benchmarks for control/math algorithms Lower System Cost / Increased System Reliability On-Chip Voltage Regulation On-chip regulator eliminates requirement for external 1.8V rail BOR/POR protection eliminates requirement for external supervisor Eliminates any start-up glitches on PWM outputs Dual On-Chip Oscillators No external clock circuitry required Independent time bases for main CPU and Watchdog support standards such as IEC-60730 Analog Comparators Trip PWM Outputs, Generate Interrupts, Sync PWM Outputs, Generate ADC SOC, Route to GPIO Pins Analog-to-Digital Converter Continuous sampling up to 5 MSPS Ratio metric across full 3.3V input range No support pins High Resolution PWM High Resolution Duty Cycle Modulation with 150ps Steps High Resolution Frequency Modulation with 150ps Steps
• #19: Significantly Lower System Cost Single Supply On-Chip Reset Lower Power Consumption Minimal Support Pins More Functional Pins Smaller Packages On-Chip Oscillators Enhanced PWM Capabilities High Res PWM On Period (i.e. resonant converters) Enhanced PWM Triggering (i.e. peak current mode control) Improved Analog Ratio-metric ADC Improved Triggering Analog Comparators "Turbo-Charge" Performance Control Law Accelerator Improved Power Efficiency Significantly Reduced Sample-To-Output Delay & Jitter For Improved System Response & Support Higher MHz Control Loops
• #21: Dhrystone benchmark is typically understood as an industry standard benchmark for general purpose control apps Real-time control is a mixture of not only general purpose control but also math performance TI is the largest licensee of ARM cores, from telecommunication, audio and video apps, and automotive apps We understand that the ARM Cortex M3 CPU is a good core for general purpose and host control apps When you branch into real-time control apps with math performance we show that the C28x CPU is a much more powerful machine The table below shows a standard application – AC induction motor. It shows that the C28x CPU running at a slower clock speed performs these real-time control algorithms faster and has more head room left over to also run the general purpose apps. Thus, the M3 is a good solution for stand-alone general purpose, but the C28x (and the C28x + CLA) prove to be the right solution for real-time control
• #22: On-chip peripherals offer lower system cost Same high-perf core, throttled performance, same efficiency, code compatible, math algorithms (Alex will provide benchmarks for the core and core + CLA) PWM ease of use example (ADC, Sampling and conversion time, PWM, duty cycle and period) CPU benchmarks for control/math algorithms Lower System Cost / Increased System Reliability On-Chip Voltage Regulation On-chip regulator eliminates requirement for external 1.8V rail BOR/POR protection eliminates requirement for external supervisor Eliminates any start-up glitches on PWM outputs Dual On-Chip Oscillators No external clock circuitry required Independent time bases for main CPU and Watchdog support standards such as IEC-60730 Analog Comparators Trip PWM Outputs, Generate Interrupts, Sync PWM Outputs, Generate ADC SOC, Route to GPIO Pins Analog-to-Digital Converter Continuous sampling up to 5 MSPS Ratio metric across full 3.3V input range No support pins High Resolution PWM High Resolution Duty Cycle Modulation with 150ps Steps High Resolution Frequency Modulation with 150ps Steps
• #23: Hit hard on performance boost and floating-point for control (Green and Purple)