A PUF-FSM Binding Scheme for FPGA IP PROTECTION

This document proposes a binding scheme that uses physical unclonable functions (PUFs) and finite state machines (FSMs) to bind hardware IP cores to specific FPGA devices, enabling pay-per-device licensing. It aims to address limitations of existing encryption-based schemes by not requiring on-chip secret key storage. The scheme works by enrolling FPGA devices and IP cores, then licensing cores to devices based on their unique PUF responses and bound FSMs. This allows protection of both single FPGA configurations and third-party IP cores without secrets or expensive hardware.