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To accept all challenges and assignments with responsibility and to accomplish them with sincerity by well
coordinated teamwork, eventually achieving the entrusted targets with complete job satisfaction.
Academic Details
Course School/college Board/University Year of passing Percentage
B.Tech(E.C.E) Institute of Engineering and
Technology
GLA University 2017 72.90
Intermediate Rawal Convent School,
Faridabad
C.B.S.E. 2013 68.60
Matriculation Arcadian Public School,
Mathura
C.B.S.E. 2011 76.00
Technical Expertise
Programming Language : Verilog HDL and C language.
Softwares : Tanner EDA, Latex, Xilinx, MS Excel and MS PowerPoint.
Area of Intrest : Digital Electronics and Radio Frequency Integrated Circuits.
Projects
Serial Parallel Multiplier- Summer Project June, 2015 - July, 2015
Enhancement of Bandwidth in MicroStrip Patch Anteena - College Project Aug. 2016 - Present
Industrial Experience
LowPower VLSI Design (VHDL &Verilog ) Training – GyanCity Research Lab. June, 2015 - July, 2015
I had done four weeks training in Low Power VLSI Design (VHDL &Verilog ), where I was taught the
fundamentals of design and verification of low power digital circuits at the Register Transfer Level.
Anil Kumar
Final Year B.Tech
Electronics and Communication Engineering
GLA University
Email Id – anil.kumar.ec17@gmail.com
Contact No. - +91 8126848781
Objective
Achievements
Organized International Conference on CCIS.
Runner-up in Cricket under Aaveg events in Invertis University.
Runner-up in Cricket in National Sports Festival Maitree.
Seminar and Conferences
One Day Workshop on QUADCOPTER.
Two Days Workshop on LABVIEW.
Two Days Workshop on MIXED VLSI DESIGN.
Two Days Workshop on U.W.B ACTIVE ANTENNA SYSTEMS.
Membership
IIPE : Indian Institution of Production Engineers.
Strengths
Persistence
Positive Attitude
Quick Learner
Hobbies and Interests
Travelling
Listening Music
Playing Cricket
Personal Details
Father's Name : Mr. Devendra Sharma
Mother's Name : Mrs. Sheela Sharma
Date of Birth : 15- July- 1996
Permanent Address : Village-Kaulana, Post-Bajna, Mathura
I hereby state that the information provided above by me is correct to the best of my knowledge.

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Anil.resume.doc

  • 1. To accept all challenges and assignments with responsibility and to accomplish them with sincerity by well coordinated teamwork, eventually achieving the entrusted targets with complete job satisfaction. Academic Details Course School/college Board/University Year of passing Percentage B.Tech(E.C.E) Institute of Engineering and Technology GLA University 2017 72.90 Intermediate Rawal Convent School, Faridabad C.B.S.E. 2013 68.60 Matriculation Arcadian Public School, Mathura C.B.S.E. 2011 76.00 Technical Expertise Programming Language : Verilog HDL and C language. Softwares : Tanner EDA, Latex, Xilinx, MS Excel and MS PowerPoint. Area of Intrest : Digital Electronics and Radio Frequency Integrated Circuits. Projects Serial Parallel Multiplier- Summer Project June, 2015 - July, 2015 Enhancement of Bandwidth in MicroStrip Patch Anteena - College Project Aug. 2016 - Present Industrial Experience LowPower VLSI Design (VHDL &Verilog ) Training – GyanCity Research Lab. June, 2015 - July, 2015 I had done four weeks training in Low Power VLSI Design (VHDL &Verilog ), where I was taught the fundamentals of design and verification of low power digital circuits at the Register Transfer Level. Anil Kumar Final Year B.Tech Electronics and Communication Engineering GLA University Email Id – anil.kumar.ec17@gmail.com Contact No. - +91 8126848781 Objective
  • 2. Achievements Organized International Conference on CCIS. Runner-up in Cricket under Aaveg events in Invertis University. Runner-up in Cricket in National Sports Festival Maitree. Seminar and Conferences One Day Workshop on QUADCOPTER. Two Days Workshop on LABVIEW. Two Days Workshop on MIXED VLSI DESIGN. Two Days Workshop on U.W.B ACTIVE ANTENNA SYSTEMS. Membership IIPE : Indian Institution of Production Engineers. Strengths Persistence Positive Attitude Quick Learner Hobbies and Interests Travelling Listening Music Playing Cricket Personal Details Father's Name : Mr. Devendra Sharma Mother's Name : Mrs. Sheela Sharma Date of Birth : 15- July- 1996 Permanent Address : Village-Kaulana, Post-Bajna, Mathura I hereby state that the information provided above by me is correct to the best of my knowledge.