This document proposes a new instruction-level energy estimation model for soft processors in FPGAs that accounts for operand values. Existing models assume average energy per instruction and do not consider how operand values affect energy consumption. The proposed model profiles instruction energy based on location in a benchmark loop and accounts for inter-instruction effects. It defines instruction base energies that vary based on preceding instruction class. This provides a more accurate way to estimate energy consumption for soft processors compared to prior models.