Arithmetic of Computers

Chapter 3
Arithmetic for Computers

Chapter 3 — Arithmetic for Computers — 2
Arithmetic for Computers
 Operations on integers
 Addition and subtraction
 Multiplication and division
 Dealing with overflow
 Floating-point real numbers
 Representation and operations
§3.1
Introduction

Integer Addition
 Example: 7 + 6
§3.2
Addition
and
Subtraction
 Overflow if result out of range
 Adding +ve and –ve operands, no overflow
 Adding two +ve operands
 Overflow if result sign is 1
 Adding two –ve operands

Integer Subtraction
 Add negation of second operand
 Example: 7 – 6 = 7 + (–6)
+7: 0000 0000 … 0000 0111
–6: 1111 1111 … 1111 1010
+1: 0000 0000 … 0000 0001
 Overflow if result out of range
 Subtracting two +ve or two –ve operands, no overflow
 Subtracting +ve from –ve operand
 Subtracting –ve from +ve operand

Dealing with Overflow
 Some languages (e.g., C) ignore overflow
 Use MIPS addu, addui, subu instructions
 Other languages (e.g., Ada, Fortran)
require raising an exception
 Use MIPS add, addi, sub instructions
 On overflow, invoke exception handler
 Save PC in exception program counter (EPC)
register
 Jump to predefined handler address
 mfc0 (move from coprocessor reg) instruction can
retrieve EPC value, to return after corrective action

Multiplication
 Start with long-multiplication approach
1000
× 1001
1000
0000
0000
1000
1001000
Length of product is
the sum of operand
lengths
multiplicand
multiplier
product
§3.3
Multiplication

Multiplication Hardware
Initially 0

Optimized Multiplier
 Perform steps in parallel: add/shift
 One cycle per partial-product addition
 That’s ok, if frequency of multiplications is low

Faster Multiplier
 Uses multiple adders
 Cost/performance tradeoff
 Can be pipelined
 Several multiplication performed in parallel

Division
 Check for 0 divisor
 Long division approach
 If divisor ≤ dividend bits
 1 bit in quotient, subtract
 Otherwise
 0 bit in quotient, bring down next
dividend bit
 Restoring division
 Do the subtract, and if remainder
goes < 0, add divisor back
 Signed division
 Divide using absolute values
 Adjust sign of quotient and remainder
as required
1001
1000 1001010
-1000
10
101
1010
-1000
10
n-bit operands yield n-bit
quotient and remainder
quotient
dividend
remainder
divisor
§3.4
Division

Division Hardware
Initially dividend
Initially divisor
in left half

Optimized Divider
 One cycle per partial-remainder subtraction
 Looks a lot like a multiplier!
 Same hardware can be used for both

Faster Division
 Can’t use parallel hardware as in multiplier
 Subtraction is conditional on sign of remainder
 Faster dividers (e.g. SRT devision)
generate multiple quotient bits per step
 Still require multiple steps

Floating Point
 Representation for non-integral numbers
 Including very small and very large numbers
 Like scientific notation
 –2.34 × 1056
 +0.002 × 10–4
 +987.02 × 109
 In binary
 ±1.xxxxxxx2 × 2yyyy
 Types float and double in C
normalized
not normalized
§3.5
Floating
Point

Floating Point Standard
 Defined by IEEE Std 754-1985
 Developed in response to divergence of
representations
 Portability issues for scientific code
 Now almost universally adopted
 Two representations
 Single precision (32-bit)
 Double precision (64-bit)

IEEE Floating-Point Format
 S: sign bit (0  non-negative, 1  negative)
 Normalize significand: 1.0 ≤ |significand| < 2.0
 Always has a leading pre-binary-point 1 bit, so no need to
represent it explicitly (hidden bit)
 Significand is Fraction with the “1.” restored
 Exponent: excess representation: actual exponent + Bias
 Ensures exponent is unsigned
 Single: Bias = 127; Double: Bias = 1203
S Exponent Fraction
single: 8 bits
double: 11 bits
single: 23 bits
double: 52 bits
Bias)
(Exponent
S
2
Fraction)
(1
1)
(
x 






Single-Precision Range
 Exponents 00000000 and 11111111 reserved
 Smallest value
 Exponent: 00000001
 actual exponent = 1 – 127 = –126
 Fraction: 000…00  significand = 1.0
 ±1.0 × 2–126 ≈ ±1.2 × 10–38
 Largest value
 exponent: 11111110
 actual exponent = 254 – 127 = +127
 Fraction: 111…11  significand ≈ 2.0
 ±2.0 × 2+127 ≈ ±3.4 × 10+38

Double-Precision Range
 Exponents 0000…00 and 1111…11 reserved
 Smallest value
 Exponent: 00000000001
 actual exponent = 1 – 1023 = –1022
 Fraction: 000…00  significand = 1.0
 ±1.0 × 2–1022 ≈ ±2.2 × 10–308
 Largest value
 Exponent: 11111111110
 actual exponent = 2046 – 1023 = +1023
 Fraction: 111…11  significand ≈ 2.0
 ±2.0 × 2+1023 ≈ ±1.8 × 10+308

Floating-Point Precision
 Relative precision
 all fraction bits are significant
 Single: approx 2–23
 Equivalent to 23 × log102 ≈ 23 × 0.3 ≈ 6 decimal
digits of precision
 Double: approx 2–52
 Equivalent to 52 × log102 ≈ 52 × 0.3 ≈ 16 decimal
digits of precision

Floating-Point Example
 Represent –0.75
 –0.75 = (–1)1 × 1.12 × 2–1
 S = 1
 Fraction = 1000…002
 Exponent = –1 + Bias
 Single: –1 + 127 = 126 = 011111102
 Double: –1 + 1023 = 1022 = 011111111102
 Single: 1011111101000…00
 Double: 1011111111101000…00

Floating-Point Example
 What number is represented by the single-
precision float
11000000101000…00
 S = 1
 Fraction = 01000…002
 Fxponent = 100000012 = 129
 x = (–1)1 × (1 + 012) × 2(129 – 127)
= (–1) × 1.25 × 22
= –5.0

Floating-Point Addition
 Consider a 4-digit decimal example
 9.999 × 101 + 1.610 × 10–1
 1. Align decimal points
 Shift number with smaller exponent
 9.999 × 101 + 0.016 × 101
 2. Add significands
 9.999 × 101 + 0.016 × 101 = 10.015 × 101
 3. Normalize result & check for over/underflow
 1.0015 × 102
 4. Round and renormalize if necessary
 1.002 × 102

Floating-Point Addition
 Now consider a 4-digit binary example
 1.0002 × 2–1 + –1.1102 × 2–2 (0.5 + –0.4375)
 1. Align binary points
 Shift number with smaller exponent
 1.0002 × 2–1 + –0.1112 × 2–1
 2. Add significands
 1.0002 × 2–1 + –0.1112 × 2–1 = 0.0012 × 2–1
 3. Normalize result & check for over/underflow
 1.0002 × 2–4, with no over/underflow
 4. Round and renormalize if necessary
 1.0002 × 2–4 (no change) = 0.0625

Interpretation of Data
 Bits have no inherent meaning
 Interpretation depends on the instructions
applied
 Computer representations of numbers
 Finite range and precision
 Need to account for this in programs
The BIG Picture

Right Shift and Division
 Left shift by i places multiplies an integer
by 2i
 Right shift divides by 2i?
 Only for unsigned integers
 For signed integers
 Arithmetic right shift: replicate the sign bit
 e.g., –5 / 4
 111110112 >> 2 = 111111102 = –2
 Rounds toward –∞
 c.f. 111110112 >>> 2 = 001111102 = +62
§3.8
Fallacies
and
Pitfalls

Concluding Remarks
 ISAs support arithmetic
 Signed and unsigned integers
 Floating-point approximation to reals
 Bounded range and precision
 Operations can overflow and underflow
 MIPS ISA
 Core instructions: 54 most frequently used
 100% of SPECINT, 97% of SPECFP
 Other instructions: less frequent
§3.9
Concluding
Remarks

Arithmetic of Computers

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