SlideShare a Scribd company logo
BIL 406
Parallel Computers
Introduction to the Course
1
Chapter 1
Introduction
• 1.1 Fundamentals
• 1.2 Speedup and Efficiency
• 1.3 Parallel Computers
Chapter 2
Classifications of Parallel Systems
• 2.1 Classification of the parallel computer
systems
• 2.2 SISD: Single Instruction Single Data; The
Cray-1 Super Computer
• 2.3 MISD
• 2.4 SIMD Systems; Synchronous
parallelism>MPP (Massively Parallel Processors),
Data parallel system, DAP (The distributed
array processors) and The connection machine
• 2.5 MIMD System;Asynchronous parallelism>
Transputers, SHARC and Cray T3E
• 2.6 Hybrid parallel computer; systems,
Multiple-pipeline, Multiple-SIMD and
Systolic array, Waveform arrays, Very Long
Instruction Word (VLIW) and Same Program
Multiple Data (SPMD)
• 2.7 Some parameters in parallel computers;
Speedup , Efficiency, Latency and Grain s
ize
• 2.8 Levels of Parallelism; Bit level parallelism,
Instruction level parallelism, Procedure
level and Job or program level parallelism
• 2.9 Parallel operations; Nomadic and Dyadic
operations
Chapter 3
Petri Nets
• 3.1 Simple Petri Nets
• 3.2 Extended Petri nets
Chapter 4
Parallel Processing Concepts
• 4.1 Program flow mechanism
• 4.2 Control flow versus data flow; A data flow
Architecture
• 4.3 Demand driven mechanism; Reduction machine
model
• 4.4 Comparison of flow mechanisms
• 4.5 Coroutunes; Fork and Join, Data flow,
ParBegin and ParEnd
• 4.6 Processes; Remote Procedure Call
• 4.7 Implicit Parallelism; Explicit versus implicit
parallelism
Chapter 5
Network Structures
• 5.1 Introduction
• 5.2 System interconnection architectures
• 5.3 Network properties and routing
• 5.4 Node degree and Network diameter; Node
degree, Network diameter and Average Distance
• 5.5 Bisection width
• 5.6 Data routing functions; Perfect shuffle and
exchange, Hypercube routing function, Broadcast and
Multicast and Network throughput
• 5.7 Network performance
• 5.8 Static networks ; Point to point Networks>
Binary Tree, ternary tree and quadtree, Fat tree,
Linear arrays, Rings, Complete graph, Grid and
Torus, AMP (A Minimum Path Systems and
Hexagonal Grid
• 5.9 Dynamic networks; Bus networks and Switch
networks> Switch modules, Multi-stage
networks, Delta networks or Omega
networks, Closs networks and Crossbar networks
• 5.10 Comparison of networks
• 5.11 Summary of networks
Chapter 5
Network Structures
• 5.1 Introduction
• 5.2 System interconnection architectures
• 5.3 Network properties and routing; Node degree and
Network diameter; Node degree, Network diameter, Average
Distance and Bisection width
• 5.4 Data routing functions; Perfect shuffle and
exchange, Hypercube routing function, Broadcast and
Multicast and Network throughput
• 5.5 Network performance
• 5.6 Static networks ; Point to point Networks>
Binary Tree, ternary tree and quadtree, Fat tree,
Linear arrays, Rings, Complete graph, Grid and
Torus, AMP (A Minimum Path Systems and
Hexagonal Grid
• 5.7 Dynamic networks; Bus networks and Switch
networks> Switch modules, Multi-stage
networks, Delta networks or Omega
networks, Closs networks and Crossbar networks
• 5.8 Comparison of networks
Chapter 6
Basic Parallelism and CPU
• 6.1 Introduction
• 6.2 SISD Computers
• 6.3 Hardware and software parallelism; Hardware
parallelism and Software parallelism
• 6.4 The role of compilers
• 6.5 Communication latency
• 6.6 Grain packing and scheduling
• 6.7 Static multiprocessors scheduling
• 6.8 Node duplication
Chapter7
Superscalar and Superpipeline Processors
• 7.1 MISD; Pipelining
• 7.2 Pipelining and Super Scalar
Techniques.
• 7.3 Linear Pipeline Processors; Asynchronous and
synchronous Models, Asynchronous Model,
Synchrones Model, Clocking and Timing Control,
Clock Cycle and throughput, Speedup Efficiency and
Optimal Number of stages
• 7.4 Nonlinear Pipelines; Reservation and latency analysis,
Reservation table, Latency Analysis, Collision Free
scheduling and Collision vector
• 7.5 Instruction Pipeline Design; Instruction Execution
Phase, Pre-fetching buffers, Loop buffers
• 7.6 Arithmetic pipelines
• 7.7 Superscalar and Superpipeline design; Pipeline
design parameters, Superscalar pipeline design, Super
scalar performance, Superpipeline design and
Superpipelined superscalar design
• 7.8 Super-symmetry and design Tradeoffs
Chapter 8
Asynchronous Parallelism
• 8.1 MIMD Systems
• 8.2 Asynchronous parallelism
• 8.3 Process States
Chapter 9
Synchronization and Communication in
MIMD Systems
• 9.1 Software solution
• 9.2 Hardware solution
• 9.3 Semaphores
• 9.4 Monitors; (java monitor, notify and wait)
• 9.5 Message passing and remote procedure
call
Chapter 10
Problems with Asynchronous
Parallelism
• 10.1 Introduction
• 10.2 Inconsistent Data
• 10.3 Deadlocks
• 10.4 Load balancing
Chapter 11
MIMD Programming Languages
• 11.1 Concurrent Pascal
• 11.2 Communicating Sequential Process CSP
• 11.3 occam
• 11.4 Ada
• 11.5 Sequent C
• 11.6 Linda,
• 11.7 Modular P
Chapter 12
Coarse Grained Parallel Algorithm
• 12.1 Bounded buffer with semaphores
• 12.2 Bounded buffer with a Monitor
• 12.3 Assignment distribution via monitor
Chapter 13
Synchronous Parallelism
Structure of a SIMD system
• 13.1 SIMD computer system
• 13.2 Data parallelism
• 13.3 Virtual processors
Chapter 14
Communication in SIMD systems
• 14.1 SIMD data exchange
• 14.2 Connection structures of SIMD systems.
• 14.3 Vector reduction
Chapter 15
Problems with Synchronous Parallelism
• 15.1 Problems with synchronous parallelism
• 15.2 Mapping virtual processors onto physical
processors
• 15.3 Bottlenecks from peripheral attachments
• 15.4 Network bandwidth
• 15.5 Multi-user operation and fault tolerance
Chapter 16
SIMD Programming Languages
• 16.1 Fortran 90
• 16.2 C
• 16.3 MasPar programming languages
• 16.4 Parallaxis
Chapter 17
Massively parallel Algorithms
• 17.1 Massively parallel Algorithms
• 17.2 Numerical integration
• 17.3 Cellular automata
• 17.4 Prime number generation
• 17.5 Sorting
• 17.6 Systolic matrix multiplication
• 17.7 Generation of fractals
• 17.8 Stereo image analysis
Chapter 18
Other Models of Parallelism
• 18.1 Automatic parallelization and vectorization
• 18.2 Condition of parallelism; data, resource and
control dependence
• 18.3 Bernstein’s Conditions
• 18.4 Data dependence (in loop operations)
• 18.5 Vectorization of a loop
• 18.6 Parallelization of a loop
• 18.7 Solving complex data dependencies
Chapter 19
Non-procedural Parallel
Programming Languages
• 19.1 Introduction
• 19.2 Lisp; Parallel language construct
• 19.3 FP; Object domain comprises, Primitive
functions available and Program formation
operations available
• 19.4 Concurrent Prolog; Unification, or parallelism and
parallelism
• 19.4 SQL
Chapter 20
Performance of Parallel Systems
• 20.1 Speedup (algorithmic penalty,
implementation penalty, Amdahl and Gustafson)
• 20.2 Efficiency
• 20.2 Optimal speedup
• 20.3 Scaleup
• 20.4 MIMD versus SIMD
• 20.5 Validity of performance data.

More Related Content

PPT
BIL406-Chapter-6-Basic Parallelism and CPU.ppt
PPTX
Play With Streams
PDF
Network State Awareness & Troubleshooting
PDF
ADVANCED COMPUTER ARCHITECTURE PARALLELISM SCALABILITY PROGRAMMABILITY Baas ...
PDF
RedHat MRG and Infinispan for Large Scale Integration
PPT
unit 3-networkvbbvvbbvchbbgjbbgggggb.ppt
PDF
Решения WANDL и NorthStar для операторов
PPTX
Advanced computer architecture
BIL406-Chapter-6-Basic Parallelism and CPU.ppt
Play With Streams
Network State Awareness & Troubleshooting
ADVANCED COMPUTER ARCHITECTURE PARALLELISM SCALABILITY PROGRAMMABILITY Baas ...
RedHat MRG and Infinispan for Large Scale Integration
unit 3-networkvbbvvbbvchbbgjbbgggggb.ppt
Решения WANDL и NorthStar для операторов
Advanced computer architecture

Similar to BIL406-Chapter-0-Introduction-Course.ppt (20)

PPTX
LinkedIn's Approach to Programmable Data Center
PPTX
Routers: The Backbone of Modern Networking
PPT
BIL406-Chapter-2-Classifications of Parallel Systems.ppt
PPTX
Webinar: Detecting Deadlocks in Electronic Systems using Time-based Simulation
PPTX
Router and routing
PPTX
Throughput oriented aarchitectures
PDF
MTCNA Training outline, Certified Network Associate (MTCNA)
PDF
4. network layer
PDF
Distribution, redundancy and high availability using OpenSIPS
PDF
archintro.pdf
PDF
Presentation on Data Center Use-Case & Trends
PDF
RouteFlow & IXPs
PDF
ITN3052_01_Routing_Concepts and advanced networking
PPTX
Cqrs.frameworks
PPTX
Final_Basic_Networking_Presentation.pptx
PPTX
Basic_Networking_Training_Presentation.pptx
PPTX
Mobile Ad Hoc Network of Simulation Framework Based on OPNET
PDF
Mtcna outline
PDF
MTCNA_Outline.pdf
LinkedIn's Approach to Programmable Data Center
Routers: The Backbone of Modern Networking
BIL406-Chapter-2-Classifications of Parallel Systems.ppt
Webinar: Detecting Deadlocks in Electronic Systems using Time-based Simulation
Router and routing
Throughput oriented aarchitectures
MTCNA Training outline, Certified Network Associate (MTCNA)
4. network layer
Distribution, redundancy and high availability using OpenSIPS
archintro.pdf
Presentation on Data Center Use-Case & Trends
RouteFlow & IXPs
ITN3052_01_Routing_Concepts and advanced networking
Cqrs.frameworks
Final_Basic_Networking_Presentation.pptx
Basic_Networking_Training_Presentation.pptx
Mobile Ad Hoc Network of Simulation Framework Based on OPNET
Mtcna outline
MTCNA_Outline.pdf

More from Kadri20 (8)

PPT
BIL406-Chapter-11-MIMD Programming Languages.ppt
PPT
BIL406-Chapter-8-Asynchronous parallelism.ppt
PPT
BIL406-Chapter-5-Network Structures.ppt
PPT
BIL406-Chapter-7-Superscalar and Superpipeline processors.ppt
PPT
BIL406-Chapter-9-Synchronization and Communication in MIMD Systems.ppt
PPT
BIL406-Chapter-10-Problems with Asynchronous Parallelism.ppt
PPT
BIL406-Chapter-4-Parallel Processing Concept.ppt
PPT
BIL406-Chapter-1-Introduction.ppt
BIL406-Chapter-11-MIMD Programming Languages.ppt
BIL406-Chapter-8-Asynchronous parallelism.ppt
BIL406-Chapter-5-Network Structures.ppt
BIL406-Chapter-7-Superscalar and Superpipeline processors.ppt
BIL406-Chapter-9-Synchronization and Communication in MIMD Systems.ppt
BIL406-Chapter-10-Problems with Asynchronous Parallelism.ppt
BIL406-Chapter-4-Parallel Processing Concept.ppt
BIL406-Chapter-1-Introduction.ppt

Recently uploaded (20)

PDF
Mitigating Risks through Effective Management for Enhancing Organizational Pe...
PPTX
Foundation to blockchain - A guide to Blockchain Tech
PPTX
Sustainable Sites - Green Building Construction
PPTX
FINAL REVIEW FOR COPD DIANOSIS FOR PULMONARY DISEASE.pptx
PDF
Mohammad Mahdi Farshadian CV - Prospective PhD Student 2026
PPTX
MCN 401 KTU-2019-PPE KITS-MODULE 2.pptx
PPTX
CYBER-CRIMES AND SECURITY A guide to understanding
PPTX
OOP with Java - Java Introduction (Basics)
PPTX
KTU 2019 -S7-MCN 401 MODULE 2-VINAY.pptx
PDF
composite construction of structures.pdf
PDF
Model Code of Practice - Construction Work - 21102022 .pdf
PDF
Digital Logic Computer Design lecture notes
PPT
Mechanical Engineering MATERIALS Selection
PPTX
bas. eng. economics group 4 presentation 1.pptx
PPTX
additive manufacturing of ss316l using mig welding
PPTX
Recipes for Real Time Voice AI WebRTC, SLMs and Open Source Software.pptx
PPTX
UNIT 4 Total Quality Management .pptx
PDF
The CXO Playbook 2025 – Future-Ready Strategies for C-Suite Leaders Cerebrai...
PPTX
Infosys Presentation by1.Riyan Bagwan 2.Samadhan Naiknavare 3.Gaurav Shinde 4...
PDF
Operating System & Kernel Study Guide-1 - converted.pdf
Mitigating Risks through Effective Management for Enhancing Organizational Pe...
Foundation to blockchain - A guide to Blockchain Tech
Sustainable Sites - Green Building Construction
FINAL REVIEW FOR COPD DIANOSIS FOR PULMONARY DISEASE.pptx
Mohammad Mahdi Farshadian CV - Prospective PhD Student 2026
MCN 401 KTU-2019-PPE KITS-MODULE 2.pptx
CYBER-CRIMES AND SECURITY A guide to understanding
OOP with Java - Java Introduction (Basics)
KTU 2019 -S7-MCN 401 MODULE 2-VINAY.pptx
composite construction of structures.pdf
Model Code of Practice - Construction Work - 21102022 .pdf
Digital Logic Computer Design lecture notes
Mechanical Engineering MATERIALS Selection
bas. eng. economics group 4 presentation 1.pptx
additive manufacturing of ss316l using mig welding
Recipes for Real Time Voice AI WebRTC, SLMs and Open Source Software.pptx
UNIT 4 Total Quality Management .pptx
The CXO Playbook 2025 – Future-Ready Strategies for C-Suite Leaders Cerebrai...
Infosys Presentation by1.Riyan Bagwan 2.Samadhan Naiknavare 3.Gaurav Shinde 4...
Operating System & Kernel Study Guide-1 - converted.pdf

BIL406-Chapter-0-Introduction-Course.ppt

  • 2. Chapter 1 Introduction • 1.1 Fundamentals • 1.2 Speedup and Efficiency • 1.3 Parallel Computers
  • 3. Chapter 2 Classifications of Parallel Systems • 2.1 Classification of the parallel computer systems • 2.2 SISD: Single Instruction Single Data; The Cray-1 Super Computer • 2.3 MISD • 2.4 SIMD Systems; Synchronous parallelism>MPP (Massively Parallel Processors), Data parallel system, DAP (The distributed array processors) and The connection machine • 2.5 MIMD System;Asynchronous parallelism> Transputers, SHARC and Cray T3E
  • 4. • 2.6 Hybrid parallel computer; systems, Multiple-pipeline, Multiple-SIMD and Systolic array, Waveform arrays, Very Long Instruction Word (VLIW) and Same Program Multiple Data (SPMD) • 2.7 Some parameters in parallel computers; Speedup , Efficiency, Latency and Grain s ize • 2.8 Levels of Parallelism; Bit level parallelism, Instruction level parallelism, Procedure level and Job or program level parallelism • 2.9 Parallel operations; Nomadic and Dyadic operations
  • 5. Chapter 3 Petri Nets • 3.1 Simple Petri Nets • 3.2 Extended Petri nets
  • 6. Chapter 4 Parallel Processing Concepts • 4.1 Program flow mechanism • 4.2 Control flow versus data flow; A data flow Architecture • 4.3 Demand driven mechanism; Reduction machine model • 4.4 Comparison of flow mechanisms • 4.5 Coroutunes; Fork and Join, Data flow, ParBegin and ParEnd • 4.6 Processes; Remote Procedure Call • 4.7 Implicit Parallelism; Explicit versus implicit parallelism
  • 7. Chapter 5 Network Structures • 5.1 Introduction • 5.2 System interconnection architectures • 5.3 Network properties and routing • 5.4 Node degree and Network diameter; Node degree, Network diameter and Average Distance • 5.5 Bisection width • 5.6 Data routing functions; Perfect shuffle and exchange, Hypercube routing function, Broadcast and Multicast and Network throughput
  • 8. • 5.7 Network performance • 5.8 Static networks ; Point to point Networks> Binary Tree, ternary tree and quadtree, Fat tree, Linear arrays, Rings, Complete graph, Grid and Torus, AMP (A Minimum Path Systems and Hexagonal Grid • 5.9 Dynamic networks; Bus networks and Switch networks> Switch modules, Multi-stage networks, Delta networks or Omega networks, Closs networks and Crossbar networks • 5.10 Comparison of networks • 5.11 Summary of networks
  • 9. Chapter 5 Network Structures • 5.1 Introduction • 5.2 System interconnection architectures • 5.3 Network properties and routing; Node degree and Network diameter; Node degree, Network diameter, Average Distance and Bisection width • 5.4 Data routing functions; Perfect shuffle and exchange, Hypercube routing function, Broadcast and Multicast and Network throughput
  • 10. • 5.5 Network performance • 5.6 Static networks ; Point to point Networks> Binary Tree, ternary tree and quadtree, Fat tree, Linear arrays, Rings, Complete graph, Grid and Torus, AMP (A Minimum Path Systems and Hexagonal Grid • 5.7 Dynamic networks; Bus networks and Switch networks> Switch modules, Multi-stage networks, Delta networks or Omega networks, Closs networks and Crossbar networks • 5.8 Comparison of networks
  • 11. Chapter 6 Basic Parallelism and CPU • 6.1 Introduction • 6.2 SISD Computers • 6.3 Hardware and software parallelism; Hardware parallelism and Software parallelism • 6.4 The role of compilers • 6.5 Communication latency • 6.6 Grain packing and scheduling • 6.7 Static multiprocessors scheduling • 6.8 Node duplication
  • 12. Chapter7 Superscalar and Superpipeline Processors • 7.1 MISD; Pipelining • 7.2 Pipelining and Super Scalar Techniques. • 7.3 Linear Pipeline Processors; Asynchronous and synchronous Models, Asynchronous Model, Synchrones Model, Clocking and Timing Control, Clock Cycle and throughput, Speedup Efficiency and Optimal Number of stages • 7.4 Nonlinear Pipelines; Reservation and latency analysis, Reservation table, Latency Analysis, Collision Free scheduling and Collision vector • 7.5 Instruction Pipeline Design; Instruction Execution Phase, Pre-fetching buffers, Loop buffers
  • 13. • 7.6 Arithmetic pipelines • 7.7 Superscalar and Superpipeline design; Pipeline design parameters, Superscalar pipeline design, Super scalar performance, Superpipeline design and Superpipelined superscalar design • 7.8 Super-symmetry and design Tradeoffs
  • 14. Chapter 8 Asynchronous Parallelism • 8.1 MIMD Systems • 8.2 Asynchronous parallelism • 8.3 Process States
  • 15. Chapter 9 Synchronization and Communication in MIMD Systems • 9.1 Software solution • 9.2 Hardware solution • 9.3 Semaphores • 9.4 Monitors; (java monitor, notify and wait) • 9.5 Message passing and remote procedure call
  • 16. Chapter 10 Problems with Asynchronous Parallelism • 10.1 Introduction • 10.2 Inconsistent Data • 10.3 Deadlocks • 10.4 Load balancing
  • 17. Chapter 11 MIMD Programming Languages • 11.1 Concurrent Pascal • 11.2 Communicating Sequential Process CSP • 11.3 occam • 11.4 Ada • 11.5 Sequent C • 11.6 Linda, • 11.7 Modular P
  • 18. Chapter 12 Coarse Grained Parallel Algorithm • 12.1 Bounded buffer with semaphores • 12.2 Bounded buffer with a Monitor • 12.3 Assignment distribution via monitor
  • 19. Chapter 13 Synchronous Parallelism Structure of a SIMD system • 13.1 SIMD computer system • 13.2 Data parallelism • 13.3 Virtual processors
  • 20. Chapter 14 Communication in SIMD systems • 14.1 SIMD data exchange • 14.2 Connection structures of SIMD systems. • 14.3 Vector reduction
  • 21. Chapter 15 Problems with Synchronous Parallelism • 15.1 Problems with synchronous parallelism • 15.2 Mapping virtual processors onto physical processors • 15.3 Bottlenecks from peripheral attachments • 15.4 Network bandwidth • 15.5 Multi-user operation and fault tolerance
  • 22. Chapter 16 SIMD Programming Languages • 16.1 Fortran 90 • 16.2 C • 16.3 MasPar programming languages • 16.4 Parallaxis
  • 23. Chapter 17 Massively parallel Algorithms • 17.1 Massively parallel Algorithms • 17.2 Numerical integration • 17.3 Cellular automata • 17.4 Prime number generation • 17.5 Sorting • 17.6 Systolic matrix multiplication • 17.7 Generation of fractals • 17.8 Stereo image analysis
  • 24. Chapter 18 Other Models of Parallelism • 18.1 Automatic parallelization and vectorization • 18.2 Condition of parallelism; data, resource and control dependence • 18.3 Bernstein’s Conditions • 18.4 Data dependence (in loop operations) • 18.5 Vectorization of a loop • 18.6 Parallelization of a loop • 18.7 Solving complex data dependencies
  • 25. Chapter 19 Non-procedural Parallel Programming Languages • 19.1 Introduction • 19.2 Lisp; Parallel language construct • 19.3 FP; Object domain comprises, Primitive functions available and Program formation operations available • 19.4 Concurrent Prolog; Unification, or parallelism and parallelism • 19.4 SQL
  • 26. Chapter 20 Performance of Parallel Systems • 20.1 Speedup (algorithmic penalty, implementation penalty, Amdahl and Gustafson) • 20.2 Efficiency • 20.2 Optimal speedup • 20.3 Scaleup • 20.4 MIMD versus SIMD • 20.5 Validity of performance data.