CE271 Unit 1 Register Transfer and Microoperations new.pdf

Computer Organization
and Architecture
Prepared by: Dr. Ritesh Patel

Computer Organization and Architecture
 Student Will learn
 Identify & differentiate Types of Logic Gates
 Use combinational Circuit to design half adder and
full adder
 Understand architecture of Intel and AMD
computers
 Differentiate single cpu and multiple CPU
architecture
©Dr. Ritesh Patel, U & P U Patel Dept of Computer Engineering CSPIT
2

Introduction to subject
 Introduction to Computer Organization why is this subject
important?
 Subject Code: CE271
 Teaching and Examination Scheme
Teaching
Scheme
Theory Practical Total Credit
Hours/week 3 2 5
4
Marks 100 50 150
3

What is computer?
 Perform Computation.
 What to Compute?
 Perform transferring of data.
 What to transfer?
4

Introduction digital logic circuit
 Digital Computers
 Logic Gates
 Combinational Circuits (Half Adder, Full Adder)
 Flip-Flops(SR, D, JK, T, Edge-Triggered)
5
©Dr. Ritesh Patel, U & P U Patel Dept of Computer Engineering, CSPIT

Digital computer
 It is a digital system that performs various computational
tasks.
 It consist of two functional components
 Hardware
 Software
 Digit:
 Information in the computer is represented by variables
that take limited number of discrete values
 Ex: Two states: Binary System (0 & 1)
 How one can implement computer using binary system? 6

Binary system
 Digital Computer uses binary system which has two digits
 1 & 0
 A binary digit is called _____
 Bit
 Group of bits
 Nibble
 Byte
 Word
7

Questions…
8
 A _______ of instructions is known as program
 A) Set B) Collection C) Sequence
 You may come across various terms
 System Software
 Application Software
 Operating System
 System Software:
 Facilitates user to submit task and get output
 Application software:
 Facilitates user to develop Programs
 Operating System:
 Facilitates user to interact with hardware

hardware
 Computer hardware is consist of three
components
9

Core i7-3rd Generation(ivy bridge)
13

INTEl architecture
15

`
16

17

AMD
18

Intel p55 architecture
19

Intel Pentium 4 architecture
20

Intel Pentium 4 architecture
21

Intel core 2 duo architecture
22

Intel core i7 architecture
23

Intel core i7 features
24

Multiprocessor architecture-I
25

26

27

Multiprocessor architecture-I
28

Hardware (current era of Architecture)
29

Difference between two architecture
 VON Neumann architecture 30

terminology
 Computer Organization
 The way the hardware components operate and the
way together to form computer system.
 Computer Design
 It is concern with hardware design of computer
 Computer Architecture
 Structure and behavior of the computer as seen by
the user
 fundamental operational structure
31

subcategories
Computer
Architecture
Computer
Organization
Computer
Design
Instructions set
Architecture
(ISA)
32

Computer Architecture
 The main Objectives and Functions is making the
computer easier to use and Allowing better use of
computer resources
 Structure and behavior of the computer as seen by the
user
 fundamental operational structure
 Computer architecture, like other architecture, is the art
of determining the needs of the user of a structure and
then designing to meet those needs as effectively as
possible within economic and technological constraints.
33

Questions
 __________has a concern with performance of computer
 Architecture
 Design
 Organization
 ISA
 T/F: Desktop computers are multiprocessor system
 T/F: Desktop Processor can be plugged on socket of laptop
computer
 Category of C Editor is _______
 System Software
 Application Software
 Operating System 34

Logic gates
 Binary Information is represented in digital computer
by digital signals
 A digital signal is a signal that represents a sequence
of discrete values
35

Logic gates
 Binary Logic:
 It deals with binary information/variables
 Operations are performed on binary variables to get
the result
 Operations are implemented in digital system using
gates
 Gate is block of hardware that has some input,
output
 For Example…
36

OR and XOR Gate: Characteristics
37

OR and XOR Gate: Characteristics
38

Operations of logic gate
 These logic gates are the basic building blocks of all
digital systems
39

Combination circuit
 It is connected arrangement of logic gates with
set of inputs and outputs
40

Half adder
 Basic arithmetic operation circuit
41

Animation: half adder
42

Full adder
43

Full adder using two half adder
44

Questions
 __________has a two inputs and two outputs
 Half adder
 Full adder
 T/F: half adder is used to perform 1 bit addition only
 Which of the following is not a GATE
 AND
 NOT
 EXOR
 NEXOR
45

46

47

what happens When user Doble Clicks on executable file
48
Graphics Area
OS Area
User Area
Rec_App Send_App
Rec_TP Send_TP
Rec_NW Send_NW
Rec_ETH Send_ETH
Rec_PHY Send_PHY
Code Seg Code Seg
Data Seg Data Seg
Extra Seg Extra Seg
Stack Seg Stack Seg
TCP/IP Protocol Stack
101010..

Digital computer
 Digital system is an interconnection of digital hardware
modules that accomplish a specific- processing task.
 What are the modules of Microprocessor?
 Modules are constructed from
 Registers: To store some data in binary
 Decoders: To identify operation contained in Opcode
 Arithmetic elements: To perform basic arithmetic
operation
 Control logic: To control flow of information among
moduels
49

Internal hardware organization
 Internal hardware Organization of Microprocessor (in
book: Computer) can be specified with
 The set of registers
 Sequence of microoperations
 Control that initiates microoperations
 Sequence of controls can be specified in terms of
paragraphs
 Suitable method is required to represent sequence of
microoperations
 Register Transfer Language
50

Register
 Registers are designated by
capital letters, sometimes
followed by numbers (e.g., A,
R13, IR)
 Often the names indicate
function:
 MAR - memory address
register
 PC - program counter
 IR - instruction register
52

RTL Example
 Example:
 Exchange Value of B and C
Register
 Transfer content of B to
D, transfer content of C
to B, transfer content of
D to C
 RTL
D  B
B  C
C  D 53

definition
 Symbolic notation used to describe the microoperation
transfer among registers is called RTL.
 Registers of Intel core i-7
54

• Copying the contents of one register to another is a register transfer
• A register transfer is indicated as R1  R2
 In this case the contents of register R2 are copied (loaded) into register R1
 A simultaneous transfer of all bits from the source R1 to the
destination register R2, during one clock pulse
 Note that this is a non-destructive; i.e. the contents of R1 are not altered by
copying (loading) them to R2
R2  R1
Register transfer Language
55

DESIGNATION OF REGISTERS
R1
Register
Subfields
PC(H) PC(L)
15 8 7 0
- a register
- portion of a register
- a bit of a register
• Common ways of drawing the block diagram of a register
Showing individual bits
7 6 5 4 3 2 1 0
Numbering of bits
R2
15 0
• Nomination of a register
56

P: R2  R1
Which means “if P = 1, then load the contents of register R1
into register R2”, i.e., if (P = 1) then (R2  R1)
• Often actions need to only occur if a certain condition is
true
• This is similar to an “if” statement in a programming
language
• In digital systems, this is often done via a control signal,
called a control function
• If the signal is 1, the action takes place
Control function
57

Implementation of controlled transfer
P: R2  R1
Block diagram Clock
R2
R1
Control
Circuit
Load
P
n
Hardware implementation
Implementation of non-controlled transfer
R2  R1
Block diagram
Clock
R2
R1
n
58

• If two or more operations are to occur simultaneously,
they are separated with commas
 P: R3  R5, MAR  IR
• Here, if the control function P = 1, load the contents of
R5 into R3, and at the same time (clock), load the
contents of register IR into register MAR
SIMULTANEOUS OPERATIONS
59

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2  R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A  B, B  A
Symbols Description
BASIC SYMBOLS FOR REGISTER TRANSFERS
60

CONNECTING REGISTRS
• In a digital system with many registers, it is impractical to have data
and control lines to directly allow each register to be loaded with the
contents of every possible other registers
• To completely connect n registers → n(n-1) lines
• Instead, take a different approach
• Have one centralized set of circuits for data transfer
• Have control circuits to select which register is the source, and which
is the destination
Clock
R2
R1
n
Clock
R4
R3
n
61

Usage of Multiplexer and decoder
62

BUS AND BUS TRANSFER
Bus is a path(of a group of wires) over which information is transferred, from
any of several sources to any of several destinations.
From a register to bus: BUS  R
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
Register A Register B Register C Register D
Register A Register B Register C Register D
Bus lines
1
B C D
1 1
4 x1
MUX
0
B2 C2 D2
4-line bus
x
y
select
4 x1
MUX
0
B3 C3 D3
4 x1
MUX
0
4 x1
MUX
0
63

TRANSFER FROM BUS TO A DESTINATION REGISTER
Three-State Bus Buffers
Bus line with three-state buffers
Reg. R0 Reg. R1 Reg. R2 Reg. R3
Bus lines
2 x 4
Decoder
Load
D0 D1 D2 D3
z
w
Select E (enable)
Output Y=A if C=1
High-impedence if C=0
Normal input A
Control input C
Select
Enable
0
1
2
3
S0
S1
A0
B0
C0
D0
Bus line for bit 0
64

COMMON BUS SYSTEM:Cha-5
S2
S1
S0
Bus
Memory unit
4096 x 16
LD INR CLR
Address
Read
Write
AR
LD INR CLR
PC
LD INR CLR
DR
LD INR CLR
AC
ALU
E
INPR
IR
LD
LD INR CLR
TR
OUTR
LD
Clock
16-bit common bus
7
1
2
3
4
5
6
65

BINARY ADDER / SUBTRACTOR / INCREMENTER
FA
B0 A0
S0
C0
FA
B1 A1
S1
C1
FA
B2 A2
S2
C2
FA
B3 A3
S3
C3
C4
Binary Incrementer
HA
x y
C S
A0 1
S0
HA
x y
C S
A1
S1
HA
x y
C S
A2
S2
HA
x y
C S
A3
S3
C4
Binary Adder
Arithmetic Microoperations
67

Milestone Point
• Program and Process
• .exe file in HDD and process in RAM
• Data Transfer
• Within Microprocessor (Among Registers)
• Microprocessor to/from RAM
• Other devices to/from RAM
• HDD to RAM
• Network to RAM
• Devices to RAM
72

Video
• Working of 8085 Microprocessor with addition program
78

79

MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuits containing
some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the following
• n data input lines
• n data output lines
• k address lines
• A Read control line
• A Write control line
Bus and Memory Transfers
data input lines
data output lines
n
n
k
address lines
Read
Write
RAM
unit
81

MEMORY TRANSFER
Collectively, the memory is viewed at the register level as a device, M.
Since it contains multiple locations, we must specify which address in
memory we will be using
This is done by indexing memory references
Memory is usually accessed in computer systems by putting the
desired address in a special register, the Memory Address Register
(MAR, or AR)
When memory is accessed, the contents of the MAR get sent to the
memory unit’s address lines
AR
Memory
unit
Read
Write
Data in
Data out
M
82

MEMORY READ
• To read a value from a location in memory and load it into a register,
the register transfer language notation looks like this:
• R1 M[MAR]
• This causes the following to occur
• The contents of the MAR get sent to the memory address lines
• A Read (= 1) gets sent to the memory unit
• The contents of the specified address are put on the memory’s output data lines
• These get sent over the bus to be loaded into register R1
data input lines
data output lines
n
n
k
address lines
Read
Write
RAM
unit
83

MEMORY WRITE
• To write a value from a register to a location in memory looks like this
in register transfer language:
• This causes the following to occur
• The contents of the MAR get sent to the memory address lines
• A Write (= 1) gets sent to the memory unit
• The values in register R1 get sent over the bus to the data input lines of the
memory
• The values get loaded into the specified address in the memory
M[MAR]  R1
84

Example
85

MICROOPERATIONS
• Computer system microoperations are of four types:
- Register transfer microoperations
- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
86

ARITHMETIC MICROOPERATIONS
• The basic arithmetic microoperations are
• Addition
• Subtraction
• Increment
• Decrement
• The additional arithmetic microoperations are
• Add with carry
• Subtract with borrow
• Transfer/Load
• etc. …
Summary of Typical Arithmetic Micro-Operations
R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
87

BINARY ADDER / SUBTRACTOR / INCREMENTER
FA
B0 A0
S0
C0
FA
B1 A1
S1
C1
FA
B2 A2
S2
C2
FA
B3 A3
S3
C3
C4
Binary Adder-Subtractor: M=0 → Adder, M=1→Subtractor
Binary Incrementer
HA
x y
C S
A0 1
S0
HA
x y
C S
A1
S1
HA
x y
C S
A2
S2
HA
x y
C S
A3
S3
C4
Binary Adder
FA
B0 A0
S0
C0
C1
FA
B1 A1
S1
C2
FA
B2 A2
S2
C3
FA
B3 A3
S3
C4
M
88

89
A
B
FA
MUX
S1 S0 Cin Y Output Microoperation
0 0 0 B D = A + B Add
0 0 1 B D = A + B + 1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D = A Transfer A
1 0 1 0 D = A + 1 Increment A
1 1 0 1 D = A - 1 Decrement A
0

90

ARITHMETIC CIRCUIT
S1
S0
0
1
2
3
4x1
MUX
X0
Y0
C0
C1
D0
FA
S1
S0
0
1
2
3
4x1
MUX
X1
Y1
C1
C2
D1
FA
S1
S0
0
1
2
3
4x1
MUX
X2
Y2
C2
C3
D2
FA
S1
S0
0
1
2
3
4x1
MUX
X3
Y3
C3
C4
D3
FA
Cout
A0
B0
A1
B1
A2
B2
A3
B3
0 1
S0
S1
Cin
S1 S0 Cin Y Output Microoperation
0 0 0 B D = A + B Add
0 0 1 B D = A + B + 1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 1 0 D = A + 1 Increment A
1 1 0 1 D = A - 1 Decrement A
91

LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
• Logic microoperations are bit-wise operations, i.e., they work on the individual bits
of data
• useful for bit manipulations on binary data
• useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that can be defined
over two binary input variables
• However, most systems only implement four of these
• AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these
Logic Microoperations
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1
x y F0 F1 F2 … F13 F14 F15
92

LIST OF LOGIC MICROOPERATIONS
• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
- n binary vars functions
2
n
• Truth tables for 16 functions of 2 variables and the
corresponding 16 logic micro-operations
Boolean
Function
Micro-
Operations
Name
x
y
0 0 0 0 F0 = 0 F  0 Clear
0 0 0 1 F1 = xy F  A  B AND
0 0 1 0 F2 = xy' F  A  B’
0 0 1 1 F3 = x F  A Transfer A
0 1 0 0 F4 = x'y F  A’ B
0 1 0 1 F5 = y F  B Transfer B
0 1 1 0 F6 = x  y F  A  B Exclusive-OR
0 1 1 1 F7 = x + y F  A  B OR
1 0 0 0 F8 = (x + y)' F  (A  B)’ NOR
1 0 0 1 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1 0 1 0 F10 = y' F  B’ Complement B
1 0 1 1 F11 = x + y' F  A  B
1 1 0 0 F12 = x' F  A’ Complement A
1 1 0 1 F13 = x' + y F  A’ B
1 1 1 0 F14 = (xy)' F  (A  B)’ NAND
1 1 1 1 F15 = 1 F  all 1's Set to all 1's
93

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS
0 0 F = A  B AND
0 1 F = A  B OR
1 0 F = A  B XOR
1 1 F = A’ Complement
S1 S0 Output -operation
Function table
B
A
S1
S0
i
i
i
F
0
1
2
3
4 X 1
MUX
Select
94

APPLICATIONS OF LOGIC MICROOPERATIONS
Logic microoperations can be used to manipulate individual bits or a
portions of a word in a register
Consider the data in a register A. In another register, B, is bit data that
will be used to modify the contents of A
Selective-set A  A + B
Selective-complement A  A  B
Selective-clear A  A • B’
Mask (Delete) A  A • B
Clear A  A  B
Insert A  (A • B) + C
Compare A  A  B
 . . .
95

SELECTIVE SET
• In a selective set operation, the bit pattern in B is used to set certain bits
in A
1 1 0 0 At
1 0 1 0 B
1 1 1 0 At+1
(A  A + B)
• If a bit in B is set to 1, that same position in A gets set to 1, otherwise
that bit in A keeps its previous value
96

SELECTIVE COMPLEMENT
• In a selective complement operation, the bit pattern in B is used to
complement certain bits in A
1 1 0 0 At
1 0 1 0 B
0 1 1 0 At+1
(A  A  B)
• If a bit in B is set to 1, that same position in A gets complemented from
its original value, otherwise it is unchanged
97

SELECTIVE CLEAR
• In a selective clear operation, the bit pattern in B is used to clear certain
bits in A
1 1 0 0 At
1 0 1 0 B
0 1 0 0 At+1
(A  A  B’)
• If a bit in B is set to 1, that same position in A gets set to 0, otherwise it
is unchanged
98

MASK OPERATION
• In a mask operation, the bit pattern in B is used to clear certain bits in A
1 1 0 0 At
1 0 1 0 B
1 0 0 0 At+1
(A  A  B)
• If a bit in B is set to 0, that same position in A gets set to 0, otherwise it
is unchanged
99

CLEAR OPERATION
• In a clear operation, if the bits in the same position in A and B are the
same, they are cleared in A, otherwise they are set in A
1 1 0 0 At
1 0 1 0 B
0 1 1 0 At+1
(A  A  B)
100

INSERT OPERATION
An insert operation is used to introduce a specific bit pattern into A register, leaving
the other bit positions unchanged
This is done as
A mask operation to clear the desired bit positions, followed by
An OR operation to introduce the new bits into the desired
positions
Example
Suppose you wanted to introduce 1010 into the low order four bits of A:
1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A (Desired)
1101 1000 1011 0001 A (Original)
1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)
101

SHIFT MICROOPERATIONS
• There are three types of shifts
• Logical shift
• Circular shift
• Arithmetic shift
• What differentiates them is the information that goes into the
serial input
Shift Microoperations
Serial
input
• A right shift operation
• A left shift operation Serial
input
102

LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.
• A right logical shift operation:
• A left logical shift operation:
• In a Register Transfer Language, the following notation is used
• shl for a logical shift left
• shr for a logical shift right
• Examples:
• R2  shr R2
• R3  shl R3
0
0
103

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out of the other end of
the register.
• A right circular shift operation:
• A left circular shift operation:
• In a RTL, the following notation is used
• cil for a circular shift left
• cirfor a circular shift right
• Examples:
• R2  cir R2
• R3  cil R3
104

ARITHMETIC SHIFT
• An arithmetic shift is meant for signed binary numbers (integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep the sign of
the number the same as it performs the multiplication or division
• A right arithmetic shift operation:
• A left arithmetic shift operation:
0
sign
bit
sign
bit
105

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the overflow
0
V
Before the shift, if the leftmost two
bits differ, the shift will result in an
overflow
• In a RTL, the following notation is used
– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
sign
bit
106

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS
S
0
1
H0
MUX
S
0
1
H1
MUX
S
0
1
H2
MUX
S
0
1
H3
MUX
Select
0 for shift right (down)
1 for shift left (up)
Serial
input (IR)
A0
A1
A2
A3
Serial
input (IL)
A3 A2 A1 A0
107

Making ALU
• So far you learned
• To Design Arithmetic Operation Circuit
• To Design Login Circuit
• To Design Shift Circuit
• Its time to combine all together
108

Arithmetic operation
B0
A0
F0
S1 S0 Cin
Arithmetic
Operation
109

Logic operation
B
A
S1
S0
i
i
i
F
0
1
2
3
4 X 1
MUX
Select
B0
A0
F0
S1 S0 Cin
logic
Operation
110

Combined arithmetic and logic
B0
A0
F0
S1 S0 Cin
Arithmetic
Operation
B0
A0
F0
S1 S0 Cin
logic
Operation
Multiplexer
111
Arithmetic
Circuit
Logic
Circuit
C
C 4 x 1
MUX
Select
0
1
2
3
F
S3
S2
S1
S0
B
A
i
A
D
A
E
shr
shl
i+1 i
i
i
i-1
i
i

ARITHMETIC LOGIC SHIFT UNIT
S3 S2 S1 S0 Cin
0 0 0 0 0
0 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 1 0 0
0 0 1 0 1
0 0 1 1 0
0 0 1 1 1
0 1 0 0 X
0 1 0 1 X
0 1 1 0 X
0 1 1 1 X
1 0 X X X
1 1 X X X
Arithmetic
Circuit
Logic
Circuit
C
C 4 x 1
MUX
Select
0
1
2
3
F
S3
S2
S1
S0
B
A
i
A
D
A
E
shr
shl
i+1 i
i
i
i+1
i-1
i
i
112
Operation Function
F = A Transfer A
F = A + 1 Increment A
F = A + B Addition
F = A + B + 1 Add with carry
F = A + B’ Subtract with borrow
F = A + B’+ 1 Subtraction
F = A - 1 Decrement A
F = A TransferA
F = A  B AND
F = A  B OR
F = A  B XOR
F = A’ Complement A
F = shr A Shift right A into F
F = shl A Shift left A into F

November 15, 1971 1971 4004
Microprocessor
113

114
The Intel 4004 is a 4-
bit central processing
unit (CPU) released by Intel
Corporation in 1971. Sold for
US$60 (equivalent to $430 in
2022,[2] $449.43 in 2023[3]), it
was the first commercially
produced microprocessor,[4] a
nd the first in a long line of
Intel CPUs.

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