chapter 3.pptx

EXERCISE 3.6
 In this exercise we will look at a couple of other
ways to improve the performance of multiplication,
based primarily on doing more shifts and fewer
arithmetic operations. The following table shows
pairs of hexadecimal numbers.
A B
a. 33 55
b. 8a 6d

 3.6.1 As discussed in the text, one possible
performance enhancement is to do a shift and add
instead of an actual multiplication. Since 9×6, for
example, can be written (2×2×2+1)×6， we can
calculate 9×6 by shifting 6 to the left 3 times and
then adding 6 to that result. Show the best way to
calculate A×B using shifts and adds/subtracts.
Assume that A and B are 8-bit unsigned integers.
 Solution:
a.
0x33 × 0x55 = 0x10EF.
0x33 = 51, and 51 = 32 + 16 + 2 + 1.
We can shift 0x55 left 5 places (0xAA0), then add
0x55 shifted left 4 places (0x550), then add 0x55
shifted left once (0xAA), then add 0x55. 0xAA0 + 0x550
+ 0xAA + 0x55 = 0x10EF.
3 shifts, 3 adds.
A B
a. 33 55
b. 8a 6d

 Solution:
b.
0x8A × 0xED = 0x7FC2
0x8A = 128 + 8 + 2
0xED = 128 + 64 + 32 + 8 + 4 + 1.
Best way is to shift 0xED left 7 places (0x7680),
then add to that 0xED shifted left 3 places (0x768),
and then add 0xED shifted left 1 place (0x1DA).
3 shifts, 2 adds.
A B
a. 33 55
b. 8a 6d

 3.6.2 Show the best way to calculate A×B using
shifts and add, if A and B are 8-bit signed integers
stored in sign-magnitude format.
 Solution:
a.
0x33 × 0x55 = 0x10EF.
0x33 = 51, and 51 = 32 + 16 + 2 + 1.
We can shift 0x55 left 5 places (0xAA0), then add
0x55 shifted left 4 places (0x550), then add 0x55
shifted left once (0xAA), then add 0x55.
0xAA0 + 0x550 + 0xAA + 0x55 = 0x10EF.
3 shifts, 3 adds.
A B
a. 33 55
b. 8a 6d

 Solution:
b.
0x8A × 0xED = –0x0A × –0x6D = 0x442
0x0A = 8 + 2,
0x6D = 64 + 32 + 8 + 4 + 1.
Best way is to shift 0x6D left 3 places (0x368), then
add to that 0x6D shifted left 1 place (0xDA).
2 shifts, 1 add.
A B
a. 33 55
b. 8a 6d

 3.6.3 Write an MIPS assembly language program
that perform a multiplication on signed integers
using shifts and adds, using the approach
described in 3.6.1.
 Solution:
No solution provided.

 The following table shows further pairs of
hexadecimal numbers.
A B
a. f6 7f
b. 08 55

 3.6.4 Booth’s algorithm is another approach to reducing the
number of arithmetic operations necessary to perform a
multiplication. This algorithm has been around for years and
involves identifying runs of ones and zeros and performing
only shifts instead of shifts and adds during the runs. Fing a
description of the algorithm on the web and explain in detail
how it works.
 Solution:
Quoting the Wikipedia entry directly:
Booth’s algorithm involves repeatedly adding one of two
predetermined values A and S to a product P, then performing a
rightward arithmetic shift on P. Let x and y be the multiplicand
and multiplier, respectively; and let x and y represent the number
of bits in x and y.

Booth's Algorithm
• A multiplication algorithm that multiplies two signed
binary numbers in two's complement notation.
• Invented by Andrew Donald Booth in 1951 while doing
research on crystallography at Birkbeck College in
Bloomsbury, London.

Booth's Algorithm- Rules
For each multiplier bit, also examine bit to its right
• 00: middle of a run of 0s, do nothing
• 10: beginning of a run of 1s, subtract multiplicand
• 11: middle of a run of 1s, do nothing
• 01: end of a run of 1s, add multiplicand

BOOTH'S ALGORITHM- WHY?
Given [X]2’com=xn-1xn-2
…… x1x0 ， [ Y]2’com=yn-1yn-2
…… y1y0 , calculate[X x
Y]2’com=？
Based on 2’s complement, we have
Y=-yn-1
.2n-1+yn-2
.2n-2+ …… y1
.21+ y0
.20
Let y-1 =0，so：
When n=32，Y=-y31
.231+y30
.230+ …… y1
.21+ y0
.20 + y-1
.20
-y31
.231+(y30
.231-y30
.230)+…… +(y0
.21-y0
.20)+ y-1
.20
(y30 -y31 ).231+(y29-y30).230+ …… + (y0–y1).21 +(y-1-y0).20
Why Booth’s Algorithm holds?
2-32.[XxY]补= (y30 -y31 )X.2-1+(y29-y30)X.2-2+ …… + (y0–y1)X.2-31 +(y-1-y0) X.2-32
= 2-1(2-1…(2-1(y-1-y0)X) + (y0–y1)X) +… + (y30 -y31)X)

POINTS TO REMEMBER
 When using Booth's Algorithm:
 You will need twice as many bits in your product as you
have in your original two operands.
 The leftmost bit of your operands (both your multiplicand
and multiplier) is a SIGN bit, and cannot be used as part
of the value.

 3.6.5 Show the step-by-step result of multiplying A
and B, using Booth’s algorithm. Assume A and B
are 8-bit two’s complement integers, stored in
hexadecimal format.

 Solution:
a. 0xF6 × 0x7F = −0xA × 0x7F = −10 × 127
= −1270 = 0xFB0A
Action Multiplicand Product/Multiplier
Initial Vals 1111 0110 0000 0000 0111 1111 0
10, subtract
shift
1111 0110
1111 0110
0000 1010 0111 1111 0
0000 0101 0011 1111 1
11, nop
shift
1111 0110
1111 0110
0000 0101 0011 1111 1
0000 0010 1001 1111 1
11, nop
shift
1111 0110
1111 0110
0000 0010 1001 1111 1
0000 0001 0100 1111 1
11, nop
shift
1111 0110
1111 0110
0000 0001 0100 1111 1
0000 0000 1010 0111 1
11, nop
shift
1111 0110
1111 0110
0000 0000 1010 0111 1
0000 0000 0101 0011 1
11, nop
shift
1111 0110
1111 0110
0000 0000 0101 0011 1
0000 0000 0010 1001 1
11, nop
shift
1111 0110
1111 0110
0000 0000 0010 1001 1
0000 0000 0001 0100 1
01, add
shift
1111 0110
1111 0110
1111 0110 0001 0100 1
1111 1011 0000 1010 0

 Solution:
b. 0x08 × 0x55 = 0x2A8
Action Multiplicand Product/Multiplier
Initial Vals 0000 1000 0000 0000 0101 0101 0
10, subtract
shift
0000 1000
0000 1000
1111 1000 0101 0101 0
1111 1100 0010 1010 1
01, add
shift
0000 1000
0000 1000
0000 0100 0010 1010 1
0000 0010 0001 0101 0
10, subtract
shift
0000 1000
0000 1000
1111 1010 0001 0101 0
1111 1101 0000 1010 1
01, add
shift
0000 1000
0000 1000
0000 0101 0000 1010 1
0000 0010 1000 0101 0
10, subtract
shift
0000 1000
0000 1000
1111 1010 1000 0101 0
1111 1101 0100 0010 1
01, add
shift
0000 1000
0000 1000
0000 0101 0100 0010 1
0000 0010 1010 0001 1
10, subtract
shift
0000 1000
0000 1000
1111 1010 1010 0001 0
1111 1101 0101 0000 1
01, add
shift
0000 1000
0000 1000
0000 0101 0101 0000 1
0000 0010 1010 1000 1

 3.6.6 Write an MIPS assembly language program to
perform the multiplication of A and B using Booth’s
algorithm.
 Solution:
http://code.google.com/p/mips-booth-
multiplication/source/browse/trunk/booth.asm?r=9

EXERCISE 3.8
 Figure 3.10 describes a restoring division algorithm,
because when subtracting the divisor from the
remainder produces a negative result, the divisor is
added back to the remainder (thus restoring the
value). However, there are other algorithms that
have been developed that eliminate the extra
addition. Many references to these algorithms are
easily found on the web. We will explore these
algorithms using the pairs of octal numbers in the
following table.
A B
a. 26 05
b. 37 15

 3.8.1 Using a table similar to that shown in Figure
3.11, calculate A divided by B using non-restoring
division. You should show the contents of each
register on each step. Assume A and B are 6-bit
unsigned integers.

 Solution:
 a. 26/05 = 5 remainder 1

 Solution:
 b. 37/15 = 2 remainder 7

calculate A divided by B using non-restoring division.
You should show the contents of each register on
each step. Assume A and B are 6bit unsigned
integers.
 Solution:

 3.8.3 How does the performance of restoring and
non-restoring division compare? Demonstrate by
showing the number of steps necessary to calculate
A divided by B using each method. Assume A and B
are 6-bit signed (sign-magnitude) integers. Writing
a program to perform the restoring and non-
restoring divisions is acceptable.
 Solution:

 The following table shows further pairs of numbers.
A B
a. 27 06
b. 54 12

calculate A divided by B using nonperforming
division. Assume A and B are 6-bit two’s
complement signed integers.
 Solution:

 3.8.6 How does the performance of non-restoring
and nonperforming division compare? Demonstrate
by showing the number of steps necessary to
calculate A divided by B using each method.
Assume A and B are signed 6-bit integers, stored in
sign-magnitude format. Writing a program to
perform the nonperforming and non-restoring
division is acceptable.
 Solution:

EXERCISE 3.11
 In the IEEE 754 floating point standard the exponent is
stored in “bias” (also known as Excess-N) format. This
approach was selected because we want an all-zero
pattern to be as close to zero as possible. Because of
the use of a hidden 1, if we were to represent the
exponent in two’s complement format an all-zero
pattern would actually be the number 1! (Remember,
anything raised to the zeroth power is 1, so 1.00=1.)
There are many other aspects of the IEEE 754
standard that exist in order to help hardware floating
point units work more quickly. However, in many older
machines floating point calculations were handled in
software, and therefore other formats were used. The
following table shows decimal numbers.
a. -1.5625×10-1 b. 9.356875×102

 3.11.1 Write down the binary bit pattern assuming a
format similar to that employed by the DEC PDP-8
(the leftmost 12 bits are the exponent stored as a
two’s complement number, and the rightmost 24
bits are the mantissa stored as a two’s complement
number). No hidden 1 is used. Comment on how
the range and accuracy of this 36-bit pattern
compares to the single and double precision IEEE
754 standards.

REPRESENTATION RANGE OF IEEE 754 SINGLE PRECISION
Negative numbers less than -(2-2-23) × 2127 (negative overflow)
to -1 * 21-127 (negative underflow) Normalized
Zero
to 1 * 21-127 (positive underflow) Normalized
Positive numbers greater than (2-2-23) × 2127 (positive overflow)
Sign Exponent Fraction
1 bit 8 bits 23 bits
S E F

REPRESENTATION RANGE OF IEEE 754 DOUBLE PRECISION
To -1 * 21-1023 (negative underflow) Normalized
Zero
Or 1 * 21-1023 (positive underflow) Normalized
30
S E F

REPRESENTATION RANGE OF PDP-8
Exponent: -211 to 211 -1
Mantissa: [-(2-2-22 ), -1]to [1, 2-2-22 ]
Largest number (2-2-22)*22047
Smallest positive number (1)* 2-2048
zero
Largest negative number (-1)* 2-2048
Smallest negative number - (2-2-22)*22047
c. Exponent: 127 vs 1023 vs 2047 (or 8 bit vs 11 bit vs 12 bit)
Significant: 23 vs 52 vs 23 (or 23 bit vs 52 bit vs 23 bit )
Exponent Fraction
12 bits 24 bits
E F

 3.11.2 NVIDIA has a “half” format, which is similar to
IEEE 754 except that it is only 16 bits wide. The
leftmost bit is still the sign bit, the exponent is 5 bits
wide and stored in excess-56 format, and the
mantissa is 10 bits long. A hidden 1 is assumed.
Write down the bit pattern assuming a modified
version of this format, which uses an excess-16
format to store the exponent. Comment on how the
range and accuracy of this 16-bit floating point
format compares to the single precision IEEE 754
standard.

REPRESENTATION RANGE OF NVIDIA
Negative numbers greater than -1*2-15 (negative underflow)
Zero
Positive numbers less than 1*2-15 (positive underflow)
S E F

 3.11.3 The Hewlett-Packard 2114, 2115, and 2116
used a format with the leftmost 16 bits being the
mantissa stored in two’s complement format,
followed by another 16-bit field which had the
leftmost 8 bits as an extension of the mantissa
(making the mantissa 24 bits long), and the
rightmost 8 bits representing the exponent.
However, in an interesting twist, the exponent was
stored in sign-magnitude format with the sign bit on
the far right! Write down the bit pattern assuming
this format. No hidden 1 is used. Comment on how
the range and accuracy of this 32-bit pattern
compares to the single precision IEEE 754
standard.

REPRESENTATION RANGE OF HP
Negative numbers greater than -1*2-128 (negative underflow)
Zero
Positive numbers less than 1*2-128 (positive underflow)
S
E
F F
Fraction Fraction Exponent Sign
16 bit 8 bits 7 bits 1
c. Exponent: 7 bit vs 7 bit
Significant: 23 bit vs 22 bit

 The following table shows pairs of decimal numbers.
A B
a. 2.6125×10-1 4.150390625×10-1
b. -4.484375×101 1.3953125×101

 3.11.4 Calculate the sum of A and B by hand,
assuming A and B are stored in the modified 16-bit
NVIDIA format described in 3.11.2. Assume 1 guard,
1 round bit, and 1 sticky bit, and round to the
nearest even. Show all the steps.
S E F

 Solution:
a.
2.6125×101 + 4.150390625×10–1
2.6125×101 = 26.125 = 11010.001 = 1.1010001000×24
4.150390625×10–1 = .4150390625 = .011010100111
=1.1010100111×2–2
Shift binary point 6 to the left to align exponents,
GR
1.1010001000 00
+.0000011010 10 0111 (Guard = 1, Round = 0, Sticky = 1)
--------------------
1.1010100010 10
In this case the extra bits (G,R,S) are more than half of the
least significant bit (0).
Thus, the value is rounded up.
1.1010100011 × 24 = 11010.100011 × 20 = 26.546875
= 2.6546875 × 101

 Solution:
b.
–4.484375 × 101 + 1.3953125 × 101
–4.484375 × 101 = –44.84375 = –1.0110011011 × 25
1.1953125 × 101 = 11.953125 = 1.0111111010 × 23
Shift binary point 2 to the left and align exponents,
GR
–1.0110011011 00
0.0101111110 10 (Guard = 1, Round = 0, Sticky = 0)
------------------
–1.0000011100 10
In this case, the Guard is 1 and the Round and Sticky bits
are zero. This is the “exactly half” case—if the LSB was odd (1)
we would add, but since it is even (0) we do nothing.
–1.0000011100 × 25 = –100000.11100 × 20 = –32.875
= –3.2875 × 101

to calculate the sum of A and B, assuming they are
stored in the modified 16-bit NVIDIA format
described in 3.11.2. Assume 1 guard, 1 round bit,
and 1 sticky bit, and round to the nearest even.
 Solution:

to calculate the sum of A and B, assuming they are
stored using the format described in 3.11.1. Now
modify the program to calculate the sum assuming
the format described in 3.11.3. Which format is
easier for a programmer to deal with? How do they
each compare to the IEEE 754 format? (Do not
worry about sticky bits for this question.)
 Solution:

EXERCISE 3.14
 The associative law is not the only one that does
not always hold in dealing with floating point
numbers. There are other oddities that occur as
well. The following table shows sets of decimal
numbers.
A B C
a. 1.666015625×100 1.9760×104 -1.9744×104
b. 3.48×102 6.34765625×10-2 -4.052734375×10-2

 3.14.1 Calculate A×(B+C) by hand, assuming A, B,
and C are stored in the modified 16-bit NVIDIA
format described in 3.11.2 (and also described in
the text). Assume 1 guard, 1 round bit, and 1 sticky
bit, and round to the nearest even. Show all the
steps, and write your answer in both the 16-bit
floating point format and in decimal.

 Solution:
a.
1.666015625 × 100 × (1.9760 × 104 – 1.9744 × 104)
(A) 1.666015625 × 100 = 1.1010101010 × 20
(B) 1.9760 × 104 = 1.0011010011 × 214
(C) –1.9744 × 104 = –1.0011010010 × 214
Exponents match, no shifting necessary
(B) 1.0011010011
(C) –1.0011010010
---------------
(B+C) 0.0000000001 × 214
(B+C) 1.0000000000 × 24
Exp: 0 + 4 = 4
Signs: both positive, result positive

 Solution:
a.
Mantissa:
(A) 1.1010101010
(B+C) × 1.0000000000
------------
11010101010
----------------------
1.10101010100000000000
A×(B+C) 1.1010101010 0000000000
Guard=0, Round=0, Sticky=0: No Round
A (B+C) 1.1010101010 × 24

 Solution:
b.
3.48 × 102 × (6.34765625 × 10–2 – 4.052734375 × 10–2)
(A) 3.48 × 102 = 1.0101110000 × 28
(B) 6.34765625 × 10–2 = 1.0000010000 × 2–4
(C) –4.052734375 × 10–2 = 1.0100110000 × 2–5
Shift binary point of smaller left 1 so exponents match
(B) 1.0000010000 × 2–4
(C) –.1010011000 0 × 2–4
---------------
(B+C) .0101111000 Normalize, subtract 2 from exponent
(B+C) 1.0111100000 × 2–6
Exp: 8 – 6 = 2
Signs: both positive, result positive

 Solution:
b.
Mantissa:
(A) 1.0101110000
(B + C) × 1.0111100000
------------
10101110000
10101110000
10101110000
10101110000
10101110000
A×(B+C) 1.1111111100 10000000000
Guard=1, Round=0, Sticky=0:Round to even
A × (B + C) 1.1111111100 × 22

 3.14.2 Calculate (A×B)+(A×C) by hand, assuming
A, B, and C are stored in the modified 16-bit
NVIDIA format described in 3.11.2 (and also
described in the text). Assume 1 guard, 1 round bit,
and 1 sticky bit, and round to the nearest even.
Show all the steps, and write your answer in both
the 16-bit floating point format and in decimal.

 3.14.3 Based on your answers to 3.14.1 and 3.14.2,
does (A×B)+(A×C) = A×(B+C)?
 Solution:
a. No
A × (B + C) = 1.1010101010 × 24 = 26.65625
(A × B) + (A × C) = 1.0000000000 × 25 = 32
Exact: 1.666015625 × (19760 – 19744) = 26.65625
b. No
A × B + A × C = 1.0000000000 × 23 = 8
A × (B + C) = 1.1111111100 × 22 = 7.984375
Exact: 348 × (.0634765625 – .04052734375) =
7.986328125

 The following table shows pairs, each consisting of
a fraction and an integer.
A B
a. -1/4 4
b. 1/10 10

 3.14.4 Using the IEEE 754 floating point format,
write down the bit pattern that would represent A.
Can you represent A exactly?
 Solution:
Answer Sign Exp Exact?
a. 1 01111101 00000000000000000000000 - -2 Yes
b. 0 01111011 10011001100110011001101 + -4 No

 3.14.5 What do you get if you add A to itself B times?
What is A×B? Are they the same? What should
they be?
 Solution：
a.
b + b + b + b = –1
b × 4 = –1
They are the same
b.
e + e + e + e + e + e + e + e + e + e
= 1.000000000000000000000100
e × 10 = 1.000000000000000000000100

 3.14.6 What do you get if you take the square root
of B and then multiply that value by itself? What
should you get? Do for both single and double
precision floting point numbers. (Write a program to
do these calculations.)
 Solution:

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