デザインキット・D級アンプの解説書
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The document provides specifications for a class D audio amplifier circuit using an IRS2092 integrated circuit. It includes 3 sentences summarizing key points: The document outlines specifications for efficiency, total harmonic distortion (THD), frequency response, output power, voltage gain, self-oscillation frequency, dead time, turn on transient, components stress, power loss in MOSFETs, short circuit response, and simulated performance with different field effect transistors (FETs). Graphs and simulation results are provided to evaluate performance across operating conditions including efficiency around 93% and THD less than 0.015% at 1kHz and 10W into a 4 ohm load. Frequency response is specified to be within ±1dB from 20
![Contents
Slide #
1. Specification........................................................................................................................................... 3
• Efficiency........................................................................................................................................... 4-5
• THD................................................................................................................................................... 6-7
• Frequency Response........................................................................................................................ 8-9
• Note: Po[W] vs. Vin[VPEAK] ............................................................................................................... 10
2. Waveforms Evaluations.......................................................................................................................... 11
3. Simulated vs. Measured Waveforms...................................................................................................... 12-14
4. Voltage Gain – GV…............................................................................................................................... 15-16
5. Self Oscillation Frequency...................................................................................................................... 17-18
6. Dead time............................................................................................................................................... 19-21
7. Turn on transient.................................................................................................................................... 22-25
8. Components stress................................................................................................................................. 26-27
9. Power loss in the MOSFETs................................................................................................................... 28
• Standard Model................................................................................................................................. 29-30
• Professional Model............................................................................................................................ 31-33
• Standard vs. Professional Model....................................................................................................... 34-35
10. Short circuit vs. switching output shutdown............................................................................................ 36-38
11. Short Circuit Response........................................................................................................................... 39-41
12. Capacitor Models........................................................................................... ........................................ 42-44
13. Simulated Performance of the circuit with different FETs......... .............................................................. 45-47
14. Simulation Index .................................................................................................................................... 48
2 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-2-320.jpg)
![1. Specifications
General Test Conditions Simulation folder
Supply Voltage + 15V
Load Impedance 8-4 Ω
Self-Oscillating
400kHz
Frequency
Gain Setting 24dB
Electrical Data
Output Power 25W (1kHz, 4Ω)
Efficiency 93% (25W, 4Ω) [Efficiency]
Audio Performance
Distortion Less than 0.015%THD (1kHz, 4Ω, 10W) [THD]
Frequency
(20 ~ 20000 Hz,
Response : + 1dB [FrqRsp]
4Ω, 2V Output)
20Hz~20kHz
3 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-3-320.jpg)
![Specifications : Efficiency Evaluation Circuit
R3 +B
VS 15V
47k +B
R8
2 0
C16
+
820
C15 EKMG500ELL222MLP1S
R17 RPER11H104K2K1A01B
20nH 1
Ls1 0 0
C14
R9 1 MMH250K684
4.7k C11
RPER11H104K2K1A01B
FET1
R4 75 IC1 D2 IRFIZ24N
220 VR1 VAA CSH MUR120RLG MUR120RLG 2
VAA CSH D1
VB R12
C4 GND VB R11 10k C9 R13
C1 R2 20nH
IN C2 + 1nF IN- HO 10k 22u 10 L1
10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB
V1 3k
R1 IC = 7 EKMG500ELL100ME11D1nF COMP VS 4.7 2 OUT
100k C6 COMP VS R16 1
C3 AMZ0050J102 CSD VCC R18 R19 LOAD
C8 C7 CSD VCC R15 20nH 10 2.2k
RPER11H103K2K1A01B 10 {RL}
10u 10u VSS LO 0 Ls3 C12
VOFF = 0 0 IC = 7 IC = 10 VSS LO R20 C10 22u MMC250K474
VREF 10
VAMPL = {1.4142*SQRT(Po*RL)/Gv } 3.3k IC = 15 C13
FREQ = {f in} VREF COM 1 MMC400K104
R6 8.2k OCSET DT
OCSET DT
TEST CONDITION: 0 0 0
R7 FET2
PARAMETERS: IRS2092
1.2k R21 IRFIZ24N
Po = 25W 8.2k 2 C17
RPER11H104K2K1A01B
Gv = 15.85
RL = 4 20nH
+
Ls4 0 0
f in = 1kHz R5
2 1 -B C18
1 Ls5 EKMG500ELL222MLP1S
20nH -B
820 -15V
0
Condition : Analysis .Options
Po = 25[W], 4Ω Load Time Domain (Transient) RELTOL: 0.01
Run to time: 3ms VNTOL: 1.0u
Start saving data after: 1ms ABSTOL: 1.0n
Maximum step size: 100n CHGTOL: 0.01p
Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10
4 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-4-320.jpg)
![Specifications : Efficiency Simulation Result
%Efficiency
PSUPPLY [W]
PO [W]
5 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-5-320.jpg)
![Specifications : THD Evaluation Circuit
R3 +B
VS 15V
47k +B
R8
2 0
C16
+
820
C15 EKMG500ELL222MLP1S
R17 RPER11H104K2K1A01B
20nH 1
Ls1 0 0
C14
R9 1 MMH250K684
4.7k C11
RPER11H104K2K1A01B
FET1
75 U5 D2 IRFIZ24N
R4 VR1 VAA CSH MUR120RLG MUR120RLG 2
220 VAA CSH D1
VB R12
C4 GND VB R11 10k C9 R13
C1 10u R2 20nH
IN C2 1nF IN- HO 10k 22u 10 L1
10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB
V1 3k
R1 IC = 7 1nF COMP VS 4.7 2 OUT
100k C6 COMP VS R16 1
1n CSD VCC R18 R19 LOAD
C3 C8 C7 CSD VCC R15 20nH 10 2.2k
10 {RL}
10u 10u 10u VSS LO 0 Ls3 C12
0 IC = 14 IC = 7 IC = 10 VSS LO R20 C10 22u MMC250K474
VREF 10
VOFF = 0 3.3k IC = 15 C13
VAMPL = {1.4142*SQRT(Po*RL)/Gv } VREF COM 1 MMC400K104
FREQ = 1k R6 8.2k OCSET DT
OCSET DT
TEST CONDITION: R7 FET2 0 0 0
IRS2092
1.2k R21 IRFIZ24N
PARAMETERS: 8.2k 2 C17
Po = 10 RPER11H104K2K1A01B
Gv = 15.85 20nH
+
RL = 4 Ls4 0 0
R5
f in = 1k
2 1 -B C18
1 Ls5 EKMG500ELL222MLP1S
20nH -B
820 -15V
0
Analysis .Options
Condition : Time Domain (Transient) RELTOL: 0.01
fin = 1kHz, Po = 10[W], Run to time: 3ms VNTOL: 1.0u
4Ω Load Start saving data after: 0s ABSTOL: 1.0n
Maximum step size: 100n CHGTOL: 0.01p
Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12
ITL1: 500
Output File Options... ITL2: 200
Perform Fourier Analysis ITL4: 10
Center Frequency: 1khz
Output Variables: V(OUT)
6 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-6-320.jpg)
![Note : PO [W] vs. VIN [VPEAK]
1.4142 × √ ×
[] =
Po [W] = power output
Rload [Ω] = Load resistance
GV = Amplifier voltage gain
10 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009](https://image.slidesharecdn.com/classdaudioamplifier-110511223658-phpapp01/85/D-10-320.jpg)
デザインキット・D級アンプの解説書
- 1. Design Kit Class D Audio Amplifier Using IRS2092 1 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 2. Contents Slide # 1. Specification........................................................................................................................................... 3 • Efficiency........................................................................................................................................... 4-5 • THD................................................................................................................................................... 6-7 • Frequency Response........................................................................................................................ 8-9 • Note: Po[W] vs. Vin[VPEAK] ............................................................................................................... 10 2. Waveforms Evaluations.......................................................................................................................... 11 3. Simulated vs. Measured Waveforms...................................................................................................... 12-14 4. Voltage Gain – GV…............................................................................................................................... 15-16 5. Self Oscillation Frequency...................................................................................................................... 17-18 6. Dead time............................................................................................................................................... 19-21 7. Turn on transient.................................................................................................................................... 22-25 8. Components stress................................................................................................................................. 26-27 9. Power loss in the MOSFETs................................................................................................................... 28 • Standard Model................................................................................................................................. 29-30 • Professional Model............................................................................................................................ 31-33 • Standard vs. Professional Model....................................................................................................... 34-35 10. Short circuit vs. switching output shutdown............................................................................................ 36-38 11. Short Circuit Response........................................................................................................................... 39-41 12. Capacitor Models........................................................................................... ........................................ 42-44 13. Simulated Performance of the circuit with different FETs......... .............................................................. 45-47 14. Simulation Index .................................................................................................................................... 48 2 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 3. 1. Specifications General Test Conditions Simulation folder Supply Voltage + 15V Load Impedance 8-4 Ω Self-Oscillating 400kHz Frequency Gain Setting 24dB Electrical Data Output Power 25W (1kHz, 4Ω) Efficiency 93% (25W, 4Ω) [Efficiency] Audio Performance Distortion Less than 0.015%THD (1kHz, 4Ω, 10W) [THD] Frequency (20 ~ 20000 Hz, Response : + 1dB [FrqRsp] 4Ω, 2V Output) 20Hz~20kHz 3 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 4. Specifications : Efficiency Evaluation Circuit R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 VB R12 C4 GND VB R11 10k C9 R13 C1 R2 20nH IN C2 + 1nF IN- HO 10k 22u 10 L1 10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB V1 3k R1 IC = 7 EKMG500ELL100ME11D1nF COMP VS 4.7 2 OUT 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 LOAD C8 C7 CSD VCC R15 20nH 10 2.2k RPER11H103K2K1A01B 10 {RL} 10u 10u VSS LO 0 Ls3 C12 VOFF = 0 0 IC = 7 IC = 10 VSS LO R20 C10 22u MMC250K474 VREF 10 VAMPL = {1.4142*SQRT(Po*RL)/Gv } 3.3k IC = 15 C13 FREQ = {f in} VREF COM 1 MMC400K104 R6 8.2k OCSET DT OCSET DT TEST CONDITION: 0 0 0 R7 FET2 PARAMETERS: IRS2092 1.2k R21 IRFIZ24N Po = 25W 8.2k 2 C17 RPER11H104K2K1A01B Gv = 15.85 RL = 4 20nH + Ls4 0 0 f in = 1kHz R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 Condition : Analysis .Options Po = 25[W], 4Ω Load Time Domain (Transient) RELTOL: 0.01 Run to time: 3ms VNTOL: 1.0u Start saving data after: 1ms ABSTOL: 1.0n Maximum step size: 100n CHGTOL: 0.01p Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 ITL1: 500 ITL2: 200 ITL4: 10 4 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 5. Specifications : Efficiency Simulation Result %Efficiency PSUPPLY [W] PO [W] 5 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 6. Specifications : THD Evaluation Circuit R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 75 U5 D2 IRFIZ24N R4 VR1 VAA CSH MUR120RLG MUR120RLG 2 220 VAA CSH D1 VB R12 C4 GND VB R11 10k C9 R13 C1 10u R2 20nH IN C2 1nF IN- HO 10k 22u 10 L1 10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB V1 3k R1 IC = 7 1nF COMP VS 4.7 2 OUT 100k C6 COMP VS R16 1 1n CSD VCC R18 R19 LOAD C3 C8 C7 CSD VCC R15 20nH 10 2.2k 10 {RL} 10u 10u 10u VSS LO 0 Ls3 C12 0 IC = 14 IC = 7 IC = 10 VSS LO R20 C10 22u MMC250K474 VREF 10 VOFF = 0 3.3k IC = 15 C13 VAMPL = {1.4142*SQRT(Po*RL)/Gv } VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT TEST CONDITION: R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N PARAMETERS: 8.2k 2 C17 Po = 10 RPER11H104K2K1A01B Gv = 15.85 20nH + RL = 4 Ls4 0 0 R5 f in = 1k 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 Analysis .Options Condition : Time Domain (Transient) RELTOL: 0.01 fin = 1kHz, Po = 10[W], Run to time: 3ms VNTOL: 1.0u 4Ω Load Start saving data after: 0s ABSTOL: 1.0n Maximum step size: 100n CHGTOL: 0.01p Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 ITL1: 500 Output File Options... ITL2: 200 Perform Fourier Analysis ITL4: 10 Center Frequency: 1khz Output Variables: V(OUT) 6 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 7. Specifications : THD Simulation Result HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED NO (HZ) COMPONENT COMPONENT (DEG) PHASE VOUT 0.0144%THD 1 1.00E+03 8.81E+00 1.00E+00 1.79E+02 0.00E+00 2 2.00E+03 4.62E-04 5.25E-05 4.18E+01 -3.15E+02 3 3.00E+03 2.78E-04 3.16E-05 8.49E+01 -4.51E+02 4 4.00E+03 3.23E-04 3.67E-05 6.91E+01 -6.45E+02 5 5.00E+03 3.73E-04 4.23E-05 8.66E+01 -8.06E+02 6 6.00E+03 6.69E-04 7.60E-05 6.10E+01 -1.01E+03 7 7.00E+03 2.85E-04 3.24E-05 8.09E+01 -1.17E+03 8 8.00E+03 4.32E-04 4.91E-05 7.17E+01 -1.36E+03 9 9.00E+03 5.95E-04 6.76E-05 2.70E+01 -1.58E+03 TOTAL HARMONIC DISTORTION = 1.438206E-02 PERCENT 7 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 8. Specifications : Frequency Response Evaluation Circuit R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 U5 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 8.499 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 LOAD C7 CSD VCC R15 20nH 10 2.2k RPER11H103K2K1A01B 10 {RL} 10u VSS LO 0 Ls3 C12 0 C8 IC = 9.8 VSS LO R20 C10 22u MMC250K474 VREF 10 VOFF = 0 10u 3.3k IC = 15.11 C13 VAMPL = { 1.4142*VOUT/Gv } IC = 7 VREF COM 1 MMC400K104 FREQ = {f in} R6 8.2k OCSET DT OCSET DT TEST CONDITION: R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N PARAMETERS: 8.2k 2 RPER11H104K2K1A01B C17 f in = 20k RL = 8 20nH + Gv = 15.85 Ls4 0 0 R5 VOUT = 2 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 Analysis .Options Condition : Time Domain (Transient) RELTOL: 0.01 20 ~ 20000 Hz, 4Ω Run to time: 2ms VNTOL: 1.0u Load, 2V Output Start saving data after: 0ms ABSTOL: 1.0n Maximum step size: 100n CHGTOL: 0.01p Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 ITL1: 500 Parametric Sweep ITL2: 200 Global parameter ITL4: 10 Parameter name: RL Value list: 4, 8 8 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 9. Specifications : Frequency Response Simulation Result VOUT+1dB (8Ω Load @ 20kHz) VOUT - 0.4dB (4Ω Load @ 20kHz) 9 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 10. Note : PO [W] vs. VIN [VPEAK] 1.4142 × √ × [] = Po [W] = power output Rload [Ω] = Load resistance GV = Amplifier voltage gain 10 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 11. 2. Waveforms Evaluation Class D amplifier circuit are simulated and compared with measured waveforms from oscilloscope (Tektronix: TDS3054B) R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + V COMP VS V 1 100k C6 R16 V1 C3 AMZ0050J102 CSD VCC R18 R19V V CSD VCC V RPER11H103K2K1A01B C7 R15 20nH 10 2.2k - VSS LO 10 10u 0 Ls3 C12 SPEAKER VOFF = 0 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VAMPL = { 1.4142*VOUT/Gv } 10u 3.3k V IC = 15 C13 FREQ = {f in} IC = 7 VREF COM 1 MMC400K104 R6 8.2k OCSET DT OCSET DT PARAMETERS: R7 FET2 0 0 0 IRS2092 VOUT = 2 1.2k R21 IRFIZ24N Gv = 15.85 8.2k 2 C17 f in = 1k RPER11H104K2K1A01B 20nH + Ls4 0 0 R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 11 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 12. 3. Simulated vs. Measured Waveform (1/3) Simulated Measured OUT VS 12 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 13. 3. Simulated vs. Measured Waveform (2/3) Simulated Measured HO LO 13 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 14. 3. Simulated vs. Measured Waveform (3/3) Simulated Measured COMP 14 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 15. 4. Voltage gain of the amplifier – GV R3 +B = VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B RFB =47kΩ 20nH 1 Ls1 0 0 RIN =2.4 ,3kΩ R9 4.7k 1 C11 C14 MMH250K684 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 R2 20nH IN C2 + 1nF IN- HO 10k 22u 10 L1 10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB V1 {RIN} R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0.14142 IC = 7 VREF COM 1 MMC400K104 FREQ = {Freq} R6 8.2k OCSET DT OCSET DT PARAMETERS: R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N Freq = 1k 8.2k 2 RPER11H104K2K1A01B RIN = 3k C17 20nH + Ls4 0 0 R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 Analysis .Options Time Domain (Transient) RELTOL: 0.01 Run to time: 1ms VNTOL: 1.0u Start saving data after: 100n ABSTOL: 1.0n Maximum step size: 100n CHGTOL: 0.01p Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 ITL1: 500 Sweep variable ITL2: 200 Global parameter: RIN ITL4: 10 Value list: 2.4k, 3k 15 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 16. 4. Voltage gain of the amplifier – GV GV = 26dB GV = 24dB 16 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 17. 5. Self-Oscillating Frequency Self oscillating frequency is design by setting the following items • Integration capacitors. Integration resistor. R3 +B VS 15V • 47k R8 +B 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH Integration resistor: Integration capacitors: Ls1 1 0 0 C14 R4+VR1 C4=C5 R9 4.7k 1 C11 MMH250K684 RPER11H104K2K1A01B FET1 R4 VR1 IC1 D2 IRFIZ24N 220 75 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0 IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N 8.2k 2 RPER11H104K2K1A01B C17 20nH + Ls4 0 0 R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 Analysis .Options -15V Time Domain (Transient) RELTOL: 0.001 0 Run to time: 1ms VNTOL: 1.0u Start saving data after: 0.5m ABSTOL: 1.0n Maximum step size: 40n CHGTOL: 0.01p Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 ITL1: 500 ITL2: 200 ITL4: 10 17 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 18. 5. Self-Oscillating Frequency Simulated Measured VS VS OUT OUT Self-oscillation frequency Self-oscillation frequency = 400kHz (Simulated) = 400kHz (Measured) 18 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 19. 6. Dead-time Dead-time Mode R20 R21 Analysis .Options Time Domain (Transient) RELTOL: 0.001 DT1 (25ns) 3.3k 8.2k Run to time: 1ms VNTOL: 1.0u DT2 (40ns) 5.6k 4.7k Start saving data after: 0.5m ABSTOL: 1.0n Maximum step size: 40n CHGTOL: 0.01p DT3 (65ns) 8.2k 3.3k Skip the initial transient bias point calculation (SKIPBP) GMIN: 1.0E-12 DT4 (105ns) - < 10k ITL1: 500 ITL2: 200 R3 +B ITL4: 10 VS 15V 47k +B R8 2 0 C16 EKMG500ELL222MLP1S + 820 C15 R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 D1 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0 IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 R21 FET2 0 0 0 IRS2092 1.2k 8.2k IRFIZ24N 2 C17 RPER11H104K2K1A01B 20nH + R5 V(DT) Voltage Divider Ls4 0 0 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 19 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 20. Dead-time DT1(25ns) Spike voltage DT1(25ns) DT1(25ns) 20 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 21. Dead-time DT3(65ns) Spike voltages (Decrease for longer dead time) DT3(65ns) DT3(65ns) 21 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 22. 7. Turn-on transient Start-up sequencing is achieved through the charging of the CSD voltage (C7). Simulation will show how capacitors are charged to complete the sequence for each capacitance value. R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C7: 10u, 5u, 1 C14 R9 MMH250K684 and 3.3u F 4.7k C11 RPER11H104K2K1A01B R10 FET1 R4 75 IC1 0.01m D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 22u 3k C5 IC = 0 R14 7G14N-220-RB R1 C3 IC = 0 1nF COMP VS 4.7 2 OUT + 100k RPER11H103K2K1A01B C6 COMP VS R16 1 AMZ0050J102 CSD VCC R18 R19 C8 C7 CSD VCC R15 20nH 10 2.2k - VSS LO 8.2k 10 22u 10u 0 Ls3 C12 SPEAKER 0 IC = 0 IC = 0 VSS LO R21 C10 MMC250K474 F120A VREF 10 VOFF = 0 22u C13 VAMPL = 0 VREF COM IC = 0 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 3.3k FET2 0 0 0 IRS2092 R20 1.2k IRFIZ24N 2 C17 RPER11H104K2K1A01B 20nH + Ls4 0 0 R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V .Options 0 RELTOL: 0.01 VNTOL: 1.0u Analysis ABSTOL: 1n Time Domain (Transient) CHGTOL: 0.01p Run to time: 975ms GMIN: 1.0E-12 Start saving data after: 100n ITL1: 500 Maximum step size: 100u ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 10 22 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 23. Turn-on transient: C7 = 10uF V(VCC,COM) V(VB,VS) V(HO) V(LO) V(VAA) Vth2___ V(CSD) Vth1___ V(VSS) Class D Startup @ 0.976second. 23 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 24. Turn-on transient: C7 = 5uF V(VCC,COM) V(VB,VS) V(HO) V(LO) V(VAA) Vth2 Vth1 V(CSD) V(VSS) Class D Startup @ 0.488second. 24 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 25. Turn-on transient: C7 = 3.3uF V(VCC,COM) V(VB,VS) V(HO) V(LO) V(VAA) Vth2 Vth1 V(CSD) V(VSS) Class D Startup @ 0.320second. 25 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 26. 8. Components stress This simulation shows how voltage and current are applied to each components at the maximum load condition (25W,4ohm). R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.5 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 LOAD C7 CSD VCC R15 20nH 10 2.2k RPER11H103K2K1A01B 10 {RL} 10u VSS LO 0 Ls3 C12 0 C8 IC = 9.81 VSS LO R20 C10 22u MMC250K474 VREF 10 VOFF = 0 10u 3.3k IC = 15.5 C13 VAMPL = {1.4142*SQRT(Po*RL)/Gv } IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 FET2 0 0 0 PARAMETERS: IRS2092 1.2k R21 IRFIZ24N Po = 25 8.2k 2 C17 RPER11H104K2K1A01B Gv = 15.85 RL = 4 20nH + Ls4 0 0 R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 26 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 27. Components Stress Simulated Result for Diodes, FETs, Inductor, and 4ΩLoad D1 D2 FET1 FET2 L1 4ΩLoad 27 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 28. 9. Power losses in the MOSFETs The total power loss in MOSFET are given by: PTOTAL = PSW+Pcond+Pgd R3 VS +B 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0 IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N 8.2k 2 C17 RPER11H104K2K1A01B 20nH + Ls4 0 0 R5 C18 2 1 -B EKMG500ELL222MLP1S 1 Ls5 20nH -B 820 -15V .Options 0 RELTOL: 0.003 VNTOL: 1.0m Analysis ABSTOL: 100n Time Domain (Transient) CHGTOL: 0.01p Run to time: 500us GMIN: 1.0E-12 Start saving data after: 100n ITL1: 500 Maximum step size: 2n ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 20 28 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 29. Power losses FET1(Standard Model) FET1: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms PSW ,Pcond ,and Pgd are calculated by PSpice. Power loss (VDS*ID) Pgd PSW Pcond ID ID -VDS -VDS VDS, ID (Simulated) VDS, ID (Measured) 29 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 30. Power losses FET2(Standard Model) FET2: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms PSW ,Pcond ,and Pgd are calculated by PSpice. Power loss (VDS*ID) Pgd Pcond PSW VDS ID VDS ID VDS, ID (Simulated) VDS, ID (Measured) 30 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 31. Power losses in the MOSFETs (Professional model) The total power loss in MOSFET are given by: PTOTAL = PSW+Pcond+Pgd R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 FET1 RPER11H104K2K1A01B MIRFIZ24N_P D3 R4 75 IC1 D2 DIRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0 IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 0 0 0 IRS2092 D4 1.2k R21 FET2 DIRFIZ24N 8.2k MIRFIZ24N_P 2 C17 RPER11H104K2K1A01B 20nH + Ls4 0 0 R5 C18 2 1 -B EKMG500ELL222MLP1S 1 Ls5 20nH -B 820 -15V .Options 0 RELTOL: 0.001 VNTOL: 1.0m Analysis ABSTOL: 100n Time Domain (Transient) CHGTOL: 0.01p Run to time: 500us GMIN: 1.0E-12 Start saving data after: 100n ITL1: 500 Maximum step size: 2n ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 10 31
- 32. Power losses FET1(Professional Model) FET1: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms PSW ,Pcond ,and Pgd are calculated by PSpice. Power loss (VDS*ID) Pgd PSW Pcond ID ID -VDS -VDS VDS, ID (Simulated) VDS, ID (Measured) 32 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 33. Power losses FET2(Professional Model) FET2: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms PSW ,Pcond ,and Pgd are calculated by PSpice. Power loss (VDS*ID) Pgd Pcond PSW VDS ID VDS ID VDS, ID (Simulated) VDS, ID (Measured) 33 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 34. FET: IRFIZ24N Qg Standard vs. Professional Model Gate charge characteristics in Professional model has more accurate results than standard model. IRFIZ24N IRFIZ24N (Standard) (Professional) VDD=44V,ID=10A Measurement Simulation Error (%) ,VGS=10V Standard Model: Qg(nc) 13.400 12.543 -6.396 Professional Model: Qg(nc) 13.400 13.409 0.067 34 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 35. FET: IRFIZ24N Pgd Standard vs. Professional Model Simulated Pgd ,Standard model compared to Professional model ,shows some different result caused by different Qg characteristics of the models. IRFIZ24N IRFIZ24N (Standard) (Professional) Professional model requires more simulation time and might cause some convergence error. 35 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 36. 10. Short circuit vs. switching output shutdown This simulation will show how the IRS2092 responds to a short circuit condition. R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 1 R9 4.7k C11 MMH250K684 Short circuit RPER11H104K2K1A01B FET1 R4 75 IC1 D2 IRFIZ24N 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 S1 C3 AMZ0050J102 CSD VCC R18 R19 + + C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 - - 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 14 VSS LO R20 C10 22u MMC250K474 S F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VOFF = 0.0V VAMPL = {1.4142*SQRT(Po*RL)/Gv } IC = 7 VREF COM 1 MMC400K104 VON = 1.0V FREQ = 1k R6 8.2k OCSET DT OCSET DT V1 = 0 V2 R7 FET2 0 0 0 V2 = 5 PARAMETERS: IRS2092 1.2k R21 IRFIZ24N TD = {tshrt} Po = 12.5 8.2k 2 C17 TR = 10n RPER11H104K2K1A01B TF = 10n Gv = 15.85 PW = 1 RL = 8 20nH PER = 100 + Ls4 0 0 tshrt = 2.25m R5 0 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 .Options Short circuit at 2.25ms. RELTOL: 0.01 VNTOL: 1.0u Analysis ABSTOL: 1n Time Domain (Transient) CHGTOL: 0.01p Run to time: 4ms GMIN: 1.0E-12 Start saving data after: 100n ITL1: 500 Maximum step size: 100n ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 10 36 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 37. Short Circuit vs. Switching Output Shutdown (Positive Side) V(Speaker) CSD pin VS pin Load (Speaker) current Delay between short circuit and switching output shutdown 37 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 38. Short Circuit vs. Switching Output Shutdown (Negative Side) V(Speaker) CSD pin VS pin Load (Speaker) current Delay between short circuit and switching output shutdown 38 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 39. 11. Short Circuit Response This simulation will show how the IRS2092 responds to a short circuit condition. R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B C7: 10u 20nH 1 Ls1 0 0 and 3.3u F 1 C14 R9 MMH250K684 4.7k C11 RPER11H104K2K1A01B R4 75 IC1 D2 FET1 IRFIZ24N Short circuit 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 R2 20nH IN C2 + 1nF IN- HO 10k 22u 10 L1 10u C5 IN- HO IC = 12.85 R14 Ls2 7G14N-220-RB V1 3k R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 S1 C3 AMZ0050J102 CSD VCC R18 R19 + + C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 - - 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 14 VSS LO R20 C10 22u MMC250K474 S F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VOFF = 0.0V VAMPL = {1.4142*SQRT(Po*RL)/Gv } IC = 7 VREF COM 1 MMC400K104 VON = 1.0V FREQ = 1k R6 8.2k OCSET DT V2 V1 = 0 OCSET DT V2 = 5 R7 FET2 0 0 0 TD = {tshrt} PARAMETERS: IRS2092 1.2k R21 IRFIZ24N TR = 10n Po = 12.5 8.2k 2 C17 TF = 10n RPER11H104K2K1A01B PW = 4 Gv = 15.85 PER = 400 RL = 8 20nH + Ls4 0 0 0 tshrt = 1.75m R5 2 1 -B C18 1 Ls5 EKMG500ELL222MLP1S 20nH -B 820 -15V 0 .Options Short circuit at 1.75ms. RELTOL: 0.01 VNTOL: 1.0u Analysis ABSTOL: 1n Time Domain (Transient) CHGTOL: 0.01p Run to time: 1.25s GMIN: 1.0E-12 Start saving data after: 100n ITL1: 500 Maximum step size: 100u ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 10 39 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 40. Short Circuit Response: C7 = 10uF CSD pin Load (Speaker) current VS pin 40 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 41. Short Circuit Response: C7 = 3.3uF CSD pin Load (Speaker) current VS pin 41 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 42. 12. Capacitor models Capacitor models are needed for the simulation to include spike voltage. R3 +B VS 15V 47k +B R8 2 0 820 C15 C16 R17 0.1u 2200u 20nH 1 Ls1 0 0 C14 R9 1 0.68u 4.7k C11 0.1u FET1 R4 VR1 IC1 D2 IRFIZ24N 220 75 VAA CSH MUR120RLG MUR120RLG 2 VAA CSH D1 C1 VB R12 10u C4 GND VB R11 10k C9 R13 C2 R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 0.001u CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - 10n 10 10u VSS LO 0 Ls3 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u C12 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 0.47u C13 VAMPL = 0 IC = 7 VREF COM 1 0.1u FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 FET2 0 0 0 IRS2092 1.2k R21 IRFIZ24N 8.2k 2 20nH Ls4 C170 0 R5 0.1u C18 2 1 -B 2200u 1 Ls5 20nH -B 820 -15V .Options 0 RELTOL: 0.001 VNTOL: 1.0u Analysis ABSTOL: 1.0n Time Domain (Transient) CHGTOL: 0.01p Run to time: 1ms GMIN: 1.0E-12 Start saving data after: 0.5m ITL1: 500 Maximum step size: 40n ITL2: 200 Skip the initial transient bias point calculation (SKIPBP) ITL4: 10 42 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 43. Simulation Result (without Capacitor Model) Simulated (without output capacitor models) Measured VS VS OUT OUT Self-oscillation frequency Self-oscillation frequency = 400kHz (Simulated) = 400kHz (Measured) 43 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 44. Simulation Result (with Capacitor Model) Simulated (with output capacitor models) Measured VS VS OUT OUT Self-oscillation frequency Self-oscillation frequency = 400kHz (Simulated) = 400kHz (Measured) 44 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 45. 13. Simulated Performance of the circuit with different FETs IRFIZ24N Key Parameters IRFI4024H-117P Key Parameters VDS 55 V VDS 55 V ID 14 A ID 11 A RDS(ON) typ. @ 10V 70 mΩ RDS(ON) typ. @ 10V 48 mΩ Qg typ. 13.4 nC Qg typ. 8.9 nC tON typ. 38.9 ns tON typ. 7.9 ns tOFF typ. 46 ns tOFF typ. 16.4 ns Qrr typ. 120 nC Qrr typ. 11 nC 45
- 46. Simulated Performance of the circuit with different FETs R3 +B VS 15V 47k +B R8 2 0 C16 + 820 C15 EKMG500ELL222MLP1S R17 RPER11H104K2K1A01B 20nH 1 Ls1 0 0 C14 R9 1 MMH250K684 4.7k C11 RPER11H104K2K1A01B R4 75 IC1 D2 FET1 220 VR1 VAA CSH MUR120RLG MUR120RLG 2 IRFI4024H-117P VAA CSH D1 C1 VB R12 EKMG500ELL100ME11D C4 GND VB R11 10k C9 R13 C2 + R2 1nF IN- HO 10k 22u 10 20nH L1 IN IN- HO Ls2 V1 10u 3k C5 IC = 12.85 R14 7G14N-220-RB R1 IC = 7 1nF COMP VS 4.7 2 OUT + 100k C6 COMP VS R16 1 C3 AMZ0050J102 CSD VCC R18 R19 C7 CSD VCC R15 20nH 10 2.2k - RPER11H103K2K1A01B 10 10u VSS LO 0 Ls3 C12 SPEAKER 0 C8 IC = 10 VSS LO R20 C10 22u MMC250K474 F120A VREF 10 VOFF = 0 10u 3.3k IC = 15 C13 VAMPL = 0 IC = 7 VREF COM 1 MMC400K104 FREQ = 1k R6 8.2k OCSET DT OCSET DT R7 0 0 0 IRS2092 1.2k R21 FET2 8.2k 2 IRFI4024H-117P C17 RPER11H104K2K1A01B 20nH + Ls4 0 0 R5 C18 2 1 -B EKMG500ELL222MLP1S 1 Ls5 20nH -B 820 -15V 0 IRFIZ24N IRFI4024H-117P Efficiency (@ 25W, 4Ω) 93.505% 94.578% Distortion (@ 1kHz, 4Ω, 10W) 0.0144 %THD 0.0201 %THD 46 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009
- 47. Simulated Performance of the circuit with different FETs IRFIZ24N IRFI4024H-117P Power loss (VDS*ID) Power loss (VDS*ID) Pgd PSW Pcond Pgd PSW Pcond ID ID FET1 -VDS -VDS Power loss (VDS*ID) Power loss (VDS*ID) Pgd Pcond PSW Pgd Pcond PSW VDS VDS FET2 ID ID 47
- 48. Simulations Index Simulation Folder Name 1. Efficiency Evaluation............................................................ Efficiency 2. THD Evaluation.................................................................... THD 3. Frequency Response Evaluation.......................................... FrqRsp 4. Waveforms Evaluation.......................................................... Waveforms 5. Voltage gain of the amplifier – GV ........................................ Gv 6. Self-Oscillating Frequency.................................................... OSC 7. Dead-time Evaluation........................................................... DT 8. Turn-on transient.................................................................. StartUp 9. Component stresses............................................................. Stress 10. Power losses in the MOSFETs (Standard model) ................ FET(STD) 11. Power loss in the MOSFETs (Professional Model) .............. FET(PRO) 12. Short Circuit vs. Switching Output Shutdown....................... Short 13. Short Circuit Response......................................................... ShrtRsp 48 All Rights Reserved Copyright (c) Bee Technologies Inc. 2009