![Address Bits and Addressability
❖ Memory consist of collection of locations
❖ 1 location is generally 1 Byte
❖ Each location has a unique address
❖ 1 bit can uniquely address 2 Bytes [0, 1]
❖ 2 bits can uniquely address 4 Bytes
00, 01, 10, 11 are the 4 unique addresses
❖ As number of bits in address increases
physical address space also increases.](https://image.slidesharecdn.com/l2-250804144923-6558525e/85/computer-architecture-and-organization-uni-23-320.jpg)
computer architecture and organization uni
- 1. John Jose Associate Professor Department of Computer Science & Engineering Indian Institute of Technology Guwahati Instruction Execution Principles CS223 Computer Architecture & Organization
- 2. Computer Organization vs Architecture ❖ Computer Organization ❖The actual implementation of a computer in hardware ❖Transparent to programmer ❖How to do? (Implementation, Interaction between units) ❖ Computer Architecture ❖The view of a computer to software designers ❖Programmer needs architectural details ❖What to do? (Instruction Set, Addressing Modes, Data Types..)
- 3. Inside a Computer System
- 4. Computer Memory Hard disk Keyboard Mouse Monitor Printer Functional Units of a Computer
- 5. Von Neumann Architecture ❖ The program instructions are stored in memory and are fetched upon requirement to the CPU for executing. ❖ Memory is a collection of locations for storing instructions and data. ❖ Each location has a unique address which is used to access the location.
- 6. Execution Cycle Obtain instruction from memory Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in memory for later use Determine successor instruction Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction
- 13. memory address register instruction register memory data register program counter Inside the CPU
- 17. 1. Address of the next instruction is transferred from PC to MAR 2. The instruction is located in memory FETCH the instruction ❖ Address generated by the CPU comes out to address bus through MAR. ❖ Address bus is connected to Address decoder.
- 18. FETCH the instruction 1. Address of the next instruction is transferred from PC to MAR 2. The instruction is located in memory 3. Instruction is copied from to MDR
- 19. DECODE the instruction 1. Address of the next instruction is transferred from PC to MAR 2. The instruction is located in memory 3. Instruction is copied from to MDR 4. Instruction is moved to IR for decoding
- 20. EXECUTE the instruction 1. Address of the next instruction is transferred from PC to MAR 2. The instruction is located in memory 3. Instruction is copied from to MDR 4. Instruction is moved to IR for decoding 5. Control unit sends signals to appropriate devices to cause execution of the instruction
- 22. Address Decoders ❖ One memory location is a collection of 8 bits ❖ Each unique address maps to a Byte
- 23. Address Bits and Addressability ❖ Memory consist of collection of locations ❖ 1 location is generally 1 Byte ❖ Each location has a unique address ❖ 1 bit can uniquely address 2 Bytes [0, 1] ❖ 2 bits can uniquely address 4 Bytes 00, 01, 10, 11 are the 4 unique addresses ❖ As number of bits in address increases physical address space also increases.
- 24. 8 bits = 1 Byte 1024 Bytes = 1 Kilobyte (KB) 1024 Kilobyte = 1 Megabyte (MB) 1024 Megabyte = 1 Gigabyte (GB) 1024 Gigabyte = 1 Terabyte (TB) Larger Memory Naming Conventions ❖ Kilobyte, megabyte, gigabyte ❖ How many bytes can be addressed using 8-bit address? : 28=256 Bytes ❖ 64KB→26.210 Bytes → 216 Bytes → 16 bit address ❖ 4GB, 4GB→22.230 Bytes → 232 Bytes → 32 bit address
- 25. How to make large memory? 8 KB = 8 x 1 KB chips 512 B = 4 x 128 B chips ❖ Given a 128 B memory units, how will you create 512 B memory? ❖ 512 B → 9 bits for address, memory units are 128 B, →7 bit address.
- 26. Byte Ordering
- 27. Byte Ordering A 32-bit number 0x23456789 has to be written to memory (collection of bytes) from location 2000 onwards. What is the value stored in location 2001, if the system follows, (a) big endian format and (b) little endian format? Address Contents 2000 0x23 2001 0x45 2002 0x67 2003 0x89 2004 Address Contents 2000 0x89 2001 0x67 2002 0x45 2003 0x23 2004 Big Endian Little Endian