Wavelets @ CPU
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This document discusses optimizing discrete wavelet transforms for CPU performance. It covers techniques like loop fusion, removing prologs and epilogs, leveraging CPU cache, SIMD vectorization, and parallelization. Benchmark results show these optimizations can achieve up to an 11x speedup over the separable diagonal implementation for a 10 megapixel image on an Intel Core2 Quad CPU. Future work areas discussed include merging multiple levels and transforms.
Wavelets @ CPU
- 1. Wavelets @ CPU David Barina April 15, 2014 David Barina Wavelets @ CPU April 15, 2014 1 / 16
- 2. Wavelet David Barina Wavelets @ CPU April 15, 2014 2 / 16
- 3. Discrete Wavelet Transform David Barina Wavelets @ CPU April 15, 2014 3 / 16
- 4. Lifting α β γ δ David Barina Wavelets @ CPU April 15, 2014 4 / 16
- 5. 2-D DWT David Barina Wavelets @ CPU April 15, 2014 5 / 16
- 6. 2-D Separability David Barina Wavelets @ CPU April 15, 2014 6 / 16
- 7. What have I done? loop fusion removed prologs/epilogs influence of CPU cache SIMD-vectorization parallelization David Barina Wavelets @ CPU April 15, 2014 7 / 16
- 8. Loop Fusion read write F F David Barina Wavelets @ CPU April 15, 2014 8 / 16
- 9. Removed Prologs and Epilogs David Barina Wavelets @ CPU April 15, 2014 9 / 16
- 10. Influence of CPU Cache David Barina Wavelets @ CPU April 15, 2014 10 / 16
- 11. SIMD Vectorization 4 × 4 6 × 2 David Barina Wavelets @ CPU April 15, 2014 11 / 16
- 12. Image Processing and Buffers David Barina Wavelets @ CPU April 15, 2014 12 / 16
- 13. Parallelization prolog overlay overlay segment David Barina Wavelets @ CPU April 15, 2014 13 / 16
- 14. Results Intel Core2 Quad @ 2.00 GHz 10 Mpx CDF 9/7, 1 level, in-place approach best algorithm time/px speed-up separable diag. 17.23 ns 1.0× single-loop diag. 2 × 2 9.55 ns 1.8× core diag. 2 × 2 8.79 ns 2.0× super-core vert. 4 × 4 5.33 ns 3.2× parallel (4) vert. 4 × 4 1.55 ns 11.1× David Barina Wavelets @ CPU April 15, 2014 14 / 16
- 15. Future Work merge several levels merge forward and inverse cores another wavelets combine with EAW another platforms (ARM, GPU, FPGA) another transforms David Barina Wavelets @ CPU April 15, 2014 15 / 16
- 16. Example (AMD Opteron) 1.0ns 10.0ns 100.0ns 1.0k 10.0k 100.0k 1.0M 10.0M 100.0M time/pixel pixels naive vertical naive diagonal single-loop vertical single-loop diagonal David Barina Wavelets @ CPU April 15, 2014 16 / 16