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How to boot Linux on your
SOC boards
Liang Yan (lyan)
SUSE Labs
11/14/2018
2
Outline
Schedu
led
Downti
me
1. Background
2. Hardware
3. Software
4. Further imagination
5. Q&A
Background
4
SOC boards
• stc89c52
• ARM V7
Micro 2440 board
• ARM V8(AARCH64)
Raspberry pi board
5
SOC boards
• stc89c52
(ISP/IAP)
• ARM V7
Micro 2440 board
(supervivi/uboot)
• ARM V8(AARCH64)
Raspberry pi board
(uboot/uefi)
6
SOC boards
• stc89c52rc
• ARM V7
Micro 2440 board
• ARM V8(AARCH64)
Raspberry pi board
7
Bootloader:
VIVI
SuperVIVI
U-Boot
Fastboot
Grub2
UEFI
Kernel:
Linux
Windows
Mac OS
BSD unix
Vxworks
uc-os
What should we look
If we want boot a hardware
9
SOC boards
• CPU(SOC)
• Storage media
ROM/PROM/EEPROM
• IROM
• NAND flash
• NOR flash
• IRAM/SRAM(Steppingstone)
• SDRAM
• DDRAM
• Boards
10
• st89c52
11
• stc89c52
12
• st89c52
13
Micro 2440
14
Micro 2440
15
32bit cpu could access
4G, however it only allows
user accessed below
0x40000000, upper
address are reserved for
cpu registers and unused.
27 address line:
128 M
16
17
ARM Cortex-A53
18
• Raspberry Pi
Odroid c2
19
• Odroid c2
Software:
Uboot
Kernel
21
Once a board is ready, everything is fixed
FSM
Finite state machine
Our code is based on a fixed infrastructure
What are variables?
0 and 1 , once flashed or written in storage.
After that:
Input starts everything, otherwise it will in a idle loop!!!
22
Stage 1 boot is in the on-chip ROM. Loads Stage 2 in
the L2 cache
Stage 2 is boootcode.bin. Enables SDRAM and loads
Stage 3
Stage 3 is loader.bin. It knows about the .elf format and
loads start.elf
start.elf loads kernel.img. It then also
reads config.txt, cmdline.txt and bcm2837.dtb If the dtb
file exists, it is loaded at 0×100 & kernel
@ 0×8000 If disable_commandline_tags is set it loads
kernel @ 0×0 Otherwise it loads kernel @ 0×8000 and
put ATAGS at 0×100
kernel.img is then run on the ARM.
Everything is run on the GPU until kernel.img is loaded
on the ARM.
23
SOC boards
• stc89c52rc:
no need for OS or any other boot, ISP/IAP
• ARM V7
Micro 2440 board
Start support, uboot, vivi, supervivi
• ARM V8(AARCH64)
Raspberry pi board
Uboot/uefi
24
board—>machine—>arch—>cpu
Board: raspberry pi 3b
Machine: bcm2837
Arch: arm64/arm32
CPU: armv8
25
Stage 1
Start address: 0x00
Arch related:
start.s _start: b start_code
setup interrupt vectors
reset and set CPU to SVC
disable cache, MMU, TLBs()
Board related:
lowlevel_init.S ldr pc, _start_armboot
setup watchdog, muxing, and clocks
setup SP, pll, mux, memory(SRAM,SROM)
board initialization(uart, nand, lcd, led, nic)
clear bss
copy to ram and start from there
26
Stage 1
Start address: 0x00
main_loop prepare to get into kernel
1 CPU register
r0=0 r1=unique architecture number
r2= ram address for kernel parameters
2 CPU mode
Disable IRQ and FIQ CPU SVC mode
3 disable D-Cache and I-Cache
27
1. arch
_start———–>reset————–>disable interrupt
………………………………|
………………………………———→cpu_init_cp15———–>disble MMU,TLB
………………………………|
………………………………———→cpu_init_crit————→lowlevel_init————→ config and initialize key registers
………………………………|
………………………………———→_main————–> jump to board
2. board
_main————–>board_init_f_alloc_reserve —————>stack 、 GD 、 early malloc
…………|
…………————->board_init_f_init_reserve —————>stack 、 GD 、 early malloc
…………|
…………————->board_init_f —————>board initialization before uboot relocate, arrange relocate area
…………|
…………————->relocate_code 、 relocate_vectors —————>relocate uboot vectors
…………|
…………————-> clean old stack
…………|
…………————->board_init_r —————>board initialization after uboot relocate
…………|
…………————->run_main_loop —————> command status, waiting for input
---------------------
28
29
Kernel:
reset and set CPU to SVC
disable interrupt
Proc ID verification
Parameters(atags/dtb) verification
Get Page table physical address and zero
remap _turn_mmu_on fuction(1:1)
remap kernel code segment
Parameters map
Initialize tlb and cache,
Save pagetable to tlb
Enable mmu
Relocate data segment
Clean BSS
Start Kernel
30
1 /* sorce code */ head.S
2 /* entry point */
3 ENTRY(stext)
4 /* program status , disable FIQ 、 IRQ , enable SVC mode*/
5 mov r0, #F_BIT | I_BIT | MODE_SVC@ make sure svc mode
6 /* setup current registers */
7 msr cpsr_c, r0 @ and all irqs disabled
8 /* verify CPU mode , compare current CPU Id with Linux compiled ID */
9 bl __lookup_processor_type
10 /* Jump __error */
11 teq r10, #0 @ invalid processor?
12 moveq r0, #'p' @ yes, error 'p'
13 beq __error
14 /* check Architecture Type from R1 */
15 bl __lookup_architecture_type
16 /* jump to error if invalid */
17 teq r7, #0 @ invalid architecture?
18 moveq r0, #'a' @ yes, error 'a'
19 beq __error
20 /* create page table */
21 bl __create_page_tables
22 adr lr, __ret @ return address
23 add pc, r10, #12 @ initialise processor
24 /* jump to start_kernel */
25 b start_kernel
31
Start Kernel:
Once kernel code is in DRAM:
Key Registers are initialized
Stack environment is setup,
Create temperate page table
Related hardware is initialized
(MMU,TLB, Cache)
===>
Create real page table (bootm, page_init, buddy, slab)
set_task_stack_end_magic(&init_task); ==> pid0, task_struct is created manually
setup_arch
trap_init
mem_init
sched_init
init_irq
rest_init(); ==> pid = kernel_thread
==> kernel_init(pid 1) ==> all user process
==> kthreadd(pid 2) ==> all kernel threads ==> cpu_idle_loop(pid0)
Further imagination:
33
The whole process:
• bootrom/bios
• uboot/SPL
• FDT
• Kernel
• Initrd?
• rootfs:
Init, systemd/systemV
34
How is your phone booted? Your router? Tablet? Laptop?
Userspace development:
– Based on different kinds of input.
– Think about a function(Algorithm), start from input and end by output
X86? Other architecture?
35
Thank you.
Question?
36
REFERENCE
https://raspberrypi.stackexchange.com/questions/10442/what-is-the-boot-sequence
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bootmodes/bootflow.md
http://www.friendlyarm.net/products/micro2440
https://github.com/wowotechX/u-boot
https://www.kernel.org/doc/Documentation/arm/Booting
https://blog.csdn.net/cagent_z/article/details/61441951
https://blog.csdn.net/ooonebook/article/details/52850433
http://www.friendlyarm.net/
https://developer.arm.com/products/processors/cortex-a/cortex-a53
http://wiki.100ask.org/images/c/c4/S3C2440A_UserManual_Rev13.pdf
https://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf
https://wiki.odroid.com/odroid-c2/odroid-c2
37
+49 911 740 53 0 (Worldwide)
www.suse.com
Corporate Headquarters
Maxfeldstrasse 5
90409 Nuremberg
Germany
Join us on:
www.opensuse.org
Unpublished Work of SUSE. All Rights Reserved.
This work is an unpublished work and contains confidential, proprietary, and trade secret information of SUSE.
Access to this work is restricted to SUSE employees who have a need to know to perform tasks within the scope of
their assignments. No part of this work may be practiced, performed, copied, distributed, revised, modified, translated,
abridged, condensed, expanded, collected, or adapted without the prior written consent of SUSE.
Any use or exploitation of this work without authorization could subject the perpetrator to criminal and civil liability.
General Disclaimer
This document is not to be construed as a promise by any participating company to develop, deliver, or market a
product. It is not a commitment to deliver any material, code, or functionality, and should not be relied upon in making
purchasing decisions. SUSE makes no representations or warranties with respect to the contents of this document,
and specifically disclaims any express or implied warranties of merchantability or fitness for any particular purpose.
The development, release, and timing of features or functionality described for SUSE products remains at the sole
discretion of SUSE. Further, SUSE reserves the right to revise this document and to make changes to its content, at
any time, without obligation to notify any person or entity of such revisions or changes. All SUSE marks referenced in
this presentation are trademarks or registered trademarks of Novell, Inc. in the United States and other countries. All
third-party trademarks are the property of their respective owners.
257-000020-001

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How to-boot-linuxl-on-your-soc-boards