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Primary Memory
Lecture 07
1
2
Last Lecture Summary
 Central Processing Unit (CPU)
 Control Unit and ALU
 Machine Cycle
 Memory
 Components Affecting Speed
 Achieving Increased Processor Speed
 Registers
 Functions and Size
 User accessible and other types of Registers
 System or Internal Clock
 Clock speed and clock rate
 Cache memory
 Function operation
 Type: Instruction, data and TLB
 Multi Level Cache, L1, L2 and L3
 Intel Cache Evolution
 Memory Hierarchy
 Bus
 Bus width and speed
 Bus Interconnection Scheme
 Data, address and control bus
2
3
How Instruction Moves In and Out of Memory
3
4
Memory
 Consists of electronic components
 store instructions waiting to be executed by the
processor
 data needed by those instructions, and
 results of processing the data (information).
 Stores both programs and data
 CPU cannot hold permanently
 Small chips on the motherboard or on a small
circuit board attached with motherboard
 Allows CPU to store and retrieve data quickly
 More memory makes a computer faster
4
5
Memory
 Memory stores three basic categories of items:
 operating system and other system
 application programs and
 data being processed and resulting information.
6
Memory Address
 Bit –smallest storage unit
 Byte (character)– smallest addressable unit
 Room vs House
 Each memory cell has an address
 An addresses is a unique number that
identifies the location of a byte in memory.
6
7
Memory Size
 Byte is a basic storage unit in memory
 Memory and storage devices size is measured
in KB, MB, GB or TB
7
8
What Memory Stores?
 Store Instructions waiting to be executed
by the processor
 Data needed by those instructions, and
 Results of processing the data
 Stores three basic categories of items:
The operating
system and
other system
software
Application
programs
Data being
processed and
the resulting
information
8
9
Types of Memory
Volatile memory
Loses its contents
when power is
turned off
Example includes
RAM
Nonvolatile
memory
Does not lose
contents when
power is removed
Examples include
ROM, flash
memory, and CMOS
9
10
Non Volatile Memory ROM
 Read Only Memory (ROM)
 Holds data when power is off
 Basic Input Output System (BIOS)
 Power On Self Test (POST)
10
11
ROM Types
Read-only memory (ROM) refers to memory
chips storing permanent data and instructions
• Firmware Microcode stored in ROM
A PROM (Programmable Read-Only memory)
chip is a blank ROM chip that can be written
to permanently only once.
• EEPROM can be erased
11
12
Types of ROM
 Written during manufacture
 Very expensive for small runs
 Programmable (once)
 PROM
 Needs special equipment to program
 Read “mostly” than write operation
 Erasable Programmable (EPROM)
 Optically erased by UV
 Electrically Erasable (EEPROM)
 Takes much longer to write than read
 Flash memory
 Erase whole memory electrically
12
13
Flash Memory
 Data is stored using physical switches
 Special form of nonvolatile memory
 Camera cards, USB key chains
 Microwave, Cars
13
14
Flash Memory
 Can be electrically erased and reprogrammed
 high density NAND type must also be programmed
and read in (smaller) blocks, or pages,
 NOR type allows a single machine word (byte) to be
written or read independently
 Limitations
 Block erasure
 Memory wear
 Read disturb
14
15
Flash Memory
15
16
Flash Memory
 Flash memory can be erased electronically
and rewritten
 CMOS technology provides high speeds and
consumes little power
16
17
RAM
 Requires power to hold data
 Random Access Memory (RAM)
 Data in RAM has an address
 CPU reads data using the address
 CPU can read any address
17
18
RAM
 Misnamed as all semiconductor memory is
random access
 random access means individual words of memory
are directly accessed through wired-in addressing
logic.
 Read/Write
 Volatile
 A RAM must be provided with a constant power
supply. If the power is interrupted, then the data are
lost.
 Can only be used as temporary storage
18
19
Semiconductor Memory
 In earlier computers, main memory employed
an array of doughnut-shaped ferromagnetic
loops referred to as cores
 Today, the use of semiconductor chips for main
memory is almost universal.
 Properties
 exhibit two stable (or semistable) states, which can
be used to represent binary 1 and 0.
 capable of being written into (at least once), to set
the state.
 capable of being read to sense the state.
19
20
Memory Cell Operation
Select terminal selects a memory cell for a read or write operation.
Control terminal indicates read or write.
For writing, the other terminal provides an electrical signal that
sets the state of the cell to 1 or 0.
For reading, that terminal is used for output of the cell’s state.
20
21
RAM Chip sets
 Static RAM
 Dynamic RAM (DRAM)
 Magnetoresistive RAM (MRAM)
Dynamic RAM
(DRAM)
Static RAM (SRAM)
Magnetoresistive
RAM (MRAM)
21
22
Static RAM
 Bits stored as on/off switches
 No charges to leak
 Digital uses flip-flops
 No refreshing needed when powered
 More complex construction
 Requires larger area per bit
 More expensive
 Faster and more reliable
 Cache uses SRAM chips
22
23
Dynamic RAM
 Bits stored as charge in capacitors
 presence or absence of charge in a capacitor is
interpreted as a binary 1 or 0
 Need refreshing even when powered
 Simpler construction
 Smaller per bit
 Less expensive
 Need refresh circuits
 Slower
 Used Main memory
23
24
SRAM v DRAM
 Both volatile
 Power needed to preserve data (bit value)
 Dynamic cell
 Simpler to build, smaller
 More dense (smaller cells= more cells per unit area)
 Less expensive
 Needs refresh
 Larger memory units
 Static
 Faster
 Cache (both on and off chip)
24
25
Synchronous DRAM (SDRAM)
 Exchange data with processor is synchronized
with an external clock
 Address is presented to RAM
 RAM finds data (CPU waits in conventional DRAM)
 Since SDRAM moves data in time with system clock,
CPU knows when data will be ready
 CPU does not have to wait, it can do something else
 Burst mode allows SDRAM to set up stream of
data and fire it out in block
25
26
SDR SDRAM
 SDR (Single Data Rate) can accept one command
and transfer one word of data per clock cycle.
 Typical clock frequencies are 100 and 133 MHz.
 Chips are made with a variety of data bus sizes
(most commonly 4, 8 or 16 bits),
 but chips are generally assembled into 168-pin DIMMs
that read or write 64 (non-ECC) or 72 (ECC) bits at a
time
 Typical SDR SDRAM clock rates are 66, 100, and
133 MHz (periods of 15, 10, and 7.5 ns).
27
DDR1 SDRAM
 SDRAM can only send data once per clock
 DDR (Double Data Rate) SDRAM can send data
twice per clock cycle
 Rising edge and falling edge
 DDR SDRAM interface makes higher transfer
rates possible by more strict control of the timing
of the electrical data and clock signals.
 With data being transferred 64 bits at a time, DDR
SDRAM gives a transfer rate of
 (memory bus clock rate) × 2 (for dual rate) × 64 (number
of bits transferred) / 8 (number of bits/byte).
 Thus, with a bus frequency of 100 MHz, DDR
SDRAM gives a maximum transfer rate of 1600
MB/s.
27
28
DDR2 SDRAM
 Allows higher bus speed and requires lower power
by running the internal clock at half the speed of
the data bus
 The two factors combine to require a total of four
data transfers per internal clock cycle
 With data being transferred 64 bits at a time,
DDR2 SDRAM gives a transfer rate of
 (memory clock rate) × 2 (for bus clock multiplier) × 2 (for
dual rate) × 64 (number of bits transferred) / 8 (number
of bits/byte).
 Thus with a memory clock frequency of 100 MHz,
DDR2 SDRAM gives a maximum transfer rate of
3200MB/s.
29
DDR3 SDRAM
 Double Data Rate type 3 has a high bandwidth
interface.
 ability to transfer data at twice the rate (eight times the
speed of its internal memory arrays), enabling higher
bandwidth or peak data rates
 With two transfers per cycle of a quadrupled clock, a
64-bit wide DDR3 module may achieve a transfer rate
of up to 64 times the memory clock speed in
megabytes per second (MB/s).
 Thus with a memory clock frequency of 100 MHz,
DDR3 SDRAM gives a maximum transfer rate of 6400
MB/s.
 In addition, the DDR3 standard permits chip capacities
of up to 8 gigabytes.
30
DDR, DDR2 DDR3 Comparison
31
RDRAM – Rambus DRAM
 RDRAM chips are vertical packages, with all
pins on one side.
 The chip exchanges data with the processor
over 28 wires no more than 12 centimeters
long.
 The bus can address up to 320 RDRAM chips
and is rated at 1.6 GBps
 Not in use after 2000
32
DRAM Chip sets
32
33
Magneto resistive RAM
 Faster and more energy efficient
 MRAM has similar performance to SRAM
 Similar density of DRAM but much lower power
consumption than DRAM,
 Much faster and suffers no degradation over
time in comparison to flash memory
33
34
DRAM Variations
 DIP 16-pin (DRAM chip, usually
pre-fast page mode DRAM
(FPRAM))
 SIPP 30-pin (usually FPRAM)
 SIMM 30-pin (usually FPRAM)
 SIMM 72-pin (often extended
data out DRAM (EDO DRAM)
 DIMM 168-pin (SDRAM)
 DIMM 184-pin (DDR SDRAM)
 RIMM 184-pin (RDRAM)
 DIMM 240-pin (DDR2 SDRAM
and DDR3 SDRAM)
34
35
Memory Slots
 RAM chips usually reside on a memory
module and are inserted into memory slots
35
36
How Instruction Moves In and Out of RAM
36
37
Multitasking and Multiprogramming
 Multitasking
 a method where multiple tasks are performed during the
same period of time
 Tasks share common processing resources, such as a
CPU and main memory
 One CPU, only one task is said to be running at any
point in time
 The act of reassigning a CPU from one task to another
one is called a context switch
 Multiprogramming
 running task keeps running until it performs an operation
that requires waiting for an external event (e.g. reading
from a tape) or until the computer's scheduler forcibly
swaps the running task out of the CPU
38
How Much RAM is necessary?
 The amount of RAM necessary in a computer
often depends on the types of software you plan
to use
38
39
Semiconductor Memory Types
Memory Type Category Erasure
Write
Mechanism
Volatility
Random-access
memory (RAM)
Read-write
memory
Electrically,
byte-level
Electrically Volatile
Read-only
memory (ROM) Read-only
memory
Not possible
Masks
Nonvolatile
Programmable
ROM (PROM)
Electrically
Erasable PROM
(EPROM)
Read-mostly
memory
UV light, chip-
level
Electrically
Erasable PROM
(EEPROM)
Electrically,
byte-level
Flash memory
Electrically,
block-level
39
40
Memory Access Time
 Access time is the amount of time it takes the
processor to read from memory
 Measured in nanoseconds
 Accessing memory is much faster than
accessing hard drive due to mechanical parts
40
41
Calculating Access Time
 Manufacturer states access time in MHz
 Access time = 1 billion ns / MHz number
 e.g. 800 MHz memory
 1,000,000,000 / 800,000,000 = 1.25 ns
 Access time of various memories
 Standard SDRAM chips 133 MHz ( about 7.5 ns)
 DDR SDRAM chips reach 266 MHz (about 3.75 ns)
 DDR2 chips reach 800 MHz (1.25 ns), and
 DDR3 chips reach 1600 MHz (about 0. 625 ns)
 RDRAM chips have 1600 MHz (about 0.625 ns).
 ROM access times range from 25 to 250 ns.
42
Summary
 Memory
 Address , size
 What memory stores
 OS, Application programs, Data, Instructions
 Types of Memory
 Non Volatile and volatile
 Non Volatile
 ROM, PROM, EPROM, EEPROM, Flash
 RAM – Volatile Memory
 Static RAM, Dynamic RAM, MRAM
 SDRAM and its types
42
43
Recommended Websites
 https://en.wikipedia.org/wiki/Computer_multitas
king
 https://en.wikipedia.org/wiki/SDRAM
 https://en.wikipedia.org/wiki/DDR_SDRAM
 https://en.wikipedia.org/wiki/DDR2_SDRAM
 https://en.wikipedia.org/wiki/DDR3_SDRAM
43

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ICT-Lecture_07(Primary Memory and its types).pptx

  • 2. 2 Last Lecture Summary  Central Processing Unit (CPU)  Control Unit and ALU  Machine Cycle  Memory  Components Affecting Speed  Achieving Increased Processor Speed  Registers  Functions and Size  User accessible and other types of Registers  System or Internal Clock  Clock speed and clock rate  Cache memory  Function operation  Type: Instruction, data and TLB  Multi Level Cache, L1, L2 and L3  Intel Cache Evolution  Memory Hierarchy  Bus  Bus width and speed  Bus Interconnection Scheme  Data, address and control bus 2
  • 3. 3 How Instruction Moves In and Out of Memory 3
  • 4. 4 Memory  Consists of electronic components  store instructions waiting to be executed by the processor  data needed by those instructions, and  results of processing the data (information).  Stores both programs and data  CPU cannot hold permanently  Small chips on the motherboard or on a small circuit board attached with motherboard  Allows CPU to store and retrieve data quickly  More memory makes a computer faster 4
  • 5. 5 Memory  Memory stores three basic categories of items:  operating system and other system  application programs and  data being processed and resulting information.
  • 6. 6 Memory Address  Bit –smallest storage unit  Byte (character)– smallest addressable unit  Room vs House  Each memory cell has an address  An addresses is a unique number that identifies the location of a byte in memory. 6
  • 7. 7 Memory Size  Byte is a basic storage unit in memory  Memory and storage devices size is measured in KB, MB, GB or TB 7
  • 8. 8 What Memory Stores?  Store Instructions waiting to be executed by the processor  Data needed by those instructions, and  Results of processing the data  Stores three basic categories of items: The operating system and other system software Application programs Data being processed and the resulting information 8
  • 9. 9 Types of Memory Volatile memory Loses its contents when power is turned off Example includes RAM Nonvolatile memory Does not lose contents when power is removed Examples include ROM, flash memory, and CMOS 9
  • 10. 10 Non Volatile Memory ROM  Read Only Memory (ROM)  Holds data when power is off  Basic Input Output System (BIOS)  Power On Self Test (POST) 10
  • 11. 11 ROM Types Read-only memory (ROM) refers to memory chips storing permanent data and instructions • Firmware Microcode stored in ROM A PROM (Programmable Read-Only memory) chip is a blank ROM chip that can be written to permanently only once. • EEPROM can be erased 11
  • 12. 12 Types of ROM  Written during manufacture  Very expensive for small runs  Programmable (once)  PROM  Needs special equipment to program  Read “mostly” than write operation  Erasable Programmable (EPROM)  Optically erased by UV  Electrically Erasable (EEPROM)  Takes much longer to write than read  Flash memory  Erase whole memory electrically 12
  • 13. 13 Flash Memory  Data is stored using physical switches  Special form of nonvolatile memory  Camera cards, USB key chains  Microwave, Cars 13
  • 14. 14 Flash Memory  Can be electrically erased and reprogrammed  high density NAND type must also be programmed and read in (smaller) blocks, or pages,  NOR type allows a single machine word (byte) to be written or read independently  Limitations  Block erasure  Memory wear  Read disturb 14
  • 16. 16 Flash Memory  Flash memory can be erased electronically and rewritten  CMOS technology provides high speeds and consumes little power 16
  • 17. 17 RAM  Requires power to hold data  Random Access Memory (RAM)  Data in RAM has an address  CPU reads data using the address  CPU can read any address 17
  • 18. 18 RAM  Misnamed as all semiconductor memory is random access  random access means individual words of memory are directly accessed through wired-in addressing logic.  Read/Write  Volatile  A RAM must be provided with a constant power supply. If the power is interrupted, then the data are lost.  Can only be used as temporary storage 18
  • 19. 19 Semiconductor Memory  In earlier computers, main memory employed an array of doughnut-shaped ferromagnetic loops referred to as cores  Today, the use of semiconductor chips for main memory is almost universal.  Properties  exhibit two stable (or semistable) states, which can be used to represent binary 1 and 0.  capable of being written into (at least once), to set the state.  capable of being read to sense the state. 19
  • 20. 20 Memory Cell Operation Select terminal selects a memory cell for a read or write operation. Control terminal indicates read or write. For writing, the other terminal provides an electrical signal that sets the state of the cell to 1 or 0. For reading, that terminal is used for output of the cell’s state. 20
  • 21. 21 RAM Chip sets  Static RAM  Dynamic RAM (DRAM)  Magnetoresistive RAM (MRAM) Dynamic RAM (DRAM) Static RAM (SRAM) Magnetoresistive RAM (MRAM) 21
  • 22. 22 Static RAM  Bits stored as on/off switches  No charges to leak  Digital uses flip-flops  No refreshing needed when powered  More complex construction  Requires larger area per bit  More expensive  Faster and more reliable  Cache uses SRAM chips 22
  • 23. 23 Dynamic RAM  Bits stored as charge in capacitors  presence or absence of charge in a capacitor is interpreted as a binary 1 or 0  Need refreshing even when powered  Simpler construction  Smaller per bit  Less expensive  Need refresh circuits  Slower  Used Main memory 23
  • 24. 24 SRAM v DRAM  Both volatile  Power needed to preserve data (bit value)  Dynamic cell  Simpler to build, smaller  More dense (smaller cells= more cells per unit area)  Less expensive  Needs refresh  Larger memory units  Static  Faster  Cache (both on and off chip) 24
  • 25. 25 Synchronous DRAM (SDRAM)  Exchange data with processor is synchronized with an external clock  Address is presented to RAM  RAM finds data (CPU waits in conventional DRAM)  Since SDRAM moves data in time with system clock, CPU knows when data will be ready  CPU does not have to wait, it can do something else  Burst mode allows SDRAM to set up stream of data and fire it out in block 25
  • 26. 26 SDR SDRAM  SDR (Single Data Rate) can accept one command and transfer one word of data per clock cycle.  Typical clock frequencies are 100 and 133 MHz.  Chips are made with a variety of data bus sizes (most commonly 4, 8 or 16 bits),  but chips are generally assembled into 168-pin DIMMs that read or write 64 (non-ECC) or 72 (ECC) bits at a time  Typical SDR SDRAM clock rates are 66, 100, and 133 MHz (periods of 15, 10, and 7.5 ns).
  • 27. 27 DDR1 SDRAM  SDRAM can only send data once per clock  DDR (Double Data Rate) SDRAM can send data twice per clock cycle  Rising edge and falling edge  DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals.  With data being transferred 64 bits at a time, DDR SDRAM gives a transfer rate of  (memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte).  Thus, with a bus frequency of 100 MHz, DDR SDRAM gives a maximum transfer rate of 1600 MB/s. 27
  • 28. 28 DDR2 SDRAM  Allows higher bus speed and requires lower power by running the internal clock at half the speed of the data bus  The two factors combine to require a total of four data transfers per internal clock cycle  With data being transferred 64 bits at a time, DDR2 SDRAM gives a transfer rate of  (memory clock rate) × 2 (for bus clock multiplier) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte).  Thus with a memory clock frequency of 100 MHz, DDR2 SDRAM gives a maximum transfer rate of 3200MB/s.
  • 29. 29 DDR3 SDRAM  Double Data Rate type 3 has a high bandwidth interface.  ability to transfer data at twice the rate (eight times the speed of its internal memory arrays), enabling higher bandwidth or peak data rates  With two transfers per cycle of a quadrupled clock, a 64-bit wide DDR3 module may achieve a transfer rate of up to 64 times the memory clock speed in megabytes per second (MB/s).  Thus with a memory clock frequency of 100 MHz, DDR3 SDRAM gives a maximum transfer rate of 6400 MB/s.  In addition, the DDR3 standard permits chip capacities of up to 8 gigabytes.
  • 30. 30 DDR, DDR2 DDR3 Comparison
  • 31. 31 RDRAM – Rambus DRAM  RDRAM chips are vertical packages, with all pins on one side.  The chip exchanges data with the processor over 28 wires no more than 12 centimeters long.  The bus can address up to 320 RDRAM chips and is rated at 1.6 GBps  Not in use after 2000
  • 33. 33 Magneto resistive RAM  Faster and more energy efficient  MRAM has similar performance to SRAM  Similar density of DRAM but much lower power consumption than DRAM,  Much faster and suffers no degradation over time in comparison to flash memory 33
  • 34. 34 DRAM Variations  DIP 16-pin (DRAM chip, usually pre-fast page mode DRAM (FPRAM))  SIPP 30-pin (usually FPRAM)  SIMM 30-pin (usually FPRAM)  SIMM 72-pin (often extended data out DRAM (EDO DRAM)  DIMM 168-pin (SDRAM)  DIMM 184-pin (DDR SDRAM)  RIMM 184-pin (RDRAM)  DIMM 240-pin (DDR2 SDRAM and DDR3 SDRAM) 34
  • 35. 35 Memory Slots  RAM chips usually reside on a memory module and are inserted into memory slots 35
  • 36. 36 How Instruction Moves In and Out of RAM 36
  • 37. 37 Multitasking and Multiprogramming  Multitasking  a method where multiple tasks are performed during the same period of time  Tasks share common processing resources, such as a CPU and main memory  One CPU, only one task is said to be running at any point in time  The act of reassigning a CPU from one task to another one is called a context switch  Multiprogramming  running task keeps running until it performs an operation that requires waiting for an external event (e.g. reading from a tape) or until the computer's scheduler forcibly swaps the running task out of the CPU
  • 38. 38 How Much RAM is necessary?  The amount of RAM necessary in a computer often depends on the types of software you plan to use 38
  • 39. 39 Semiconductor Memory Types Memory Type Category Erasure Write Mechanism Volatility Random-access memory (RAM) Read-write memory Electrically, byte-level Electrically Volatile Read-only memory (ROM) Read-only memory Not possible Masks Nonvolatile Programmable ROM (PROM) Electrically Erasable PROM (EPROM) Read-mostly memory UV light, chip- level Electrically Erasable PROM (EEPROM) Electrically, byte-level Flash memory Electrically, block-level 39
  • 40. 40 Memory Access Time  Access time is the amount of time it takes the processor to read from memory  Measured in nanoseconds  Accessing memory is much faster than accessing hard drive due to mechanical parts 40
  • 41. 41 Calculating Access Time  Manufacturer states access time in MHz  Access time = 1 billion ns / MHz number  e.g. 800 MHz memory  1,000,000,000 / 800,000,000 = 1.25 ns  Access time of various memories  Standard SDRAM chips 133 MHz ( about 7.5 ns)  DDR SDRAM chips reach 266 MHz (about 3.75 ns)  DDR2 chips reach 800 MHz (1.25 ns), and  DDR3 chips reach 1600 MHz (about 0. 625 ns)  RDRAM chips have 1600 MHz (about 0.625 ns).  ROM access times range from 25 to 250 ns.
  • 42. 42 Summary  Memory  Address , size  What memory stores  OS, Application programs, Data, Instructions  Types of Memory  Non Volatile and volatile  Non Volatile  ROM, PROM, EPROM, EEPROM, Flash  RAM – Volatile Memory  Static RAM, Dynamic RAM, MRAM  SDRAM and its types 42
  • 43. 43 Recommended Websites  https://en.wikipedia.org/wiki/Computer_multitas king  https://en.wikipedia.org/wiki/SDRAM  https://en.wikipedia.org/wiki/DDR_SDRAM  https://en.wikipedia.org/wiki/DDR2_SDRAM  https://en.wikipedia.org/wiki/DDR3_SDRAM 43