interruptsinterrupt handling types of interruptss.ppt

8-1
Bard, Gerstlauer, Janapa Reddi, Telang, Tiwari, Valvano, Yerraballi
EE 319K
Introduction to Embedded Systems
Lecture 8: Periodic Timer Interrupts,
Digital-to-Analog Conversion, Sound,
Lab 6
http://users.ece.utexas.edu/~valvano/Volume1/E-Book/C12_Interactives.htm
Interrupts: read Sections 9.1 to 9.6
Sound: read Sections 10.1 to 10.3

8-2
Agenda
Recap
PLL
Data structures
FSMs, linked structure
Interrupts
 Agenda
Periodic Interrupts
Digital to Analog Conversion
Nyquist Theorem
Sound generation
Interrupt
Perform I/O
return from interrupt
Output one
value to DAC
SysTick ISR

8-3
Vector address Number IRQ ISR name in Startup.s NVIC Priority bits
0x00000038 14 -2 PendSV_Handler NVIC_SYS_PRI3_R 23 – 21
0x0000003C 15 -1 SysTick_Handler NVIC_SYS_PRI3_R 31 – 29
0x00000040 16 0 GPIOPortA_Handler NVIC_PRI0_R 7 – 5
0x00000044 17 1 GPIOPortB_Handler NVIC_PRI0_R 15 – 13
0x00000048 18 2 GPIOPortC_Handler NVIC_PRI0_R 23 – 21
0x0000004C 19 3 GPIOPortD_Handler NVIC_PRI0_R 31 – 29
0x00000050 20 4 GPIOPortE_Handler NVIC_PRI1_R 7 – 5
0x00000054 21 5 UART0_Handler NVIC_PRI1_R 15 – 13
0x00000058 22 6 UART1_Handler NVIC_PRI1_R 23 – 21
0x0000005C 23 7 SSI0_Handler NVIC_PRI1_R 31 – 29
0x00000060 24 8 I2C0_Handler NVIC_PRI2_R 7 – 5
0x00000064 25 9 PWMFault_Handler NVIC_PRI2_R 15 – 13
0x00000068 26 10 PWM0_Handler NVIC_PRI2_R 23 – 21
0x0000006C 27 11 PWM1_Handler NVIC_PRI2_R 31 – 29
0x00000070 28 12 PWM2_Handler NVIC_PRI3_R 7 – 5
0x00000074 29 13 Quadrature0_Handler NVIC_PRI3_R 15 – 13
0x00000078 30 14 ADC0_Handler NVIC_PRI3_R 23 – 21
0x0000007C 31 15 ADC1_Handler NVIC_PRI3_R 31 – 29
0x00000088 34 18 WDT_Handler NVIC_PRI4_R 23 – 21
0x0000008C 35 19 Timer0A_Handler NVIC_PRI4_R 31 – 29
0x00000090 36 20 Timer0B_Handler NVIC_PRI5_R 7 – 5
0x00000094 37 21 Timer1A_Handler NVIC_PRI5_R 15 – 13
0x00000098 38 22 Timer1B_Handler NVIC_PRI5_R 23 – 21
0x0000009C 39 23 Timer2A_Handler NVIC_PRI5_R 31 – 29
0x000000A0 40 24 Timer2B_Handler NVIC_PRI6_R 7 – 5
0x000000A4 41 25 Comp0_Handler NVIC_PRI6_R 15 – 13
0x000000A8 42 26 Comp1_Handler NVIC_PRI6_R 23 – 21
0x000000AC 43 27 Comp2_Handler NVIC_PRI6_R 31 – 29
0x000000B0 44 28 SysCtl_Handler NVIC_PRI7_R 7 – 5
0x000000B4 45 29 FlashCtl_Handler NVIC_PRI7_R 15 – 13
0x000000B8 46 30 GPIOPortF_Handler NVIC_PRI7_R 23 – 21
0x000000BC 47 31 GPIOPortG_Handler NVIC_PRI7_R 31 – 29
0x000000C0 48 32 GPIOPortH_Handler NVIC_PRI8_R 7 – 5
0x000000C4 49 33 UART2_Handler NVIC_PRI8_R 15 – 13
0x000000C8 50 34 SSI1_Handler NVIC_PRI8_R 23 – 21
0x000000CC 51 35 Timer3A_Handler NVIC_PRI8_R 31 – 29
0x000000D0 52 36 Timer3B_Handler NVIC_PRI9_R 7 – 5
0x000000D4 53 37 I2C1_Handler NVIC_PRI9_R 15 – 13
0x000000D8 54 38 Quadrature1_Handler NVIC_PRI9_R 23 – 21
0x000000DC 55 39 CAN0_Handler NVIC_PRI9_R 31 – 29
0x000000E0 56 40 CAN1_Handler NVIC_PRI10_R 7 – 5
0x000000E4 57 41 CAN2_Handler NVIC_PRI10_R 15 – 13
0x000000E8 58 42 Ethernet_Handler NVIC_PRI10_R 23 – 21
0x000000EC 59 43 Hibernate_Handler NVIC_PRI10_R 31 – 29
0x000000F0 60 44 USB0_Handler NVIC_PRI11_R 7 – 5
0x000000F4 61 45 PWM3_Handler NVIC_PRI11_R 15 – 13
0x000000F8 62 46 uDMA_Handler NVIC_PRI11_R 23 – 21
0x000000FC 63 47 uDMA_Error NVIC_PRI11_R 31 – 29
INTERRUPT
VECTORS
Lab 6
Lab 8
Lab 9
77 total
Lab 10

8-4
Nested Vectored Interrupt Controller
(NVIC)
Hardware unit that coordinates among
interrupts from multiple sources
Define priority level of each interrupt source
(NVIC_PRIx_R registers)
Separate enable flag for each interrupt source
(NVIC_EN0_R and NVIC_EN1_R)
Interrupt does not set I bit
Higher priority interrupts can interrupt lower
priority ones

8-5
Address 31 – 29 23 – 21 15 – 13 7 – 5 Name
0xE000E400 GPIO Port D GPIO Port C GPIO Port B GPIO Port A NVIC_PRI0_R
0xE000E404 SSI0, Rx Tx UART1, Rx Tx UART0, Rx Tx GPIO Port E NVIC_PRI1_R
0xE000E408 PWM Gen 1 PWM Gen 0 PWM Fault I2C0 NVIC_PRI2_R
0xE000E40C ADC Seq 1 ADC Seq 0 Quad Encoder PWM Gen 2 NVIC_PRI3_R
0xE000E410 Timer 0A Watchdog ADC Seq 3 ADC Seq 2 NVIC_PRI4_R
0xE000E414 Timer 2A Timer 1B Timer 1A Timer 0B NVIC_PRI5_R
0xE000E418 Comp 2 Comp 1 Comp 0 Timer 2B NVIC_PRI6_R
0xE000E41C GPIO Port G GPIO Port F Flash Control System Control NVIC_PRI7_R
0xE000E420 Timer 3A SSI1, Rx Tx UART2, Rx Tx GPIO Port H NVIC_PRI8_R
0xE000E424 CAN0 Quad Encoder 1 I2C1 Timer 3B NVIC_PRI9_R
0xE000E428 Hibernate Ethernet CAN2 CAN1 NVIC_PRI10_R
0xE000E42C uDMA Error uDMA Soft Tfr PWM Gen 3 USB0 NVIC_PRI11_R
0xE000ED20 SysTick PendSV -- Debug NVIC_SYS_PRI3_R
NVIC Registers
 High order three bits of each byte define priority

8-6
NVIC Interrupt Enable Registers
Two enable registers –
NVIC_EN0_R and NVIC_EN1_R
Each 32-bit register has a single enable bit for
a particular device
NVIC_EN0_R control the IRQ numbers 0 to 31
(interrupt numbers 16 – 47)
NVIC_EN1_R control the IRQ numbers 32 to 47
(interrupt numbers 48 – 63)

8-7
Interrupt Rituals
Things you must do in every ritual
Initialize data structures (counters, pointers)
Arm (specify a flag may interrupt)
Configure NVIC
o Enable interrupt (NVIC_EN0_R)
o Set priority (e.g., NVIC_PRI1_R)
Enable Interrupts
o Assembly code CPSIE I
o C code EnableInterrupts();

8-8
Interrupt Service Routine (ISR)
Things you must do in every interrupt
service routine
Acknowledge
o clear flag that requested the interrupt
o SysTick is exception; automatic acknowledge
Maintain contents of R4-R11 (AAPCS)
Communicate via shared global variables

8-9
Interrupt Events
 Respond to infrequent but important events
 Alarm conditions like low battery power
 Error conditions
 I/O synchronization
 Trigger interrupt when signal on a port changes
 Periodic interrupts
 Generated by the timer at a regular rate
 Systick timer can generate interrupt when it hits zero
 Reload value + frequency determine interrupt rate

8-10
Synchronization
Other calculations
1
0
Main
program ISR
Flag = 0
Do important stuff
Flag
Flag = 1
Other calculations 1
0
Main
program
ISR
Flag = 0
Do important stuff
Flag
Flag = 1
Semaphore
One thread sets the flag
The other thread waits for, and clears
Mailbox – to be presented for Lab 8
FIFO queue – to be presented for Lab 9
Use global variable to communicate

8-11
Periodic Interrupts
Data acquisition samples ADC
Lab 8 will sample at a fixed rate
Signal generation output to DAC
Audio player (we use the Systick interrupt to
write samples out periodically in Lab 6)
Communications
Digital controller
FSM
Linear control system (EE362K)
Demo PeriodicSystickInts starter C code

8-12
Digital Representation of Analog Signals
Digitization: Amplitude and time quantization
Time (s)
0
4
8
12
16
20
24
28
32
0 1 2 3 4 5 6 7 8 9 10
Continuous analog signal
Discrete digital signal

8-13
Conversion from Digital to Analog
Range
0 to 3.3V
Resolution
3.3V/15 = 0.22V
Precision
4 bits
16 alternative
Speed
Monotonic

8-14
Digital ↔ Analog Conversion
Sampled at a fixed time, t
fs = 1/t
Signal has frequencies 0 to ½ fs

8-15
Digital ↔ Analog Conversion
Digital: voltage vs. time
fs = 1/t
Signal has frequencies 0 to ½ fs
Analog: voltage vs. time

8-16
Digital-to-Analog Converter (DAC)
 Binary Weighted DAC
 One resistor for each bit of output
 Resistor values in powers of 2
R
I
V R = 1k
Battery
V=3.7V
Resistor
I = 3.7mA
LM3S
TM4C bit1
bit0
V2
10k
20k
Q1
Q0
LM3S
TM4C bit1
bit0
V1
10k
20k
Q1
Q0
20k

8-17
3 bit DAC
R2 10 kΩ
R1 20 kΩ
R0 40 kΩ
n PB2 PB1 PB0 kohm equation Vout (V)
0 0 0 0 0.000
1 0 0 3.3 R2||R1 6.67 3.3*(R1||R2)/(R0+R1||R2) 0.471
2 0 3.3 0 R2||R0 8.00 3.3*(R2||R0)/(R1+R2||R0) 0.943
3 0 3.3 3.3 R1||R0 13.33 3.3*R2/(R2+R1||R0) 1.414
4 3.3 0 0 R1||R0 13.33 3.3*(R1||R0)/(R2+R1||R0) 1.886
5 3.3 0 3.3 R2||R0 8.00 3.3*R1/(R1+R2||R0) 2.357
6 3.3 3.3 0 R2||R1 6.67 3.3*R0/(R0+R2||R1) 2.829
7 3.3 3.3 3.3 3.300
Vout
10k
PB2
20k
PB1
40k
PB0
Vout
13.3k 10k
3.3V
Vout
10k 13.3k
3.3V
n=3
n=4
Vout
8k 20k
3.3V
n=5
Vout
6.7k 40k
3.3V
n=6
Vout
40k 6.7k
3.3V
n=1
Vout
20k 8k
3.3V
n=2

8-18
Other Types of DACs
 R-2R Ladder DAC
Binary weighted cascading ladder
Improved precision owing to ability to select
resistors of equal value

8-19
DAC Performance
Resolution, range, precision
Maximum sampling frequency
Monotonicity
Input increase causes output increase (always)
Digital Input
Vout
Ideal
nonlinear
Digital Input
Vout
Ideal
nonmonotonic

8-20
Resistor Network for 4-bit DAC
R0
R1
R2
R3
TM4C123
Bit3
Bit2
bit1
Bit0
Static
testing
Voltmeter

8-21
Dynamic testing
Vout
I out
Speaker
TM4C123
Bit3
Bit2
Bit1
Bit0
1.5k
3k
6k
12k

8-22
Loudness and pitch
 Controlled by amplitude and frequency
Humans can hear from about 25 to 20,000 Hz.
Middle A is 440 Hz
Other notes on a keyboard are determined
o 440 * 2N/12
, where N is no. of notes from middle A.
Middle C is 261.6 Hz.
Music contains multiple harmonics
Sound

8-23
Tempo
Tempo defines note duration
Quarter note = 1 beat
120 beats/min => ½ s duration
330 Hz 523 Hz
0.5s 0.5s 1.0s
330 Hz

8-24
Chord
Two notes at the same time
Superimposed waveforms
262 Hz (low C) and a 392 Hz (G)
-2
-1
0
1
2
0 0.005 0.01 0.015 0.02
Time (sec)
Sound
Amplitude

8-25
Instrument Characteristics
Plucked string signal with envelope
period
Waveform shape of a trumpet sound
330 Hz
330 Hz 523 Hz
0.5s 0.5s 1.0s

8-26
Synthesizing Digital Music
Nyquist’s Sampling Theorem
We can reproduce any bandlimited signal from
its samples if we sample correctly and at a
frequency, fs, that is at least twice the highest
frequency component of the signal, fmax.
Where do we get the samples?
We could sample a series of musical tones
We can compute the samples

8-27
Synthesizing Digital Music (cont.)
What is a musical tone?
A sinusoid of a particular frequency
Notes vary by twelfth root of 2 ~ 1.059
What would the samples be?
Fixed point numbers
How do we generate a sinusoid?
Output appropriate digital values via a resistor
network that effectively produces an pseudo-analog
signal
What about frequency?
Employ a programmable timer to tell us when to
output the next value

8-28
Synthesizing Digital Music (cont.)
440 Hz sine wave generated by 6-bit DAC
Frequency
spectrum

8-29
Music Generation – Lab 6
Objectives
Employ TM4C to generate appropriately
scaled digital outputs at a specified
frequency
o Three frequencies are required
o Frequencies are to be determined by switch
settings
Four digital outputs are inputs to a resistor
network that serves as a digital-to-analog
converter (DAC)
o Four output bits => 16 levels

8-30
Music Generation (cont.)
DAC hardware
Employ least significant four bits of a GPIO port
Arrange resistor network in 1, 2, 4, 8 sequence
o Each port bit can assume digital levels of 0 and 3.3 V
o Ports are current limited – max 8 mA
R0
R1
R2
R3
TM4C123
Bit3
Bit2
bit1
Bit0
Static
testing
Voltmeter

8-31
DAC software
Interactions via device drivers
Two device driver functions required
void DAC_Init(void); // initializes the device
void DAC_Out(unsigned char data); // transfers data to device
(Device driver provides the functions associated
with the device but hides the detailed actions
necessary to implement the functions.)

8-32
Interpretation of data
Note has three parameters
o Amplitude (loudness)
o Frequency (pitch)
o Duration
Amplitude is a digitally approximated sinusoid
o Sinusoid varies between 0 and 3.3 volts
Frequency is selected by switches
o Four states – stop, note_1, note_2, and note_3
Duration is period switch(es) activated

8-33
4-bit Sinusoid Table
4-bit sin table
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0 1 2 3 4 5 6 7
theta (radians)
4-bit
DAC
output
SinTab 8,9,11,12,13,14,14,15,15,15,14
14,13,12,11,9,8,7,5,4,3,2
2,1,1,1,2,2,3,4,5,7
32 value sinusoid

8-34
Musical Notes
Note f T(m
s) t - ouput (μs for32 points)
C 523 1.91 59.75
B 494 2.02 63.26
B
b 466 2.15 67.06
A 440 2.27 71.02
A
b 415 2.41 75.30
G 392 2.55 79.72
G
b 370 2.70 84.46
F 349 2.87 89.54
E 330 3.03 94.70
E
b 311 3.22 100.48
D 294 3.40 106.29
D
b 277 3.61 112.82
C 262 3.82 119.27

8-35
Tone Generation
unsigned long I;
// 4-bit 32-element sine wave
const uint8_t wave[32]= {
8,9,11,12,13,14,14,15,15,15,14
14,13,12,11,9,8,7,5,4,3,2
2,1,1,1,2,2,3,4,5,7};
 For a 440Hz tone
 Assume a bus clock frequency of 50 MHz
o SysTick count every 20ns
 Each cycle of the 440 Hz sinusoid requires:
o (50*106
counts/s)/440 Hz = 113636.36 SysTick counts
 Each cycle consists of 32 values each of duration:
o 113636.36 interrupt counts/32 values =
3551 SysTick counts/value
o DAC values change every 71.02 us
Output one
value to DAC
SysTick ISR

8-36
Lab 6 ISR
Each Systick interrupt
Output one value from the array to DAC
Increment index to array (wrap back to zero)
In main program
If a switch is pressed set SysTick period (arm)
If no switches are pressed then disarm
Output one
value to DAC
SysTick ISR

8-37
Other Instruments
Bassoon
0
10
20
30
40
50
60
70
1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49 52 55 58 61 64
// 6-bit 64-element bassoon wave
const uint8_t Bassoon[64] = {
33,37,37,36,35,34,34,33,31,30,29,
30,33,43,58,63,52,31,13,4,5,10,16,
23,32,40,46,48,44,38,30,23,17,12,11,
15,23,32,40,42,39,32,26,23,23,24,25,
25,26,29,30,31,32,34,37,39,37,35,34,
34,34,33,31,30};
// 6-bit 64-element guitar wave
const uint8_t Guitar[64] = {
20,20,20,19,16,12,8,4,3,5,10,17,
26,33,38,41,42,40,36,29,21,13,9,
9,14,23,34,45,52,54,51,45,38,31,
26,23,21,20,20,20,22,25,27,29,
30,29,27,22,18,13,11,10,11,13,13,
13,13,13,14,16,18,20,20,20};
Guitar
0
10
20
30
40
50
60
1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49 52 55 58 61 64

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