Introduction to digital logic families - TTL, CMOS logic, interfacing CMOS and TTL
- 1. Logic Family Bipolar Logic Family Saturated Non Saturated RTL(resistor transistor logic) DCTL(direct coupled transistor logic) IIL(integrated injection logic) DTL(diode transistor logic) HTL(high threshold logic) TTL(transistor transistor logic) Schottky TTL ECL(emitter coupled logic) ULF(unipolar logic family) PMOS(p-channel MOSFET) NMOS(n-channel MOSFET) CMOS Classification 4
- 2. Logic Families KirtiP_Digital Design 2 ■ The types of digital circuit devices are classified in families that based on the specific circuit technology. Among them, the most important are TTL and CMOS ■ TTL (Transistor-Transistor Logic), made of bipolar transistors ■ It is called transistor–transistor logic because the logic function (e.g., AND) and amplification is performed by transistors ■ CMOS (Complementary Metal Oxide Semiconductor) made from MOSFET transistors ■ In the modern world, CMOS is the dominate technology used to construct digital circuit components, especially large-scale integrated circuits ■ The logic families differ from each other primarily in output current
- 3. Characteristics of an Ideal Logic Family KirtiP_Digital Design 3 The ideal logic family should have or be: ■ Low power ■ High speed ■ Easy to use ■ Many different logic functions ■ Clear voltage levels for 0 (LOW) and 1 (HIGH)
- 4. • Fan in or gate is the number of inputs that can practically be supported without degrading input voltage level. Fan in = 4 Fan Out •The maximum number of digital input that the output of a single logic gate can feed and the gate must be same logic family. Fan In Fanout = 4 4 •Fan Out is calculated from the amount of current available in the output of a gate and the amount of current needed in each input of the connecting gate. •It is specified by manufacturer and is provided in the data sheet. •Exceeding the specified maximum load may cause a malfunction because the circuit will not be able supply the demanded power.
- 5. Noise Margin •Noise is present in all real systems. This adds random fluctuations to voltages representing logic levels. •Small amounts of noise will not affect the circuit. The maximum noise voltage that can be tolerated by a circuit is termed its noise immunity (noise Margin). 5 VNH is the difference between the minimum output high voltage 𝑉 (MIN) 𝑂𝐻 and the minimum input high voltage 𝑉 (MIN) 𝐼𝐻 VNL is the difference between the largest possible low output, 𝑉 L (Max) 𝑂 and the max. input voltage 𝑉 L (Max) 𝐼 required for a low input.
- 7. Transistor-Transistor Logic KirtiP_Digital Design 7 ■ In Transistor-Transistor logic or just TTL, logic gates are built only around transistors ■ TTL was developed in 1965 ■ Through the years basic TTL has been improved to meet performance requirements. There are many versions or families of TTL. For example ■ Standard TTL ■ High Speed TTL (twice as fast, twice as much power) ■ Low Power TTL (1/10 the speed, 1/10 the power of “standard" TTL) ■ Schhottky TTL etc. (for high-frequency uses ) ■ Here we will discuss only basic TTL. Typically, all TTL logic families have three configurations for outputs ■ Totem pole output ■ Open collector output ■ Tristate output
- 8. 8 TTL family is a modification to the DTL. It has come to existence so as to overcome the speed limitations of DTL family. The basic gate of this family is TTL NAND gate. Q3 is cutoff (act like a high RC ) when output transistor Q4 is saturated and Q3 is saturated (act like a low RC ) when output transistor Q4 is cutoff . Thus one transistor is ON at one time. The combination of Q3 and Q4 is called TOTEM POLE arrangement. Q1 is called input transistor, which is multi emitter transistor, that drive transistor Q2 which is used to control Q3 and Q4. Diode D1 and D2 are used to protect Q1 from unwanted negative voltages and diode D3 ensures when Q4 is ON, Q3 is OFF. Transistor Transistor Logic
- 9. The output impedance is asymmetrical between the high and low state, making them unsuitable for driving transmission lines. This drawback is usually overcome by buffering the outputs with special line-driver devices where signals need to be sent through cables. ECL, by virtue of its symmetric low-impedance output structure, does not have this drawback. 15 ( BLOCK DIAGRAM OF TTL)
- 10. 10 Complimentary MOS (CMOS) Considerably lower energy consumption than TTL and ECL, which has made portable electronics possible. Most widely used family for large-scale devices Combines high speed with low power consumption Usually operates from a single supply of 5 – 15 V Excellent noise immunity of about 30% of supply voltage Can be connected to a large number of gates (about 50) .
- 11. 11 Switching Circuit and Logic Design by Prof. Indranil Sengupta, IIT KGP Modern digital Electronics by R P Jain NPTEL VIDEO by Dr. Amitava Dasgupta, IITM Logic Families by Dr. Basem Elhalawany Logic Gates and Family by Dr. A. P. VAJPEYI, IITG Reference s