Is accurate system-level power measurement challenging? Check this out!
- 1. Is accurate system-level power measurement challenging? Date: March - 16 - 2015 Host: Deepak Shankar Founder & CEO Mirabilis Design Inc. Email: dshankar@mirabilisdesign.com
- 2. Agenda • Understanding System Level Power exploration • How can System-level Power Analysis work for you? • Performance, Cost, Size, Thermal and Power • How do you perform System-Level Power Analysis? • Using VisualSim for System Level Power and Performance analysis
- 3. Background on Mirabilis Design • Provider of system-level modeling, simulation, analysis and exploration software • Supports systems, semiconductor and embedded software • VisualSim- Modeling and simulation environment • Based in Silicon Valley with experts in system modeling, power measurements and architectures • Largest source of system modeling IP with embedded timing and power 3 Select the “Right” configuration to match customer request
- 4. About VisualSim • Graphical and hierarchical modeling • Large library of stochastic and cycle-accurate components and IP blocks with embedded timing and power • Library blocks are used to assemble hardware, software, network, traffic, reports and use-cases 4 Architecture Exploration Performance Analysis Power Analysis HW-SW Partitioning Application InterfacesRTOS Hardware Validate and optimize your design quickly and accurately
- 5. Introduction to Power Modeling • Power modeling at the system-level is necessary because power- based problems are one of the primary causes of costly-respins – Heat dissipation – Low battery life – Lack-luster power-performance trade-off • Power-based and time-based system requirements must be evaluated in the same environment • Examples of power investigations at the system-level – Dynamic Voltage and Frequency Scaling (DVFS) – Power control logic for SoC power domains – Power gating – SOC architecture comparisons based on power Power is a much more important criteria over performance
- 6. Power Analysis: Spreadsheet vs. Simulation Averaging in analytical methods can lead to incorrect expectations
- 7. Dynamic System-Level Power Profile Peak
- 8. What is System-Level Power Analysis? • Evaluate the power consumed by the entire target design • Combine use-cases and workload to evaluate the power consumption over different scenarios and time • Run large number of configuration changes in a short- period of time • Can provide early measurements to the design team and marketing • Create a multi-dimensional system evaluation platform Power is now an integral part of Architecture Exploration
- 9. How can System-Level Power Analysis Help? • Refine the Hardware/Software Architecture – Frequency/Voltage scaling and Resource Selection – Software schedule vs. power profile • Project feasibility and implementation efforts – Visualize the power consumed – Select power minimization objectives for designers • Increase confidence in the system architecture – Move beyond average and static power data • Move power management and gating to the definition stage – Select and generate test cases for the implementors Power is now an integral part of Architecture Exploration
- 10. Power Analyzer – Power vs Performance Trade-off Architecture Model Behavior Flow Spreadsheet
- 11. Detailed Power Analysis Explore Power Requirements • Impact of Memory Bank Activities • Processor Pipeline • Memory Referencing Schemes • Algorithm Implementation on FPGA • Role of Device Transition Cycles on System Power
- 12. Role of Power Analysis • Can impact the cost, thermal design, size, and weight • Consumer products can benefit from better battery life via intelligent use of devices/SoC/Processor • Create innovative power management algorithms and operations • Create a three dimensional view- power, performance/timing and functionality • Single solution to provide input for mechanical and testing Early power analysis is as important as performance exploration
- 13. VisualSim Trade-off: Lower Power vs. Response-Time Clock Speed (Mhz) Total System Power (µW) Task Latency (µs) CPI MIPS Efficiency Rating 166 (µP) 100 (Peripherals) 49.6 2.0->12.5 3.18 52.178 31.43% 166 (µP) 166 (Peripherals) 68.2 2.0->12.5 3.11 52.45 31.596% 233 (µP & Peripherals) 85.7 1.4->9.4 3.2 73.9 31.7% 400 (µP & Peripherals) 129.11 0.82->5.49 3.29 123.00 30.75%
- 14. How does VisualSim Power Analyzer work? • Based on dynamic activity and state power • Methodology – Input is power level for each device in each state – Combines effects of transitions and controller speed – Updates power table when state changes in device – Function calls to modify state and power levels, view battery levels, charge battery etc. • Report peak, instant and average power • Generate power profile for verification Accurate capture of power activity in the system
- 15. Block Functional and Power Mode Diagrams Function 1 Function 2 Function N . . . Block Functional Diagram Block Power Mode Diagram
- 16. Power Management State Machine 3/17/2016 Mirabilis Design Inc. Confidential Slide16
- 17. Fixed vs. Shifted Task Scheduling Report Baseline: Parallel Tasks Modified: Tasks Shifted • 4 Tasks • Parallel is all 4 tasks start at same cycle • Shifted is slight time offset between tasks
- 18. VisualSim Trade-off: Analyzing the Scheduling Simulation • Peak power reduced by 1/3 • Average power reduced at startup • Lower power/frequency – Increased minimum software task latency – Did not increase maximum task latency Model Power- Peak (mWatts) Power-Average (mWatts) Latency (Secs) Baseline 6.15 2.8->1.4 0.04, 0.65, 0.12 Modified 2.3 1.5->1.4 0.102, .122
- 19. Modeling Libraries – Get your Models Early! SoC •AMBA (AHB/ APB/ AXI) •CoreConnect- PLB & OPB •NoC, Virtual Channel •USB Memory •SDR, DDR, DDR2, DDR3 •QDR, RDRAM •LPDDR, LPDDR2, LPDDR3, LPDDR4 •HBM •Flash Processors •ARM •PowerPC- Freescale and IBM •Intel and AMD •TI •MIPS •Tensilica •Renesas SH Interfaces •PCI, PCI-X, PCIe •RapidIO •NVMe •Serial Switch •Crossbar •Ethernet •Fibre Channel •FireWire Standards •AFDX •TTEthernet •Ethernet •CAN •RapidIO
- 20. Conclusion • Power-based and time-based system requirements must be evaluated in the same environment – Refine System Architecture to meet Power and Performance Requirements – Power-Performance Trade-off • Simulation of Dynamic behavior of System Components for accurate Power values • Predict and eliminate possible design bottlenecks • Distribute Power model across development teams and customers System-Level Power is applicable to Systems and Semiconductors
- 21. Is accurate system-level power measurement challenging? Date: March - 16 - 2015 Host: Deepak Shankar Founder & CEO Mirabilis Design Inc. Email: dshankar@mirabilisdesign.com Visit us @ Booth No:1103 April 11-14, 2016 · Colorado Springs, Colorado USA