SPICE MODEL of LM319AJ in SPICE PARK
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The document presents a detailed device modeling report for the LM319AJ voltage comparator, including simulations and measurements of various parameters like saturation current, rising and falling delay times, input offset voltage, and input bias currents. It contains comparison tables demonstrating the accuracy of simulations against actual measurements, highlighting percentage errors for each parameter. The report is copyrighted by Bee Technologies Inc. and includes specific simulation results for circuits using the LM319 component.
SPICE MODEL of LM319AJ in SPICE PARK
- 1. Device Modeling Report COMPONENTS : VOLTAGE COMPARATOR PART NUMBER : LM319AJ MANUFACTURER : NATIONAL Bee Technologies Inc. All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 2. BJT MODEL Pspice model Model description parameter IS Saturation Current BF Ideal Maximum Forward Beta CJC Zero-bias Collector-Base Junction Capacitance TF Forward Transit Time TR Reverse Transit Time DIODE MODEL Pspice model Model description parameter IS Saturation Current RS Series Resistance All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 3. Output Low Voltage Simulation result Simulation Evaluation Circuit U1 1 14 2 13 3 12 GND1 OUT 1 4 IN+1 V+ 11 + 5 IN-1 IN-2 10 - - 6 V- IN+2 9 + 7 8 V1 I1 OUT 2 GND2 V3 V2 25m LM319 1.55 1.56 15 V4 -15 0 Comparison Table IO = 25mA Measurement Simulation %Error Vol (V) 0.75 0.750832 0.111 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 4. Response time (Rise time and Transition time) Simulation result OUTPUT Evaluation Circuit U2 1 14 2 13 3 12 GND1 OUT 1 Tr 4 IN+1 V+ 11 + 5 IN-1 IN-2 10 - - 6 V- IN+2 9 RL1 + 7 8 500 OUT 2 GND2 V5 V7 LM319 V1 = -5m V6 V8 V2 = 100m 15 TD = 0.5u TR = 10n -15 5 TF = 10n PW = 1u PER = 2u 0 Comparison Table Measurement Simulation % Error Rising delay time (ns) 30 30.223 0.743 Transition time (ns) 45 44.559 -0.980 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 5. Response time (Falling time) Simulation result OUTPUT Evaluation Circuit U1 1 14 2 13 3 12 GND1 OUT 1 Tf 4 IN+1 V+ 11 + 5 IN-1 IN-2 10 - - 6 V- IN+2 9 + RL 7 OUT 2 GND2 8 500 LM319 V3 V1 = -100m V1 V2 = 5m V2 TD = 0.5u TR = 10n 15 V4 TF = 10n PW = 1u -15 PER = 2u 5 0 Comparison Table Measurement Simulation % Error Falling delay time (ns) 50 50.029 0.058 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 6. Input Offset Voltage Characteristics Simulation result Simulation Evaluation Circuit U2 1 14 2 13 3 12 output GND1 OUT 1 4 IN+1 V+ 11 + RL 5 IN-1 IN-2 10 1.4k - - 6 V- IN+2 9 + 7 OUT 2 GND2 8 LM319 V3 V1 V4 0Vdc 15 -15 0 Comparison Table Measurement Simulation %Error Vio(mV) 0.5 0.500642 0.128 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 7. Av Characteristics Simulation result Simulation Evaluation Circuit U2 1 14 2 13 output 3 12 GND1 OUT 1 4 IN+1 V+ 11 + R3 5 IN-1 IN-2 10 - V2 - 1.4k 6 9 V- IN+2 + 0.500642m 7 OUT 2 GND2 8 LM319 V1 V4 V3 0Vdc 15 -15 0 Av = 24.918 / 624.633u Comparison Table Measurement Simulation %Error Av (V/mV) 40 39.892 -0.270 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
- 8. Input Bias Current Characteristics Simulation result Ib IIO Evaluation Circuit U1 1 14 2 13 3 12 GND1 OUT 1 4 IN+1 V+ 11 + 5 IN-1 IN-2 10 - - 6 V- IN+2 9 + 7 OUT 2 GND2 8 V4 LM319 V1 V2 V3 0Vdc 0Vdc -15 15 0 Comparison Table Measurement Simulation % Error Ib (nA) 150 150.059 0.039 IIO (nA) 20 19.952 -0.240 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004