![BASIC LOGIC INSTRUCTIONS
Logical instructions :AND, OR, NOT, XOR
AND – Logical AND
Syntax:
AND Dest, Source ; Dest <- (Dest) & (Source)
Affected Flag: OF,SF,ZF,PF,CF
Examples:
AND BH, CL
AND AL,F1H
AND BX,3135H
AND CX,DX
AND AX,[DI]
- AND clears bits of a binary number - called masking
- An ASCII number can be converted to BCD by using AND to mask off the leftmost
four binary bit positions.
E.g. MOV BX,3135H ; BH=31H, BL=35H
AND BX,0F0FH ; BH= 01, BL=05H
3](https://image.slidesharecdn.com/logicinstructionspart1-200417130924/85/Logic-instructions-part-1-3-320.jpg)
![OR – Logical OR
Syntax:
OR Dest, Source ; Dest <- (Dest) | (Source)
Affected Flag: OF,SF,ZF,PF,CF
Examples:
OR BH, CL
OR AL,F1H
OR BX,3135H
OR SI,DX
OR DX,[BX]
56H = 0101 0110
0FH = 0000 1111
5FH = 0101 1111
- OR instruction is used to set a particular bit in a register to 1(BitSetting).
4](https://image.slidesharecdn.com/logicinstructionspart1-200417130924/85/Logic-instructions-part-1-4-320.jpg)
![XOR - Exclusive-OR
Syntax:
XOR Dest, Source; Des <- (Dest) Ꚛ (Source)
Examples:
XOR BH, CL
XOR SI,BX
XOR DX,[SI]
XOR CX,1000h
Affected Flag: OF,SF,ZF,PF,CF
- A common use for the Exclusive-OR instruction is to clear a register to zero
5](https://image.slidesharecdn.com/logicinstructionspart1-200417130924/85/Logic-instructions-part-1-5-320.jpg)
Logic instructions part 1
- 1. Microprocessor & its Applications Module 3 Continued…… Dr. Girisha G S Dept. of CSE SoE, DSU, Bengaluru 1
- 2. Agenda • Logical Instructions - AND, OR. XOR, NOT, NEG • Shift Instructions - SHL, SHR, SAR 2
- 3. BASIC LOGIC INSTRUCTIONS Logical instructions :AND, OR, NOT, XOR AND – Logical AND Syntax: AND Dest, Source ; Dest <- (Dest) & (Source) Affected Flag: OF,SF,ZF,PF,CF Examples: AND BH, CL AND AL,F1H AND BX,3135H AND CX,DX AND AX,[DI] - AND clears bits of a binary number - called masking - An ASCII number can be converted to BCD by using AND to mask off the leftmost four binary bit positions. E.g. MOV BX,3135H ; BH=31H, BL=35H AND BX,0F0FH ; BH= 01, BL=05H 3
- 4. OR – Logical OR Syntax: OR Dest, Source ; Dest <- (Dest) | (Source) Affected Flag: OF,SF,ZF,PF,CF Examples: OR BH, CL OR AL,F1H OR BX,3135H OR SI,DX OR DX,[BX] 56H = 0101 0110 0FH = 0000 1111 5FH = 0101 1111 - OR instruction is used to set a particular bit in a register to 1(BitSetting). 4
- 5. XOR - Exclusive-OR Syntax: XOR Dest, Source; Des <- (Dest) Ꚛ (Source) Examples: XOR BH, CL XOR SI,BX XOR DX,[SI] XOR CX,1000h Affected Flag: OF,SF,ZF,PF,CF - A common use for the Exclusive-OR instruction is to clear a register to zero 5
- 6. NOT - Logical NOT Syntax: NOT Dest; Affected Flag: None Examples: NOT AL ; AL← Complements AL ; Before: AL=5CH=0101 1100 ; After : AL=93H=1010 0011 NOT CH ; CH is one’s complemented NOT TEMP ; The contents of data segment memory location TEMP is one’s complemented NEG - Negate - NEG two’s complements a number. Syntax: NEG Dest; Examples: NEG DL ;DL is 2’s complement. Assume Before Execution DL=03H =0000 0011 ; After Execution DL= FDH = 1111 1101 NEG BX Affected Flag: None 6
- 7. Shift Instructions: SHL, SHR, SAR SHL/SAL – Shift Logical/Arithmetic Left Syntax: SHL Dest, Count; Examples: SHL AL,1 ; AL is logically shifted left 1 place ; Before: AL=03H ; After ; AL= 06H SHL BL,CL - A shift left always multiplies by 2 for each bit position shifted CF CF LSB MSB 7
- 8. SHR – Shift Logical Right Syntax: SHR Dest, Count; Examples: SHR AL,1 ; AL is logically shifted right 1 place ; Before: AL=04H ; After: AL=02H SHR BL,CL - a shift right always divides by 2 for each position 8
- 9. SAR – Shift Arithmetic Right Syntax: SAR Dest, Count; Examples: SAR AL,1; AL is shifted right 1 place ; Before: AL=04H ; After: AL=02H SAR BL,CL 9
Editor's Notes
- #4: This instruction ANDs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed. The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and the destination cannot both be memory locations. The AND operation is used for masking.We can set a particular bit in a register to 0 without changing other bits.
- #5: This instruction ORs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed. The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and destination cannot both be memory locations. OR instruction is used to set a particularbit in a register to 1(BitSetting).
- #6: This instruction Exclusive-ORs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed. The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and destination cannot both be memory locations. XOR is used to complement a particular bits (Bit Complementing).
- #7: The NOT instruction inverts each bit (forms the 1’s complement) of a byte or word in the specified destination. The destination can be a register or a memory location. This instruction does not affect any flag. NOT is a logical inversion. NEG is an arithmetic inversion(2’scomplement) This instruction replaces the number in a destination with its 2’s complement. The destination can be a register or a memory location. It gives the same result as the invert each bit and add one
- #8: SAL and SHL are two mnemonics for the same instruction. This instruction shifts each bit in the specified destination some number of bit positions to the left. As a bit is shifted out of the LSB operation, a 0 is put in the LSB position. The MSB will be shifted into CF. If you want to shift the operand by one bit position, you can specify this by putting a 1 in the count position of the instruction. For shifts of more than 1 bit position, load the desired number of shifts into the CL register, and put “CL” in the count position of the instruction.
- #9: This instruction shifts each bit in the specified destination some number of bit positions to the right. As a bit is shifted out of the MSB position, a 0 is put in its place. The bit shifted out of the LSB position goes to CF.
- #10: SAR: This instruction shifts each bit in the specified destination some number of bit positions to the right. As a bit is shifted out of the MSB position, a copy of the old MSB is put in the MSB position. In other words, the sign bit is copied into the MSB. The LSB will be shifted into CF.