Msp 430 architecture module 1

 Small Microcontrollers:
 Microprocessor – digital processor, ALU,
Associated registers.
 Earliest devises Intel 4004 and Texas
Instruments TMS1000- beginning of 10970s.
 In modern microprocessors need huge heat
sinks and fans – can draw over 100A of
current.
 The reduction in power dissipation is a major
thrust of current development.

 A microprocessor need many other
components to support it.
 So, trend was to integrate as many functions
as possible on to the same chip as the
processor.
 This give rise to Microcontroller.
 Contains Digital functions like – timers,
analog functions.
 lets consider about small microcontrollers

 Small MC cannot be defined precisely
 Can process 8 or 16 bit of data.
 16 bit address bus.
 Can address 64KB of memory.
 Designed for low power and low cost.
 Packaged with 6 to over 100 pins.
1. Modern microprocessor cannot be used without
OS like linux, MacOS, or Windows.
2. But small microcontrollers always run directly
on hardware without any additional support.
3. That’s the reason microcontrollers are used in
real time systems.

 The switches on the front panel are usually on–off buttons, which provide
digital inputs to the MCU. On the other hand, there might be some knobs
that offer continuous adjustment of the temperature or spin speed, in
which case the MCU must also handle an analog input.
 Some sensors, such as one to check that the door is closed, also give
digital inputs.
 Other sensors, such as those that measure the temperature and level of
the water, require analog inputs.
 The front panel has some sort of display. This may be something very
simple, such as a few light-emitting diodes (LEDs), which need only a
digital output (on or off). Numerical seven-segment displays are also
simple to drive, although they may be multiplexed to reduce the number
of connections needed. On the other hand, specialized hardware is
needed for a liquid crystal display (LCD), which may be either in the
microcontroller or built into the display itself.
 Some components inside the washing machine, such as the valves for
water, need only to be switched on or off. They can therefore be driven
from a digital output, although additional components may be needed to
provide the voltage and current needed by the valves.
 In other cases, it appears that the output can be varied continuously. For
example, the motor rotates slowly for washing and through a range of
increasing speeds for spinning. This appears to need an analog output,
but in practice, this is simulated using pulse-width modulation (PWM).

 We are now in a position to set out the
functions required inside a practical micro-
controller. The following features, shown in
Figure 1.2, are essential.
 Central processing unit:
 Arithmetic logic unit (ALU), which performs
computation.
 Registers needed for the basic operation of
the CPU, such as the program counter (PC),
stack pointer (SP), and status register (SR).

 Further registers to hold temporary results.
 Instruction decoder and other logic to control
the CPU, handle resets, and interrupts, and so
on.
 Memory for the program: Nonvolatile (read-
only memory, ROM), meaning that it retains
its contents when power is removed.

 Memory for data: Known as random-access
memory (RAM) and usually volatile.
 Input and output ports: To provide digital
communication with the outside world.
 Address and data buses: To link these
subsystems to transfer data and instructions.
 Clock: To keep the whole system
synchronized. It may be generated internally
or obtained from a crystal or external
source; modern MCUs offer considerable
choice of clocks.

 The time at which transitions occur on an
input can be recorded.
 Outputs can be driven on and off
automatically at a specified frequency.
 They provide a regular “tick” that can be
used to schedule tasks in a program.

 Watchdog timer
 Communication interfaces
 Non-volatile memory for data
 Analog-to-digital converter
 Digital-to-analog converter
 Real-time clock
 Monitor, background debugger, and
embedded emulator

 The processor communicates with these
peripherals by reading from, and writing to,
particular addresses in memory.
 These memory locations are called special
function registers or peripheral registers to
distinguish them from ordinary memories,
which simply store data.

 Memory lies at the heart of any computer.
 Each location can typically store 1 byte (8
bits or 1 B) of data and is often called a
register.
 Memory is linked to the CPU by buses for
data, address, and control.
 The number of wires in a bus defines its
width, and processors are commonly
characterized by width of the data bus.
 For example, an 8-bit processor has a data
bus of this width and most operations in its
CPU use 8 bits

 The address bus need not have the same
width as the data bus and is often wider; an
8-bit address bus would only carry 28 = 256
distinct addresses.
 Addresses are always quoted in hexadecimal
(hex) notation, where each digit has a range
of 0–15.

 Volatile
 Uses SRAM – static RAM , one cell of SRAM
contains 6 transistors.
 For DRAM – one cell of DRAM uses 1 transistor.
 Non - volatile
 Masked ROM
 EPROM (electrically programmable ROM)
 OTP (one-time programmable memory)
 Flash memory

 A higher voltage is needed to write to flash
memory than is necessary for normal
operation.
 Flash memory is of course widely used in
portable storage devices—memory cards, USB
drives, and so on—but the technology is
different.
 Microcontrollers use NOR flash, which is
slower to write but permits random access.
NAND flash is used in bulk storage devices
and can be accessed only serially in rows.

Several languages may be used for
programming a small microcontroller:
 Machine code: The binary data that the
processor itself understands.
 Each instruction has a binary value called an
opcode.
 The contents of memory are shown in the
debugger and machine code is included in
the “disassembly”
 Disassembly is the opposite process to
assembly, the translation of machine code to
assembly language.

 Assembly language: Little more than
machine code translated into English.
 The instructions are written as words called
mnemonics rather than binary values.
 A program called an assembler translates
the mnemonics into machine code.
 Most programming of small microcontrollers
was done in assembly language until.
 Now the compilers are better and modern
processors are designed with compilers in
mind.

 A compiler translates C into machine code that the
CPU can process.
 This brings all the power of a high-level language—
data structures, functions, type checking and so
on—but C can usually be compiled into efficient
code.
 Compilation used to go through assembly language
but this is now less common and the compiler
produces machine code directly.

 An object-oriented language that is widely
used for larger devices.
 A restricted set can be used for small
microcontrollers but some features of C++
are notorious for producing highly inefficient
code.
 Java is another object-oriented language,
but it is interpreted rather than compiled
and needs a much more powerful processor.

 Ex:Parallax Stamp
 The usual BASIC language is extended with
special instructions to drive the peripherals.
 This enables programs to be developed very
rapidly, without detailed understanding of
the peripherals.
 Disadvantages are that the code often runs
very slowly and the hardware is expensive if
it includes an interpreter.

 The MSP430 was introduced in the late 1990s,
although its ancestry goes back to the 4-bit
TSS400.
 It is 16-bit processor with a von Neumann
architecture, designed for low-power
applications.
 The CPU is often described as a reduced
instruction set computer (RISC).
 Address bus = 16 Bit.
 Data bus = 16Bit
 Register = 16 bits, can be used interchangeably
for either data or addresses.

 Another feature of the MSP430 that stems
from its recent introduction is that it is
designed with compilers in mind.
 Its more powerful siblings include the TMS470,
which is based on the 32/16-bit ARM7, and the
C2000, which incorporates a digital signal
processor.

 The CPU is small and efficient, with a large
number of registers.
 It is extremely easy to put the device into a low-
power mode. Controlled by bit in status register.
 There are several low-power modes, depending
on how much of the device should remain active
and how quickly it should return to full-speed
operation.
 There is a wide choice of clocks. Typically, a low-
frequency watch crystal runs continuously at 32
KHz and is used to wake the device periodically.

 The CPU is clocked by an internal, digitally
controlled oscillator (DCO), which restarts in less
than 1 ms in the latest devices.
 A wide range of peripherals is available, many of
which can run autonomously without the CPU for
most of the time.
 Many portable devices include liquid crystal
displays, which the MSP430 can drive directly.
 Some MSP430 devices are classed as application-
specific standard products (ASSPs) and contain
specialized analog hardware for various types of
measurement.

 MSP430x1xx: Processing signals, broad
peripherals, hardware multiplier, 20–64 pins.
 MSP430F2xx: CPU runs in 16MHz, 14 pins,
16-bit sigma–delta ADC.
 MSP430x3xx: Drivers for LCDs
 MSP430x4xx:drive LCDs with up to 160
segments, 48–113 pins.
 MSP430X:The original MSP430 architecture,
The devices are included in the MSP430F2xx
and MSP430F4xx families ,

 The letters MSP stand for mixed signal
processor
 There is a selection of analog-to-digital
converters with a resolution of up to 16 bits.
 Example of a system where this choice is
important is the weighing machine shown in
Figure 1.4,

 The pin-out shows which interior functions are
connected to each pin of the package.
 The F2013 is available in a traditional 14-pin
plastic dual-in-line package (PDIP) with pins 0.
 plastic small-outline thin package (TSSOP). This
has a similar shape but is a surface-mount device
with pins 0.65 mm (about 0.025 ) apart.
 tiny, quad flatpack no-lead (QFN) package,
which is about 4 mm square with pads 0.65 mm
apart.
 The pin-out for the PDIP and TSSOP packages is
shown in Figure 2.1.

 VCC and VSS are the supply voltage and ground
for the whole device (the analog and digital
supplies are separate in the 16-pin package).
 P1.0–P1.7, P2.6, and P2.7 are for digital
input and output, grouped into ports P1 and
P2.
 TACLK, TA0, and TA1 are associated with
Timer_A; TACLK can be used as the clock
input to the timer, while TA0 and TA1 can be
either inputs or outputs. These can be used
on several pins because of the importance of
the timer.

 A0−, A0+, and so on, up to A4±, are inputs to the
analog-to-digital converter. It has four
differential channels, each of which has negative
and positive inputs. VREF is the reference
voltage for the converter.
 ACLK and SMCLK are outputs for the
microcontroller’s clock signals. These can be
used to supply a clock to external components or
for diagnostic purposes.
 SCLK, SDO, and SCL are used for the universal
serial interface, which communicates with
external devices using the serial peripheral
interface (SPI) or inter-integrated circuit (I2C)
bus.

 XIN and XOUT are the connections for a
crystal, which can be used to provide an
accurate, stable clock frequency.
 RST is an active low reset signal. Active low
means that it remains high near VCC for
normal operation and is brought low near VSS
to reset the chip. Alternative notations to
show the active low nature are _RST and
/RST.
 NMI is the nonmaskable interrupt input,
which allows an external signal to interrupt
the normal operation of the program.

 NMI is the nonmaskable interrupt input,
which allows an external signal to interrupt
the normal operation of the program.
 TCK, TMS, TCLK, TDI, TDO, and TEST form
the full JTAG interface, used to program and
debug the device.
 SBWTDIO and SBWTCK provide the Spy-Bi-
Wire interface, an alternative to the usual
JTAG connection that saves pins.

 One of the first tasks in a program for a
microcontroller is to configure the functions
of each pin. All the pins can be used by a
program except VCC and VSS for power and
TEST/SBWTCK, which is reserved for
debugging.
 Figure 2.2 shows a block diagram of the
F2013. These are its main features:

 Most devices now work from lower voltages
and a range of 1.8–3.6 V is specified for the
F2013. The performance of the device
depends on VCC.
 For example, it is unable to program the
flash memory if VCC < 2.2 V and the maximum
clock frequency of 16 MHz is available only if
VCC ≥ 3.3 V.

 The memory address bus is 16 bits wide so
there are 216 = 65,536 = 64 K = 0x10000
addresses.
 The first address is 0, like arrays in C, so the
range is 0x0000 to 0xFFFF.
 There are no connections for bringing the
buses outside the chip to attach external
memory.
 Nor is there any provision for increasing the
amount of memory in the MSP430 by
selecting banks or pages,

 Little-endian ordering: The low-order byte
is stored at the lower address and the high-
order byte at the higher address. This is used
by the MSP430 and is the more common
format.
 Big-endian ordering: The high-order byte is
stored at the lower address. This is used by
the Freescale HCS08, for instance.

 Figure 2.4 shows the memory map of the
F2013.
 Most MSP430 devices have a similar memory
map, differing only in the size of the regions
for RAM and code.
 Most devices have ranges of addresses that
are not used, meaning that there are no
registers at such addresses. These are shown
in gray in Figure 2.4.
 In fact the largest regions are unused in
devices with small memories, including this
one.

 Special function registers
 Peripheral registers with byte access and
peripheral registers with word access
 Random access memory
 Bootstrap loader
 Information memory
 Code memory
 Interrupt and reset vectors

 The range of addresses has been extended
from 64 KB to 1 MB in the MSP430X.
 This means that addresses require 20 bits
rather than 16 and the MAB is therefore 4
bits wider.
 The bottom 64 KB of memory from 0x00000
to 0x0FFFF is laid out in exactly the same
way as in the original MSP430.
 The additional memory, from 0x10000 to
0xFFFFF, is available for additional ROM.
 This permits larger programs and tables to be
stored.

 Executes the instructions stored in memory.
 It steps through the instructions in the sequence
in which they are stored in memory until it
encounters a branch or when an exception
occurs (interrupt or reset).
 It includes the arithmetic logic unit (ALU), which
performs computation, a set of 16 registers
designated R0–R15 and the logic needed to
decode the instructions and implement them.
 The CPU can run at a maximum clock frequency
fMCLK of 16 MHz in the MSP430F2xx family and
some newer MSP430x4xx devices, and 8 MHz in
the others.
 It is built using static logic, which means that
there is no minimum frequency of operation

 This contains the address of the next instruction
to be executed—“points to” the instruction in
the usual jargon. Instructions are composed of 1–
3 words, which must be aligned to even
addresses, so the lsb of the PC is hardwired to 0.
 The usual cycle of execution is that the contents
of the PC are placed on the address bus and the
next instruction is fetched from this address.
The value in the PC is automatically increased by
2 after each fetch so that it is ready for the next
word.
 Subroutines and interrupts also modify the PC
but in these cases the previous value is saved on
the stack and restored later.

 When a subroutine is called the CPU must jump
to the subroutine, execute the code there, and
finish by returning to the instruction after the
call.
 It must therefore keep track of the contents of
the PC before jumping to the subroutine so that
it can return afterward. This is done with a
stack, which is also known as a last in–first out
(LIFO) data structure.
 In some processors, such as the PIC16, the stack
is implemented in hardware. This has the
advantage of speed, because the PC can be
copied to the stack in parallel with fetching the
next instruction.

 A serious disadvantage is that the stack
cannot be used for anything other than
return addresses.
 In modern practice the stack is also heavily
used for temporary variables, passing
parameters to subroutines and returning the
result, particularly for compiled languages
such as C.

 The MSP430 is conventional and allocates the
stack in general-purpose RAM.
 The stack pointer holds the address of the
top of the stack. The MSP430 has a last used
or full descending stack, meaning that the SP
contains the address of the most recently
added word.
 The specific addresses are for the F2013 or
another device with 128 B of RAM. Generally,
0x027F should be replaced with the highest
address in RAM. The operation of the stack is
illustrated in Figure 5.2.

 For programs written in C, the compiler
initializes the stack automatically as part of the
startup code, which runs silently before the
program starts, but you must initialize SP
yourself in assembly language.
 The word 0x1234 has been added or pushed on
to the stack.The value of SP is first decreased
by 2 so that it points to the new location on the
stack, then the value is copied to this address.
This is called predecrement addressing.

 The byte 0x56 has been written to the stack. It goes
into the lower byte of the next word, whose upper
byte is wasted. A further word of 0x789A is written
afterward and SP now points to this value.
 A word has been removed, pulled or popped from
the stack into the register R15.
 This retrieves the most recently added value,
0x789A, and copies it into R15.
 The stack pointer is increased by 2 afterward and
now points to the previously added value, the byte
0x56. Effectively the word 0x789A has been removed
from the stack because it is now at a lower address
than SP. The value remains in RAM until further
values are pushed onto the stack, which grows
downward and overwrites the old contents.

 This contains a set of flags (single bits)
shown in Figure 5.3, whose functions fall into
three categories.
 The reserved bits are not used in the MSP430
but some have been taken up in the MSP430X
to extend the length of addresses.
 The status register is known as the condition
code register in some processors.

 The C, Z, N, and V bits are affected by many
of the operations performed by the ALU, but
not all
 carry bit C is to flag that the result of an
arithmetic operation is too large to fit in the
space allocated.
 The zero flag Z is set when the result of an
operation is 0.
 The negative flag N is made equal to the msb
of the result, which indicates a negative
number if the values are signed.
 The signed overflow flag V is set when the
result of a signed operation has overflowed.

 Setting the general interrupt enable or GIE
bit enables maskable interrupts, provided
that the individual sources of interrupts have
themselves been enabled.
 Clearing the bit disables all maskable
interrupts.
 There are also nonmaskable interrupts,
which cannot be disabled with GIE.

 The CPUOFF, OSCOFF, SCG0, and SCG1 bits
control the mode of operation of the MCU.
 All systems are fully operational when all bits
are clear.
 Setting combinations of these bits puts the
device into one of its low-power modes.

 Both R2 and R3 are used to provide the 6
most commonly used constants.
 This saves storing the values in the program
and having to fetch them each time.
 The operation depends on the addressing
modes.

 How do the pins appear to the CPU inside?
 MSP430 in common uses memory-mapped input
and output.
 Ports appear to CPU as Peripheral registers.
 These registers can be read, written, and
modified in almost the same way as simple
registers in RAM.
 For example, you simply read the register P1IN
in the usual way to find the logical values on the
inputs to port P1. Input voltages near ground,
VSS, give a logical 0 while voltages near the
supply, VCC, give a logical 1.

 Port P1 input, P1IN: Reading returns the logical
values on the inputs if they are configured for digital
input and output. This register is read-only. It is also
volatile, which means that it may change at a time
that a program cannot predict. This is of course why
the input port is there, so that the MCU can react to
its surroundings.
 Port P1 output, P1OUT: Writing sends the value to
be driven onto the pin if it is configured as a digital
output. If the pin is not currently an output, the
value is stored in a buffer and appears on the pin if it
is later switched to be an output.
 Port P1 direction, P1DIR: A bit of 0 configures the
pin as an input, which is the default. Writing a 1
switches the pin to become an output.

 Clock is essential for every synchronous digital
system.
 Basically the clock signal is a square wave whose
edges trigger hardware throughout the device so
that the changes in different components are
synchronized.
 Clocks for microcontrollers used to be simple.
 Usually a crystal with a frequency of a few MHz
would be connected to two pins.
 It would drive the CPU directly and was typically
divided down by a factor of 2 or 4 for the main
bus.

 The conflicting demands for high performance
and low power mean that most modern
microcontrollers have much more complicated
clocks, often with two or more sources.
 In many applications the MCU spends most of
its time in a low-power mode until some event
occurs, when it must wake up and handle the
event rapidly.
 It is often necessary to keep track of real time,
either so that the MCU can wake periodically or
to time-stamp external events.

 Therefore, two clocks with quite different
specifications are often needed:
1. A fast clock to drive the CPU, which can be
started and stopped rapidly to conserve
energy but usually need not be particularly
accurate.
2. A slow clock that runs continuously to
monitor real time, which must therefore use
little power and may need to be accurate.

 Accurate and stable. Crystals for microcontrollers
typically run at either a high frequency of a few
MHz to drive the main bus or a low frequency of
32,768 Hz for a real-time clock.
 The disadvantages are that crystals are expensive
and delicate, the oscillator draws a relatively
large current, particularly at high frequency, and
the crystal is an extra component and may need
two capacitors as well.
 Crystal oscillators also take a long time to start
up and stabilize, often around 105 cycles, which is
an unavoidable side effect of their high stability.

 Cheap and quick to start but used to have poor
accuracy and stability.
 The components can be external but are now more
likely to be integrated within the MCU.
 The quality of integrated RC oscillators has
improved dramatically in recent years and the
F20xx provides four frequencies calibrated at the
factory to within ±1%.
 In future with the rise of micro-electro-mechanical
systems (MEMS). It may become possible to
integrate a mechanical resonator on the same
silicon chip as the MCU, which will combine high
accuracy with low power.

 The MSP430 addresses the conflicting demands
for high performance, low power, and a
precise frequency by using three internal
clocks, which can be derived from up to four
sources. These are the internal clocks, which
are the same in all devices:
 Master clock, MCLK, is used by the CPU and a
few peripherals.
 Subsystem master clock, SMCLK, is
distributed to peripherals.
 Auxiliary clock, ACLK, is also distributed to
peripherals.

 Typically SMCLK runs at the same frequency
as MCLK, both in the megahertz range.
 ACLK is often derived from a watch crystal
and therefore runs at a much lower
frequency.
 Most peripherals can select their clock from
either SMCLK or ACLK.

 The MSP430x1xx and MSP430F2xx families:
 ACLK comes from a low-frequency crystal
oscillator, typically at 32 KHz.
 Both MCLK and SMCLK are supplied by an internal
digitally controlled oscillator (DCO), which runs
at about 0.8 MHz in the MSP430x1xx and 1.1 MHz
in the MSP430F2xx.
 Note that ACLK requires an external crystal, No
crystal means no ACLK with most MSP430s.
 MSP430F2xx family include an internal, very low-
power, low-frequency oscillator (VLO) that can
be selected for ACLK if there is no crystal.

 The default MCLK and SMCLK in the MSP430x4xx
family are different but ACLK is the same.
 ACLK comes from a low-frequency crystal
oscillator, typically at 32 KHz.
 MCLK and SMCLK are supplied from the DCO,
which is controlled by a frequency-locked loop
(FLL).
 This locks the frequency at 32 times the ACLK
frequency, which is close to 1 MHz for the usual
watch crystal.

 Interrupts:
 Usually generated by hardware and often indicate that an
event has occurred that needs an urgent response.
 A packet of data might have been received, for instance, and
needs to be processed before the next packet arrives.
 The processor stops what it was doing, stores enough
information (the contents of the program counter and status
register) for it to resume later on and executes an interrupt
service routine (ISR).
 It returns to its previous activity when the ISR has been
completed.
 Thus an ISR is something like a subroutine called by
hardware (at an unpredictable time) rather than software.
 A second use of interrupts, which is particularly important in
the MSP430, is to wake the processor from a low-power state.

 Resets:
 Again usually generated by hardware, either
when power is applied or when something
catastrophic has happened and normal
operation cannot continue.
 This can happen accidentally if the watchdog
timer has not been disabled, which is easy to
forget.
 A reset causes the device to (re)start from a
well-defined state.

 The CPU must be told where to fetch the next
instruction following an interrupt or reset. The
address of this instruction is called a vector.
 The MSP430 uses vectored interrupts.
 Each ISR has its own vector, which is stored at a
predefined address in a vector table at the end of the
program memory (addresses 0xFFC0–0xFFFF).
 The address for each interrupt vector is listed in the
data sheet. The vector table is at a fixed location,
but the ISRs themselves can be located anywhere in
memory.
 There is no need to hunt for the source of the
interrupt in most cases, although a few interrupts
have multiple sources.

 The same method is used for a reset, whose vector is
stored in the very last word of memory at 0xFFFE.
 When a reset occurs, most registers in the device are
loaded with the initial conditions specified in the family
user’s guide.
 The program counter is then loaded with the reset
vector. This is the address of the first instruction, which
is next fetched from memory to start normal operation.
 Thus the first instruction can be stored anywhere in
memory. This is not all the initialization that is needed;
the user’s program must do the rest.
 In particular, the watchdog timer must be configured or
disabled before it times out and resets the device.
 The stack should be initialized if subroutines or
interrupts are used, which applies to all but the most
trivial programs. This is followed by code to configure
the other peripherals used, notably the ports and clock.

 A reset is a sequence of operations that puts
the device into a well-defined state, from
which the user’s program may start.
 This is obviously necessary when power is
first applied. A reset is also generated if the
device detects a serious fault in hardware or
software from which the user’s program
cannot be expected to recover.
 A peculiarity of the MSP430 is that it has two
levels of reset, depending on whether the
reset was caused by hardware or software.

 This is generated by the following severe conditions
related to hardware:
 The device is powered up. More generally, a POR is raised
if the supply voltage drops to so low a value that the
device may not work correctly: a brownout. Powering up
the device is just an extreme case of this. Almost all
current MSP430s include a brownout detector.
 A low external signal on the RST/NMI pin resets the device
if the pin is configured for the reset function rather than
the nonmaskable interrupt. The reset function RST is
active by default.
 Larger variants have a more comprehensive supply voltage
supervisor (SVS). This is configurable, unlike the brownout
detector. It sets the SVSFG flag if the voltage falls below
the programmed level and can optionally reset the device.

 This always follows a power-on reset. It is also generated
when software appears to be out of control in the
following ways:
 The watchdog timer overflows in watchdog mode.
Remember that the watchdog is active by default and must
either be disabled or regularly cleared before it rolls over.
 An attempt is made to write to the watchdog control
register WDTCTL without the correct password 0x5A
(available as the symbol WDTPW) in the upper byte. A
reset is triggered even if the watchdog is disabled or in
interval timer mode.
 The registers for the flash memory controller, FCTLn, are
protected by a password in the same way as WDTCTL. The
value is 0xA5, available as the constant FWKEY. This is to
protect runaway software from corrupting the stored
program.
 In newer devices, a PUC is triggered by an attempt to
fetch an instruction from the range of addresses reserved
for peripheral registers or to read unimplemented memory.

 The initial conditions for all registers and peripherals after a POR and PUC
are specified in the family user’s guides. These are the general effects:
 The RST/NMI pin is configured for reset. It is also used for the two-wire JTAG
interface (Spy-Bi-Wire) in some devices, such as the F2013.
 Most input/output pins are configured as digital inputs. There are a few
exceptions, such as those pins that are shared with the crystal in the F2013.
 Other peripheral modules and registers are initialized as set out in the guide.
The value is shown under each bit in the description of the registers. For
example, rw–0 means that a bit can be both read and written and is
initialized to 0 after a PUC. The slightly different notation rw–(0) shows that
a bit is initialized to 0 only after a POR; it retains its value through a PUC.
 The status register is cleared. This means that the device operates at full
power, even though it might have been in a low-power mode before the reset
occurred.
 The watchdog timer starts in watchdog mode. This is essential because it is a
safety feature but means that you must either service or disable it before it
times out and resets the chip (continually).
 The program counter is loaded with the the reset vector, which is stored in
the word at 0xFFFE. This provides the address of the first instruction to be
executed.

 WDTIFG shows that the watchdog timed out
or its security key was violated.
 OFIFG indicates an oscillator fault (this
causes a nonmaskable interrupt, not a reset).
 RSTIFG shows a reset caused by a signal on
the RST/NMI pin.
 PORIFG is set for a power-on reset.
 NMIIFG flags a nonmaskable interrupt (not reset)
caused by a signal on the RST/NMI pin.

Msp 430 architecture module 1

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Msp 430 architecture module 1