nand2tetris 舊版投影片 -- 第二章 布林算術
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The document discusses Boolean arithmetic and building basic computing components like adders and arithmetic logic units (ALUs) using logic gates. It introduces binary number representation and addition, as well as representing negative numbers. Half adders and full adders are presented as the basic building blocks for adding bits and numbers. An n-bit adder can add two n-bit numbers by chaining together full adders. The ALU is designed to perform basic arithmetic and logical operations on inputs based on control bits, and is a key component in central processing units. The document provides a high-level overview of representing and performing arithmetic at the digital circuit level.
nand2tetris 舊版投影片 -- 第二章 布林算術
- 1. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 1 www.nand2tetris.org Building a Modern Computer From First Principles Boolean Arithmetic
- 2. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 2 Counting systems quantity decimal binary 3quantity decimal binary 3quantity decimal binary 3quantity decimal binary 3----bit registerbit registerbit registerbit register 0 0 000 1 1 001 2 10 010 3 11 011 4 100 100 5 101 101 6 110 110 7 111 111 8 1000 overflow 9 1001 overflow 10 1010 overflow
- 3. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 3 Rationale 192121202021)10011( 01234 =⋅+⋅+⋅+⋅+⋅=two i n i ibnn bxxxx ⋅= ∑= − 0 01 )...( 9038018013010019)9038( 0123 =⋅+⋅+⋅+⋅=ten
- 4. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 4 no overflow overflow Algorithm: exactly the same as in decimal addition Overflow (MSB carry) has to be dealt with. Binary addition Assuming a 4-bit system: 0 0 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 ++++ 1 1 1 1 1 0 1 1 0 1 1 1 1 0 0 1 0 ++++
- 5. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 5 Representing negative numbers (4-bit system) The codes of all positive numbers begin with a “0” The codes of all negative numbers begin with a “1“ To convert a number: leave all trailing 0’s and first 1 intact, and flip all the remaining bits 0 0000 1 0001 1111 -1 2 0010 1110 -2 3 0011 1101 -3 4 0100 1100 -4 5 0101 1011 -5 6 0110 1010 -6 7 0111 1001 -7 1000 -8 Example: 2 - 5 = 2 + (-5) = 0 0 1 0 + 1 0 1 1 1 1 0 1 = -3
- 6. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 6 Building an Adder chip Adder: a chip designed to add two integers Proposed implementation: Half adder: designed to add 2 bits Full adder: designed to add 3 bits Adder: designed to add two n-bit numbers. out a 16 16-bit adder b 16 16
- 7. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 7 Half adder (designed to add 2 bits) Implementation: based on two gates that you’ve seen before. half adder a sum b carry a b sum carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
- 8. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 8 Full adder (designed to add 3 bits) Implementation: can be based on half-adder gates. a b c sum carry 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 fu ll ad d er a sum b carry c
- 9. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 9 n-bit Adder (designed to add two 16-bit numbers) Implementation: array of full-adder gates. out a 16 16-bit adder b 16 16 ... 1 0 1 1 a … 0 0 1 0 b … 1 1 0 1 out ++++
- 10. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 10 The ALU (of the Hack platform) half adder a sum b carry full ad der a sum b carry c out x 16 16-bit adder y 16 16 zx no zr nx zy ny f ALU ng 16 bits 16 bits x y 16 bits out out(x, y, control bits) = x+y, x-y, y–x, 0, 1, -1, x, y, -x, -y, x!, y!, x+1, y+1, x-1, y-1, x&y, x|y
- 11. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 11 ALU logic (Hack platform) Implementation: build a logic gate architecture that “executes” the control bit “instructions”: if zx==1 then set x to 0 (bit-wise), etc.
- 12. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 12 The ALU in the CPU context (a sneak preview of the Hack platform) ALU Mux D out A/M a D register A register A M c1,c2, … ,c6 RAM (selected register)
- 13. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 13 Perspective Combinational logic Our adder design is very basic: no parallelism It pays to optimize adders Our ALU is also very basic: no multiplication, no division Where is the seat of more advanced math operations? a typical hardware/software tradeoff.
- 14. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 14 Historical end-note: Leibnitz (1646-1716) “The binary system may be used in place of the decimal system; express all numbers by unity and by nothing” 1679: built a mechanical calculator (+, -, *, /) CHALLENGE: “All who are occupied with the reading or writing of scientific literature have assuredly very often felt the want of a common scientific language, and regretted the great loss of time and trouble caused by the multiplicity of languages employed in scientific literature: SOLUTION: “Characteristica Universalis”: a universal, formal, and decidable language of reasoning The dream’s end: Turing and Gödel in 1930’s. Leibniz’s medallion for the Duke of Brunswick