PCBA DFM

iPCB Circuits Limited www.ipcb.com
SMT PCB/Panel layout
PCBA Team
2019-03-22
www.ipcb.com

PCB Design Guideline
www.ipcb.com

Revision record
Rev.
Date Change Description
0 2019/4/17 New release
www.ipcb.com

Purpose
l Based on the requirements of production process , In the layout and
circuit board design process , There is a standard to follow , To
achieve high efficiency in the production of assembly , Easy
assembly, low cost, and high quality target.
l The content is only applicable to the related database, some are for
reference only .
www.ipcb.com

content
l PCB layout rules
l Text marking for silkscreen layer
l PCB Fiducial Mark design
l PCB fixed position hole
l SMT component PAD design
l PTH component PAD design
l Through-hole(Via)design
l Trace design
l other limitation
www.ipcb.com

PCB layout rules
l V-Cut layout rule :
l Chips to V-Cut line should be more than 1mm, otherwise will damage chips
or will change to use Stamp Cut design , will add the PCB cost
≥1mm
Chips
Chips
≥1mm
V-CUT
l The distance to PCB edge 0.5mm, can not layout the trace, The distance
to PCB edge 1.0mm, can not layout the any component
l The distance to PCB edge 5mm, can not layout the components height over
25mm, otherwise cuter will damage components
V-CUT
25mm
5c
mm
De-panel Cuter
PCB V-CUT
PCB
www.ipcb.com

PCB layout rules
l V-Cut layout rules :
l PCB trace to V-Cut should be more then S=0.5mm safety buffer, otherwise
will have the risk to damage the trace.
•S
•T •H
lWhen we use V-Cut
l PCB thickness 1.0mm to 3mm(1.0mm to 0.5mm + SMT pallet)
l PCB outline is square type or rectangle type, irregular shape can not
use the V-Cut
Stamp Cut
irregular shape
www.ipcb.com

PCB layout rules
l Stamp design :
l Stamp design only for irregular PCB, PCB to PCB layout distance is 2mm, V-
Cut only 0.3mm
Stamp Cut
Stamp
Cut
l Stamp design parameters
1.5mm
2.0mm
5.0mm
2.8mm
0.4mm
NPTH hole 1.0mm
PCB
PCB
1.5mm
2.0mm
5.0mm
0.4mm
NPTH hole1.0mm
conveyor edge
PCB
www.ipcb.com

PCB layout rules
l V-Cut VS Stamp layout :
l PCS to PCS distance only 0.3mm for V-Cut, we can save the PCB layout cost
l Stamp Cut design, PCB PCS to PCS distance is 2mm
l Base on same PCS design with different Cut type( stamp/V –Cut), the PCB cost
will impact 10- 25%
l V-Cut PCB will be cut by machine, but Stamp Cut will broken by OP and have
stress then damage the components
V-Cut machine
www.ipcb.com

PCB/panel layout
l Why don’t choose single PCB for SMT process :
l We need to put the each single PCB on carrier when do SMT process
l But carrier cave and single PCB have tolerance , so always happen solder
paste printing misalignment then will get the shift/tombstone process issue
l Sometimes will happen single PCB lift up from SMT carrier and will have the
chips mounting shift/missing process issues
PCB
Printer Mounter AOI
SPI
/VI
Reflow oven
Assembly Flow
Put the single PCB
on the carrier
www.ipcb.com

PCB/panel layout
l Factors of impact PCB Cost
l PCB layout
l Fine pitch components
l Panel V-Cut/Stamp Cut/PCB conveyor edge size
l PCB drill hole size/quantity
l PCB material cost
l PCB process easy/complicated , process spec
l PCB process easy/complicated , process spec
l PCB surface finished process also impact cost, OSP/IMS/EING/IMT
l PCB outline, regular shape is cheaper than irregular shape ,
www.ipcb.com

Text marking for silk layer
The current situation:
l We received the gerber file for UK design team ,no silk layer be
found
l We can not directly confirm Polarity of component on the PCB , can
not confirm the location of component ,easily to confirm IC shift or
not .
l In the production adjustment X, Y coordinate and confirmation the
location completely rely on engineering drawings ,Big waste of time.
No silk layers in the gerber file No text mark on the pcb
www.ipcb.com

l As the icon text marking design we can accept . We can quickly inspection
location where there are problems.
silkscreen Text marking
www.ipcb.com

Component outline& polarity marking design definition:
l Text marking, keep away from Via Hole or Through Hole as far as possible
l Text marking , Silk screen printing character, polarity and polarity signs
can not components be covered
l Text height≥25 mil ,line width ≥5 mil
l Beside the BGA/CSP ,component outline should not smaller than actual
component size.
l The text does not overlap
l The text does not overlap
l SMD/PTH component text marking include body outline , pin
assignment ,component name ,polarity marking .as below:
www.ipcb.com

l Component outline& polarity marking
a.Tantalum capacitor or diode ﹝3 PIN﹞
b.SOP/SSOP
b.SOP/SSOP
c. QFP
www.ipcb.com

l Component outline& polarity marking
d. QFN
e. BGA, CSP marking
-. outline size must the same as actual component
www.ipcb.com

l PCB number and version
(i) PCB Model
(ii) PCB Part number and version
(iii) text height : 80mil
The PCB number is described as follows: the last two codes (06, 07) in AD year
The new PCB must be attached with the board number and - SA (sample a)
version. The later modified versions are - SB, - SC, or - 1A, - 1B, - 1C... In order. In
mass production, the versions must be - 1, - 2, - 3, etc
www.ipcb.com

PCB Fiducial Mark design
l The current situation: Many projects did not design
fiducial mark-in, the machine can not recognize to
position, cause no high precision print/mounted
www.ipcb.com

PCB Fiducial Mark design
D d= 1.0mm
d
•≥4.0mm
L
Mark out
Mark in
D
D=3.0mm
d
•H≥L＋5.0mm
H
l Three fiducial mark-out located diagonally on board, and do follow related
dimension requirement . fiducial mark dimension is 1mm(d) and solder mask is
3mm(D) . The diagonal fiducial mark should not be symmetrical, it should be
keep away at 5 mm.
l Fiducial PAD edge keep 4mm distance from the edge of PCB
lSingle board must have two fiducial mark –in located diagonally on the board.
www.ipcb.com

PCB fixed position hole
l Tooling holes on all boards are called out with correct dimensions,
tolerances, and are non-plated. ( 3.55mm +0.075/-0 or 2.18mm +0.05/-0.05)
l There should be 3.81 mm arc located at 4 corners of PCB to avoid stuck at
conveyor and damage of packing material.
Uniform fixed hole size and
convenient tool for positioning
Tooling holes
3.81 mm arc
www.ipcb.com

l NG symptom: 0402 chip tombstone
l For example: D500+ FN700054 chip 0402 chip tombstone defect rate:1.0%
l NG picture:
SMT component PAD design
l Analysis: PAD to PAD space is too big caused the tombstone after IR .
PAD to PAD : 16mil
PAD to PAD : 22mil
www.ipcb.com

l Non specifications within RLC Pad design according to the
following principles
(i) B= max of W1, to prevent the shift
(ii) C=10 + H(electrode width) + 15 mil
(iv) restricted area L2: A+10mil ,W2=max: (" W1 + 8 + max of tolerance" , "
B + 10 ")
www.ipcb.com

22 x 22 mil
4mil fillet
12 mil
57 mil
8
36
14 mil
12mil
2mil fillet
0201 PAD design
0402 PAD design
Note: besides the chip 0201/0402,the rest of
database is for reference only
TYPE
Body Size(mil) Component body
tolerance(mm)
Pad Size(mil）
L1 W1 A B C D
0201(0603) 24 12 ±0.03 36 12 14 8
0402(1005) 40 20 ±0.05 56 22 22 12
0603(1608) 63 32 ±0.1 83 40 31 21
0805(2125) 79 50 ±0.2 103 61 37 29
1206(3216) 123 63 ±0.25 160 73 50 60
1210(3225) 123 101 ±0.2 171 110 55 61
2010(5025) 197 99 ±0.25 230 110 45 140
2512(6432) 252 126 ±0.25 290 138 70 150
ref. L2=A + 10；W2=max: (" W1 + 8 + max of tolerance " , " B + 10 ")
(1) Resistance and inductance components size list unit: mil
www.ipcb.com

TYPE
tolerance
Pad Size(min) Placement Size area
(2) capacitance component size list
Note: besides the chip 0201/0402,the
rest is for reference only
unit: mil
TYPE
tolerance
(mm)
Pad Size(min) Placement Size area
L1 W1 A B C D L2 W2
0201(0603) 24 12 ±0.03 36 12 14 8 51 22 1122
0402(1005) 40 20 ±0.05 56 22 22 12 75 34 2550
0402(1005) 40 20 ±0.1~0.2 60 28 24 12
0603(1608) 63 32 ±0.2 83 40 31 21 105 46 4830
0805(2125) 79 50 ±0.25 103 61 37 29 140 76 10640
1206(3216) 126 63 ±0.3 160 73 50 60 182 86 15652
1210(3225) 126 99 ±0.3 171 110 55 61 190 130 24700
1808(4520) 189 80 ±0.3 210 90 50 110 230 120 27600
1812(4532) 182 126 ±0.3 207 136 60 87 237 166 39342
ref. L2=A + 10；W2=max: (" W1 + 8 + max of tolerance " , " B + 10 ")
www.ipcb.com

TYPE
Body Size Pad Size
Placement Size
area
L1 W1
A B C D
L2 W2
3216 124 66 176 66 50 76
227 112 25424
3528 142 113 240 90 90 60
283 164 46412
6032 380 180 68400
(3) STC3216~7343
unit: mil
6032 232 130 334 105 90 154
380 180 68400
7343 282 173 338 95 90 158
390 200 78000
ref.
L2=A + 30；W2=component body width+ 20；D=A - 2 x C;
Note : No chips component that size below 0603 located beside 7347 and 6032
tantalum capacitor within 2.6mm pad to pad distance. If un-avoidable, the chip
components should be vertical with the tantalum capacitor.
www.ipcb.com

(4)Electrolysis capacitor parts size list
TYPE
Body Size Pad Size Placement Size
L1 W1 a b c L2 W2
SE3116 8.0 6.3 3.1 1.6 2.2 9.4 7.0
SE2811 6.3 5.0 2.8 1.6 1.4 8.0 5.7
SE2716 6.0 5.0 2.7 1.6 1.4 7.8 5.7
SE2516 5.5 4.0 2.5 1.6 1.0 7.0 4.7
unit:mm
www.ipcb.com

(5)Diode-3PIN
TYPE
Body Size Pad Size Placement Size
L1 W1 a1 a2 b c d e L2 W2
SOT-23 48 40 40 120 40 136 136 156
Diode-3PIN 48 40 40 120 40 136 136 156
ref. W2=e+20 , L2=max(c+16; L1+16)
unit: mil
e = E+30
d = D+6
b = B-A2-6
a1 = (e-d) / 2
a2 =A2+6
D
A1
A2
E
B
A1
8mil R角
A3 a3 =A3+6
www.ipcb.com

(6) Connector pin for Single side
Pitch, b Body Size Pad Size Placement Size
(mm) (mil) L1 W1 a c L2 W2
0.5 19.685 12 A+30 L1+30 W1+50
unit: mil
0.5 19.685 12 A+30 L1+30 W1+50
0.635
0.650
25.00
25.59
14 A+30 L1+30 W1+50
>0.65 >25.59 B+4 A+30 L1+30 W1+50
Note
* If the component pitch be defined by the metric unit , In English units should be
considered for the calculation of the cumulative error of Pitch
*The distance between connectors should at least have 2mm space from the outline
edge of the Pad or Body.
*For component higher than 5mm, need to keep same distance/clearance on pcb
surface free from component to avoid shadow effect and causing AOI limiation.
*The distance between smd type connector and chip should at least have 2mm
space from the outline edge of the Pad or Body.
*Boss pin hole size (NPTH) = Connector boss size + 0.15 mm
www.ipcb.com

(mm) (mil) L1 W1 a c d L2 W2
0.5 19.685 12 A+30 W1+40 L1+30 d+30
0.635 25.00
14 A+30 W1+40 L1+30 d+30
(7)Connector pin for two side
unit: mil
0.635
0.650
25.00
25.59
14 A+30 W1+40 L1+30 d+30
>0.65 >25.59 B+4 A+30 W1+40 L1+30
d+30
Note
* If the component pitch be defined by the metric unit , In English units should
be considered for the calculation of the cumulative error of Pitch
*The distance between connectors should at least have 2mm space from the
outline edge of the Pad or Body.
*For component higher than 5mm, need to keep same distance/clearance on
pcb surface free from component to avoid shadow effect and causing AOI
limiation.
*The distance between smd type connector and chip should at least have 2mm
space from the outline edge of the Pad or Body.
www.ipcb.com

(8)IC types
a. SSOP, SOP
Type
(mm) (mil) L1 W1 a c d W2 L2
SSOP 0.4 15.748 8
60 W1+30 d+30 L1+20
SSOP 0.5 19.685 12
SSOP 0.635 25
14
SSOP 0.65 25.59
SSOP 0.8 31.496 16
SOP 1.27 50 25
Note
* If the component pitch be defined by the metric unit , In English units
should be considered for the calculation of the cumulative error of Pitch
unit: mil
www.ipcb.com

(8)IC types
b.QFP
unit: mil
Pitch Body Size Pad Size Placement Size
b W1 L1 a c d1 d2 W2 L2
19.485
(0.5mm)
12 60 W1+40 L1+40 d1+20 d2+20
25.59
(0.65mm)
16 90 W1+50 L1+50 d1+20 d2+20
31.496
(0.8mm)
18 90 W1+50 L1+50 d1+20 d2+20
Note
•If the component pitch be defined by the metric unit , In English units should be considered for
the calculation of the cumulative error of Pitch
unit: mil
www.ipcb.com

§ IC types
(9)QFN
unit: mil
Pitch Body Size Pad Size Placement Size
b D E a c d1 d2 L2 W2
19.485
(0.5mm)
12 60
E+40
(On both
sides of the
20 )
D+40
(On both
sides of the
20 )
d1+30 d2+30
25.59
(0.65mm)
14 60
E+40
(On both
sides of the
20 )
D+40
(On both
sides of the
20 )
d1+30 d2+30
Note Ground pad at the bottom of the QFN : A - D2 >= 0.4 mm; B - E2 >= 0.4 mm
unit: mil
www.ipcb.com

– BGA, CSP
W1 W2
L1
a b
L2
L3
W3
L2
a b
(Component Side) (Bottom Side)
Pitch ,b Body Size Pad Size Placement Size
(mm) (mil) L1 W1 a L2 W2
CSP <= 5 mm <= 5mm L1+80 W1+80
BGA > 5mm > 5mm L1+120 W1+120
Note
*Don't overlap with any component.
*Don't put the range of Connector, BGA and other large easy to heat parts.
All of the Via Hole shall be double coverage of solder mask layers
unit: mil
www.ipcb.com

PTH component PAD design
l In order to simplify and improve the printing circuit
welding (soldering) process , The special development of
through-hole reflow technology (Pin-in-Paste) The through-
hole type connector from Dipping process ,change to SMT
printing solder paste and reflow replaced . Place all thru-hole
parts on topside of the board. (Avoid manual soldering process)
l B : aperture size≧pin diameter size +0.25 mm ( 10 mil )
l A : The outer layer of the minimum pad size ≧ aperture size+ 0.36 mm (14
mil )
l According to the manual soldering parts : Pad size (ΦA) = Hole size (ΦB) +
40 mil
www.ipcb.com

l PTH design guideline
l Parts of pin diameter and through the aperture ratio (PH) principle:
Pin to hole rate (ØP / ØH) should fall within 0.6~0.8, shown as diagram:
PH= 0.6~0.8 the best ; PH= 0.4~0.5 Acceptable ; PH < 0.3 not acceptable
ØP
ØH
www.ipcb.com

l If any annular ring of PTH connect with connector or PTH
pad, please add solder mask to isolate each other (width
20mil at least).
As PSU A000116 Design issue, between PAD with Ground no
As PSU A000116 Design issue, between PAD with Ground no
solder mask covered cause the solder bridge /empty solder.
www.ipcb.com

PTH restricted zone:
l For pin in paste process, keep at
least 3mm distance between edge of
hole ring and pad.
lThe distance between the PTH
and chips too is very close when
manual solder has the risk for
broken and solder short .
besides arrange Ops to manual
solder ,no choice, Waste a lot of
manpower and delay output
www.ipcb.com

Through-hole(Via)design
l Via hole under the component body
Via hole under the smt component body ,need to confirm this PCB whether
through wave soldering process ,if so, need to blind and buried via hole.
Otherwise, there will be the risk of overflow from the hole of Via solder.
(1) The normal PAD layout (Within the PAD pins )
‧ Inner band area (10mil) Via Hole can not be placed.
‧ outline band area(10mil) ,Via Hole can not be placed.
www.ipcb.com

l Via hole under the component body
(2) Un-normal PAD layout ( the pin of the component over the PAD )
‧inner band area (A + 10mil ) Via Hole can not be placed
‧outline band area (10mil ) Via Hole can not be placed
Through-hole(Via)design
www.ipcb.com

Trace design
l Power Trace to strengthen
l PAD/Via hole with Trace to junction need to strengthen，the general way
(Power Trace，the rest of type refer to Tear drop design)
www.ipcb.com

Trace design
l Add tear drop
l In the outer trace add tear drop as below icon:
l (1) When the line width is less than 8 mil ,In pad and trace junction with
width of 8 mil and length of 6 mil trace .
l (2) When the line width is more than 8min,do not add Tear Drop
l (3) If the distance is not enough to add a Tear Drop, can be ignored.
www.ipcb.com

Trace design
l Keep symmetric trace design
asymmetric
symmetric
l Trace lead the way
lTrace from the center of the pad
trace
PAD
www.ipcb.com

Trace design
l Trace line and the hole,be recommended in the following.
•Filleting •Corner Entry •Key Holing
www.ipcb.com

Other limitation
l Component placement limitation
Board edge parts restriction (including the process edge size)
(i) In SMT stage, there should be no any component body or pad within 4 mm
along pcb edge that used for conveyor transfer.(as below the upper and the
lower sides), Within 2 mm from pcb edge that vertical to the conveyor. PIP
or PTH component body should not out of pcb edge.
www.ipcb.com

l Component placement limitation
Board edge parts restriction (including the process edge size)
– (ii) In SMT stage, the component height should lower than 2 mm when it
away from pcb edge 4~6mm ( indicated in pink color region).
Other limitation
www.ipcb.com

l Deformation limit
l B/A≤7.5/1000, and the maximum deformation of B must be less than
1.2 mm
l PCB thickness limit: 1 ~ 1.6 ± 0.127 mm or 10%
Other limitation
l PCB substance selection
l The pcb prepreg should meet criteria of Tg ≧145℃.
l The pcb prepreg should meet criteria of Td>320 ℃.
www.ipcb.com

l PIP parts limit
l All of the through hole part must be designed in second to avoid the
use of hand soldering process The first surface is necessary to use
the SMD TYPE part or through hole parts pin and parts body can not
outstand PCB second surface
l The spec of pin out of pcb surface in PIP process :
pin length ≒ PCB thickness + 0.3~0.6 mm
The insert parts in PCB can not tilt, dumping or easy to loose state.
Other limitation
www.ipcb.com

Other limitation
l Choose the component :The use of chip components in the SMT
stage as far as possible, reduce the waste of human action.
PTH parts to SMD
PTH parts to SMD
PTH parts to SMD
PTH parts to SMD
www.ipcb.com

Other limitation
l No trace cutting or jump wires process on mass production
models.
Jump wires
Cut trace
www.ipcb.com

l PCB pad size should be match with the size of components , If the same
parts have different appearance size ,the Layout or according to process
proposals to special Layout, must conform the rule。All of pad design need
to non-solder mask design.
lPassive component pad size
lThe general RLC component： place outline area do not overlap
Do not overlap
Other limitation
www.ipcb.com

l For component higher than 5mm, need to keep same
distance/clearance on pcb surface free from component to
avoid shadow effect and causing AOI limiation.
Other limitation
D = H
www.ipcb.com

Gerber file layers requirement
SMD layer: component PAD , reference this
layer to design stencil aperture
www.ipcb.com

Silk layer: SMD component text
marking include body outline ,
pin assignment ,component
name ,polarity marking
www.ipcb.com

Solder mask layer
www.ipcb.com

Place layer :check the
component location
www.ipcb.com

Drill layer :confirm the through-hole size
whether it match with the component
www.ipcb.com

www.ipcb.com

PCBA DFM

More Related Content

What's hot (20)

Similar to PCBA DFM (20)

Recently uploaded (20)

PCBA DFM