Processor Organization
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This document discusses processor organization and design. It introduces the topic and explains that it will cover choosing general characteristics of a processor like memory model, data and instruction bit width, and register file implementation. It will not cover detailed impacts of these choices or the physical realization of a processor. The document then provides background on what a processor is, common instruction set architectures, and von Neumann and Harvard computer architectures before exploring the main design decisions around memory model, data widths, instruction widths, and register files.
Processor Organization
- 1. Ask me! Processor Organization Dominik Salvet github.com/dominiksalvet
- 2. Ask me! Processor Organization 2 / 10 Introduction ● What are we going to talk about? ● Brief explanation of a processor and a computer ● A little bit of the first phase of a processor designing ● Choosing general characteristics of a processor ● What are we not going to talk about? ● Detail impacts of the processor characteristics ● Designing Instruction Set Architecture (ISA) ● Physical realization of a processor ● Virtual realization of a processor
- 3. Ask me! Processor Organization 3 / 10 Processor ● Also referred as Central Processing Unit (CPU) ● A sophisticated machine to process data ● Executes it's native instructions over data ● Instructions are bit vectors just like data ● Popular Instruction Set Architecture types ● RISC (Reduced Instruction Set Computer) ● CISC (Complex Instruction Set Computer) ● Consists at least of ● ALU (Arithmetic Logic Unit) ● CU (Control Unit)
- 4. Ask me! Processor Organization 4 / 10 Computer ● A CPU and some kind of memory ● Input/Output (I/O) devices can be considered as read-only/write-only memory ● It is based on a theoretical architecture model ● Von Neumann architecture ● Harvard architecture
- 5. Ask me! Processor Organization 5 / 10 Decisions Before Us ● Memory model ● Data bit width ● Instruction bit width ● Register file implementation
- 6. Ask me! Processor Organization 6 / 10 Memory Model ● Communication with Input/Output devices ● Von Neumann vs Harvard architecture ● Address bit width ● Smallest addressable memory unit
- 7. Ask me! Processor Organization 7 / 10 Data Bit Width ● Native processor bit width to work with data ● Defines bit width of most internal registers ● Instructions over data with this bit width can be executed without additional overhead ● Multiple data bit widths can also be supported
- 8. Ask me! Processor Organization 8 / 10 Instruction Bit Width ● Fixed length ● Bigger programs and lower overhead with processing ● Variable length ● Smaller programs and higher overhead with processing ● Number of individual instructions available ● Instruction may hold it's constant data within itself
- 9. Ask me! Processor Organization 9 / 10 Register File Implementation ● Less registers ● Almost always faster access ● Possible to have shorter instruction bit width ● More registers ● Possible to keep more program context in registers ● Bit width of the registers is often derived from data bit width ● Other registers
- 10. Ask me! Processor Organization Questions? Dominik Salvet github.com/dominiksalvet