VI Chip BCM® Bus Converter Module
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The document details the specifications and advantages of the vi chip bus converter module (BCM), which utilizes an isolated sine amplitude converter topology to achieve high efficiency (up to 96%) and reduced power footprint. It highlights significant features such as power density, efficiency, and flexibility, allowing for advanced power management with minimized losses and reduced size in systems. The vi chip technology is established as a cutting-edge solution that addresses the limitations of conventional power supply systems, offering increased performance, configurability, and cost-effectiveness.
VI Chip BCM® Bus Converter Module
- 1. VI Chip BCM® Bus Converter Module 1
- 2. VI Chip Bus Converter Module (BCM) › Isolated Sine Amplitude Converter (SAC) topology › Fixed, high frequency (>1 MHz) › Efficiency up to 96% › Fixed Ratio Converter (VOUT = VIN x K) – Commercial: › Input voltage (nom): 48 V, 270 V, 350 V, 380 V › Output voltage (nom): 2 – 48 V (range), 11 V, 12 V, 44 V, 48 V › Output power: 120 – 325 W Full-chip: 1.28” x 0.87” x 0.265” Half-chip: 0.65” x 0.87” x 0.625” – MIL-COTS: › Input voltage: 240 – 330 V › Output voltage: 30 – 41.3 V (K = 1/8), 38.3 – 55 V (K = 1/6) › Output power: 235 W, 270 W › Usage – Stand alone Intermediate Bus Converter (IBC) for downstream point-of-load converters – Voltage divider / current multiplier – Safety isolation (4,242 V or 2,250 V) input-output – Input capacitor multiplier 2
- 3. Value Proposition: Power Density › High power density enables: – More functions (Gbps, ports, flops, capacity) in the same space – A more powerful system without a larger power supply – A more powerful system without a heavier power supply › VI Chip power density enables: – Systems that would be impossible with conventional approaches – Systems that would be too large, too heavy or not cost effective with a conventional approach › VI Chips decrease power footprint by 40% today › Power density increase of 25% every 2.5 years 3
- 4. Value Proposition: Efficiency › High efficiency enables: – Smaller, cooler, quieter systems – Energy cost savings for end user – High performance systems with minimal total cost of ownership › VI Chip architectures reduce hidden power losses – A “whole system approach”, not just a focus on one conversion stage › VI Chip technology continues to raise the efficiency standard – IBC has half the power loss compared to industry IBC average – Alternative solutions are at the technological limit with respect to efficiency improvements – New Vicor products cut losses by 20% every 2.5 years 4
- 5. Value Proposition: Flexibility › Flexibility enables: – Re-use of power components in multiple products – Fewer SKUs, higher volume, lower cost – Fast time to market – Reduced development effort › VI Chip technology reduces the need for custom power systems – Power component paradigm › Expanding portfolio of products increases flexibility over time – More options, more configurability, less complexity, shorter design time 5
- 6. VI Chip Technology › Advanced engines – Enable high efficiency and superior power density – Maximize efficiency of power silicon › HV Adaptive Cell topologies cut VI requirements › LV Current Multipliers cut Vds requirements: – Buck regulators operating from 12 V bus require 20 V rated MOSFET to supply 0.8 V – VTM require 3 V rated MOSFET to supply 0.8 V › Advanced architecture (FPA) minimizes power distribution loss – Dense, efficient energy storage at 48 V – No Bulk Caps at the PoL – Highest current density at the PoL frees up precious real estate › Superior modular product line – Substantial IP portfolio covers architectures, topologies, internal components, control, etc… › From the AC Wall Plug (or HV Bus) to the PoL (LV, high current) › AC-DC and DC-DC › “Young” technology continues to raise the efficiency and density bars – Power loss cut by 25% every 2 years – Power density increased by 25% every 2 years 6