System Block Diagram 2-9-16
- 1. ‐ NIST Radiation Pressure Sensor System Block Diagram Non‐Inverting Amplifier VCTRL Δd Capacitor FCTRL Fnet Flaser Fvib,grav Spring Voltage to Force Equation Bridge C INA Lock‐In V VDIFF DACC(s)ADC Low‐Pass Filter Convert Flaser r e y Signals r – DC voltage output of the lock‐in amplifier when the bridge is balanced (as well as possible) and the preload voltage has been applied, with no additional load applied to the scale. y – Actual DC output of the lock‐in amplifier. C(s) – Controller implemented by the microcontroller. Closed‐Loop Requirements Rise Time < 100 ms (Probably actually means Settling Time < 100 ms) Zero Steady‐State Error (Null Approach) Good Disturbance Rejection (Cannot allow spring to vibrate at frequencies below the frequency at which the loop is closed (~1kHz)) Microcontroller (Teensy 3.2) Display (~1Hz) Design this in Simulink Calibrate ts = 1.25us (80 kHz) Clock = 8 MHz Δd d d0 Laplace DNE Record When Balancing Bridge Measure m,k Find TF Experimentally (Performance varies with settings) Find TF with LTSpice, Simulink, or Analytically Find TF with LTSpice, Simulink, Analytically, or Experimentally Find TF with LTSpice, Simulink, or Experimentally Reject Noise Ask Shalom Ask Shalom