Tda8947 j

TDA8947J
4-channel audio amplifier (SE: 1 W to 25 W; BTL: 4 W to 50 W)
Rev. 01 — 06 February 2004 Preliminary data
1. General description
The TDA8947J contains four identical audio power amplifiers. The TDA8947J can be
used as: four Single-Ended (SE) channels with a fixed gain of 26 dB, two times
Bridge-Tied Load (BTL) channels with a fixed gain of 32 dB or two times SE channels
(26 dB gain) plus one BTL channel (32 dB gain) operating as a 2.1 system.
The TDA8947J comes in a 17-pin Dil-Bent-Sil (DBS) power package. The TDA8947J
is pin compatible with the TDA8944AJ and TDA8946AJ.
The TDA8947J contains a unique protection circuit that is solely based on multiple
temperature measurements inside the chip. This gives maximum output power for all
supply voltages and load conditions with no unnecessary audio holes. Almost any
supply voltage and load impedance combination can be made as long as thermal
boundary conditions (number of channels used, external heatsink and ambient
temperature) allow it.
2. Features
n SE: 1 W to 25 W, BTL: 4 W to 50 W operation possibility (2.1 system)
n Soft clipping
n Standby and mute mode
n No on/off switching plops
n Low standby current
n High supply voltage ripple rejection
n Outputs short-circuit protected to ground, supply and across the load
n Thermally protected
n Pin compatible with TDA8944AJ and TDA8946AJ.
3. Applications
n Television
n PC speakers
n Boom box
n Mini and micro audio receivers.

Philips Semiconductors TDA8947J
4-channel audio amplifier
4. Quick reference data
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage operating 9 18 26 V
no (clipping) signal [1]- - 28 V
Iq quiescent supply current VCC = 18 V; RL = ¥ - 100 145 mA
Istb standby supply current - - 10 mA
Po(SE) SE output power THD = 10 %; RL = 4 W
VCC = 18 V 7 8.5 - W
VCC = 22 V - 14 - W
Po(BTL) BTL output power THD = 10 %; RL = 8 W
VCC = 18 V 16 18 - W
VCC = 22 V - 29 - W
THD total harmonic distortion SE; Po = 1 W - 0.1 0.5 %
BTL; Po = 1 W - 0.05 0.5 %
Gv(max) maximum voltage gain SE 25 26 27 dB
BTL 31 32 33 dB
SVRR supply voltage ripple
rejection
SE; f = 1 kHz - 60 - dB
BTL; f = 1 kHz - 65 - dB
[1] The amplifier can deliver output power with non clipping output signals into nominal loads as long as
the ratings of the IC are not exceeded.
5. Ordering information
Table 2: Ordering information
Type
number
Package
Name Description Version
TDA8947J DBS17P plastic DIL-bent-SIL power package; 17 leads
(lead length 12 mm)
SOT243-1
9397 750 10779 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data Rev. 01 — 06 February 2004 2 of 24

6. Block diagram
IN1+ 8
IN2+
1
6 OUT2-
IN3+ 9
IN4+
14
12 OUT4+
CIV 13
SVR
SGND
MODE1
11
7
10
MODE2 5
Fig 1. Block diagram.
60 kW
60 kW
VCC1
3
VCC2
16
OUT1+
4
60 kW
60 kW
OUT3-
17
SHORT-CIRCUIT
AND
TEMPERATURE
PROTECTION
TDA8947J
Vref
STANDBY ALL
MUTE ALL
ON 1+2
MUTE 3+4
ON 3+4
MDB014
VCC
0.5VCC
2 15
GND1 GND2

7. Pinning information
7.1 Pinning
Fig 2. Pin configuration.
7.2 Pin description
TDA8947J
MDB015
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
OUT1+
GND1
VCC1
OUT2-
MODE2
IN2+
SGND
IN1+
IN3+
MODE1
SVR
IN4+
CIV
OUT3-
GND2
VCC2
OUT4+
Table 3: Pin description
Symbol Pin Description
OUT1+ 1 non inverted loudspeaker output of channel 1
GND1 2 ground of channels 1 and 2
VCC1 3 supply voltage channels 1 and 2
OUT2- 4 inverted loudspeaker output of channel 2
MODE2 5 mode selection 2 input: mute and on for channels 3 and 4
IN2+ 6 input channel 2
SGND 7 signal ground
MODE1 10 mode selection 1 input: standby, mute and on for all channels
SVR 11 half supply voltage decoupling (ripple rejection)

Table 3: Pin description…continued
Symbol Pin Description
CIV 13 common input voltage decoupling
OUT3- 14 inverted loudspeaker output of channel 3
GND2 15 ground of channels 3 and 4
VCC2 16 supply voltage channels 3 and 4
OUT4+ 17 non inverted loudspeaker output of channel 4
TAB - back side tab or heats spreader has to be connected to
8. Functional description
8.1 Input configuration
ground
The input cut-off frequency is:
(1)
f i(cut – off )
1
2p(Ri ´ Ci) = ----------------------------
For SE application Ri = 60 kW and Ci = 220 nF:
(2)
f i(cut – off )
1
= ---------------------------------------------------------------- = 12 Hz
2p 60 103 220 10 –9 ( ´ ´ ´ )
For BTL application Ri = 30 kW and Ci = 470 nF:
(3)
f i(cut – off )
1
= ---------------------------------------------------------------- = 11 Hz
2p 30 103 470 10 –9 ( ´ ´ ´ )
As shown in Equation 2 and Equation 3, large capacitor values for the inputs are not
necessary, so the switch-on delay during charging of the input capacitors can be
minimized. This results in a good low frequency response and good switch-on
behavior.
8.2 Power amplifier
The power amplifier is a BTL and/or SE amplifier with an all-NPN output stage,
capable of delivering a peak output current of 4 A.
Using the TDA8947J as a BTL amplifier offers the following advantages:
• Low peak value of the supply current
• Ripple frequency on the supply voltage is twice the signal frequency
• No expensive DC-blocking capacitor
• Good low frequency performance.

8.2.1 Output power measurement
The output power as a function of the supply voltage is measured on the output pins
at THD = 10 %; see Figure 8.
The maximum output power is limited by the supply voltage (VCC = 26 V) and the
maximum output current (Io = 4 A repetitive peak current).
For supply voltages VCC > 22 V, a minimum load is required; see Figure 5:
• SE: RL = 3 W
• BTL: RL = 6 W.
8.2.2 Headroom
Typical CD music requires at least 12 dB (factor 15.85) dynamic headroom,
compared to the average power output, for transferring the loudest parts without
distortion.
The Average Listening Level (ALL) music power, without any distortion, yields:
• SE at Po(SE) = 5 W, VCC = 18 V, RL = 4 W and THD = 0.2 %:
(4)
Po(ALL)SE
5 10 3
×
15.85
= --------------- = 315 mW
• BTL at Po(BTL) = 10 W, VCC = 18 V, RL = 8 W and THD = 0.1 %:
(5)
Po(ALL)BTL
10 103 ×
15.85
= ------------------ = 630 mW
The power dissipation can be derived from Figure 9 (SE and BTL) for a headroom of
0 dB and 12 dB, respectively.
Table 4: Power rating as function of headroom
Headroom Power output Power dissipation
SE BTL (all channels driven)
0 dB Po = 5 W Po = 10 W PD = 17 W
12 dB Po(ALL) = 315 mW Po(ALL) = 630 mW PD = 9 W
For heatsink calculation at the average listening level, a power dissipation of 9 W can
be used.
8.3 Mode selection
The TDA8947J has three functional modes which can be selected by applying the
proper DC voltage to pin MODE1.
Standby — The current consumption is very low and the outputs are floating. The
device is in the standby mode when VMODE1 < 0.8 V, or when the MODE1 pin is
grounded. In the standby mode, the function of pin MODE2 has been disabled.

Mute — The amplifier is DC-biased, but not operational (no audio output). This allows
the input coupling capacitors to be charged to avoid pop-noise. The device is in the
mute mode when 4.5 V < VMODE1 < (VCC - 3.5 V).
On — The amplifier is operating normally. The on mode is activated at
VMODE1 > (VCC - 2.0 V). The output of channels 3 and 4 can be set to mute or on
mode.
The output channels 3 and 4 can be switched on/off by applying a proper DC voltage
to pin MODE2, under the condition that the output channels 1 and 2 are in the on
mode (see Figure 3).
Table 5: Mode selection
Voltage on pin Channel 1 and 2 Channel 3 and 4
MODE1 MODE2 (sub woofer)
0 to 0.8 V 0 to VCC standby standby
4.5 to (VCC - 3.5 V) 0 to VCC mute mute
(VCC - 2.0 V) to VCC 0 to (VCC - 3.5 V) on mute
(VCC - 2 V) to VCC on on
all standby all mute
VCC-2.0
0.8 4.5 VCC-3.5 VCC
MDB016
Fig 3. Mode selection.
channels 3+4: mute
8.4 Supply voltage ripple rejection
channels 1+2: on
channels 3+4: on or mute
VMODE1
channels 3+4: on
VCC-3.5 VCC
VMODE2
VCC-2.0
The Supply Voltage Ripple Rejection (SVRR) is measured with an electrolytic
capacitor of 150 mF on pin SVR using a bandwidth of 20 Hz to 22 kHz. Figure 11
illustrates the SVRR as function of the frequency. A larger capacitor value on pin SVR
improves the ripple rejection behavior at the lower frequencies.

8.5 Built-in protection circuits
The TDA8947J contains two types of detection sensors: one measures local
temperatures of the power stages and one measures the global chip temperature. At
a local temperature of approximately 185 °C or a global temperature of approximately
150 °C, this detection circuit switches off the power stages for 2 ms. High impedance
of the outputs is the result. After this time period the power stages switch on
automatically and the detection will take place again; still a too high temperature
switches off the power stages immediately. This protects the TDA8947J against
shorts to ground, to the supply voltage and across the load, and against too high chip
temperatures.
The protection will only be activated when necessary, so even during a short-circuit
condition, a certain amount of (pulsed) current will still be flowing through the short,
just as much as the power stage can handle without exceeding the critical
temperature level.
9. Limiting values
Table 6: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage operating -0.3 +26 V
no (clipping) signal [1] -0.3 +28 V
VI input voltage -0.3 VCC + 0.3 V
IORM repetitive peak output
current
- 4 A
Tstg storage temperature non-operating -55 +150 °C
Tamb ambient temperature -40 +85 °C
Ptot total power dissipation - 69 W
VCC(sc) supply voltage to guarantee
short-circuit protection
- 24 V
[1] The amplifier can deliver output power with non clipping output signals into nominal loads as long as
the ratings of the IC are not exceeded.
10. Thermal characteristics
Table 7: Thermal characteristics
Symbol Parameter Conditions Value Unit
Rth(j-a) thermal resistance from
junction to ambient
in free air 40 K/W
Rth(j-c) thermal resistance from
junction to case
all channels driven 1.3 K/W

11. Static characteristics
Table 8: Static characteristics
VCC = 18 V; Tamb = 25 °C; RL = 8 W; VMODE1 = VCC; VMODE2 = VCC; Vi = 0 V; measured in test circuit Figure 12; unless
otherwise specified.
Supply
VCC supply voltage operating [1] 9 18 26 V
no (clipping) signal [2]- - 28 V
Iq quiescent supply current RL = ¥ [3] - 100 145 mA
Istb standby supply current - - 10 mA
Output pins
VO DC output voltage [4]- 9 - V
DVOUT differential output voltage offset BTL mode [5] - - 170 mV
Mode selection pins
VMODE1 selection voltage on pin MODE1 on VCC - 2.0 - VCC V
mute 4.5 - VCC - 3.5 V
standby 0 - 0.8 V
VMODE2 selection voltage on pin MODE2 on: channels 3 and 4 [6] VCC - 2.0 - VCC V
mute: channels 3 and 4 0 - VCC - 3.5 V
IMODE1 selection current on pin MODE1 0 < VMODE1 < (VCC - 3.5 V) - - 20 mA
IMODE2 selection current on pin MODE2 0 < VMODE2 < (VCC - 3.5 V) - - 20 mA
[1] A minimum load is required at supply voltages of VCC > 22 V: RL = 3 W for SE and RL = 6 W for BTL.
[2] The amplifier can deliver output power with non clipping output signals into nominal loads as long as the ratings of the IC are not
exceeded.
[3] With a load connected at the outputs the quiescent current will increase.
[4] The DC output voltage, with respect to ground, is approximately 0.5VCC.
[5] DVOUT = ïVOUT+ - VOUT- ï
[6] Channels 3 and 4 can only be set to mute or on by MODE2 when VMODE1 > VCC - 2.0 V.
12. Dynamic characteristics
Table 9: Dynamic characteristics SE
VCC = 18 V; Tamb = 25 °C; RL = 4 W; f = 1 kHz; VMODE1 = VCC; VMODE2 = VCC; measured in test circuit Figure 12; unless
Po(SE) SE output power VCC = 18 V; see Figure 8a
THD = 10 %; RL = 4 W 7 8.5 - W
THD = 0.5 %; RL = 4 W - 6.5 - W
VCC = 22 V
THD = 10 %; RL = 4 W - 14 - W
THD total harmonic distortion Po = 1 W - 0.1 0.5 %
Gv voltage gain 25 26 27 dB
Zi input impedance 40 60 - kW
Vn(o) noise output voltage [1] - 150 - mV

Table 9: Dynamic characteristics SE…continued
VCC = 18 V; Tamb = 25 °C; RL = 4 W; f = 1 kHz; VMODE1 = VCC; VMODE2 = VCC; measured in test circuit Figure 12; unless
SVRR supply voltage ripple rejection fripple = 1 kHz [2]- 60 - dB
fripple = 100 Hz to 20 kHz [2]- 60 - dB
Vo(mute) output voltage in mute mode [3] - - 150 mV
acs channel separation Rsource = 0 W 50 60 - dB
|Gv| channel unbalance - - 1 dB
[1] The noise output voltage is measured at the output in a frequency range from 20 Hz to 22 kHz (unweighted), with a source impedance
Rsource = 0 W at the input.
[2] Supply voltage ripple rejection is measured at the output, with a source impedance Rsource = 0 W at the input and with a frequency range
from 20 Hz to 22 kHz (unweighted). The ripple voltage is a sine wave with a frequency fripple and an amplitude of 300 mV (RMS), which
is applied to the positive supply rail.
[3] Output voltage in mute mode is measured with VMODE1 = VMODE2 = 7 V, and Vi = 1 V (RMS) in a bandwidth from 20 Hz to 22 kHz,
including noise.
Table 10: Dynamic characteristics BTL
VCC = 18 V; Tamb= 25 °C; RL = 8 W; f = 1 kHz; VMODE1 = VCC; VMODE2 = VCC; measured in test circuit Figure 12; unless
Po(BTL) BTL output power VCC = 18 V; see Figure 8b
THD = 10 %; RL = 8 W 16 18 - W
THD = 0.5 %; RL = 8 W - 14 - W
VCC = 22 V
THD = 10 %; RL = 8 W - 29 - W
THD total harmonic distortion Po = 1 W - 0.05 0.5 %
Gv voltage gain 31 32 33 dB
Zi input impedance 20 30 - kW
Vn(o) noise output voltage [1] - 200 - mV
SVRR supply voltage ripple rejection fripple = 1 kHz [2]- 65 - dB
fripple = 100 Hz to 20 kHz [2]- 65 - dB
Vo(mute) output voltage in mute mode [3] - - 250 mV
acs channel separation Rsource = 0 W 50 65 - dB
|Gv| channel unbalance - - 1 dB
[1] The noise output voltage is measured at the output in a frequency range from 20 Hz to 22 kHz (unweighted), with a source impedance
Rsource = 0 W at the input.
[2] Supply voltage ripple rejection is measured at the output, with a source impedance Rsource = 0 W at the input and with a frequency range
from 20 Hz to 22 kHz (unweighted). The ripple voltage is a sine wave with a frequency fripple and an amplitude of 300 mV (RMS), which
is applied to the positive supply rail.
[3] Output voltage in mute mode is measured with VMODE1 = VMODE2 = 7 V, and Vi = 1 V (RMS) in a bandwidth from 20 Hz to 22 kHz,
including noise.

BTL; VCC = 18 V; Vi = 50 mV.
0 4 8 12
107
Vo
(mV)
106
105
104
103
102
10
1
Fig 4. AC output voltage as function of voltage on pin MODE1.
coc005
20
16
VMODE1 (V)
8
60
Po
(W)
40
20
0
MCE485
RL = 1 W
2 W 3 W
4 W
8 W
12 28
VCC (V)
16 20
24
8
60
Po
(W)
40
20
0
24
MCE484
4 W 6 W
8 W
RL = 2 W 16 W
12 16 20
28
THD = 10 %; one channel. THD = 10 %; one channel.
a. SE b. BTL
Fig 5. Output power as function of supply voltage at various loads
VCC (V)

102
THD+N
(%)
10
1
10-1
10-2
MCE488
10-1 1 10 102
Po (W)
102
THD+N
(%)
10
1
10-1
10-2
10-1 1
VCC = 18 V; f = 1 kHz; RL = 4 W. VCC = 18 V; f = 1 kHz; RL = 8 W.
a. SE b. BTL
Fig 6. Total harmonic distortion-plus-noise as function of output power.
MCE487
10
Po (W)
102
10
THD+N
(%)
1
10-1
10-2
MCE489
10
102 103 104 105
f (Hz)
10
THD+N
(%)
1
10-1
10-2
10
102 103 104 105
VCC = 18 V; Po = 1 W; RL = 4 W. VCC = 18 V; Po = 1 W; RL = 8 W.
a. SE b. BTL
Fig 7. Total harmonic distortion-plus-noise as function of frequency.
MCE490
f (Hz)

12
16 20 24
MCE491
8 28
50
Po
(W)
40
30
20
10
0
VCC (V)
12
16 20 24
MCE492
8 28
50
Po
(W)
40
30
20
10
0
THD = 10%; RL = 4 W; f = 1 kHz. THD = 10%; RL = 8 W; f = 1 kHz.
a. SE b. BTL
Fig 8. Output power as function of supply voltage.
VCC (V)
MCE493
4
20
PD
(W)
16
12
8
4
0
MCE494
8 12 16 0 20
0 20
Po (W)
20
PD
(W)
16
12
8
4
0
4
VCC = 18 V; RL = 4 W. VCC = 18 V; RL = 8 W.
Po (W)
8 12 16
a. SE b. BTL
Fig 9. Total power dissipation as function of channel output power per channel (worst case, all channels driven).

0
acs
(dB)
-20
-40
-60
-80
-100
MCE495
10
0
acs
(dB)
-20
-40
-60
-80
102 103 104 105 -100
f (Hz)
10
102 103 104 105
VCC = 18 V; RL = 4 W. VCC = 18 V; RL = 8 W.
a. SE b. BTL
Fig 10. Channel separation as function of frequency (no bandpass filter applied).
MCE496
f (Hz)
0
SVRR
(dB)
-20
-40
-60
-80
MCE497
10
102 103 104 105
f (Hz)
VCC = 18 V; Rsource = 0 W; Vripple = 300 mV (RMS).
A bandpass filter of 20 Hz to 22 kHz has been applied.
Inputs short-circuited.
0
SVRR
(dB)
-20
-40
-60
-80
MCE498
10
102 103 104 105
f (Hz)
VCC = 18 V; Rsource = 0 W; Vripple = 300 mV (RMS).
A bandpass filter of 20 Hz to 22 kHz has been applied.
Inputs short-circuited.
a. SE b. BTL
Fig 11. Supply voltage ripple rejection as function of frequency.

13. Application information
13.1 Application diagrams
VCC1 VCC2
220 nF
IN1+
1
100 nF 1000 mF
60 kW
3
8
220 nF
IN2+
OUT2- 470 nF
IN3+
Vi
Vi
-
+
-
+
60 kW
6
60 kW
9
14
Vi OUT4+
IN4+
VCC
VCC
CIV 13
22 mF
270 W
2.2
mF
10
kW
50
kW
100
kW
7.5 V BC547
BC547
micro-controller
60 kW
12
Vref
STANDBY ALL
MUTE ALL
ON 1 + 2
MUTE 3 + 4
ON 3 + 4
VCC
0.5VCC
SVR 11
SGND
MODE1
7
10
MODE2 5
47
mF
1.5
kW
Fig 12. Typical application diagram without on/off switching plops.
16
OUT1+
VCC
RL
4 W
RL
4 W
470 mF
4
OUT3-
RL
8 W
+
-
17
SHORT-CIRCUIT
AND
TEMPERATURE
PROTECTION
TDA8947J
2 15
GND1 GND2
mdb017
Table 11: Amplifier selection by microcontroller
Microcontroller with open-collector output; see Figure 12
Microcontroller Channels 1 and 2 Channels 3 and 4
LOW on on
HIGH mute mute

VCC1 VCC2
16
220 nF
IN1+
IN2+
Vi
220 nF
Vi
470 nF
IN3+
60 kW
60 kW
3
8
6
60 kW
9
14
Vi OUT4+
IN4+
MICRO-CONTROLLER
22 mF
VCC
17
SHORT-CIRCUIT
AND
TEMPERATURE
PROTECTION
TDA8947J
2 15
GND1 GND2
60 kW
12
Vref 150 mF
STANDBY ALL
MUTE ALL
ON 1+2
MUTE 3+4
ON 3+4
VCC
0.5VCC
CIV 13
SVR 11
SGND
MODE1
7
10
MODE2 5
Fig 13. Application diagram with one pin control and reduction of capacitor.
100 nF 1000 mF
OUT1+
OUT2-
VCC
RL
4 W
RL
4 W
450 mF
1
4
OUT3-
RL
8 W
-
+
-
+
+
-
MDB018
Remark: Because of switching inductive loads, the output voltage can rise beyond
the maximum supply voltage of 28 V. At high supply voltages, it is recommended to
use (Schottky) diodes to the supply voltage and ground.

13.2 Printed-circuit board
13.2.1 Layout and grounding
To obtain a high-level system performance, certain grounding techniques are
essential. The input reference grounds have to be tied with their respective source
grounds and must have separate tracks from the power ground tracks; this will
prevent the large (output) signal currents from interfering with the small AC input
signals. The small-signal ground tracks should be physically located as far as
possible from the power ground tracks. Supply and output tracks should be as wide
as possible for delivering maximum output power.
AUDIO POWER CS NIJMEGEN
27 Jan. 2003 / FP
TVA
4.7 nF
100 nF
1
220 nF
220 nF
220 nF
4 W
4 W
4 W
1000 mF
1000 mF
CIV
22
SVF
220 mF
mF
1
+ Vp IN2+ IN1+ IN3+ IN4+
BTL1/2
+SE2- +SE1-
Fig 14. Printed-circuit board layout (single-sided); components view.
13.2.2 Power supply decoupling
BTL4/3 +SE3-
-SE4+
MCE483
220 nF
220 nF
220 nF
4 W
4 W
4 W
1000 mF
1000 mF
150
mF
MODE1
10 kW 10 kW
BTL3/4
MODE2
SB ON
VOL.Sgnd MUTE
OFF
ON
Proper supply bypassing is critical for low-noise performance and high supply voltage
ripple rejection. The respective capacitor location should be as close as possible to
the device and grounded to the power ground. Proper power supply decoupling also
prevents oscillations.
For suppressing higher frequency transients (spikes) on the supply line a capacitor
with low ESR, typical 100 nF, has to be placed as close as possible to the device. For
suppressing lower frequency noise and ripple signals, a large electrolytic capacitor,
e.g. 1000 mF or greater, must be placed close to the device.
The bypass capacitor on pin SVR reduces the noise and ripple on the mid rail
voltage. For good THD and noise performance a low ESR capacitor is recommended.

13.3 Thermal behavior and heatsink calculation
The measured maximum thermal resistance of the IC package, Rth(j-mb), is 1.3 K/W.
A calculation for the heatsink can be made, with the following parameters:
Tamb(max) = 60 °C (example)
VCC = 18 V and RL = 4 W (SE)
Tj(max) = 150 °C (specification)
Rth(tot) is the total thermal resistance between the junction and the ambient including
the heatsink. This can be calculated using the maximum temperature increase
divided by the power dissipation:
Rth(tot) = (Tj(max) - Tamb(max))/PD
At VCC = 18 V and RL = 4 W (4 ´ SE) the measured worst-case sine-wave dissipation
is 17 W; see Figure 9. For Tj(max) = 150 °C the temperature raise, caused by the
power dissipation, is: 150 - 60 = 90 °C:
P ´ Rth(tot) = 90 °C
Rth(tot) = 90/17 = 5.29 K/W
Rth(h-a) = Rth(tot) - Rth(j-mb) = 5.29 - 1.3 = 3.99 K/W
This calculation is for an application at worst-case (stereo) sine-wave output signals.
In practice music signals will be applied, which decreases the maximum power
dissipation to approximately half of the sine-wave power dissipation of 9 W (see
Section 8.2.2). This allows for the use of a smaller heatsink:
P ´ Rth(tot) = 90 °C
Rth(tot) = 90/9 = 10 K/W
Rth(h-a) = Rth(tot) - Rth(j-mb) = 10 - 1.3 = 8.7 K/W

8
150
Tj
(°C)
100
50
0
(1) (2) (3) (4) (5)
20 24
mce499
12 16 28
Tamb = 25 °C; external heatsink of 5 K/W.
(1) RL = 1 W.
(2) RL = 2 W.
(3) RL = 3 W.
(4) RL = 4 W.
(5) RL = 8 W.
VCC (V)
8
150
Tj
(°C)
100
50
0
(1) (2) (3) (4) (5)
20 24
mce500
12 16 28
VCC (V)
a. 4 times various SE loads with music signals. b. 2 times various BTL loads with music signals.
Fig 15. Junction temperature as function of supply voltage for various loads with music signals.
14. Test information
14.1 Quality information
Tamb = 25 °C; external heatsink of 5 K/W.
(1) RL = 2 W.
(2) RL = 4 W.
(3) RL = 6 W.
(4) RL = 8 W.
(5) RL = 16 W.
The General Quality Specification for Integrated Circuits, SNW-FQ-611 is applicable.

15. Package outline
DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1
D
1 17
bp
d
1
Z e
e
DIMENSIONS (mm are the original dimensions)
non-concave
x h
L
j
Eh
0 5 10 mm
scale
w M
UNIT A A2 bp c D(1) d Dh E(1) e e1 L L3 m Z(1)
mm 17.0
15.5
4.6
4.4
0.75
0.60
0.48
0.38
24.0
23.6
20.0
19.6
e2
Eh
j Q
w
x
6 2.00
3.4
3.1
12.4
11.0
5.08 2.4
12.2 0.8
11.8
10 2.54
1.27
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE REFERENCES
VERSION
SOT243-1
Fig 16. Package outline.
view B: mounting base side
E
A
D
c
m e2
v M
v
1.45
2.1
1.8
4.3
0.4
0.03
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
A2
B
L3
Q
99-12-17
03-03-12
1.6

16. Soldering
16.1 Introduction to soldering through-hole mount packages
This text gives a brief insight to wave, dip and manual soldering. A more in-depth
account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit
Packages (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of through-hole mount IC
packages on a printed-circuit board.
16.2 Soldering by dipping or by solder wave
Driven by legislation and environmental forces the worldwide use of lead-free solder
pastes is increasing. Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or
Pb-free respectively.
The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the
plastic body must not exceed the specified maximum storage temperature (Tstg(max)).
If the printed-circuit board has been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within the permissible limit.
16.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the
seating plane or not more than 2 mm above it. If the temperature of the soldering iron
bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit
temperature is between 300 and 400 °C, contact may be up to 5 seconds.
16.4 Package related soldering information
Table 12: Suitability of through-hole mount IC packages for dipping and wave
soldering methods
Package Soldering method
Dipping Wave
DBS, DIP, HDIP, RDBS, SDIP, SIL suitable suitable[1]
PMFP[2] - not suitable
[1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the
printed-circuit board.
[2] For PMFP packages hot bar soldering or manual soldering is suitable.

17. Revision history
Table 13: Revision history
Rev Date CPCN Description
01 20040206 - Preliminary data (9397 750 10779)

18. Data sheet status
Level Data sheet status[1] Product status[2][3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Contact information
20. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825
9397 750 10779
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

Contents
© Koninklijke Philips Electronics N.V. 2004.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 06 February 2004 Document order number: 9397 750 10779
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Functional description . . . . . . . . . . . . . . . . . . . 5
8.1 Input configuration . . . . . . . . . . . . . . . . . . . . . . 5
8.2 Power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . 5
8.2.1 Output power measurement . . . . . . . . . . . . . . . 6
8.2.2 Headroom. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8.3 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . 6
8.4 Supply voltage ripple rejection . . . . . . . . . . . . . 7
8.5 Built-in protection circuits . . . . . . . . . . . . . . . . . 8
9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Thermal characteristics. . . . . . . . . . . . . . . . . . . 8
11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 9
12 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
13 Application information. . . . . . . . . . . . . . . . . . 15
13.1 Application diagrams . . . . . . . . . . . . . . . . . . . 15
13.2 Printed-circuit board . . . . . . . . . . . . . . . . . . . . 17
13.2.1 Layout and grounding . . . . . . . . . . . . . . . . . . . 17
13.2.2 Power supply decoupling . . . . . . . . . . . . . . . . 17
13.3 Thermal behavior and heatsink calculation . . 18
14 Test information . . . . . . . . . . . . . . . . . . . . . . . . 19
14.1 Quality information . . . . . . . . . . . . . . . . . . . . . 19
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
16 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
16.1 Introduction to soldering through-hole
mount packages . . . . . . . . . . . . . . . . . . . . . . 21
16.2 Soldering by dipping or by solder wave . . . . . 21
16.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 21
16.4 Package related soldering information . . . . . . 21
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22
18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 23
19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
20 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.

Tda8947 j

More Related Content

What's hot (8)

Similar to Tda8947 j (20)

Recently uploaded (20)

Tda8947 j