![SOME BASIC TRANSISTOR CIRCUITS
2.06 Transistor current source 73
independent of Vc, as long as the transis-
tor is not saturated (Vc > VE+0.2 volt).
Figure 2.21. Transistor current source: basic
concept.
Current-source biasing
The base voltage can be provided in a
number of ways. A voltage divider is
OK, as long as it is stiff enough. As
before, the criterion is that its impedance
should be much less than the dc impedance
looking into the base (hFERE). Or you
can use a zener diode, biased from Vcc,
or even a few forward-biased diodes in
series from base to the corresponding
emitter supply. Figure 2.22 shows some
examples. In the last example (Fig. 2.22C),
a pnp transistor sources current to a load
returned to ground. The other examples
(using npn transistors) should properly be
called current sinks, but the usual practice
is to call all of them current sources.
["Sink" and "source" simply refer to the
direction of current flow: If a circuit
supplies (positive) current to a point, it is a
source, and vice versa.] In the first circuit,
the voltage-divider impedance of -1.3k is
very stiff compared with the impedance
looking into the base of about lOOk (for
hFE= loo), SO any changes in beta with
collector voltage will not much affect the
output current by causing the base voltage
to change. In the other two circuits the
biasing resistors are chosen to provide
several milliamps to bring the diodes into
conduction.
Compliance
A current source can provide constant
current to the load only over some finite
range of load voltage. To do otherwise
would be equivalent to providing infinite
power. The output voltage range over
which a current source behaves well is
called its output compliance. For the
preceding transistor current sources, the
compliance is set by the requirement that
Figure 2.22. Transistor-current-source circuits, illustrating three methods of base biasing; npn
transistors sink current, whereas pnp transistors source current. The circuit in C illustrates a load
returned to ground.](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-26-320.jpg?cb=1674599069)
![EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS
2.11 The emitter follower revisited 81
several important quantities we will be
using often in circuit design:
1. The steepness of the diode curve. How
much do we need to increase VBE to in-
crease Ic by a factor of lo? From the
Ebers-Moll equation, that's just VT log, 10,
or 60mV at room temperature. Base volt-
age increases 60rnV per decade of collector
current. Equivalently, Ic = ~ ~ ~ e ~ ~ / ~ ~ ,
where AV is in millivolts.
2. The small-signal impedance looking
into the emitter, for the base held at a fixed
voltage. Taking the derivative of VBE with
respect to Ic, you get
re = VT/IC = 25/Ic ohms
where Ic is in milliamps. The numerical
value 25/Ic is for room temperature. This
intrinsic emitter resistance, re,acts as if it
is in series with the emitter in all transistor
circuits. It limits the gain of a grounded
emitter amplifier, causes an emitter fol-
lower to have a voltage gain of slightly less
than unity, and prevents the output imped-
ance of an emitter follower from reaching
zero. Note that the transconductance of a
grounded emitter amplifier is g, = l/re.
3. The temperature dependence of VBE.
A glance at the Ebers-Moll equation sug-
gests that VBE has a positive temperature
coefficient. However, because of the tem-
perature dependence of Is, VBE decreases
about 2.1mV/OC. It is roughly proportional
to l/T,b,, where Tabsis the absolute tem-
perature.
There is one additional quantity we
will need on occasion, although it is not
derivable from the Ebers-Moll equation. It
is the Early effect we described in Section
2.06, and it sets important limits on
current-source and amplifier performance,
for example:
4. Early effect. VBE varies slightly with
changing VCE at constant Ic. This effect
is caused by changing effective base width,
and it is given, approximately, by
where cr =0.0001.
These are the essential quantities we
need. With them we will be able to handle
most problems of transistor circuit design,
and we will have little need to refer to the
Ebers-Moll equation itself.
2.11 The emitter follower revisited
Before looking again at the common-emit-
ter amplifier with the benefit of our new
transistor model, let's take a quick look
at the humble emitter follower. The
Ebers-Moll model predicts that an emit-
ter follower should have nonzero out-
put impedance, even when driven by a
voltage source, because of finite re
(item 2, above). The same effect also
produces a voltage gain slightly less
than unity, because re forms a voltage di-
vider with the load resistor.
These effectsare easy to calculate. With
fixed base voltage, the impedance look-
ing back into the emitter is just Rout =
d v ~ , q / d I ~ ;but IE M IC, SO Rout X
re, the intrinsic emitter resistance [re =
251Ic(mA)]. For example, in Figure
2.34A, the load sees a driving impedance
of re = 25 ohms, since Ic = 1mA. (This
is paralleled by the emitter resistor RE,
if used; but in practice RE will always
be much larger than re.) Figure 2.34B
shows a more typical situation, with finite
source resistance Rs (for simplicity we've
omitted the obligatory biasing components
- base divider and blocking capacitor -
which are shown in Fig. 2.34C). In this
case the emitter follower's output imped-
ance is just re in series with R,/(hfe+ 1)
(again paralleled by an unimportant RE,
if present). For example, if R, = lk and
Ic = lmA, Rout = 35 ohms (assuming
hf = 100). It is easy to show that the in-
trinsic emitter re also figures into an emit-
ter follower's input impedance, just as if
it were in series with the load (actually, par-
allel combination of load resistor and](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-34-320.jpg?cb=1674599069)
![SOME AMPLIFIER BUILDING BLOCKS
2.17 Bootstrapping 97
this case approximately 100k). But now
the signal-frequency input impedance is
no longer the same as the dc impedance.
Look at it this way: An input wiggle vi,
results in an emitter wiggle VE = vi,. So
the change in current through bias resistor
R3 is 2 = (vin - ~,q)/R3z 0, i.e., Zi,
(due to bias string) = vi,/ii, z infinity.
We've made the loading (shunt) impedance
of the bias network very large at signal
frequencies.
In practice the value of Rg is effectively
increased by a hundred or so, and the
input impedance is then dominated by the
transistor's base impedance. The emitter-
degenerated amplifier can be bootstrapped
in the same way, since the signal on
the emitter follows the base. Note that
the bias divider circuit is driven by the
low-impedance emitter output at signal
frequencies, thus isolating the input signal
from this usual task.
Figure 2.65. Raising the input impedance of
an emitter follower at signal frequencies by
bootstrapping the base bias divider.
Another way of seeing this is to notice
that R3 always has the same voltage across
it at signal frequencies (since both ends
of the resistor have the same voltage
changes), i.e., it's a current source. But
a current source has infinite impedance.
Actually, the effective impedance is less
than infinity because the gain of a follower
is slightly less than 1. That is so because
the base-emitter drop depends on collector
current, which changes with the signal
level. You could have predicted the same
result from the voltage-dividing effect of
the impedance looking into the emitter
[re = 25/Ic(mA) ohms] combined with
the emitter resistor. If the follower has
voltage gain A ( A z 1)' the effective value
of R3 at signal frequencies is
Figure 2.66. Bootstrapping driver-stage collec-
tor load resistor in a power amplifier.
Bootstrapping collector load resistors
The bootstrap principle can be used to in-
crease the effective value of a transistor's
collector load resistor, if that stage drives
a follower. That can increase the voltage
gain of the stage substantially [recall that
Gv = -gmRc, with g, = 1/(RE+re)].
Figure 2.66 shows an example of a boot-
strapped push-pull output stage similar to
the push-pull follower circuit we saw ear-
lier. Because the output follows Qn's base](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-50-320.jpg?cb=1674599069)
![FIELD-EFFECT TRANSISTORS
114 Chapter 3
First, though, some motivation and per-
spective: The FET's nonexistent gate cur-
rent is its most important characteristic.
The resulting high input impedance (which
can be greater than 1 0 ~ ~ 0 )is essential in
many applications, and in any case it
makes circuit design simple and fun. For
applications like analog switches and am-
plifiersof ultrahigh input impedance, FETs
have no equal. They can be easily used by
themselves or combined with bipolar tran-
sistors to make integrated circuits: In the
next chapter we'll see how successful that
process has been in making nearly perfect
(and wonderfully easy to use) operational
ampl$ers, and in Chapters 8-11 we'll see
how digital electronics has been revolu-
tionized by MOSFET integrated circuits.
Because many FETs using very low current
can be constructed in a small area, they
are especially useful for large-scale integra-
tion (LSI) digital circuits such as calculator
chips, microprocessors, and memories. In
addition, high-current MOSFETs (30A or
more) of recent design have been replacing
bipolar transistors in many applications,
often providing simpler circuits with im-
proved performance.
3.01 FET characteristics
Beginners sometimes become catatonic
when directly confronted with the confus-
ing variety of FET types (see, for exam-
ple, the first edition of this book!), a vari-
ety that arises from the combined choices
of polarity (n-channel or p-channel), form
of gate insulation (semiconductor junction
[JFET]or oxide insulator[MOSFET]), and
channel doping (enhancement or depletion
mode). Of the eight resulting possibilities,
six could be made, and five actually are.
Four of those five are of major importance.
It will aid understanding (and sanity),
however, if we begin with one type only,
just as we did with the npn bipolar tran-
sistor. Once comfortable with FETs, we'll
have little trouble with their family tree.
FET V-l curves
Let's look first at the n-channel enhance-
ment-mode MOSFET, which is analogous
to the npn bipolar transistor (Fig. 3.1). In
normal operation the drain collector) is
more positive than the source (-emitter).
No current flows from drain to source
unless the gate base) is brought positive
with respect to the source. Once the
gate is thus "fonvard-biased" there will be
drain current, all of which flows to the
source. Figure 3.2 shows how the drain
current IDvaries with drain-source voltage
VDs, for a few values of controlling gate-
source voltage VGS.For comparison, the
corresponding "family" of curves of Ic
versus VBEfor an ordinary npn bipolar
transistor is shown. Obviously threre are
a lot of similarities between n-channel
MOSFETs and npn bipolar transistors.
d r a ~ n collector
source emitter
n~channelMOSFET npn b~polartransistor
Figure 3.1
Like the npn transistor, the FET has a
high incremental drain impedance, giving
roughly constant current for VDs greater
than a volt or two. By an unfortunate
choice of language, this is called the "satu-
ration" region of the FET and corresponds
to the "active" region of the bipolar tran-
sistor. Analogous to the bipolar transistor,
larger gate-to-source bias produces larger
drain current. If anything, FETs behave
more nearly like ideal transconductance
devices (constant drain current for con-
stant gate-source voltage) than do bipolar](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-66-320.jpg?cb=1674599069)
![FIELD-EFFECT TRANSISTORS
140 Chapter 3
Figure 3.33. Variable-gain circuits.
-
ac (signal) gain. Without the capacitor,
the transistor biasing would vary with FET
resistance.
out
EXERCISE 3.7
The VN13 has an ON resistance (VGS= +5V)
of 15 ohms(max). Whatis the rangeof amplifier
gain in the second circuit (assume that the
current sink looks like 1MR)? What is the low-
frequency3dB point when the FET is biased so
that the amplifier gain is (a) 40dB or (b) 20dB?
56k
- 125OPA
v4(4:l current
- m~rror)
-
VCO~,,OI VN13
(positive1
The linearization of RDs with a resis-
tive gate divider circuit, as above, is re-
markably effective. In Figure 3.34 we've
compared actual measured curves of ID
versus VDs in the linear (low-VDs) region
for FETs with and without the linearizing
circuit. The linearizing circuit is essential
for low-distortion applications with signal
swings of more than a few millivolts.
When considering FETs for an appli-
cation requiring a gain control, e.g., an
AGC or "modulator" (in which the am-
plitude of a high-frequency signal is var-
ied at an audio rate, say), it is worth-
while to look also at "analog-multiplier"
ICs. These are high-accuracy devices with
good dynamic range that are normally used
to form the product of two voltages. One
of the voltages can be a dc control sig-
nal, setting the multiplication factor of the
device for the other input signal, i.e., the
gain. Analog multipliers exploit the g,-
versus-Ic characteristic of bipolar transis-
tors [g, = Ic(mA)/25 siemens], using
matched arrays to circumvent problems
of offsets and bias shifts. At very high
frequencies (1OOMHz and above), passive
"balanced mixers" (Section 13.12) are of-
ten the best devices to accomplish the same
task.
It is important to remember that a
FET in conduction at low VDs behaves
like a good resistance all the way down
to zero volts from drain to source (there
are no diode drops or the like to worry
about). We will see op-amps and digital
logic families (CMOS) that take advantage
of this nice property, giving outputs that
saturate cleanly to the power supplies.
FET SWITCHES
The two examples of FET circuits that
we gave at the beginning of the chapter
were both switches: a logic-switching ap-
plication and a linear signal-switchingcir-
cuit. These are among the most important
FET applications and take advantage of
the FET's unique characteristics: high gate
impedance and bipolarity resistive conduc-
tion clear down to zero volts. In practice](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-92-320.jpg?cb=1674599069)
![FET SWITCHES
3.12 Limitations of FET switches 149
signal levelof zero voltsand an output load
consisting of 10k in parallel with 20pC re-
alistic values for an analog switch circuit.
The handsome transients are caused by
charge transferred to the channel, through
the gate-channel capacitance, at the tran-
sitions of the gate. The gate makes a sud-
den step from one supply voltage to the
other, in this case between f15 volt sup-
plies, transferring a slug of charge
Q = CGc [VG(finish) - VG(start)]
CGC is the gate-channel capacitance,
typically around 5pE Note that the amount
of charge transferred to the channel de-
pends only on the total voltage change at
the gate, not on its rise time. Slowing
down the gate signalgives rise to a smaller-
amplitude glitch of longer duration, with
the same total area under its graph. Low-
pass filtering of the switch's output signal
has the same effect. Such measures may
help if the peak amplitude of the glitch
must be kept small, but in general they are
ineffective in eliminating gate feedthrough.
In some cases the gate-channel capacitance
may be predictable enough for you to
cancel the spikes by coupling an inverted
version of the gate signal through a small
adjustable capacitor.
The gate-channel capacitance is distri-
buted over the length of the channel, which
means that some of the charge is coupled
back to the switch's input. As a result, the
size of the output glitch depends on the
signal source impedance and is smallest
when the switch is driven by a voltage
source. Of course, reducing the size of
the load impedance will reduce the size of
the glitch, but this also loads the source
and introduces error and nonlinearity due
to finite RON. Finally, all other things
being equal, a switch with smaller gate-
channel capacitance will introduce smaller
switching transients, although you pay a
price in the form of increased RON.
Figure 3.49 shows an interesting com-
parison of gate-induced charge transfers
for three kinds of analog switches, includ-
ing JFETs. In all cases the gate signal
is making a full swing, i.e., either 30
volts or the indicated supply voltage for
MOSFETs, and a swing from -15 volts
to the signal level for the n-channel JFET
switch. The JFET switch shows a strong
Figure 3.49. Charge
transfer for various
, FET linear switches
-15 - 10 - 5 o + 5 + 10 +15 as a function of signal
v,,,,, (V) voltage.](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-101-320.jpg?cb=1674599069)
![FEEDBACK WITH FINITE-GAIN AMPLIFIERS
4.26 Effects of feedback on amplifier circuits 23
things so that inputs and outputs can be
currents or voltages.) The input to the gain
block is then V,, - BVout. But the output
is just the input times A:
In other words,
and the closed-loop voltage gain, Vout/Vn,
is just
Some terminology: The standard designa-
tions for these quantities are as follows:
G = closed-loopgain, A = open-loop gain,
AB = loop gain, 1 + AB = return differ-
ence, or desensitivity. The feedback net-
work is sometimes called the beta network
(no relation to transistor beta, hf,).
Figure 4.66
4.26 Effects of feedback on
amplifier circuits
Let's look at the important effects of feed-
back. The most significant are predictabil-
ity of gain (and reduction of distortion),
changed input impedance, and changed
output impedance.
Predictability of gain
The voltage gain is A/(l + AB). In the
limit of infinite open-loop gain A, G =
11B. We saw this result in the noninvert-
ing amplifier configuration, where a volt-
age divider on the output provided the
signal to the inverting input (Fig. 4.69).
The closed-loop voltage gain was just the
inverse of the division ratio of the volt-
age divider. For finite gain A, feedback
still acts to reduce the effects of variations
of A (with frequency, temperature, ampli-
tude, etc.). For instance, suppose A de-
pends on frequency as in Figure 4.67. This
Figure 4.67
will surely satisfy anyone's definition of a
poor amplifier (the gain varies over a fac-
tor of 10 with frequency). Now imagine we
introduce feedback, with B = 0.1 (a sim-
ple voltage divider will do). The closed-
loop voltage gain now varies from 1000/[1
+(1000x0.1)], or 9.90, to 10,000/[1 +
(10,000x0.1)], or 9.99, a variation of just
1% over the same range of frequency! To
put it in audio terms, the original amplifier
is flat to flOdB, whereas the feedback am-
plifier is flat to f0.04dB. We can now re-
cover the original gain of 1000with nearly
this linearity by just cascading three such
stages. It was for just this reason (namely,
the need for extremely flat telephone re-
peater amplifiers) that negative feedback
was invented. As the inventor, Harold
Black, described it in his first open publica-
tion on the invention (Electrical Engineer-
ing, 53:114, 1934),"by building an ampli-
fier whose gain is made deliberately, say
40 decibels higher than necessary (10,000-
fold excess on energy basis) and then feed-
ing the output back to the input in such
a way as to throw away the excess gain, it
has been found possible to effect extraordi-
nary improvement in constancy of ampli-
fication and freedom from nonlinearity."](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-184-320.jpg?cb=1674599069)
![FEEDBACK WITH FINITE-GAIN AMPLIFIERS
4.27 Two examples of transistor amplifiers with feedback 23'
Circuit description important to make sure that the dc re-
It may look complicated, but it is extreme- sistances seen from the inputs are equal,
ly straightforward in design and is rela- as shown (a Darlington input stage would
tively easy to analyze. Q1 and Q2 form probably be better here).
a differential pair, with common-emitter
amplifier Q3 amplifying its output. Rs is Analysis
Q3's collector load resistor, and push-pull analyze this circuit in detail, de-
pair Q4 an' Q5 form the output emitter termining the gain, input and output
follower. The output voltage is sampled by impedances, and distortion. T~ illustrate
the feedback network consisting of voltage the utility of feedback, we will find these
divider R4 and Ra, with C2 included to parameters for both the open-loop and
reduce the gain at dc for closed-loop situations (recognizingthat bi-
biasing. R3 sets the quiescent current in
asing would be hopeless in the open~loop
the differential pair, and since overall feed- ca,). To get a feeling for the linearizing
back guarantees that the quiescent Output effect of the feedback, the gain will be
voltage is at ground, Q3's quie~centcur- culated at + 10volts and -10volts output,
rent is seen be lomA ( V ~ ~ as well as the quiescent point (zero volts).
R6,approximately). As we have discussed
earlier (Section 2.151, the diodes bias the Open loop. Input impedance: We cut
push-pull pair intoconduction, leaving One the feedback at point X and ground the
diode drop across the series pair R7 and right side of R4. The input signal sees 1OOk
R8, i.e., 60mA quiescent current. That's in parallel with the impedance looking into
class AB operation, good for minimizing the base. The latter is hfe times twice
crossover distortion, at the cost of 1 watt the intrinsic emitter resistance the
standby dissipation in each Output transis- impedance seen at Q27S emitter due to the
tor. feedback network at Q2's base. For hfe =
From the point of view of our earlier 250, zi, 250~[(2~25)+(3.3k/250)];
circuits, the only unusual feature is Q17s i.e., zin 16k.
quiescent collector voltage, one diode drop Output impedance: Since the imped-
below Vcc. That is where it must sit in ance looking back into Q3's collector is
order to hold Q3 in conduction, and the high, the output transistors are driven by
feedback path ensures that it will. (For a 1.5k source (R6). The output impedance
instance, if Q1 were to pull its ~ollector is about 15 ohms (hfe x 100) plus the 5
closer to ground, Q3 would conduct heav- ohm emitter resistance, or 20 ohms. The
ily, raising the output voltage, which in intrinsic emitter resistance of 0.4 ohm is
turn would force Q2to conduct more heav- negligible.
ily, reducing QI's collector current and Gain: The differential input stage sees
hence restoring the status quo.) R2 was a load of R2 paralleled by Q3's base re-
chosen to give a diode drop at QI's quies- sistance. Since Q3 is running lOmA quies-
cent current in order to keep the collector cent current, its intrinsic emitter resistance
currents in the differential pair approxi- is 2.5 ohms, giving a base impedance of
mately equal at the quiescent point. In about 250 ohms (again, hf, =loo). The
this transistor circuit the input bias current differential pair thus has a gain of
is not negligible (4pA), resulting in a 0.4
volt drop across the lOOk input resistors. 25011620
or 3.5
In transistor amplifier circuits like this, in 2 x
which the input currents are considerably The second stage, Q3, has a voltage gain of
larger than in op-amps, it is particularly 1.5W2.5ohms,or 600. The overall voltage](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-188-320.jpg?cb=1674599069)
![FEEDBACK AMPLIFIER FREQUENCY COMPENSATION
4.35 Frequency response of the feedback network 247
so that the open-loop gain reaches 30dB
(rather than OdB) at the frequency of the
next natural pole of the op-amp. As the
graph shows, this means that the open-loop
gain is higher over most of the frequency
range, and the resultant amplifier will work
at higher frequencies. Some op-amps
are available in uncompensated versions
[e.g., the 748 is an uncompensated 741;
the same is true for the 308 (312), 3130
(3160), HA5102 (HA5112), etc.], with
recommended external capacitance values
for a selection of minimum closed-loop
gains. They are worth using if you need the
added bandwidth and your circuit operates
at high gain. An alternative is to use
"decompensated" (a better word might be
"undercompensated") op-amps, such as
the 357, which are internally compensated
for closed-loop gains greater than some
minimum (Av> 5 in the case of the 357).
t -- -- -- -
I
frequency (log)
Figure 4.88
amplifier to move upward somewhat in
frequency, an effect known as "pole split-
ting." The frequency of the canceling zero
will be chosen accordingly.
4.35 Frequency response of the
feedback network
7Pole-zero compensation
It is possible to do a bit better than with
dominant-pole compensation by using a
compensation network that begins drop-
ping (6dB/octave, a "pole") at some low
frequency, then flattens out again (it has a
"zero") at the frequency of the second nat-
ural pole of the op-amp. In this way the
amplifier's second pole is "canceled,"giv-
ing a smooth 6dBloctave rolloff up to the
amplifier's third pole. Figure 4.88 shows
a frequency response plot. In practice,
the zero is chosen to cancel the amplifier's
second pole; then the position of the first
pole is adjusted so that the overall response
reaches unity gain at the frequency of the
amplifier's third pole. A good set of data
sheets will often give suggested component
values (an R and a C) for pole-zero com-
pensation, as well as the usual capacitor
values for dominant-pole compensation.
As you will see in Section 13.06, moving
the dominant pole downward in frequency
actually causes the second pole of the
In all of the discussion thus far we have
assumed that the feedback network has
a flat frequency response; this is usually
the case, with the standard resistive volt-
age divider as a feedback network. How-
ever, there are occasions when some sort
of equalization amplifier is desired (inte-
grators and differentiators are in this cat-
egory) or when the frequency response of
the feedback network is modified to im-
prove amplifier stability. In such cases it
is important to remember that the Bode
plot of loop gain versus frequency is what
matters, rather than the curve of open-
loop gain. To make a long story short, the
curve of ideal closed-loop gain versus fre-
quency should intersect the curve of open-
loop gain, with a difference in slopes of
6dBloctave. As an example, it is com-
mon practice to put a small capacitor (a
few picofarads) across the feedback resis-
tor in the usual inverting or noninverting
amplifier. Figure 4.89 shows the circuit
and Bode plot.](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-198-320.jpg?cb=1674599069)
![ACTIVE FILTERS
5.02 Ideal performance with LC filters 265
frequency (kHz)
Figure 5.3. An unusually good passive bandpass filter implemented from inductorsand capacitors
(inductances in mH,capacitances in pF). Bottom: Measured response of the filter circuit. [Based
on Figs. 11 and 12 from Orchard, H. J., and Sheahan,D. E, ZEEE Journal of Solid-State Circuits,
Vol. SC-5, NO. 3 (1970).]
(or breakpoint, howeverdefined) is at a fre-
quency of 1 radian per second (or at 1Hz).
To determine the response of a filter whose
breakpoint is set at some other frequency,
simply multiply the values on the frequen-
cy axis by the actual breakpoint frequency
f,. In general, we will also stick to the
log-log graph of frequency response when
talking about filters, because it tells the
most about the frequency response. It
lets you see the approach to the ultimate
rolloff slope, and it permits you to read
off accurate values of attenuation. In this
case (cascaded RC sections) the normal-
ized graphs in Figures 5.2B and 5.2C dem-
onstrate the soft knee characteristic of pas-
sive RC filters.
5.02 Ideal performance with LC filters
As we pointed out in Chapter 1, filters
made with inductors and capacitors can
have very sharp responses. The parallel
LC resonant circuit is an example. By
including inductors in the design, it is pos-
sible to create filters with any desired flat-
ness of passband combined with sharpness
of transition and steepness of falloff out-
side the band. Figure 5.3 shows an exam-
ple of a telephone filter and its character-
istics.
Obviously the inclusion of inductors in-
to the design brings about some magic that
cannot be performed without them. In
the terminology of network analysis, that
magicconsists in the use of "off-axis poles."
Even so, the complexity of the filter in-
creases according to the required flatness
of passband and steepness of falloff outside
the band, accounting for the large number
of components used in the preceding fil-
ter. The transient response and phase-shift
characteristics are also generally degraded
as the amplitude response is improved to](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-215-320.jpg?cb=1674599069)
![THREE-TERMINAL AND FOUR-TERMINALREGULATORS
6.19 Switching regulators and dc-dc converters 355
in 317 out
ad;
- 1.2R
4I,,, = 1 . 2 5 1 ~ Figure 6.38. One amp current sources.
to sink current from a load returned to
ground (of course, you could always use
the negative-polarity 337, in the configu-
ration analogous to Fig. 6.38A).
National makes a special 3-terminal
device, the LM334, optimized for use as
a low-power current source. It comes
in the small plastic transistor package
(TO-92), as well as the standard DIP IC
package. You can use it all the way down
to lpA, becausethe"adj"current is a small
fraction of the total current. It has one
peculiarity,however: The output current is
temperature-dependent, in fact, precisely
proportional to absolute temperature. So
although it is not the world's most stable
current source, you can use it (Section
15.01) as a temperature sensor!
6.19 Switching regulators and
dc-dc converters
All the voltage regulator circuits we have
discussed so far work the same way: A
linear control element (the "pass transis-
tor") in series with the unregulated dc is
used, with feedback, to maintain constant
output voltage (or perhaps constant cur-
rent). The output voltage is always lower
in voltage than the unregulated input volt-
age, and some power is dissipated in
the control element [the average value of
I o u t ( K n - Vout),to be precise]. A minor
variation on this theme is the shunt regu-
lator, in which the control element is tied
from the output to ground, rather than in
series with the load; the simple resistor-
plus-zener is an example.
There is another way to generate a reg-
ulated dc voltage, fundamentally different
from what we've seen so far; look at Figure
6.39. In such a switching regulator a tran-
sistor operated as a saturated switch peri-
odically applies the full unregulated volt-
age across an inductor for short intervals.
The inductor's current builds up during
each pulse, storing ~ L I ~of energy in its
magnetic field; the stored energy is trans-
ferred to a filter capacitor at the output,](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-305-320.jpg?cb=1674599069)
![PRECISION OP-AMP DESIGN TECHNIQUES
7.03 Example circuit: precision amplifier with automatic null offset 393
R , R8
100 Ok 10 Ok
0 01% 0 01%
500M
- cornpensatlon- -
'Plastic Capac~tors Inc , PD05-106 [orAmperex
C280MCH/A6M8 16 8fiF). TRW 8 6 3 11 OFF), or
ECC E42A105 K ( 1 OFF)]
Figure 7.1. Autonulling dc laboratory amplifier.
Circuit description if desired. For now, just think of it as a
simple SPST switch.
The basic circuit is a follower (U1) driving When the logic input is HIGH ("auto-
an inverting amplifier of selectable gain zero"), the switch is closed, and U3charges
(U2), the latter offsettable by a signal the analog "memory" capacitor (GI) as
applied to its noninverting input. Q1 and necessary to maintain zero output. No
Q2 are FETs, used in this application as attempt is made to follow rapidly changing
simple analog switches; Q3-Q5 generate signals, since in the sort of application
suitable levels, from a logic-level input, for which this was designed the signals
to activate the switches. Q1 through Q5 are essentially dc, and some averaging
and their associated circuitry could all is a desirable feature. When the switch
be replaced by a relay, or even a switch, is opened, the voltage on the capacitor](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-342-320.jpg?cb=1674599069)
![PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES
436 Chapter 7
temperature of the amplifier, for source
impedance R, .
As we remarked earlier, noise figure
and noise temperature are simply different
ways of conveying the same information.
In fact, you can show that they are related
by the following expressions:
where T is the ambient temperature, usu-
ally taken as 290°K.
Generally speaking, good low-noise am-
plifiers have noise temperatures far below
room temperature (or, equivalently, they
have noise figures far less than 3dB). Later
in the chapter we will explain how you go
about measuring the noise figure (or tem-
perature) of an amplifier. First, however,
we need to understand noise in transis-
tors and the techniques of low-noise de-
sign. We hope the discussion that follows
will clarify what is often a murky sub-
ject!
After reading the next two sections, we
trust you won't ever be confused about
noise figure again!
7.13 Transistor amplifier voltage
and current noise
The noise generated by an amplifier is
easily described by a simple noise model
that is accurate enough for most purposes.- - -
In Figure 7.42, en represents a noise
voltage source in series with the input,
and in represents an input noise current.
The transistor (or amplifier, in general) is
assumed noiseless, and it simply amplifies
the input noise voltage it sees. That is, the
amplifier contributes a total noise voltage
e,, referred to the input, of
ea(rms)= [ef + (~.i,)~]: VIHZ:
generated by the amplifier's input noise
current passing through the source resis-
tance. Since the two noise terms are usu-
ally uncorrelated, their squared amplitudes
add to produce the effective noise voltage
seen by the amplifier. For low source re-
sistances the noise voltage en dominates,
whereas for high source impedances the
noise current in generally dominates.
Figure 7.42. Noise model of a transistor.
Just to give an idea of what these look
like, Figure 7.43 shows a graph of en and
in versus Ic and f , for a 2N5087. We'll
go into some detail now, describing these
and showing how to design for minimum
noise. It is worth noting that voltage noise
and current noise for a transistor are in the
range of nanovolts and picoamps per root
hertz (HZ*).
Voltage noise, en
The equivalent voltage noise looking in
series with the base of a transistor arises
from Johnson noise in the base spreading
resistance, rbb, and collector current shot
noise generating a noise voltage across the
intrinsic emitter resistance re. These two
terms look like this:
The two terms are simply the amplifier 2(w)2 v2/Hz
= 4kTrbb+-
input noise voltage and the noise voltage QIC](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-385-320.jpg?cb=1674599069)
![TTL AND CMOS
8.11 Three-stateand open-collectordevices 489
Dl
D2D3 ]data
A , 1a.r
A 2
read u control (read)
data 3 data2 data 1 data 0
Figure 8.20. Data bus.
data to be sent onto bus
2-input open-collector NANDs for the
three-state drivers of Figure 8.20, bringing
one input of each gate HIGH to enable the
gates onto the bus; note that the data then
asserted onto the bus are inverted. Each
bus line would need a resistive pullup to
A Q +5 volts.
symbol The disadvantage of open-collector
logic is that speed and noise immunity are
degraded, when compared with logic
constructed with active pullup devices,
because of the resistive pullup circuit.
That's why three-state drivers are nearly
universally favored for computer bus
- applications. However, there are three
situations in which you would choose
open-collector (or open-drain) devices:
driving external loads, "wired-OR," and
external buses. Let's look at them briefly.
Figure 8.21. LS TTL open-collector NAND.
Driving external loads
of the driver. Values of a few hundred
to a few thousand ohms are typical. If Open-collector logic is good for driving
you wanted to drive a bus with open- external loads that are returned to a
collector gates, you would substitute higher-voltage positive supply. You might](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-437-320.jpg?cb=1674599069)
![SEQUENTIAL FUNCTIONS AVAILABLE AS ICs
8.27 Sequential PALS 527
outputs
&
+CLK
I
RESET
input
'Ig4 (shift left)
Input
(shift r~ght) tI So S, A B C D ]
mode parallel-load
inputs: inputs
SHIFT R
LOAD
Figure 8.72. '194 4-bit bidirectional shift
register.
CLEAR can be either synchronous or jam-
load; for example, the '323 is the same as
the '299, but with synchronous clear.
Table 8.11 at the end of the chapter lists
the shift registers you're likely to use. As
always, not all types are available in all
logic families; be sure to check the data
books.
RAMSas shift registers
A random-access memory can always be
used as a shift register (but not vice versa)
by using an external counter to generate
successive addresses. Figure 8.73 shows
the idea. An 8-bit synchronous upldown
counter generates successive addresses for
a 256-wordx4-bit CMOS RAM. The com-
bination behaves like a quad 256-bit shift
register, with leftfright direction of shift
selected by the counter's UPIDOWN' con-
trol line. The other inputs of the counter
are shown enabled for counting. By choos-
ing a fast counter and memory, we were
able to achieve a maximum clocking rate
of 30MHz (see timing diagram), which
is the same as that of an integrated (but
much smaller) HC-type shift register. This
technique can be used to produce very
large shift registers, if desired.
EXERCISE 8.28
In the circuit of Figure 8.73, input data seem to
go into the same location that output data are
read from. Nevertheless, the circuit behaves
identically to a classic 256-word shift register.
Explain why.
8.27 Sequential PALs
The combinational (gates-only) PALs we
talked about in Section 8.15 belong to a
larger family that includes devices with
various numbers of on-chip D-type reg-
isters (called "registered PALS"). Typical
of these PALs is the 16R8, shown in Fig-
ure 8.74. The programmable-ANDffixed-
OR array typical of combinational PALS
generates the input levels for 8 synchro-
nously clocked D-type registers with three-
state outputs; the register outputs (and
their inverts) are available, along with the
standard input pins, as inputs to the logic
array. If you look back at Figure 8.57,
you'll see that a registered PAL is a general-
purpose sequential circuit element; within
limits set by the number of registers and
gates available, you can construct just
about anything you want. For instance,
yo](https://image.slidesharecdn.com/theartofelectronics-130527061117-phpapp01/85/The-art-of_electronics-475-320.jpg?cb=1674599069)
The art of_electronics
- 1. The Art Of Electronics - 2nd Edition Paul Horowitz UNlvERSITy Winfield Hill ROWLANDINSTITUTEFOR SCIENCE. CAMBRIDGE, MASSACHUSETTS CAMBRIDGE UNIVERSITY PRESS
- 2. Published by the Press Syndicate of the Universityof Cambridge The Pitt Building, Trumpington Street, Cambridge CB2 IRP 40 West 20th Street, New York, NY 10011-4211, USA 10 Stanlford Road, Oakleigh, Melbourne3166, Australia O Cambridge University Press 1980, 1989 First published1980 Second edition 1989 Reprinted 1990 (twice), 1991, 1993, 1994 Printed in the United States of America Library of Cotlgress C(lrn1oguit~g-111-PublicationData is available. A ccltc[loguerecord for this book is ailabl ablefrom the Britislr Librcln~. ISBN 0-521-37095-7 hardback
- 3. Contents List of tables xvi Preface xix Preface to first edition xxi CHAPTER 1 FOUNDATIONS 1 lntroduction 1 Voltage, current, and resistance 2 1.O1 Voltage and current 2 1.02 Relationship between voltage and current: resistors 4 1.03 Voltage dividers 8 1.04 Voltage and current sources 9 1.05 Thevenin's equivalent circuit 11 1.06 Small-signal resistance 13 Signals 15 1.07 Sinusoidal signals 15 1.08 Signal amplitudes and decibels 16 1.09 Other signals 17 1.10 Logic levels 19 1.11 Signal sources 19 Capacitors and ac circuits 20 1.12 Capacitors 20 1.13 RC circuits: V and I versus time 23 1.14 Differentiators 25 1.15 Integrators 26 Inductors and transformers 28 1.16 Inductors 28 1.17 Transformers 28 Impedance and reactance 29 1.18 Frequency analysis of reactive circuits 30 1.19 Refilters 35 1.20 Phasor diagrams 39 1.21 "Poles" and decibels per octave 40 1.22 Resonant circuits and active filters 41 1.23 Other capacitor applications 42 1.24 ThCvenin's theorem generalized 44 Diodes and diode circuits 44 1.25 Diodes 44 1.26 Rectification 44 1.27 Power-supply filtering 45 1.28 Rectifier configurations for power supplies 46 1.29 Regulators 48 1.30 Circuit applications of diodes 48 1.31 Inductive loads and diode protection 52 Other passive components 53 1.32 Electromechanical devices 53 1.33 Indicators 57 1.34 Variable components 57 Additional exercises 58 CHAPTER 2 TRANSISTORS 61 Introduction 61 2.01 First transistor model: current amplifier 62 Some basic transistor circuits 63 2.02 Transistor switch 63 2.03 Emitter follower 65 vii
- 4. viii CONTENTS 2.04 Emitter followers as voltage regulators 68 2.05 Emitter follower biasing 69 2.06 Transistor current source 72 2.07 Common-emitter amplifier 76 2.08 Unity-gain phase splitter 77 2.09 Transconductance 78 Ebers-Moll model applied to basic transistor circuits 79 10 Improved transistor model: transconductance amplifier 79 11 The emitter follower revisited 81 2.12 The common-emitter amplifier revisited 82 2.13 Biasing the common-emitter amplifier 84 2.14 Current mirrors 88 Some amplifier building blocks 91 2.15 Push-pull output stages 91 2.16 Darlington connection 94 2.17 Bootstrapping 96 2.18 Differential amplifiers 98 2.19 Capacitance and Miller effect 102 2.20 Field-effect transistors 104 Some typical transistor circuits 104 2.21 Regulated power supply 104 2.22 Temperature controller 105 2.23 Simple logic with transistors and diodes 107 Self-explanatory circuits 107 2.24 Good circuits 107 2.25 Bad circuits 107 Additional exercises 107 CHAPTER 3 FIELD-EFFECT TRANSISTORS 113 lntroduction 113 3.01 FET characteristics 114 3.02 FET types 117 3.03 Universal FET characteristics 119 3.04 FET drain characteristics 121 3.05 Manufacturing spread of FET characteristics 122 Basic FET circuits 124 3.06 JFET current sources 125 3.07 FET amplifiers 129 3.08 Source followers 133 3.09 FET gate current 135 3.10 FETs as variable resistors 138 FET switches 140 3.11 FET analog switches 141 3.12 Limitations of FET switches 144 3.13 Some FET analog switch examples 151 3.14 MOSFET logic and power switches 153 3.15 MOSFET handling precautions 169 Self-explanatory circuits 171 3.16 Circuit ideas 171 3.17 Bad circuits 171 vskip6pt CHAPTER 4 FEEDBACK AND OPERATIONAL AMPLIFIERS 175 lntroduction 175 4.01 Introduction to feedback 175 4.02 Operational amplifiers 176 4.03 The golden rules 177 Basic op-amp circuits 177 4.04 Inverting amplifier 177 4.05 Noninverting amplifier 178 4.06 Follower 179 4.07 Current sources 180 4.08 Basic cautions for op-amp circuits 182 An op-amp smorgasbord 183 4.09 Linear circuits 183 4.10 Nonlinear circuits 187 A detailed look at op-amp behavior 188 4.11 Departure from ideal op-amp performance 189 4.12 Effects of op-amp limitations on circuit behavior 193 4.13 Low-power and programmable op-amps 210
- 5. CONTENTS ix A detailed look at selected op-amp circuits 213 4.14 Logarithmic amplifier 213 4.15 Active peak detector 217 4.16 Sample-and-hold 220 4.17 Active clamp 221 4.18 Absolute-value circuit 221 4.19 Integrators 222 4.20 Differentiators 224 Op-amp operation with a single power supply 224 4.2 1 Biasing single-supply ac amplifiers 225 4.22 Single-supply op-amps 225 Comparators and Schmitt trigger 229 4.23 Comparators 229 4.24 Schmitt trigger 231 Feedback with finite-gain amplifiers 232 4.25 Gain equation 232 4.26 Effects of feedback on amplifier circuits 233 4.27 Two examples of transistor amplifiers with feedback 236 Some typical op-amp circuits 238 4.28 General-purpose lab amplifier 238 4.29 Voltage-controlled oscillator 240 4.30 JFET linear switch with RoN compensation 241 4.31 TTL zero-crossing detector 242 4.32 Load-current-sensing circuit 242 Feedback amplifier frequency compensation 242 4.33 Gain and phase shift versus frequency 243 4.34 Amplifier compensation methods 245 4.35 Frequency response of the feedback network 247 4.37 Bad circuits 250 Additional exercises 251 CHAPTER 5 ACTIVE FILTERS AND OSCILLATORS 263 Active filters 263 5.01 Frequency response with RC filters 263 5.02 Ideal performance with LC filters 265 5.03 Enter active filters: an overview 266 5.04 Key filter performance criteria 267 5.05 Filter types 268 Active filter circuits 272 5.06 VCVS circuits 273 5.07 VCVS filter design using our simplified table 274 5.08 State-variable filters 276 5.09 Twin-T notch filters 279 5.10 Gyrator filter realizations 281 5.1 1 Switched-capacitor filters 281 Oscillators 284 5.12 Introduction to oscillators 284 5.13 Relaxation oscillators 284 5.14 The classic timer chip: the 555 286 5.15 Voltage-controlled oscillators 291 5.16 Quadrature oscillators 291 5.17 Wien bridge and LC oscillators 296 5.18 LC oscillators 297 5.19 Quartz-crystal oscillators 300 Self-explanatory circuits 303 5.20 Circuit ideas 303 Additional exercises 303 CHAPTER 6 VOLTAGE REGULATORS AND POWER CIRCUITS 307 Self-explanatory circuits 250 Basic regulator circuits with the 4.36 Circuit ideas 250 classic 723 307
- 6. x CONTENTS 6.01 The 723 regulator 307 CHAPTER 7 6.02 Positive regulator 309 PRECISION CIRCUITS AND LOW-NOISE 6.03 High-current regulator 311 TECHNIQUES 391 Heat and power design 312 6.04 Power transistors and heat sinking 312 6.05 Foldback current limiting 316 6.06 Overvoltage crowbars 317 6.07 Further considerations in high- current power-supply design 320 6.08 Programmable supplies 321 6.09 Power-supply circuit example 323 6.10 Other regulator ICs 325 Precision op-amp design techniques 391 Precision versus dynamic range 391 Error budget 392 Example circuit: precision with automatic null offset A precision-design error budget 394 Component errors 395 amplifier 392 The unregulated supply 325 7.06 Amplifier input errors 396 6.11 ac line components 326 7.07 Amplifier output errors 403 6.12 Transformer 328 7.08 Auto-zeroing(chopper-stabilized) 6.13 dc components 329 amplifiers 415 Voltage references 331 6.14 Zener diodes 332 6.15 Bandgap (VBE)reference 335 Three-terminal and four-terminal regulators 341 6.16 Three-terminal regulators 341 6.17 Three-terminal adjustable regulators 344 6.18 Additional comments about 3-terminal regulators 345 6.19 Switching regulators and dc-dc converters 355 Special-purpose power-supply circuits 368 6.20 High-voltage regulators 368 6.21 Low-noise, low-drift supplies 374 6.22 Micropower regulators 376 6.23 Flying-capacitor (charge pump) voltage converters 377 6.24 Constant-current supplies 379 6.25 Commercial power-supply modules 382 Self-explanatory circuits 384 6.26 Circuit ideas 384 6.27 Bad circuits 384 Additional exercises 384 Differentialand instrumentation amplifiers 421 7.09 Differencing amplifier 421 7.10 Standard three-op-amp instrumentation amplifier 425 Amplifier noise 428 7.11 Origins and kinds of noise 430 7.12 Signal-to-noise ratio and noise figure 433 7.13 Transistor amplifier voltage and current noise 436 7.14 Low-noise design with transistors 438 7.15 FET noise 443 7.16 Selecting low-noise transistors 445 7.17 Noise in differential and feedback amplifiers 445 Noise measurements and noise sources 449 7.18 Measurement without a noise source 449 7.19 Measurement with noise source 450 7.20 Noise and signal sources 452 7.21 Bandwidth limiting and rms voltage measurement 453 7.22 Noise potpourri 454
- 7. CONTENTS xi Interference: shielding and grounding 455 7.23 Interference 455 7.24 Signal grounds 457 7.25 Grounding between instruments 457 Self-explanatory circuits 466 7.26 Circuit ideas 466 Additional exercises 466 CHAPTER 8 DIGITAL ELECTRONICS 471 Basic logic concepts 471 8.01 Digital versus analog 471 8.02 Logic states 472 8.03 Number codes 473 8.04 Gates and truth tables 478 8.05 Discrete circuits for gates 480 8.06 Gate circuit example 481 8.07 Assertion-levellogic notation 482 TTL and CMOS 484 8.08 Catalog of common gates 484 8.09 IC gate circuits 485 8.10 TTL and CMOS characteristics 486 8.11 Three-state and open-collector devices 487 Combinational logic 490 8.12 Logic identities 491 8.13 Minimization and Karnaugh maps 492 8.14 Combinational functions available as ICs 493 8.15 Implementing arbitrary truth tables 500 Sequential logic 504 8.16 Devices with memory: flip- flops 504 8.17 Clocked flip-flops 507 8.18 Combining memory and gates: sequential logic 512 8.19 Synchronizer 515 Monostable multivibrators 517 8.20 One-shot characteristics 517 8.21 Monostable circuit example 519 8.22 Cautionary notes about monostables 519 8.23 Timing with counters 522 Sequential functions available as ICs 523 8.24 Latches and registers 523 8.25 Counters 524 8.26 Shift registers 525 8.27 Sequential PALS 527 8.28 Miscellaneous sequential functions 541 Some typical digital circuits 544 8.29 Modulo-n counter: a timing example 544 8.30 Multiplexed LED digital display 546 8.31 Sidereal telescope drive 548 8.32 An n-pulse generator 548 Logic pathology 551 8.33 dc problems 551 8.34 Switching problems 552 8.35 Congenital weaknesses of TTL and CMOS 554 Self-explanatorycircuits 556 8.36 Circuit ideas 556 8.37 Bad circuits 556 Additional exercises 556 CHAPTER 9 DIGITAL MEETS ANALOG 565 CMOS and TTL logic interfacing 565 9.01 Logic family chronology 565 9.02 Input and output characteristics 570 9.03 Interfacing between logic families 572 9.04 Driving CMOS amd TTL inputs 575 9.05 Driving digital logic from comparators and op-amps 577
- 8. xii CONTENTS 9.06 Some comments about logic inputs 579 9.07 Comparators 580 9.08 Driving external digital loads from CMOS and TTL 582 9.09 NMOS LSI interfacing 588 9.10 Opto-electronics 590 Digital signals and long wires 599 9.1 1 On-board interconnections 599 9.12 Intercard connections 601 9.13 Data buses 602 9.14 Driving cables 603 Analogldigital conversion 612 9.15 Introduction to A/D conversion 612 9.16 Digital-to-analog converters (DACs) 614 9.17 Time-domain (averaging) DACs 618 9.18 Multiplying DACs 619 9.19 Choosing a DAC 619 9.20 Analog-to-digitalconverters 621 9.21 Charge-balancing techniques 626 9.22 Some unusual AID and DIA converters 630 9.23 Choosing an ADC 631 Some AID conversion examples 636 9.24 16-Channel AID data-acquisition system 636 9.25 3 + - ~ i ~ i tvoltmeter 638 9.26 Coulomb meter 640 Phase-locked loops 641 9.27 Introduction to phase-locked loops 641 9.28 PLL design 646 9.29 Design example: frequency multiplier 647 9.30 PLL capture and lock 651 9.31 Some PLL applications 652 Pseudo-random bit sequences and noise generation 655 9.32 Digital noise generation 655 9.33 Feedback shift register sequences 655 9.34 Analog noise generation from maximal-length sequences 658 9.35 Power spectrum of shift register sequences 658 9.36 Low-pass filtering 660 9.37 Wrap-up 661 9.38 Digital filters 664 Self-explanatorycircuits 667 9.39 Circuit ideas 667 9.40 Bad circuits 668 Additional exercises 668 CHAPTER 10 MICROCOMPUTERS 673 Minicomputers, microcomputers, and microprocessors 673 10.01 Computer architecture 674 A computer instruction set 678 10.02 Assembly language and machine language 678 10.03 Simplified 808618 instruction set 679 10.04 A programming example 683 Bus signals and interfacing 684 10.05 Fundamental bus signals: data, address, strobe 684 10.06 Programmed 110: data out 685 10.07 Programmed I/O: data in 689 10.08 Programmed 110: status registers 690 10.09 Interrupts 693 10.10 Interrupt handling 695 10.11 Interrupts in general 697 10.12 Direct memory access 701 10.13 Summary of the IBM PC's bus signals 704 10.14 Synchronous versus asynchronous bus communication 707 10.15 Other microcomputer buses 708 10.16 Connecting peripherals to the computer 711
- 9. CONTENTS xiii Software system concepts 714 10.17 Programming 714 10.18 Operating systems, files, and use of memory 716 Data communications concepts 719 10.19 Serial communication and ASCII 720 10.20 Parallel communication: Centronics, SCSI, IPI, GPIB (488) 730 10.21 Local area networks 734 10.22 Interface example: hardware data packing 736 10.23 Number formats 738 CHAPTER 11 MICROPROCESSORS 743 A detailed look at the 68008 744 11.O1 Registers, memory, and I/O 744 11.02 Instruction set and addressing 745 11.03 Machine-language representation 750 11.04 Bus signals 753 A complete design example: analog signal averager 760 11.05 Circuit design 760 11.06 Programming: defining the task 774 11.07 Programming: details 777 11.08 Performance 796 11.09 Some afterthoughts 797 Microprocessor support chips 799 11.10 Medium-scale integration 800 11.11 Peripheral LSI chips 802 11.12 Memory 812 11.13 Other microprocessors 820 CHAPTER 12 ELECTRONIC CONSTRUCTION TECHNIQUES 827 Prototyping methods 827 12.01 Breadboards 827 12.02 PC prototyping boards 828 12.03 Wire-Wrap panels 828 Printed circuits 830 12.04 PC board fabrication 830 12.05 PCboarddesign 835 12.06 StuffingPC boards 838 12.07 Some further thoughts on PC boards 840 12.08 Advanced techniques 841 Instrument construction 852 12.09 Housing circuit boards in an instrument 852 12.10 Cabinets 854 12.11 Construction hints 855 12.12 Cooling 855 12.13 Some electrical hints 858 12.14 Where to get components 860 CHAPTER 13 HIGH-FREQUENCY AND HIGH-SPEED TECHNIQUES 863 High-frequency amplifiers 863 13.01 Transistor amplifiers at high frequencies: first look 863 13.02 High-frequency amplifiers: the ac model 864 13.03 A high-frequency calculation example 866 13.04 High-frequency amplifier configurations 868 13.05 A wideband design example 869 13.06 Some refinements to the ac model 872 13.07 The shunt-series pair 872 13.08 Modular amplifiers 873 systems, Radiofrequencycircuit elements 879 logic analyzers, and evaluation boards 821 13.09 Transmission lines 879
- 10. xiv CONTENTS 13.10 Stubs, baluns, and transformers 881 13.11 Tuned amplifiers 882 13.12 Radiofrequency circuit elements 884 13.13 Measuring amplitude or power 888 Radiofrequency communications: AM 892 13.14 Some communications concepts 892 13.15 Amplitude modulation 894 13.16 Superheterodyne receiver 895 Advanced modulation methods 897 13.17 Single sideband 897 13.18 Frequency modulation 898 13.19 Frequency-shift keying 900 13.20 Pulse-modulation schemes 900 Radiofrequency circuit tricks 902 13.21 Special construction techniques 902 13.22 Exotic RF amplifiers and devices 903 High-speed switching 904 13.23 Transistor model and equations 905 13.24 Analog modeling tools 908 Some switching-speed examples 909 13.25 High-voltage driver 909 13.26 Open-collector bus driver 910 13.27 Example: photomultiplier preamp 911 Self-explanatory circuits 913 13.28 Circuit ideas 913 Additional exercises 913 CHAPTER 14 LOW-POWER DESIGN 917 Introduction 917 14.01 Low-power applications 918 Power sources 920 14.02 Battery types 920 14.03 Wall-plug-in units 931 14.04 Solar cells 932 14.05 Signal currents 933 Power switching and micropower regulators 938 14.06 Power switching 938 14.07 Micropower regulators 941 14.08 Ground reference 944 14.09 Micropower voltage references and temperature sensors 948 Linear micropower design techniques 948 14.10 Problems of micropower linear design 950 14.11 Discrete linear design example 950 14.12 Micropower operational amplifiers 951 14.13 Micropower comparators 965 14.14 Micropower timers and oscillators 965 Micropower digital design 969 14.15 CMOS families 969 14.16 Keeping CMOS low power 970 14.17 Micropower microprocessors and peripherals 974 14.18 Microprocessor design example: degree-day logger 978 Self-explanatory circuits 985 14.19 Circuit ideas 985 CHAPTER 15 MEASUREMENTS AND SIGNAL PROCESSING 987 Overview 987 Measurement transducers 988 15.01 Temperature 988 15.02 Light level 996 15.03 Strain and displacement 1001
- 11. CONTENTS xv 15.04 Acceleration, pressure, force, velocity 1004 15.05 Magnetic field 1007 15.06 Vacuum gauges 1007 15.07 Particle detectors 1008 15.08 Biological and chemical voltage probes 1012 Precision standards and precision measurements 1016 15.09 Frequency standards 1016 15.10 Frequency, period, and time- interval measurements 1019 15.1 1 Voltage and resistance standards and measurements 1025 Bandwidth-narrowing techniques 1026 15.12 The problem of signal-to-noise ratio 1026 15.13 Signal averaging and multichannel averaging 1026 15.14 Making a signal periodic 1030 15.15 Lock-in detection 1031 15.16 Pulse-height analysis 1034 15.17 Time-to-amplitude converters 1035 Spectrum analysis and Fourier transforms 1035 15.18 Spectrum analyzers 1035 15.19 Off-line spectrum analysis 1038 Self-explanatory circuits 1038 15.20 Circuit ideas 1038 APPENDIXES 1043 Appendix A The oscilloscope 1045 Appendix B Math review 1050 Appendix C The 5%resistor color code 1053 Appendix D 1%Precision resistors 1054 Appendix E How to draw schematic diagrams 1056 Appendix F Load lines 1059 Appendix G Transistor saturation 1062 Appendix H LC Butterworth filters 1064 Appendix I Electronics magazines and journals 1068 Appendix J IC prefixes 1069 Appendix K Data sheets 1072 2N4400-1NPN transistor 1073 LF41 1-12 JFET operational amplifier 1078 LM317 3-terminal adjustable regulator 1086 Bibliography 1095 Index 1101
- 12. Tables 7.4 7.5 8.1 8.2 8.3 8.4 xvi Diodes 43 Small-signal transistors 109 JFETs 125 MOSFETs 126 Dual matched JFETs 128 Current regulator diodes 129 Power MOSFETs 164 BJT-MOSFET comparison 166 Electrostatic voltages 170 Operational amplifiers 196 Recommended op-amps 208 High-voltage op-amps 213 Power op-amps 214 Time-domain filter comparison 273 VCVS low-pass filters 274 555-type oscillators 289 Selected VCOs 293 Power transistors 314 Transient suppressors 326 Power-line filters 327 Rectifiers 331 Zener and reference diodes 334 500mW zeners 334 IC voltage references 336 Fixed voltage regulators 342 Adjustable voltage regulators 346 Dual-tracking regulators 352 Seven precision op-amps 401 Precision op-amps 404 High-speed precision op-amps 412 Fast buffers 418 Instrumentation amplifiers 429 4-bit integers 477 TTL and CMOS gates 484 Logic identities 491 Buffers 560 Transceivers 560 Decoders 561 Magnitude comparators 561 Monostable multivibrators 562 D-registers and latches 562 Counters 563 Shift registers 564 Logic family characteristics 570 Allowed connections between logic families 574 Comparators 584 DIA converters 620 AID converters 632 Integrating AID converters 634 IBM PC bus 704 Computer buses 709 ASCII codes 721 RS-232 signals 724 Serial data standards 727 Centronics (printer) signals 730 6800018 instruction set 746 Allowable addressing modes 748 6800018 addressing modes 749 68008 bus signals 753 6800018 vectors 788 Zilog 8530 registers 804 Zilog 8530 serial port initialization 806 Microprocessors 822 PC graphic patterns 839 Venturi fans 858 RF transistors 877 Wideband op-amps 878 Primary batteries 922 Battery characteristics 923 Primary-battery attributes 930
- 13. TABLES xvii 14.4 Low-power regulators 942 14.9 Microprocessor controllers 976 14.5 Micropower voltage references 14.10 Temperature logger current drain 949 983 14.6 Micropower op-amps 956 15.1 Thermocouples 990 14.7 Programmable op-amps 958 D.1 Selected resistor types 1055 14.8 Low-power comparators 966 H.1 Butterworth low-pass filters 1064
- 14. Ch2: Transistors INTRODUCTION The transistor is our most important ex- ample of an "active" component, a device that can amplify, producing an output sig- nal with more power in it than the input signal. The additional power comes from an external source of power (the power supply, to be exact). Note that voltage am- plification isn't what matters, since, for ex- ample, a step-up transformer, a "passive" component just like a resistor or capaci- tor, has voltage gain but no power gain. Devices with power gain are distinguish- able by their ability to make oscillators, by feeding some output signal back into the input. It is interesting to note that the prop- erty of power amplification seemed very important to the inventors of the transis- tor. Almost the 'first thing they did to convince themselves that they had really invented something was to power a loud- speaker from a transistor, observing that the output signal sounded louder than the input signal. The transistor is the essential ingredi- ent of every electronic circuit, from the simplest amplifier or oscillator to the most elaborate digital computer. Integrated cir- cuits (ICs), which have largely replaced cir- cuits constructed from discrete transistors, are themselves merely arrays of transistors and other components built from a single chip of semiconductor material. A good understanding of transistors is very important, even if most of your circuits are made from ICs, because you need to understand the input and output properties of the IC in order to connect it to the rest of your circuit and to the outside world. In addition, the transistor is the single most powerful resource for interfacing, whether between ICs and other circuitry or between one subcircuit and another. Finally, there are frequent (some might say too frequent) situations where the right IC just doesn't exist, and you have to rely on discrete transistor circuitry to do the job. As you will see, transistors have an excitement all their own. Learning how they work can be great fun. Our treatment of transistors is going to be quite different from that of many other books. It is common practice to use the h-parameter model and equivalent t
- 15. TRANSISTORS i2 Chapter 2 circuit. In our opinion that is unnecessar- ily complicated and unintuitive. Not only does circuit behavior tend to be revealed to you as something that drops out of elabo- rate equations, rather than deriving from a clear understanding in your own mind as to how the circuit functions; you also have the tendency to lose sight of which param- eters of transistor behavior you can count on and, more important, which ones can vary over large ranges. In this chapter we will build up instead a very simple introductory transistor model and immediately work out some circuits with it. Soon its limitations will become apparent; then we will expand the model to include the respected Ebers-Moll con- ventions. With the Ebers-Moll equations and a simple 3-terminal model, you will have a good understanding of transistors; you won't need to do a lot of calculations, and your designs will be first-rate. In par- ticular, they will be largely independent of the poorly controlled transistor parameters such as current gain. Some important engineering notation should be mentioned. Voltage at a tran- sistor terminal (relative to ground) is in- dicated by a single subscript (C, B, or E): Vc is the collector voltage, for in- stance. Voltage between two terminals is indicated by a double subscript: VBE is the base-to-emitter voltage drop, for in- stance. If the same letter is repeated, that means a power-supply voltage: Vcc is the (positive) power-supply voltage associated with the collector, and VEE is the (neg- ative) supply voltage associated with the emitter. 2.01 First transistor model: current amplifier Let's begin. A transistor is a 3-terminal device (Fig. 2.1) available in 2 flavors (npn and pnp), with properties that meet the following rules for npn transistors (for pnp simply reverse all polarities): 1. The collector must be more positive than the emitter. 2. The base-emitter and base-collector circuits behave like diodes (Fig. 2.2). Normally the base-emitter diode is con- ducting and the base-collector diode is re- verse-biased, i.e., the applied voltage is in the opposite direction to easy current flow. Figure 2.1. Transistor symbols, and small transistor packages. Figure 2.2. An ohmmeter's view of a transis- tor's terminals. 3. Any given transistor has maximum values of Ic, IB, and VCE that cannot be exceeded without costing the exceeder the price of a new transistor (for typical values, see Table 2.1). There are also other limits, such as power dissipation (revCE), temperature, VBE, etc., that you must keep in mind. 4. When rules 1-3 are obeyed, Icis rough- ly proportional to IBand can be written as where hFE, the current gain (also called beta), is typically about 100. Both Ic and IEflow to the emitter. Note: The collector current is not due to forward conduction of the base-collector diode;
- 16. SOME BASIC TRANSISTOR CIRCUITS 2.02 Transistor switch 6: that diode is reverse-biased. Just think of it as "transistor action." Property 4 gives the transistor its useful- ness: A small current flowing into the base controls a much larger current flowing into the collector. Warning: hFE is not a "good"transistor parameter; for instance, its value can vary from 50 to 250 for different specimens of a given transistor type. It also depends upon the collector current, collector-to-emitter voltage, and temperature. A circuit that depends on a particular value for hFE is a bad circuit. Note particularly the effect of property 2. This means you can't go sticking a voltage across the base-emitter terminals, because an enormous current will flow if the base is more positive than the emitter by more than about 0.6 to 0.8 volt (forward diode drop). This rule also implies that an op- erating transistor has VB % VE +0.6 volt (VB = VE + VBE). Again, polarities are normally given for npn transistors; reverse them for pnp. Let us emphasize again that you should not try to think of the collector current as diode conduction. It isn't, because the collector-base diode normally has voltages applied across it in the reverse direction. Furthermore, collector current varies very little with collector voltage (it behaves like a not-too-great current source), unlike for- ward diode conduction, where the current rises very rapidly with applied voltage. SOME BASIC TRANSISTOR CIRCUITS 2.02 Transistor switch Look at the circuit in Figure 2.3. This ap- plication, in which a small control current enables a much larger current to flow in an- other circuit, is called a transistor switch. From the preceding rules it is easy to un- derstand. When the mechanical switch is open, there is no base current. So, from 10V 0.1A mechanical switch Figure 2.3. Transistor switch example. rule 4, there is no collector current. The lamp is off. When the switch is closed, the base rises to 0.6 volt (base-emitter diode is in forward conduction). The drop across the base resistor is 9.4 volts, so the base current is 9.4mA. Blind application of rule 4 gives Ic = 940mA (for a typical beta of 100). That is wrong. Why? Because rule 4 holds only if rule 1 is obeyed; at a collector current of lOOmA the lamp has 10 volts across it. To get a higher current you would have to pull the collector below ground. A transistor can't do this, and the result is what's called saturation - the collector goes as close to ground as it can (typical saturation voltagesare about 0.05- 0.2V, see Appendix G) and stays there. In this case, the lamp goes on, with its rated 10 volts across it. Overdriving the base (we used 9.4mA when 1.OmA would have barely sufficed) makes the circuit conservative; in this particular case it is a good idea, since a lamp draws more current when cold (the resistance of a lamp when cold is 5 to 10 times lower than its resistance at operating current). Also transistor beta drops at low collector-to-base voltages, so some extra base current is necessary to bring a transistor into full saturation (see Appendix G). Incidentally, in a real circuit you would probably put a resistor from base to ground (perhaps 10k in this case) to make sure the base is at ground with the switch open. It wouldn't affect the
- 17. TRANSISTORS 64 Chapter 2 "on" operation, because it would sink only 0.06mA from the base circuit. There are certain cautions to be ob- served when designing transistor switches: 1. Choose the base resistor conservatively to get plenty of excess base current, es- pecially when driving lamps, because of the reduced beta at low VCE. This is also a good idea for high-speed switching, because of capacitive effects and reduced beta at very high frequencies (many mega- hertz). A small "speedup" capacitor is of- ten connected across the base resistor to improve high-speed performance. 2. If the load swings below ground for some reason (e.g., it is driven from ac, or it is inductive), use a diode in series with the collector (or a diode in the reverse direction to ground) to prevent collector- base conduction on negative swings. 3. For inductive loads, protect the transis- tor with a diode across the load, as shown in Figure 2.4. Without the diode the in- ductor will swing the collector to a large positive voltage when the switch is opened, most likely exceeding the collector-emitter breakdown voltage, as the inductor tries to maintain its "on" current from Vcc to the collector (seethe discussion of inductors in Section 1.31). Figure 2.4. Always use a suppression diode when switching an inductive load. Transistor switches enable you to switch very rapidly, typically in a small fraction of a microsecond. Also, you can switch many different circuits with a single control sig- nal. One further advantage is the possibil- ity of remote cold switching, in which only dc control voltages snake around through cables to reach front-panel switches, rather than the electronically inferior approach of having the signals themselves traveling through cablesand switches(if you run lots of signals through cables, you're likely to get capacitive pickup as well as some sig- nal degradation). "Transistor man" Figure 2.5 presents a cartoon that will help you understand some limits of transistor Figure 2.5. "Transistor man" observes the base current, and adjusts the output rheostat in an attempt to maintain the output current ILFE times larger. behavior. The little man's perpetual task in life is to try to keep Ic = hFEIB; however, he is only allowed to turn the knob on the variable resistor. Thus he can go from a short circuit (saturation) to an open circuit (transistor in the "off' state), or anything in between, but he isn't allowed to use batteries, current sources, etc. One warning is in order here: Don't think that the collector of a transistor
- 18. looks like a resistor. It doesn't. Rather, it looks approximately like a poor-quality constant-current sink (the value of current depending on the signal applied to the base), primarily because of this little man's efforts. Another thing to keep in mind is that, at any given time, a transistor may be (a) cut off (no collector current), (b) in the active region (some collector current, and collector voltage more than a few tenths of a volt above the emitter), or (c) in saturation (collector within a few tenths of a volt of the emitter). See Appendix G on transistor saturation for more details. 2.03 Emitter follower Figure 2.6 shows an example of an emitter follower. It is called that because the out- put terminal is the emitter, which follows the input (the base), less one diode drop: VEz VB- 0.6 volt The output is a replica of the input, but 0.6 to 0.7 volt less positive. For this circuit, V,, must stay at +0.6 volt or more, or else the output will sit at ground. By returning the emitter resistor to a negative supply voltage, you can permit negative voltage swings as well. Note that there is no collector resistor in an emitter follower. Figure 2.6. Emitter follower. At first glance this circuit may appear useless, until you realize that the input impedance is much larger than the out- put impedance, as will be demonstrated SOME BASIC TRANSISTOR CIRCUITS 2.03 Emitter follower shortly. This means that the circuit re- quires less power from the signal source to drive a given load than would be the case if the signal source were to drive the load directly. Or a signal of some inter- nal impedance (in the ThCvenin sense) can now drive a load of comparable or even lower impedance without loss of amplitude (from the usual voltage-divider effect). In other words, an emitter follower has cur- rent gain, even though it has no voltage gain. It has power gain. Voltage gain isn't everything! Impedances of sources and loads This last point is very important and is worth some more discussion before we calculate in detail the beneficial effects of emitter followers. In electronic circuits, you're always hooking the output of some- thing to the input of something else, as suggested in Figure 2.7. The signal source might be the output of an amplifier stage (with Thevenin equivalent series imped- ance ZOut),driving the next stage or per- haps a load (of some input impedance Zin). In general, the loading effect of the follow- ing stage causes a reduction of signal, as we discussed earlier in Section 1.05. For this reason it is usually best to keep Zo,t << Zin (a factor of 10 is a comfortable rule of thumb). In some situations it is OK to forgo this general goal of making the source stiff compared with the load. In particular, if the load is always connected (e.g., within a circuit) and if it presents a known and constant Zi,, it is not too serious if it "loads" the source. However, it is always nicer if signal levels don't change when a load is connected. Also, if Zin varies with signal level, then having a stiff source (Zout<< Zin) assures linearity, where oth- erwise the level-dependent voltage divider would cause distortion. Finally, there are two situations where ZOut<< Zi, is actually the wrong thing to
- 19. TRANSISTORS 66 Chapter 2 t ~ r s t;iriipl~fwr second a m p l ~ f ~ e r Figure 2.7. Illustrating circuit "loading" as a voltage divider. do: In radiofrequency circuits we usually match impedances (Z,,t = Zin), for reasons we'll describe in Chapter 14. A second exception applies if the signal being coupled is a current rather than a voltage. In that case the situation is reversed, and one strives to make Zi, << Zout (ZOut= oo,for a current source). Input and output impedances of emitter followers As you have just seen, the emitter follower is useful for changing impedances of signals or loads. To put it bluntly, that's the whole point of an emitter follower. Let's calculate the input and output impedances of the emitter follower. In the preceding circuit we will consider R to be the load (in practice it sometimes is the load; otherwise the load is in parallel with R, but with R dominating the parallel resistance anyway). Make a voltage change AVBat the base; the corresponding change at the emitter is AVE = AVB. Then the change in emitter current is (using IE= IC+I B ) The input resistance is AVB/AIB. Therefore The transistor beta (hfe) is typically about 100, so a low-impedance load looks like a much higher impedance at the base; it is easier to drive. In the preceding calculation, as in Chap- ter 1, we have used lower-case symbols such as hf e to signify small-signal (incre- mental) quantities. Frequently one con- centrates on the changes in voltages (or currents) in a circuit, rather than the steady (dc) values of those voltages (or currents). This is most common when these "small-signal" variations represent a possible signal, as in an audio amplifier, riding on a steady dc "bias" (see Section 2.05). The distinction between dc cur- rent gain (hFE) and small-signal current gain (h ,) isn't always made clear, and the term beta is used for both. That's alright, since hfe z hFE (except at very high fre- quencies), and you never assume you know them accurately, anyway. Although we used resistances in the preceding derivation, we could generalize to complex impedances by allowing AVB, AIB, etc., to become complex num- bers. We would find that the same
- 20. SOME BASIC TRANSISTOR CIRCUITS 2.03 Emitter follower 67 transformation rule applies for imped- EXERCISE 2.2 ances: Zi, = (hf,+l)Zl,,d. Use a follower with base driven from a voltage We could do a similar calculation to divider to provide a stiff source of +5 volts from find that the output impedance zOUtof an an available regulated +I5 volt supply. Load emitter follower (the impedance looking current (ma'() = 25mA. Choose Your resistor values so that the output voltage doesn't drop into the emitter) driven from a source of morethan 50,0 under full load. internal impedance ZsOurceis given by Zsource Zout = - hfe + 1 Strictly speaking, the output impedance of the circuit should also include the parallel resistance of R, but in practice ZOut (the impedance looking into the emitter) dom- inates. EXERCISE 2.1 Show that the preceding relationship is correct. Hint: Hold the source voltage fixed, and find the changein output current for a given change in output voltage. Remember that the source voltage is connected to the base through a series resistor. Because of these nice properties, emit- ter followers find application in many situations, e.g., making low-impedance sig- nal sources within a circuit (or at out- puts), making stiff voltage references from higher-impedance references (formed from voltage dividers, say), and generally isolat- ing signal sources from the loading effects of subsequent stages. Figure 2.8. An npn emitter follower can source plenty of current through the transistor, but can sink limited current only through its emitter resistor. Important points about followers 1. Notice (Section 2.01, rule 4) that in an emitter follower the npn transistor can only "source" current. For instance, in the loaded circuit shown in Figure 2.8 the output can swing to within a transistor saturation voltage drop of Vcc (about +9.9V), but it cannot go more negative than -5 volts. That is because on the extreme negative swing, the transistor can do no more than turn off, which it does at -4.4 volts input (-5V output). Further negative swing at the input results in backbiasing of the base-emitter junction, but no further change in output. The output, for a 10 volt amplitude sine-wave input, looks as shown in Figure 2.9. Input output Figure 2.9. Illustrating the asymmetrical cur- rent drive capability of the npn emitter fol- lower. Another way to view the problem is to say that the emitter follower has low small-signal output impedance. Its large- signal output impedance is much larger (as large as RE). The output impedance changes over from its small-signal value to its large-signal value at the point where the transistor goes out of the active region (in this case at an output voltage of -5V). To put this point another way, a low value of small-signal output impedance doesn't
- 21. TRANSISTORS 68 Chapter 2 necessarily mean that the circuit can generate large signal swings into a low- resistance load. Low small-signal output impedance doesn't imply large output cur- rent capability. Possible solutions to this problem involve either decreasing the value of the emitter resistor (with greater power dissipation in resistor and transistor), using a pnp transistor (if all signals are negative only), or using a "push-pull" configuration, in which two comple- mentary transistors (one npn, one pnp), are used (Section 2.15). This sort of prob- lem can also come up when the load of an emitter follower contains voltage or current sources of its own. This happens most often with regulated power sup- plies (the output is usually an emitter fol- lower) driving a circuit that has other power supplies. 2. Always remember that the base-emit- ter reverse breakdown voltage for silicon transistors is small, quite often as little as 6 volts. Input swings large enough to take the transistor out of conduction can easily result in breakdown (with conse- quent degradation of ~ F E )unless a protective diode is added (Fig. 2.10). Figure 2.10. A diode prevents base-emitter reverse voltage breakdown. 3. The voltage gain of an emitter follower is actually slightly less than 1.O, because the base-emitter voltage drop is not really constant, but depends slightly on collector current. You will see how to handle that later in the chapter, when we have the Ebers-Moll equation. 2.04 Emitter followers as voltage regulators The simplest regulated supply of voltage is simply a zener (Fig. 2.11). Some current must flow through the zener, so you choose K n - Vout R > rout Because V,, isn't regulated, you use the lowest value of V,, that might occur for this formula. This is called worst-case design. In practice, you would also worry about component tolerances, line-voltage limits, etc., designing to accommodate the worst possible combination that would ever occur. wit';o7T "our (= "zener' (unregulated, ripple) Figure 2.11. Simple zener voltage regulator. The zener must be able to dissipate Again, for worst-case design, you would use V,, (max), Rmin, and rout (min). EXERCISE 2.3 Design a +I0 volt regulated supply for load currents from 0 to 100mA; the input voltage is +20 to +25 volts. Allow at least 10mA zener current under all (worst-case)conditions. What power rating must the zener have? This simple zener-regulated supply is sometimes used for noncritical circuits, or circuits using little supply current. How- ever, it has limited usefulness, for several reasons: 1. Vout isn't adjustable, or settable to a precise value. 2. Zener diodes give only moderate ripple rejection and regulation against changes of
- 22. SOME BASIC TRANSISTOR CIRCUITS 2.05 Emitter follower biasing 6 input or load, owing to their finite dynamic impedance. 3. For widely varying load currents a high- power zener is often necessary to handle the dissipation at low load current. By using an emitter follower to isolate the zener, you get the improved circuit shown in Figure 2.12. Now the situa- tion is much better. Zener current can be made relatively independent of load cur- rent, since the transistor base current is small, and far lower zener power dissipa- tion is possible (reduced by as much as l/hFE).The collector resistor Rc can be added to protect the transistor from mo- mentary output short circuits by limiting the current, even though it is not essential to the emitter follower function. Choose Rc so that the voltage drop across it is less than the drop across R for the highest normal load current. (unregulated) source, which is the subject of Section 2.06. An alternative method uses a low-pass filter in the zener bias circuit (Fig. 2.13). R is chosen to provide sufficient zener cur- rent. Then C is chosen large enough so that RC >> l/friPpl,. (In a variation of this circuit, the upper resistor is replaced by a diode.) "I" 0 (unregulated) Figure 2.13. Reducing ripple in the zener regulator. Later you will see better voltage reg- ulators, ones in which you can vary the output easily and continuously, using feed- back. They are also better voltage sources, with output impedances measured in milli- ohms, temperature coefficients of a few parts per million per degree centigrade, etc. Figure 2.12. Zener regulator with follower, for increased output current. Rc protects the transistor by limitingmaximum output current. EXERCISE 2.4 Design a +10 volt supply with the same specifi- cationsasinExercise2.3. Useazener andernit- ter follower. Calculate worst-case dissipation in transistor and zener. What is the percentage change in zener current from the no-load con- dition to full load? Compare with your previous circuit. A nice variation of this circuit aims to eliminate the effect of ripple current (through R) on the zener voltage by sup- plying the zener current from a current Figure 2.14 2.05 Emitter follower biasing When an emitter follower is driven from a preceding stage in a circuit, it is usually OK to connect its base directly to the
- 23. TRANSISTORS 70 Chapter 2 previous stage's output, as shown in Figure 2.14. Because the signal on Q17scollector is always within the range of the power sup- plies, Qz's base will be between Vcc and ground, and therefore Q2 is in the active region (neither cut off nor saturated), with its base-emitter diode in conduction and its collector at least a few tenths of a volt more positive than its emitter. Sometimes, though, the input to a follower may not be so conveniently situated with respect to the supply voltages. A typical example is a capacitively coupled (or ac-coupled) signal from some external source (e.g., an audio signal input to a high-fidelity amplifier). In that case the signal's average voltage is zero, and direct coupling to an emitter fol- lower will give an output like that in Figure 2.15. I input Figure 2.15. A transistor amplifier powered from a single positive supply cannot generate negative voltage swings at the transistor output terminal. It is necessary to bias the follower (in fact, any transistor amplifier) so that collector current flows during the entire signal swing. In this case a voltage divider is the simplest way (Fig. 2.16). R1 and R2 are chosen to put the base halfway between ground and Vcc with no input signal, i.e., R1 and R2 are approximately equal. The process of selecting the operating voltages in a circuit, in the absence of applied signals, is known as setticg the quiescent point. In this case, as in most cases, the quiescent point is chosen to allow maximum symmetrical signal swing of the output waveform without clipping (flattening of the top or bottom of the waveform). What values should R1 and R2 have? Applying our general principle (Section 1.05), we make the impedance of the dc bias source (the impedance looking into the voltage divider) small compared with the load it drives (the dc impedance looking into the base of the follower). In this case, This is approximately equivalent to saying that the current flowing in the voltage divider should be large compared with the current drawn by the base. Figure 2.16. An ac-coupled emitter follower. Note base bias voltage divider. Emitter follower design example As an actual design example, let's make an emitter follower for audio signals (20Hz to 20kHz). Vcc is +15 volts, and quiescent current is to be 1mA. Step 1. Choose VE. For the largest possible symmetrical swing without clipping, VE = 0.5Vcc, or +7.5 volts. Step 2. Choose RE. For a quiescent current of lmA, RE = 7.5k. Step 3. Choose R1 and Rz. Vg is VE+ 0.6, or 8.1 volts. This determines the ratio of R1 to R2 as 1:1.17. The preceding loading criterion requires that the parallel resistance of R1 and R2 be about 75k or less (one-tenth of 7.5k times hFE).
- 24. SOME BASIC TRANSISTOR CIRCUITS 2.05 Emitter follower biasing 71 Suitable standard values are R1 = 130k, R2 = 150k. Step 4. Choose C1. C1 forms a high-pass filter with the impedance it sees as a load, namely the impedance looking into the base in parallel with the impedance look- ing into the base voltage divider. If we assume that the load this circuit will drive is large compared with the emitter resistor, then the impedance looking into the base is hFERE, about 750k. The divider looks like 70k. So the capacitor sees a load of about 63k, and it should have a value of at least 0.15pF so that the 3dB point will be below the lowest frequency of interest, 20Hz. Step 5. Choose C2. C2 forms a high- pass filter in combination with the load impedance, which is unknown. However, it is safe to assume that the load impedance won't be smaller than RE,which gives a value for Cz of at least 1.OpF to put the 3dB point below 20Hz. Because there are now two cascaded high-pass filter sections, the capacitor values should be increased somewhat to prevent large attenuation (reduction of signal amplitude, in this case 6dB) at the lowest frequency of interest. C1 = 0.5pF and Cz = 3.3pF might be good choices. Followers with split supplies Because signals often are "near ground," it is convenient to use symmetrical positive and negative supplies. This simplifies biasing and eliminates coupling capacitors (Fig. 2.17). Warning: You must always provide a dc path for base bias current, even if it goes only to ground. In the preceding circuit it is assumed that the signal source has a dc path to ground. If not (e.g., if the signal is capacitively coupled), you must provide a resistor to ground (Fig. 2.18). RB could be about one-tenth of hFERE, as before. signal (near --I=ground) output ground) Figure 2.17. A dc-coupledemitterfollowerwith split supply. EXERCISE 2.5 Design an emitter follower with *I5 volt sup- plies to operate over the audio range (20Hz- 2OkHz). Use 5mA quiescent current and capac- itive input coupling. Figure 2.18 Bad biasing Unfortunately, you sometimes see circuits like the disaster shown in Figure 2.19. RB was chosen by assuming a particular value for hFE (loo), estimating the base cur- rent, and then hoping for a 7 volt drop across RB. This is a bad design; ~ F Eis not a good parameter and will vary con- siderably. By using voltage biasing with a stiff voltage divider, as in the detailed example presented earlier, the quiescent point is insensitive to variations in tran- sistor beta. For instance, in the previous design example the emitter voltage will in- crease by only 0.35 volt (5%) for a transis- tor with hFE = 200 instead of the nominal
- 25. TRANSISTORS Chapter 2 hFE= 100. AS with this emitter follower example, it is just as easy to fall into this trap and design bad transistor circuits in the other transistor configurations (e.g., the common-emitter amplifier, which we will treat later in this chapter). Figure 2.19. Don't do this! 2.06 Transistor current source Current sources, although often neglected, are as important and as useful as voltage sources. They often provide an excellent way to bias transistors, and they are un- equaled as "active loads" for super-gain amplifier stages and as emitter sources for differential amplifiers. Integrators, saw- tooth generators, and ramp generators need current sources. They provide wide- voltage-range pull-upswithin amplifier and regulator circuits. And, finally, there are applications in the outside world that require constant current sources, e.g., electrophoresis or electrochemistry. Resistor plus voltage source The simplest approximation to a current source is shown in Figure 2.20. As long as Rload << R (in other words, qoad<< V), the current is nearly constant and is approximately The load doesn't have to be resistive. A capacitor will charge at a constant rate, as long as Vcapacito,<< V; this is just the first part of the exponential charging curve of an RC. Figure 2.20 There are several drawbacks to a simple resistor current source. In order to make a good approximation to a current source, you must use large voltages, with lots of power dissipation in the resistor. In ad- dition, the current isn't easily programma- ble, i.e., controllable over a large range via a voltage somewhere else in the circuit. EXERCISE 2.6 If youwanta currentsourceconstantto1%over a load voltagerangeof 0to +10 volts,how large a voltage source must you use in series with a single resistor? EXERCISE 2.7 Suppose you want a 10mA current in the pre- ceding problem. How muchpoweris dissipated in the series resistor? How much gets to the load? Transistor current source Fortunately, it is possible to make a very good current source with a transistor (Fig. 2.21). It works like this : Applying VB to the base, with VB > 0.6 volt, ensures that the emitter is always conducting: VE = VB - 0.6 volt So IE = VE/RE = (VB - 0.6 vOlt)/RE But, since IE z IC for large hFE, Ic W (VB- 0.6 volt)/RE
- 26. SOME BASIC TRANSISTOR CIRCUITS 2.06 Transistor current source 73 independent of Vc, as long as the transis- tor is not saturated (Vc > VE+0.2 volt). Figure 2.21. Transistor current source: basic concept. Current-source biasing The base voltage can be provided in a number of ways. A voltage divider is OK, as long as it is stiff enough. As before, the criterion is that its impedance should be much less than the dc impedance looking into the base (hFERE). Or you can use a zener diode, biased from Vcc, or even a few forward-biased diodes in series from base to the corresponding emitter supply. Figure 2.22 shows some examples. In the last example (Fig. 2.22C), a pnp transistor sources current to a load returned to ground. The other examples (using npn transistors) should properly be called current sinks, but the usual practice is to call all of them current sources. ["Sink" and "source" simply refer to the direction of current flow: If a circuit supplies (positive) current to a point, it is a source, and vice versa.] In the first circuit, the voltage-divider impedance of -1.3k is very stiff compared with the impedance looking into the base of about lOOk (for hFE= loo), SO any changes in beta with collector voltage will not much affect the output current by causing the base voltage to change. In the other two circuits the biasing resistors are chosen to provide several milliamps to bring the diodes into conduction. Compliance A current source can provide constant current to the load only over some finite range of load voltage. To do otherwise would be equivalent to providing infinite power. The output voltage range over which a current source behaves well is called its output compliance. For the preceding transistor current sources, the compliance is set by the requirement that Figure 2.22. Transistor-current-source circuits, illustrating three methods of base biasing; npn transistors sink current, whereas pnp transistors source current. The circuit in C illustrates a load returned to ground.
- 27. TRANSISTORS 74 Chapter 2 the transistors stay in the active region. Thus in the first circuit the voltage at the collector can go down until the transistor is almost in saturation, perhaps +1.2 volts at the collector. The second circuit, with its higher emitter voltage, can sink current down to a collector voltage of about +5.2 volts. In all cases the collector voltage can range from a value near saturation all the way up to the supply voltage. For exam- ple, the last circuit can source current to the load for any voltage between zero and about +8.6 volts across the load. In fact, the load might even contain batteries or power supplies of its own, carrying the col- lector beyond the supply voltage. That's OK, but you must watch out for transistor breakdown (VCE must not exceed BVcEo, the specified collector-emitter breakdown voltage) and also for excessive power dis- sipation (set by IcVcE). As you will see in Section 6.07, there is an additional safe- operating-area constraint on power transis- tors. EXERCISE 2.8 You have +5 and +15 volt regulated supplies available in a circuit. Design a 5mAnpn current source (sink) using the +5 volts on the base. What is the output compliance? A current source doesn't have to have a fixed voltage at the base. By varying VB you get a voltage-programmable cur- rent source. The input signal swing vi, (remember, lower-case symbols mean vari- ations) must stay small enough so that the emitter voltage never drops to zero, if the output current is to reflect input voltage variations smoothly. The result will be a current source with variations in output current proportional to the variations in input voltage, iOut= vin/RE Deficiencies of current sources To what extent does this kind of cur- rent source depart from the ideal? In other words, does the load current vary with voltage, i.e., have a finite (RTh< m) ThCvenin equivalent resistance, and if so why? There are two kinds of effects: 1. Both VBE (Early effect) and hFE vary slightly with collector-to-emitter voltage at a given collector current. The changes in VBE produced by voltage swings across the load cause the output current to change, because the emitter voltage (and therefore the emitter current) changes, even with a fixed applied base voltage. Changes in h~~ produce small changes in output (col- lector) current for fixed emitter current, since Ic = IE- IB; in addition, there are small changes in applied base voltage produced by the variable loading of the nonzero bias source impedance as hFE (and therefore the base current) changes. These effects are small. For instance, the current from the circuit in Figure 2.22A varied about 0.5% in actual measurements with a 2N3565 transistor. In particular, for load voltages varying from zero to 8 volts, the Early effect contributed 0.5%,and tran- sistor heating effects contributed 0.2%. In addition, variations in hFE contributed 0.05% (note the stiff divider). Thus these variations result in a less-than-perfect cur- rent source: The output current depends slightly on voltage and therefore has less than infinite impedance. Later you will see methods that get around this difficulty. 2. V B ~and also h~~ depend on temper- ature. This causes drifts in output current with changes in ambient temperature; in addition, the transistor junction tempera- ture varies as the load voltage is changed (because of variation in transistor dissipa- tion), resulting in departure from ideal cur- rent source behavior. The change of V B ~ with ambient temperature can be compen- sated with a circuit like that shown in Figure 2.23, in which Qz's base-emitter drop is compensated by the drop in emit- ter follower Q1, with similar tempera- ture dependence. R3, incidentally, is a
- 28. SOME BASIC TRANSISTOR CIRCUITS 2.06 Transistor current source 75 'cc 0load Figure 2.23. One method of temperature- compensating a current source. pull-up resistor for Q1, since Q2's base sinks current, which Q1 cannot source. Improving current-source performance In general, the effectsof variability in VBE, whether caused by temperature depen- dence (approximately -2mVI0C) or by de- pendence on VCE (the Early effect, given roughly by AVBE N" -0.0001 AVCE), can be minimized by choosing the emitter voltage to be large enough (at least lV, say) so that changes in VBE of tens of millivolts will not result in large fractional changes in the voltage across the emitter resistor (remember that the base voltage is what is held constant by your circuit). For instance, choosing VE = 0.1 volt (i.e., applying about 0.7V to the base) would cause 10% variations in output current for lOmV changes in VBE, whereas the choice VE = 1.0 volt would result in 1% current variations for the same VBE changes. Don't get carried away, though. Remember that the lower limit of output compliance is set by the emitter voltage. Using a 5 volt emitter voltage for a current source running from a +10 volt supply limits the output compliance to slightly less than 5 volts (the collector can go from about VE+ 0.2V to Vcc, i.e., from 5.2V to 10V). Figure 2.24. Cascode current source for im- proved current stability with load voltage vari- ations. Figure 2.24 shows a circuit modifica- tion that improves current-source perfor- mance significantly. Current source Q1 functions as before, but with collector volt- age held fixed by Q2's emitter. The load sees the same current as before, since Q2's collector and emitter currents are nearly equal (large hFE). But with this circuit the VCE of Q1 doesn't change with load voltage, thus eliminating the small changes in VBE from Early effect and dissipation- induced temperature changes. Measure- ments with 2N3565s gave 0.1% current variation for load voltages from 0 to 8 volts; to obtain performance of this accu- racy it is important to use stable 1% resis- tors, as shown. (Incidentally, this circuit connection also finds use in high-frequency amplifiers, where it is known as the "cas- code.") Later you will see current source techniques using op-amps and feedback that circumvent the problem of VBE vari- ation altogether. The effects of variability of h~~ can be minimized by choosing transistors with large h F ~ ,SO that the base current contri- bution to the emitter current is relatively small. Figure 2.25 shows one last current source, whose output current doesn't
- 29. TRANSISTORS 76 Chapter 2 depend on supply voltage. In this circuit, Ql's VBE across R2 sets the output cur- rent, independent of Vcc: R1 biases Q2 and holds Ql's collector at two diode drops below Vcc, eliminating Early effect as in the previous circuit. This circuit is not temperature-compensated; the voltage across R2 decreases approxi- mately 2.lmV/"C, causing the output cur- rent to decrease approximately 0.3%/OC. Figure 2.25. Transistor VBE-referenced current source. 2.07 Common-emitter amplifier Consider a current source with a resistor as load (Fig. 2.26). The collector voltage is We could capacitively couple a signal to the base to cause the collector voltage to vary. Consider the example in Figure 2.27. C is chosen so that all frequencies of interest are passed by the high-pass filter it forms in combination with the parallel resistance of the base biasing resistors (the Figure 2.26 impedance looking into the base itself will usually be much larger because of the way the base resistors are chosen, and it can be ignored); that is, The quiescent collector current is l.OmA because of the applied base bias and the 1.0k emitter resistor. That current puts the collector at +10 volts (+20V, minus l.OmA through 10k). Now imagine an applied wiggle in base voltage VB. The emitter follows with VE = VB, which causes a wiggle in emitter current and nearly the same change in collector current (hf,is large). So the initial wiggle in base voltage finally causes a collector voltage wiggle Aha! It's a voltage amplijier, with a voltage amplification (or "gain") given by gain = vOut/vin= -&/RE In this case the gain is -10,000/1000, or -10. The minus sign means that a positive wiggle at the input gets turned into a negative wiggle (10 times as large) at the output. This is called a common-emitter amplifier with emitter degeneration.
- 30. SOME BASIC TRANSISTOR CIRCUITS 2.08 Unity-gain phase splitter 77 signal signal in 1.ov Figure 2.27. An ac common-emitter amplifier with emitter degeneration. Note that the output terminal is thecollector,rather than the emitter. Input and output impedance of the common-emitter amplifier We can easily determine the input and output impedances of the amplifier. The input signal sees, in parallel, 11Ok, 1Ok, and the impedance looking into the base. The latter is about lOOk (hf,times RE), so the input impedance (dominated by the 1Ok) is about 8k. The input coupling capacitor thus forms a high-pass filter, with the 3dB point at 200Hz. The signal driving the amplifier sees 0.1pF in series with 8k, which to signals of normal frequencies (well above the 3dB point) just looks like 8k. The output impedance is 10k in paral- lel with the impedance looking into the collector. What is that? Well, remem- ber that if you snip off the collector resis- tor, you're simply looking into a current source. The collector impedance is very large (measured in megohms), and so the output impedance is just the value of the collector resistor, 10k. It is worth remem- bering that the impedance looking into a transistor's collector is high, whereas the impedance looking into the emitter is low (as in the emitter follower). Although the output impedance of a common-emitter amplifier will be dominated by the collec- tor load resistor, the output impedance of an emitter follower will not be dominated by the emitter load resistor, but rather by the impedance looking into the emitter. 2.08 Unity-gain phase splitter Sometimes it is useful to generate a signal and its inverse, i.e., two signals 180' out of phase. That's easy to do - just use an emitter-degenerated amplifier with a gain of -1 (Fig. 2.28). The quiescent collector voltage is set to 0.75Vcc, rather than the usual 0.5Vcc, in order to achieve the same result - maximum symmetrical output swing without clipping at either output. The collector can swing from 0.5Vcc to Vcc, whereas the emitter can swing from ground to 0.5Vcc. Figure 2.28. Unity-gain phase splitter. Note that the phase-splitter outputs must be loaded with equal (or very high) impedances at the two outputs in order to maintain gain symmetry. Phase shifter A nice use of the phase splitter is shown in Figure 2.29. This circuit gives (for a sine wave input) an output sine wave of adjustable phase (from zero to 180°), but with constant amplitude. It can be best understood with a phasor diagram of voltages (see Chapter 1); representing the input signal by a unit vector along
- 31. TRANSISTORS 78 Chapter 2 the real axis, the signals look as shown in Figure 2.30. output k- Figure 2.29. Constant-amplitudephase shifter. Signal vectors v~ and vc must be at right angles, and they must add to form a vector of constant length along the real axis. There is a theorem from geometry that says that the locus of such points is a circle. So the resultant vector (the output voltage) always has unit length, i.e., the same amplitude as the input, and its phase can vary from nearly zero to nearly 180' relative to the input wave as R is varied from nearly zero to a value much larger than Zc at the operating frequency. However, note that the phase shift also depends on the frequency of the input signal for a given setting of the potentiometer R. It is worth noting that a simple RC high-pass (or low-pass) network could also be used as an adjustable phase shifter. However, its output amplitude would vary over an enormous range as the phase shift was adjusted. An additional concern here is the ability of the phase-splitter circuit to drive the RC phase shifter as a load. Ideally, the load should present an impedance that is large compared with the collector and emitter resistors. As a result, this circuit is of limited utility where a wide range of phase shifts is required. You will see improved phase-splitter techniques in Chapter 4. Figure 2.30. Phasor diagram for phase shifter. 2.09 Transconductance In the preceding section we figured out the operation of the emitter-degenerated am- plifier by (a) imagining an applied base voltage swing and seeing that the emitter voltage had the same swing, then (b) calcu- lating the emitter current swing; then, ig- noring the small base current contribution, we got the collector current swing and thus (c) the collector voltage swing. The voltage gain was then simply the ratio of collector (output) voltage swing to base (input) volt- age swing. 1lok Lsignal out r--signal in Figure 2.31. The common-emitter amplifier is a transconductance stage driving a (resistive) load. There's another way to think about this kind of amplifier. Imagine breaking it apart, as in Figure 2.31. The first part is a voltage-controlled current source, with quiescent current of 1.OmA and gain
- 32. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.10 Improved transistor model: transconductanceamplifier ' of -1mAlV. Gain means the ratio out- putlinput; in this case the gain has units of currentlvoltage, or llresistance. The in- verse of resistance is called conductance (the inverse of reactance is susceptance, and the inverse of impedance is admit- tance) and has a special unit, the siemens, which used to be called the mho (ohm spelled backward). An amplifier whose gain has units of conductance is called a transconductance amplifier; the ratio IOut/V,,is called the transconductance, 9,. Think of the first part of the circuit as a transconductance amplifier, i.e., a voltage- to-current amplifier with transconductance g, (gain) of 1mAIV (IOOOpS, or lmS, which is just l/RE). The second part of the circuit is the load resistor, an "amplifier" that converts current to voltage. This resistor could be called a transresistance amplifier, and its gain (r,) has units of voltagelcurrent, or resistance. In this case its quiescent voltage is Vcc, and its gain (transresistance) is 10kVIA (IOkR), which is just Rc. Connecting the two parts together gives you a voltage amplifier. You get the overall gain by multiplying the two gains. In this case G = gmRc = RcIRE, or -10, a unitless number equal to the ratio (output voltage)/(input voltage). This is a useful way to think about an amplifier, because you can analyze perfor- mance of the sections independently. For example, you can analyze the transconduc- tance part of the amplifier by evaluating g, for different circuit configurations or even different devices, such as field-effect transistors (FETs). Then you can analyze the transresistance (or load) part by consid- ering gain versus voltage swing trade-offs. If you are interested in the overall voltage gain, it is given by Gv = g,r,, where r , is the transresistance of the load. Ulti- mately the substitution of an active load (current source), with its extremely high transresistance, can yield one-stage volt- age gains of 10,000 or more. The cascode configuration, which we will discuss later, is another example easily understood with this approach. In Chapter 4, which deals with opera- tional amplifiers, you will see further ex- amples of amplifiers with voltages or cur- rents as inputs or outputs; voltage ampli- fiers (voltage to voltage), current amplifiers (current to current), and transresistance amplifiers (current to voltage). Turning up the gain: limitations of the simole model- , The voltage gain of the emitter-degener- ated amplifier is -Rc/RE, according to our model. What happens as RE is re- duced toward zero? The equation pre- dicts that the gain will rise without limit. But if we made actual measurements of the preceding circuit, keeping the quies- cent current constant at lmA, we would find that the gain would level off at about 400 when RE is zero, i.e., with the emit- ter grounded. We would also find that the amplifier would become significantly non- linear (the output would not be a faithful replica of the input), the input impedance would become small and nonlinear, and the biasing would become critical and un- stable with temperature. Clearly our tran- sistor model is incomplete and needs to be modified in order to handle this circuit sit- uation, as well as others we will talk about shortly. Our fixed-up model, which we will call the transconductance model, will be accurate enough for the remainder of the book. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.10 Improved transistor model: transconductance amplifier The important change is in property 4 (Section 2.01), where we said earlier that Ic= hFEIB. We thought of the transistor
- 33. TRANSISTORS 80 Chapter 2 as a current amplifier whose input circuit behaved like a diode. That's roughly cor- rect, and for some applications it's good enough. But to understand differential am- plifiers, logarithmic converters, tempera- ture compensation, and other important applications, you must think of the transis- tor as a transconductance device - collector current is determined by base-to-emitter voltage. Here's the modified property 4: 4. When rules 1-3 (Section 2.01) are obeyed, Ic is related to VBE by Ic = Is exp - [ (?)-lI where VT = k T / q = 25.3mV at room temperature (6g°F, 20°C), q is the elec- tron charge (1.60 x 10-l9 coulombs), k is Boltzmann's constant (1.38 x joules/"K), T is the absolute temperature in degrees Kelvin (OK ="C + 273.16), and Is is the saturation current of the partic- ular transistor (depends on T). Then the base current, which also depends on VBE, can be approximated by where the "constant" hFE is typically in the range 20 to 1000, but depends on transistor type, Ic, VCE, and temperature. Is represents the reverse leakage current. In the active region Ic >> Is, and therefore the -1 term can be neglected in comparison with the exponential. The equation for Ic is known as the Ebers-Moll equation. It also approximate- ly describes the current versus voltage for a diode, if VT is multiplied by a correc- tion factor m between 1 and 2. For tran- sistors it is important to realize that the collector current is accurately determined by the base-emitter voltage, rather than by the base current (the base current is then roughly determined by hFE), and that this exponential law is accurate over an enormous range of currents, typically from nanoamps to milliamps. Figure 2.32 makes the point graphically. If you mea- sure the base current at various collector currents, you will get a graph of hFE ver- sus Ic like that in Figure 2.33. Figure 2.32. Transistor base and collector currents as functions of base-to-emittervoltage VBE. log scale l o O t - I L I 1 , 1 1 10 10 ' 10 = 10 10 10 10 Figure 2.33. Typical transistor current gain ( ~ F E )versus collector current. Although the Ebers-Moll equation tells us that the base-emitter voltage "pro- grams" the collector current, this property may not be directly usable in practice (bi- asing a transistor by applying a base volt- age) because of the large temperature co- efficient of base-emitter voltage. You will see later how the Ebers-Moll equation pro- vides insight and solutions to this problem. Rules of thumb for transistor design From the Ebers-Moll equation we can get
- 34. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.11 The emitter follower revisited 81 several important quantities we will be using often in circuit design: 1. The steepness of the diode curve. How much do we need to increase VBE to in- crease Ic by a factor of lo? From the Ebers-Moll equation, that's just VT log, 10, or 60mV at room temperature. Base volt- age increases 60rnV per decade of collector current. Equivalently, Ic = ~ ~ ~ e ~ ~ / ~ ~ , where AV is in millivolts. 2. The small-signal impedance looking into the emitter, for the base held at a fixed voltage. Taking the derivative of VBE with respect to Ic, you get re = VT/IC = 25/Ic ohms where Ic is in milliamps. The numerical value 25/Ic is for room temperature. This intrinsic emitter resistance, re,acts as if it is in series with the emitter in all transistor circuits. It limits the gain of a grounded emitter amplifier, causes an emitter fol- lower to have a voltage gain of slightly less than unity, and prevents the output imped- ance of an emitter follower from reaching zero. Note that the transconductance of a grounded emitter amplifier is g, = l/re. 3. The temperature dependence of VBE. A glance at the Ebers-Moll equation sug- gests that VBE has a positive temperature coefficient. However, because of the tem- perature dependence of Is, VBE decreases about 2.1mV/OC. It is roughly proportional to l/T,b,, where Tabsis the absolute tem- perature. There is one additional quantity we will need on occasion, although it is not derivable from the Ebers-Moll equation. It is the Early effect we described in Section 2.06, and it sets important limits on current-source and amplifier performance, for example: 4. Early effect. VBE varies slightly with changing VCE at constant Ic. This effect is caused by changing effective base width, and it is given, approximately, by where cr =0.0001. These are the essential quantities we need. With them we will be able to handle most problems of transistor circuit design, and we will have little need to refer to the Ebers-Moll equation itself. 2.11 The emitter follower revisited Before looking again at the common-emit- ter amplifier with the benefit of our new transistor model, let's take a quick look at the humble emitter follower. The Ebers-Moll model predicts that an emit- ter follower should have nonzero out- put impedance, even when driven by a voltage source, because of finite re (item 2, above). The same effect also produces a voltage gain slightly less than unity, because re forms a voltage di- vider with the load resistor. These effectsare easy to calculate. With fixed base voltage, the impedance look- ing back into the emitter is just Rout = d v ~ , q / d I ~ ;but IE M IC, SO Rout X re, the intrinsic emitter resistance [re = 251Ic(mA)]. For example, in Figure 2.34A, the load sees a driving impedance of re = 25 ohms, since Ic = 1mA. (This is paralleled by the emitter resistor RE, if used; but in practice RE will always be much larger than re.) Figure 2.34B shows a more typical situation, with finite source resistance Rs (for simplicity we've omitted the obligatory biasing components - base divider and blocking capacitor - which are shown in Fig. 2.34C). In this case the emitter follower's output imped- ance is just re in series with R,/(hfe+ 1) (again paralleled by an unimportant RE, if present). For example, if R, = lk and Ic = lmA, Rout = 35 ohms (assuming hf = 100). It is easy to show that the in- trinsic emitter re also figures into an emit- ter follower's input impedance, just as if it were in series with the load (actually, par- allel combination of load resistor and
- 35. TRANSISTORS 82 Chapter 2 emitter resistor). In other words, for the emitter follower circuit the effect of the Ebers-Moll model is simply to add a series emitter resistance re to our earlier results. The voltage gain of an emitter follower is slightly less than unity, owing to the voltage divider produced by re and the load. It is simple to calculate, because the output is at the junction of re and Rload: GV = vout/vin = R ~ / ( r e+ RL). Thus, for example, a follower running at 1mA quiescent current, with lk load, has a voltage gain of 0.976. Engineers sometimes like to write the gain in terms of the transconductance, to put it in a form that holds for FETs also (see Section 3.07); in that case (using g, = l/re) you get GV = R ~ g m / ( l+RL~,). 4load s~gnal source B + "cc - load -- L Figure 2.34 2.12 The common-emitter amplifier revisited Previously we got wrong answers for the voltage gain of the common-emitter am- plifier with emitter resistor (sometimes called emitter degeneration) when we set the emitter resistor equal to zero. The problem is that the transistor has 25/Ic(mA) ohms of built-in (intrinsic) emitter resistance re that must be added to the actual external emitter resistor. This resistance is significant only when small emitter resistors (or none at all) are used. So, for instance, the amplifier we consid- ered previously will have a voltage gain of -lOk/re, or -400, when the exter- nal emitter resistor is zero. The input
- 36. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTORCIRCUITS 2.12 The common-emitter amplifier revisited 83 impedance is not zero, as we would have predicted earlier (h ,RE); it is approxi- mately hf,r,, or in this case (1mA quies- cent current) about 2.5k. The terms "grounded emitter" and "common emitter" are sometimes used in- terchangeably, and they can be confusing. We will use the phrase "grounded emitter amplifier" to mean a common-emitter am- plifier with RE = 0. A common-emitter amplifier stage may have an emitter resis- tor; what matters is that the emitter circuit is common to the input circuit and the out- put circuit. Shortcomings of the single-stage grounded emitter amplifier The extra voltage gain you get by using RE = 0 comes at the expense of other properties of the amplifier. In fact, the grounded emitter amplifier, in spite of its popularity in textbooks, should be avoided except in circuits with overall negative feedback. In order to see why, consider Figure 2.35. t--- signal out signal in Figure 2.35. Common-emitter amplifier with- out emitter degeneration. 1. Nonlinearity. The gain is G = -gmRc = -Rc/re = -RcIc(mA)/25, so for a quiescent current of lmA, the gain is -400. But Ic varies as the output signal varies. For this example, the gain will vary from -800 (VOut= 0, IC= 2mA) down to zero (VOut= Vcc, Ic = 0). For a triangle-wave input, the output will look like that in Figure 2.36. The amplifier has high distortion, or poor linearity. The grounded emitter amplifier without feedback is useful only for small signal swings about the quiescent point. By contrast, the emitter-degenerated amplifier has gain almost entirely independent of collector current, as long as RE >> re, and can be used for undistorted amplification even with large signal swings. - time + Figure 2.36. Nonlinear output waveform from grounded emitter amplifier. 2. Input impedance. The input impedance is roughly Zi, = hf,r, = 25 hf,/Ic(mA) ohms. Once again, Ic varies over the sig- nal swing, giving a varying input imped- ance. Unless the signal source driving the base has low impedance, you will wind up with nonlinearity due to the nonlinear variable voltage divider formed from the signal source and the amplifier's input im- pedance. By contrast, the input impedance of an emitter-degenerated amplifier is con- stant and high. 3. Biasing. The grounded emitter ampli- fier is difficult to bias. It might be tempt- ing just to apply a voltage (from a volt- age divider) that gives the right quiescent current according to the Ebers-Moll equa- tion. That won't work, because of the tem- perature dependence of VnE (at fixed Ic), which varies about 2.1mV/"C (it actually decreases with increasing T because of the variation of Is with T; as a result, VB,g is roughly proportional to l/T, the abso- lute temperature). This means that the collector current (for fixed VBE) will in- crease by a factor of 10 for a 30°C rise
- 37. TRANSISTORS 84 Chapter 2 in temperature. Such unstable biasing is useless, because even rather small changes in temperature will cause the amplifier to saturate. For example, a grounded emitter stage biased with the collector at half the supply voltage will go into saturation if the temperature rises by 8OC. EXERCISE 2.9 Verify that an 8OC rise in ambient temperature willcausea base-voltage-biasedgroundedemit- ter stage to saturate, assuming that it was ini- tially biased for Vc = 0.5Vcc. Some solutions to the biasing problem will be discussed in the following sections. By contrast, the emitter-degenerated am- plifier achieves stable biasing by applying a voltage to the base, most of which appears across the emitter resistor, thus determin- ing the quiescent current. Emitter resistor as feedback Adding an external series resistor to the intrinsic emitter resistance re (emitter de- generation) improves many properties of the common-emitter amplifier, at the ex- pense of gain. You will see the same thing happening in Chapters 4 and 5 , when we discuss negative feedback,an important technique for improving amplifier charac- teristics by feeding back some of the output signal to reduce the effective input signal. The similarity here is no coincidence; the emitter-degenerated amplifier itself uses a form of negative feedback. Think of the transistor as a transconductance device, determining collector current (and there- fore output voltage) according to the volt- age applied between the base and emitter; but the input to the amplifier is the voltage from base to ground. So the voltage from base to emitter is the input voltage, mi- nus a sample of the output (IERE). That's negative feedback, and that's why emitter degeneration improves most properties of the amplifier (improved linearity and sta- bility and increased input impedance; also the output impedance would be reduced if the feedback were taken directly from the collector). Great things to look forward to in Chapters 4 and 5! 2.13 Biasing the common-emitter amplifier If you must have the highest possible gain (or if the amplifier stage is inside a feed- back loop), it is possible to arrange suc- cessful biasing of a common-emitter am- plifier. There are three solutions that can be applied, separately or in combination: bypassed emitter resistor, matched biasing transistor, and dc feedback. Figure 2.37. A bypassed emitter resistor can be used to improve the bias stability of a grounded emitter amplifier. Bypassed emitter resistor Use a bypassed emitter resistor, biasing as for the degenerated amplifier, as shown in Figure 2.37. In this case RE has been chosen about 0.1Re,for ease of biasing; if RE is too small, the emitter voltage will be much smaller than the base-emitter drop, leading to temperature instability of the quiescent point as VBE varies with temperature. The emitter bypass capacitor is chosen by making its impedance small
- 38. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.13 Biasing the common-emitteramplifier 85 compared with re (not RE)at the lowest frequency of interest. In this case its impedance is 25 ohms at 650Hz. At signal frequencies the input coupling capacitor sees an impedance of 10k in parallel with the base impedance, in this case hf, times 25 ohms, or roughly 2.5k. At dc, the impedance looking into the base is much larger (hf, times the emitter resistor, or about look), which is why stable biasing is possible. Figure 2.38 A variation on this circuit consists of us- ing two emitter resistors in series, one of them bypassed. For instance, suppose you want an amplifier with a voltage gain of 50, quiescent current of lmA, and Vcc of +20 volts, for signals from 20Hz to 20kHz. If you try to use the emitter-degenerated circuit, you will have the circuit shown in Figure 2.38. The collector resistor is cho- sen to put the quiescent collector voltage at 0.5Vcc. Then the emitter resistor is cho- sen for the required gain, including the ef- fects of the reof 25/Ic(mA). The problem is that the emitter voltage of only 0.175 volt will vary significantly as the -0.6 volt of base-emitter drop varies with temper- ature (-2.lmVI0C, approximately), since the base is held at constant voltage by R1 and Rg;for instance, you can verify that an increase of 20°C will cause the collector current to increase by nearly 25%. The solution here is to add some by- passed emitter resistance for stable biasing, with no change in gain at signal frequen- cies (Fig. 2.39). As before, the collector resistor is chosen to put the collector at 10 volts (0.5Vcc). Then the unbypassed emitter resistor is chosen to give a gain of 50, including the intrinsic emitter resis- tance r, = 25/Ic(mA). Enough bypassed emitter resistance is added to make stable biasing possible (one-tenth of the collector resistance is a good rule). The base voltage is chosen to give 1mA of emitter current, with impedance about one-tenth the dc im- pedance looking into the base (in this case about 100k). The emitter bypass capacitor is chosen to have low impedance compared with 180+25 ohms at the lowest signal fre- quencies. Finally, the input coupling ca- pacitor is chosen to have low impedancc compared with the signal-frequency input impedance of the amplifier, which is equal to the voltage divider impedance in paral- lel with (180 + 25)hfe ohms (the 8200 is bypassed, and looks like a short at signal frequencies). Figure 2.39. A common-emitter amplifier combining bias stability, linearity, and large voltage gain. An alternative circuit splits the signal and dc paths (Fig. 2.40). This lets you vary the gain (by changing the 1800 resistor) without bias change.
- 39. TRANSISTORS 86 Chapter 2 Figure 2.40. Equivalent emitter circuit for Figure 2.39. Matched biasing transistor Use a matched transistor to generate the correct base voltage for the required col- lector current; this ensures automatic tem- perature compensation (Fig. 2.41). Ql's collector is drawing ImA, since it is guar- anteed to be near ground (about one VBE drop above ground, to be exact); if Q1 and Q2 are a matched pair (available as a single device, with the two transistors on one piece of silicon), then Q2 will also be biased to draw ImA, putting its collec- tor at +10 volts and allowing a full f10 volt symmetrical swing on its collector. Changes in temperature are of no impor- tance, as long as both transistors are at the same temperature. This is a good reason for using a "monolithic" dual transistor. Feedback at dc Use dc feedback to stabilize the quiescent point. Figure 2.42 shows one method. By taking the bias voltage from the collector, rather than from Vcc, you get some measure of bias stability. The base sits one diode drop above ground; since its bias comes from a 10:1 divider, the collector is at 11 diode drops above ground, or about 7 volts. Any tendency for the transistor Figure 2.41. Biasing scheme with compensated VBEdrop. R, -11 V,, lor -7V) 68k ___I1 Figure 2.42. Bias stability is improved by feedback.
- 40. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.13 Biasing the common-emitteramplifier to saturate (e.g., if it happens to have unusually high beta) is stabilized, since the dropping collector voltage will reduce the base bias. This scheme is acceptable if great stability is not required. The quiescent point is liable to drift a volt or so as the ambient (surrounding) temperature changes, since the base-emitter voltage has a significant temperature coefficient. Better stability is possible if several stages of amplification are included within the feedback loop. You will see examples later in connection with feedback. A better understanding of feedback is really necessary to understand this circuit. For instance, feedback acts to reduce the input and output impedances. The input signal sees Rl's resistance effectively re- duced by the voltage gain of the stage. In this case it is equivalent to a resistor of about 300 ohms to ground. In Chapter 4 we will treat feedback in enough detail so that you will be able to figure the voltage gain and terminal impedance of this circuit. Note that the base bias resistor values could be increased in order to raise the input impedance, but you should then take into account the non-negligible base current. Suitable values might be R1 = 220k and R2 = 33k. An alternative approach might be to bypass the feedback resistance in order to eliminate feedback (and therefore lowered input impedance) at signal frequencies (Fig. 2.43). Comments on biasing and gain One important point about grounded emit- ter amplifier stages: You might think that the voltage gain can be raised by increas- ing the quiescent current, since the intrin- sic emitter resistance re drops with rising current. Although re does go down with increasing collector current, the smaller collector resistor you need to obtain the same quiescent collector voltage just can- cels the advantage. In fact, you can show Figure 2.43. Eliminating feedback at signal frequencies. that the small-signal voltage gain of a grounded emitter amplifier biased to 0.5Vcc is given by G = 20Vcc, indepen- dent of quiescent current. EXERCISE 2.10 Show that the preceding statement is true. If you need more voltage gain in one stage, one approach is to use a current source as an active load. Since its imped- ance is very high, single-stage voltage gains of 1000 or more are possible. Such an ar- rangement cannot be used with the bias- ing schemes we have discussed, but must be part of an overall dc feedback loop, a subject we will discuss in the next chap- ter. You should be sure such an amplifier looks into a high-impedance load; other- wise the gain obtained by high collector load impedance will be lost. Something like an emitter follower, a field-effect tran- sistor (FET), or an op-amp presents a good load. In radiofrequency amplifiers intended for use only over a narrow frequency range, it is common to use a parallel LC circuit as a collector load; in that case very high voltage gain is possible, since the LC circuit has high impedance (like a current source) at the signal frequency, with low impedance at dc. Since the LC
- 41. TRANSISTORS 88 Chapter 2 is "tuned," out-of-band interfering signals (and distortion) are effectively rejected. Additional bonuses are the possibility of peak-to-peak output swings of 2Vcc and the use of transformer coupling from the inductor. EXERCISE 2.11 Design a tuned common-emitteramplifierstage to operate at 100kHr. Use a bypassed emitter resistor,and set thequiescentcurrentat1.OmA. Assume Vcc = +15 voltsand L = 1.OmH,and put a 6.2k resistor across the LC to set Q = 10 (toget a10% bandpass; see Section1.22). Use capacitive input coupling. user programs a current 1, Figure 2.44. Classic bipolar-transistor matched-pair current mirror. Note the com- mon convention of referringto the positivesup- ply as Vcc,even when pnp transistorsare used. 2.14 Current mirrors The technique of matched base-emitter bi- asing can be used to make what is called a current mirror (Fig. 2.44). You "program" the mirror by sinking a current from Ql's collector. That causes a V B ~for Q1 ap- propriate to that current at the circuit tem- perature and for that transistor type. Q2, matched to Q1 (a monolithic dual tran- sistor is ideal), is thereby programmed to source the same current to the load. The small base currents are unimportant. One nice feature of this circuit is voltage compliance of the output transistor current source to within a few tenths of a volt of Vcc, since there is no emitter resistor drop to contend with. Also, in many applica- tions it is handy to be able to program a current with a current. An easy way to gen- erate the control current Ip is with a resis- tor (Fig. 2.45). Since the bases are a diode drop below Vcc, the 14.4k resistor pro- duces a control current, and therefore an output current, of 1mA. Current mirrors can be used in transistor circuits when- ever a current source is needed. They're very popular in integrated circuits, where (a) matched transistors abound and (b) the designer tries to make circuits that will work over a large range of supply voltages. There are even resistorless integrated cir- cuit op-amps in which the operating cur- rent of the whole amplifier is set by one external resistor, with all the quiescent cur- rents of the individual amplifier stages in- side being determined by current mirrors. Figure 2.45 Current mirror limitations due to Early effect One problem with the simple current mir- ror is that the output current varies a bit with changes in output voltage, i.e., the output impedance is not infinite. This is because of the slight variation of VBE with collector voltage at a given current in Q2 (due to Early effect); in other words, the
- 42. EBERS-MOLL MODEL APPLIED TO BASIC TRANSISTOR CIRCUITS 2.14 Current mirrors 89 curve of collector current versus collector- emitter voltage at a fixed base-emitter volt- age is not flat (Fig. 2.46). In practice, the Figure 2.46 current might vary 25% or so over the output compliance range - much poorer performance than the current source with emitter resistor discussed earlier. Figure 2.47. Improved current mirror. One solution, if a better current source is needed (it often isn't), is the circuit shown in Figure 2.47. The emitter resis- tors are chosen to have at least a few tenths of a volt drop; this makes the circuit a far better current source, since the small vari- ations of VBEwith VCEare now negligible in determining the output current. Again, matched transistors should be used. Wilson mirror Another current mirror with very constant current is shown in the clever circuit of Figure 2.48. Q1 and Qz are in the usual mirror configuration, but Q3 now keeps Ql's collector fixed at two diode drops Figure 2.48. Wilson current mirror. Good sta- bility with load variations is achieved through cascode transistor Q g , which reduces voltage variations across Q1. below Vcc. That circumvents the Early ef- fect in Q1, whose collector is now the pro- gramming terminal, with Q2 now sourc- ing the output current. Qg does not af- fect the balance of currents, since its base current is negligible; its only function is to pin Ql's collector. The result is that both current-determining transistors (Q1 and Q2)have fixed collector-emitter drops; you can think of Qg as simply passing the output current through to a variable- voltage load (a similar trick is used in the cascode connection, which you will see later in the chapter). Qj, by the way, does not have to be matched to Q1 and Q2. Multiple outputs and current ratios Current mirrors can be expanded to source (or sink, with npn transistors) current to several loads. Figure 2.49 shows the idea. Note that if one of the current source transistors saturates (e.g., if its load is disconnected), its base robs current from the shared base reference line, reducing the other output currents. The situation is
- 43. TRANSISTORS 90 Chapter 2 control current Figure 2.49. Current mirror with multiple outputs. This circuit is commonly used to obtain multiple programmable current sources. load 1 4load 2 T control current A load control current B Figure 2.51. Current mirrors with current ratios other than 1:1. Figure 2.50 rescued by adding another transistor (Fig. 2.50). Figure 2.51 shows two variations on the multiple-mirror idea. These circuits mirror twice (or half) the control current. In the design of integrated circuits, current mirrors with any desired current ratio can be made by adjusting the size of the emitter junctions appropriately. Texas Instruments offers complete mo- nolithic Wilson current mirrors in conve- nient TO-92 transistor packages. Their TL 011 series includes 1:1, 1:2, 1:4, and 2:1 ratios, with output compliance from 1.2 to 40 volts. The Wilson configuration gives good current source performance -at constant programming current the output current increases by only 0.05O/o per volt - and they are very inexpensive (50 cents or less). Unfortunately, these useful devices are available in npn polarity only. 1. = 20pA (programming current) Figure 2.52. Modifying current-source output with an emitter resistor. Note that the output current is no longer a simple multiple of the progamming current. Another way to generate an output cur- rent that is a fraction of the programming
- 44. SOME AMPLIFIER BUILDING BLOCKS 2.15 Push-pull output stages 91 current is to add a resistor in the emitter circuit of the output transistor (Fig. 2.52). In any circuit where the transistors are op- erating at different current densities, the Ebers-Moll equation predicts that the dif- ference in VBEdepends only on the ra- tio of the current densities. For matched transistors, the ratio of collector currents equals the ratio of current densities. The graph in Figure 2.53 is handy for determin- ing the difference in base-emitter drops in such a situation. This makes it easy to de- sign a "ratio mirror." Figure 2.53. Collector current ratios for matched transistors as determined by the dif- ference in applied base-emitter voltages. EXERCISE 2.12 Show that the ratio mirror in Figure 2.52 works as advertised. SOME AMPLIFIER BUILDING BLOCKS 2.15 Push-pull output stages As we mentioned earlier in the chapter, an npn emitter follower cannot sink current, and a pnp follower cannot source current. The result is that a single-ended follower operating between split supplies can drive a ground-returned load only if a high quiescent current is used (this is sometimes called a class A amplifier). The quiescent current must be at least as large as the maximum output current during peaks of the waveform, resulting in high quiescent power dissipation. For instance, Figure 2.54 shows a follower circuit to drive an 8 ohm load with up to 10 watts of audio. The pnp follower Q1 is included to reduce drive requirements and to cancel Qz's VBEoffset (zero volts input gives zero volts output). Q1 could, of course, be omitted for simplicity. The hefty current source in Ql's emitter load is used to ensure that there is sufficient base drive to Q2 at the top of the signal swing. A resistor as emitter load would be inferior because it would have to be a rather low value (500 or less) in order to guarantee at least 50mA of base drive to Qzat the peak of the swing, when load current would be maximum and the drop across the resistor would be minimum; the resultant quiescent current in Q1 would be excessive. loudspeaker signal in 8R Figure 2.54. A 10 watt loudspeaker amplifier, built with a single-ended emitter follower, dis- sipates 165 watts of quiescent power! The output of this example circuit can swing to nearly f15 volts (peak) in both
- 45. TRANSISTORS 92 Chapter 2 directions, giving the desired output power (9V rms across 8R). However, the out- put transistor dissipates 55 watts with no signal, and the emitter resistor dissipates another 110 watts. Quiescent power dissi- pation many times greater than the maxi- mum output power is characteristic of this kind of class A circuit (transistor always in conduction); this obviously leaves a lot to be desired in applications where any sig- nificant amount of power is involved. Figure 2.55. Push-pull emitter follower. Figure 2.55 shows a push-pull follower to do the same job. Q1 conducts on posi- tive swings, Q2 on negative swings. With zero input voltage, there is no collector current and no power dissipation. At 10 watts output power there is less than 10 watts dissipation in each transistor. crossover signal out Figure 2.56. Crossover distortion in the push- pull follower. Crossover distortion in push-pull stages There is a problem with the preceding circuit as drawn. The output trails the signal - in Figure 2.57. Biasing the push-pull follower to eliminate crossover distortion. input by a VBEdrop; on positive swings the output is about 0.6 volt less positive than the input, and the reverse for negative swings. For an input sine wave, the output would look as shown in Figure 2.56. In the language of the audio business, this is called crossover distortion. The best cure (feedback offers another method, although it is not entirely satisfactory) is to bias the push-pull stage into slight conduction, as in Figure 2.57. The bias resistors R bring the diodes into forward conduction, holding Qlls base a diode drop above the input signal and Q2's base a diode drop below the input signal. Now, as the input signal crosses through zero, conduction passes from Qz to Q1; one of the output transistors is always on. R is chosen to provide enough base current for the output transistors at the peak output swing. For instance, with f20 volt supplies and an 8 ohm load running up to 10 watts sine-wave power, the peak base voltage is about 13.5 volts, and the peak load current is about 1.6 amps. Assuming a transistor beta of 50 (power transistors generally have lower current gain than small-signal transistors), the 32mA of necessary base current will require base resistors of about 220 ohms (6.5Vfrom Vcc to base at peak swing).
- 46. SOME AMPLIFIER BUILDING BLOCKS 2.15 Push-pull output stages 93 Thermal stability in class 8 push-pull amplifiers The preceding amplifier (sometimes called a class B amplifier, meaning that each transistor conducts over half the cycle) has one bad feature: It is not thermally stable. As the output transistors warm up (and they will get hot, because they are dissipating power when signal is applied), their VBEdrops, and quiescent collector current begins to flow. The added heat this produces causes the situation to get worse, with the strong possibility of what is called thermal runaway (whether it runs away or not depends on a number of factors, including how large a "heat sink" is used, how well the diode temperature tracks the transistor, etc.). Even without runaway, better control over the circuit is needed, usually with the sort of arrangement shown in Figure 2.58. set bias 1R Figure 2.58. Small emitter resistors improve thermal stability in the push-pull follower. For variety, the input is shown coming from the collector of the previous stage; R1 now serves the dual purpose of being Ql's collector resistor and providing current to bias the diodes and bias-setting resistor in the push-pull base circuit. Here Rg and R4, typically a few ohms or less, provide a "cushion" for the critical quiescent current biasing: The voltage between the bases of the output transistors must now be a bit greater than two diode drops, and you provide the extra with adjustable biasing resistor R2(often replaced by a third series diode). With a few tenths of a volt across Els and R4, the temperature variation of VBEdoesn't cause the current to rise very rapidly (the larger the drop across R3 and R4, the less sensitive it is), and the circuit will be stable. Stability is improved by mounting the diodes in physical contact with the output transistors (or their heat sinks). You can estimate the thermal stability of such a circuit by remembering that the base-emitter drop decreases by about 2. lmV for each 1°C rise and that the collector current increases by a factor of 10 for every 60mV increase in base- emitter voltage. For example, if R2 were replaced by a diode, you would have three diode drops between the bases of Q2and Q3, leaving about one diode drop across the series combination of Rg and R4. (The latter would then be chosen to give an appropriate quiescent current, perhaps 50mA for an audio power amplifier.) The worst case for thermal stability occurs if the biasing diodes are not thermally coupled to the output transistors. Let us assume the worst and calculate the increase in output-stage quiescent cur- rent corresponding to a 30°C temperature rise in output transistor temperature. That's not a lot for a power amplifier, by the way. For that temperature rise, the VBEof the output transistors will decrease by about 63mV at constant current, rais- ing the voltage across R3 and R4by about 20% (i.e., the quiescent current will rise by about 20°/0). The corresponding figure for the preceding amplifier circuit without emitter resistors (Fig. 2.57) will be a factor of 10 rise in quiescent current (recall that
- 47. TRANSISTORS 94 Chapter 2 Ic increases a decade per 60mV increase in VBE), i.e., 1000°/o. The improved ther- mal stability of this biasing arrangement is evident. This circuit has the additional advan- tage that by adjusting the quiescent current, you have some control over the amount of residual crossover distortion. A push-pull amplifier biased in this way to obtain substantial quiescent current at the crossover point is sometimes referred to as a class AB amplifier, meaning that both transistors conduct simultaneously during a portion of the cycle. In practice, you choose a quiescent current that is a good compromise between low distortion and excessive quiescent dissipation. Feedback, the subject of the next chapter, is almost always used to reduce distortion still fur- ther. set Figure 2.59. Biasing a push-pull output stage for low crossover distorion and good thermal stability. An alternative method for biasing a push-pull follower is shown in Figure 2.59. Q4 acts as an adjustable diode: The base resistors are a divider, and therefore Qq's collector-emitter voltage will stabilize at a value that puts 1 diode drop from base to emitter, since any greater VCE will bring it into heavy conduction. For instance, if both resistors were lk, the transistor would turn on at 2 diode drops, collector to emit- ter. In this case, the bias adjustment lets you set the push-pull interbase voltage any- where from 1 to 3.5 diode drops. The 10pF capacitor ensures that both output transistor bases see the same signal; such a bypass capacitor is a good idea for any biasing scheme you use. In this circuit, Ql's collector resistor has been replaced by current source Q5. That's a useful cir- cuit variation, because with a resistor it is sometimes difficult to get enough base cur- rent to drive Q2near the top of the swing. A resistor small enough to drive Q2 suffi- ciently results in high quiescent collector current in Q1 (with high dissipation), and also reduced voltage gain (remember that G = -Rcollector/Remitter).Another SOIU- tion to the problem of Q2's base drive is the use of bootstrapping, a technique that will be discussed shortly. Figure 2.60. Darlington transistor configura- tion. 2.16 Darlington connection If you hook two transistors together as in Figure 2.60, the result behaves like a single transistor with beta equal to the
- 48. SOME AMPLIFIER BUILDING BLOCKS 2.16 Darlington connection 95 product of the two transistor betas. This can be very handy where high currents are involved (e.g., voltage regulators or power amplifier output stages), or for input stages of amplifiers where very high input impedance is necessary. For a Darlington transistor the base- emitter drop is twice normal, and the saturation voltage is at least one diode drop (since Ql's emitter must be a diode drop above Q2's emitter). Also, the combination tends to act like a rather slow transistor because Q1 cannot turn off Qz quickly. This problem is usually taken care of by including a resistor from base to emitter of Q2 (Fig. 2.61). R also prevents leakage current through Q1 from biasing Figure 2.61. Improving turn-off speed in a Darlington pair. Q2 into conduction; its value is chosen so that Ql's leakage current (nanoamps for small-signal transistors, as much as hun- dreds of microamps for power transistors) produces less than a diode drop across R and so that R doesn't sink a large propor- tion of Qz's base current when it has a diode drop across it. Typically R might be a few hundred ohms in a power transistor Darlington, or a few thousand ohms for a small-signal Darlington. Darlington transistors are available as single packages, usually with the base- emitter resistor included. A typical ex- Figure 2.62. Sziklai connection ("complemen- tary Darlington"). ample is the npn power Darlington 2N6282, with current gain of 2400 (typi- cally) at a collector current of 10 amps. Sziklai connection A similar beta-boosting configuration is the Sziklai connection, sometimes referred to as a complementary Darlington (Fig. 2.62). This combination behaves like an npn transistor, again with large beta. It has only a single base-emitter drop, but it also cannot saturate to less than a diode drop. A small resistor from base to emitter of Q2 is advisable. This connection is common in push-pull power output stages where the designer wishes to use one polarity of output transistor only. Such a circuit is shown in Figure 2.63. As before, R1 is Ql's collector resistor. Darlington Q2Q3 behaves like a single npn transistor with high current gain. The Sziklai connected pair Q4Q5 behaves like a single high-gain pnp power transistor. As before, Rg and R4 are small. This circuit is sometimes called a pseudocomplementary push-pull follower. A true complementary stage would use a Darlington-connected pnp pair for Q4Q5. Superbeta transistor The Darlington connection and its near relatives should not be confused with the so-called superbeta transistor, a device
- 49. TRANSISTORS 96 Chapter 2 with very high h F ~achieved through the manufacturing process. A typical superbeta transistor is the 2N5962, with a guaranteed minimum current gain of 450 at collector currents from lOpA to 10mA; 1 it belongs to the 2N5961-2N5963 series; with a range of maximum VCEs of 30 to 60 volts (if you need higher collector voltage, you have to settle for lower beta). Superbeta matched pairs are available for use in low-level amplifiers that require matched characteristics, a topic we will discuss in Section 2.18. Examples are the LM394 and MAT-01 series; these provide high-gain npn transistor pairs whose VBEs are matched to a fraction of a millivolt (as little as 50pV in the best versions) and whose ~ F ~ Sare matched to about 1%. The MAT-03 is a pnp matched pair. Some commercial devices (e.g., the LM11 and LM316 op-amps) achieve base bias currents as low as 50 picoamps this way. 21 2.17 Bootstrapping When biasing an emitter follower, for in- stance, you choose the base voltage divider resistors so that the divider presents a stiff voltage source to the base, i.e., their paral- lel impedance is much less than the imped- ance looking into the base. For this reason the resulting circuit has an input imped- ance dominated by the voltage divider - the driving signal sees a much lower im- pedance than would otherwise be neces- sary. Figure 2.64 shows an example. The input Figure 2.63. Push-pull power stage using only npn output transistors. It is possible to combine superbeta transistors in a Darlington connection. Figure 2.64 resistance of about 9k is mostly due to the voltage-divider impedance of 10k. It is always desirable to keep input impedances high, and anyway it's a shame to load the input with the divider, which, after all, is only there to bias the transistor. Bootstrapping is the colorful name given to a technique that circumvents this problem (Fig. 2.65). The transistor is biased by the divider RlRz through series resistor R3. C2 is chosen to have low impedance at signal frequencies compared with the bias resistors. As always, bias is stable if the dc impedance seen from the base (in this case 9.7k) is much less than the dc impedance looking into the base (in
- 50. SOME AMPLIFIER BUILDING BLOCKS 2.17 Bootstrapping 97 this case approximately 100k). But now the signal-frequency input impedance is no longer the same as the dc impedance. Look at it this way: An input wiggle vi, results in an emitter wiggle VE = vi,. So the change in current through bias resistor R3 is 2 = (vin - ~,q)/R3z 0, i.e., Zi, (due to bias string) = vi,/ii, z infinity. We've made the loading (shunt) impedance of the bias network very large at signal frequencies. In practice the value of Rg is effectively increased by a hundred or so, and the input impedance is then dominated by the transistor's base impedance. The emitter- degenerated amplifier can be bootstrapped in the same way, since the signal on the emitter follows the base. Note that the bias divider circuit is driven by the low-impedance emitter output at signal frequencies, thus isolating the input signal from this usual task. Figure 2.65. Raising the input impedance of an emitter follower at signal frequencies by bootstrapping the base bias divider. Another way of seeing this is to notice that R3 always has the same voltage across it at signal frequencies (since both ends of the resistor have the same voltage changes), i.e., it's a current source. But a current source has infinite impedance. Actually, the effective impedance is less than infinity because the gain of a follower is slightly less than 1. That is so because the base-emitter drop depends on collector current, which changes with the signal level. You could have predicted the same result from the voltage-dividing effect of the impedance looking into the emitter [re = 25/Ic(mA) ohms] combined with the emitter resistor. If the follower has voltage gain A ( A z 1)' the effective value of R3 at signal frequencies is Figure 2.66. Bootstrapping driver-stage collec- tor load resistor in a power amplifier. Bootstrapping collector load resistors The bootstrap principle can be used to in- crease the effective value of a transistor's collector load resistor, if that stage drives a follower. That can increase the voltage gain of the stage substantially [recall that Gv = -gmRc, with g, = 1/(RE+re)]. Figure 2.66 shows an example of a boot- strapped push-pull output stage similar to the push-pull follower circuit we saw ear- lier. Because the output follows Qn's base
- 51. TRANSISTORS 98 Chapter 2 signal, C bootstraps Ql's collector load, keeping a constant voltage across R2 as the signal varies (C must be chosen to have low impedance compared with R1 and R2 at all signal frequencies). That makes Rz look like a current source, raising Ql's voltage gain and maintaining good base drive to Q2,even at the peaks of the signal swing. When the signal gets near Vcc, the junction of R1and R2 actually rises above Vcc because of the stored charge in C. In this case, if Rl = R2(not a bad choice) the junction between them rises to 1.5 times Vcc when the output reaches Vcc. This circuit has enjoyed considerable popular- ity in commercial audio amplifier design, although a simple current source in place of the bootstrap is superior, since it main- tains the improvement at low frequencies and eliminates the undesirable electrolytic capacitor. 2.18 Differential amplifiers The differential amplifier is a very com- mon configuration used to amplify the dif- ference voltage between two input signals. In the ideal case the output is entirely independent of the individual signal lev- els - only the difference matters. When both inputs change levels together, that's a common-mode input change. A differen- tial change is called normal mode. A good differential amplifier has a high common- mode rejection ratio (CMRR), the ratio of response for a normal-mode signal to the response for a common-mode signal of the same amplitude. CMRR is usually speci- fied in decibels. The common-mode input range is the voltage level over which the inputs may vary. Differential amplifiers are important in applications where weak signals are con- taminated by "pickup" and other miscella- neous noise. Examples include digital sig- nals transferred over long cables (usually twisted pairs of wires), audio signals (the term "balanced" means differential, usu- ally 6000 impedance, in the audio busi- ness), radiofrequency signals (twin-lead ca- ble is differential), electrocardiogram volt- ages, magnetic-core memory readout sig- nals, and numerous other applications. A differential amplifier at the receiving end restores the original signal if the common- mode signals are not too large. Differen- tial amplifiers are universally used in op- erational amplifiers, which we will come to soon. They're very important in dc amplifier design (amplifiers that amplify clear down to dc, i.e., have no coupling ca- pacitors) because their symmetrical design is inherently compensated against thermal drifts. Figure 2.67 shows the basic circuit. The output is taken off one collector with respect to ground; that is called a single- ended output and is the most common configuration. You can think of this amplifier as a device that amplifies a difference signal and converts it to a single- ended signal so that ordinary subcircuits (followers, current sources, etc.) can make use of the output. (If, instead, a differential output is desired, it is taken between the collectors.) Figure 2.67. Classic transistor differential amplifier. What is the gain? That's easy enough to calculate: Imagine a symmetrical input signal wiggle, in which input 1 rises by
- 52. SOME AMPLIFIER BUILDING BLOCKS 2.18 Differential amplifiers 99 vi, (a small-signal variation) and input 2 drops by the same amount. As long as both transistors stay in the active region, point A remains fixed. The gain is then de- termined as with the single transistor am- plifier, remembering that the input change is actually twice the wiggle on either base: GdiE= Rc/2(re +RE). Typically RE is small, 100 ohms or less, or it may be omit- ted entirely. Differential voltage gains of a few hundred are typical. The common-mode gain can be deter- mined by putting identical signals vi, on both inputs. If you think about it correctly (remembering that R1 carries both emitter currents), you'll find G C ~= -Rc/(2R1+ RE). Here we've ignored the small re, be- cause R1 is typically large, at least a few thousand ohms. We really could have ig- nored RE as well. The CMRR is roughly Rl/(r, +RE). Let's look at a typical ex- ample (Fig. 2.68) to get some familiarity with differential amplifiers. Rc is chosen for a quiescent current of 100pA. As usual, we put the collector the (differential) input is zero. From the formulas just derived, this amplifier has a differential gain of 30 and a common- mode gain of 0.5. Omitting the 1.0k resistors raises the differential gain to 150, but drops the (differential) input impedance from about 250k to about 50k (you can substitute Darlington transistors in the input stage to raise the impedance into the megohm range, if necessary). Remember that the maximum gain of a single-ended grounded emitter amplifier biased to 0.5Vcc is 20Vcc. In the case of a differential amplifier the maximum differential gain (RE = 0) is half that figure, or (for arbitrary quiescent point) 20 times the voltage across the collector resistor. The corresponding maximum CMRR (again with RE = 0) is equal to 20 times the voltage across R1. EXERCISE 2.13 Verify that these expressionsare correct. Then design a differential amplifier to your own spec- ifications. at 0.5Vcc for large dynamic range. Ql's The differential amplifier is sometimes collector resistor can be omitted, since called a "long-tailed pair," because if the no output is taken there. R1 is chosen length of a resistor symbol indicated its to give total emitter current of 200pA, magnitude, the circuit would look like split equally between the two sides when Figure 2.69. The long tail determines the input 1 QFinput 2 "out Rc G,,,',= -= -v , - v, 2(RE + r e ) G,=- Rc 2R1 + RE + r e R1 CMRR 5 ---- RE + re Figure 2.68. Calculating differential amplifier performance.
- 53. TRANSISTORS 100 Chapter 2 1long tail Figure 2.69 common-mode gain, and the small inter- emitter resistance (including intrinsic emitter resistance re) determines the dif- ferential gain. Current-source biasing The common-mode gain of the differential amplifier can be reduced enormously by substituting a current source for R1. Then R1 effectively becomes very large, and the common-mode gain is nearly zero. If you prefer, just imagine a common- mode input swing; the emitter current source maintains a constant total emitter current, shared equally by the two collector circuits, by symmetry. The output is therefore unchanged. Figure 2.70 shows an example. The CMRR of this circuit, using an LM394 monolithic transistor pair for Q1 and Qz and a 2N5963 current source is 100,000:1 (100dB). The common-mode input range for this circuit goes from -12 volts to +7 volts; it is limited at the low end by the compliance of the emitter current source and at the high end by the collector's quiescent voltage. Be sure to remember that this amplifier, like all transistor amplifiers, must have a dc bias path to the bases. If the input is ca- pacitively coupled, for instance, you must have base resistors to ground. An addi- tional caution for differential amplifiers, Figure 2.70. ImprovingCMRR of the differen- tial amplifier with a current source. particularly those without inter-emitter resistors: Bipolar transistors can tolerate only 6 volts of base-emitter reverse bias before breakdown; thus, applying a differ- ential input voltage larger than this will destroy the input stage (if there is no inter- emitter resistor). An inter-emitter resistor limits the breakdown current and prevents destruction, but the transistors may be de- graded (in hfe, noise, etc.). In either case the input impedance drops drastically dur- ing reverse conduction. Use in single-ended dc amplifiers A differential amplifier makes an excellent dc amplifier, even for single-ended inputs. You just ground one of the inputs and con- nect the signal to the other (Fig. 2.7 1). You might think that the "unused" transistor could be eliminated. Not so! The dif- ferential configuration is inherently com- pensated for temperature drifts, and even when one input is at ground that transis- tor is still doing something: A tempera- ture change causes both VBEs to change the same amount, with no change in bal- ance or output. That is, changes in VBE are not amplified by Gdiff(only by GCM,
- 54. SOME AMPLIFIER BUILDING BLOCKS 2.18 Differential amplifiers 101 which can be made essentially zero). Fur- thermore, the cancellation of VBEs means that there are no 0.6 volt drops at the input to worry about. The quality of a dc ampli- fier constructed this way is limited only by mismatching of input VBEs or their tem- perature coefficients. Commercial mono- lithic transistor pairs and commercial dif- ferential amplifier ICs are available with extremely good matching (e.g., the MAT- 01 npn monolithic matched pair has a typ- ical drift of VBE between the two transis- tors of 0.15pVI0C and 0.2pV per month). dc input (noninverting) Figure 2.71. A differentialamplifiercan be used as a precision single-ended dc amplifier. Either input could have been grounded in the preceding circuit example. The choice depends on whether or not the amplifier is supposed to invert the signal. (The configuration shown is preferable at high frequencies, however, because of Miller efect; see Section 2.19.) The connection shown is noninverting, and so the inverting input has been grounded. This terminology carries over to op-amps, which are simply high-gain differential amplifiers. Current mirror active load As with the simple grounded emitter am- plifier, it is sometimes desirable to have a single-stage differential amplifier with very high gain. An elegant solution is a cur- rent mirror active load (Fig. 2.72). Q1Q2 is the differential pair with emitter cur- rent source. Qg and Qq, a current mir- ror, form the collector load. The high ef- fective collector load impedance provided by the mirror yields voltage gains of 5000 or more, assuming no load at the ampli- fier's output. Such an amplifier is usually used only within a feedback loop, or as a comparator (discussed in the next section). Be sure to load such an amplifier with a high impedance, or the gain will drop enor- mously. Figure 2.72. Differential amplifier with active current mirror load. Differential amplifiers as phase splitters The collectors of a symmetrical differen- tial amplifier generate equal signal swings of opposite phase. By taking outputs from both collectors, you've got a phase splitter. Of course, you could also use a differen- tial amplifier with both differential inputs and differential outputs. This differential output signal could then be used to drive an additional differential amplifier stage, with greatly improved overall common- mode rejection.
- 55. TRANSISTORS 102 Chapter 2 Differential amplifiers as comparators Because of its high gain and stable char- acteristics, the differential amplifier is the main building block of the comparator, a circuit that tells which of two inputs is larger. They are used for all sorts of ap- plications: switching on lights and heaters, generating square waves from triangles, de- tecting when a level in a circuit exceeds some particular threshold, class D ampli- fiers and pulse-code modulation, switching power supplies, etc. The basic idea is to connect a differential amplifier so that it turns a transistor switch on or off, depend- ing on the relative levels of the input sig- nals. The linear region of amplification is ignored, with one or the other of the two input transistors cut off at any time. A typical hookup is illustrated in the next section by a temperature-controlling cir- cuit that uses a resistive temperature sen- sor (thermistor). 2.19 Capacitance and Miller effect In our discussion so far we have used what amounts to a dc, or low-frequency, model of the transistor. Our simple current amplifier model and the more sophisti- cated Ebers-Moll transconductance mod- el both deal with voltages, currents, and resistances seen at the various terminals. With these models alone we have managed to go quite far, and in fact these simple models contain nearly everything you will ever need to know to design transistor cir- cuits. However, one important aspect that has serious impact on high-speed and high- frequency circuits has been neglected: the existence of capacitance in the external cir- cuit and in the transistor junctions them- selves. Indeed, at high frequencies the ef- fects of capacitance often dominate circuit behavior; at 100 MHz a typical junction capacitance of 5pF has an impedance of 320 ohms! We will deal with this important sub- ject in detail in Chapter 13. At this point we would merely like to state the problem, illustrate some of its circuit incarnations, and suggest some methods of circumvent- ing the problem. It would be a mistake to leave this chapter without realizing the nature of this problem. In the course of this brief discussion we will encounter the famous Miller eflect and the use of config- urations such as the cascode to overcome it. Junction and circuit capacitance Capacitance limits the speed at which the voltages within a circuit can swing ("slew rate"), owing to finite driving impedance or current. When a capacitance is driven by a finite source resistance, you see RCex- ponential charging behavior, whereas a ca- pacitance driven by a current source leads to slew-rate-limited waveforms (ramps). As general guidance, reducing the source impedances and load capacitances and in- creasing the drive currents within a circuit will speed things up. However, there are some subtleties connected with feedback capacitance and input capacitance. Let's take a brief look. + "cc I +- output Figure 2.73. Junction and load capacitancesin a transistor amplifier. The circuit in Figure 2.73 illustrates most of the problems of junction capac- itance. The output capacitance forms a
- 56. time constant with the output resistance RL (RL includes both the collector and load resistances, and CL includes both junction and load capacitances), giving a rolloff starting at some frequency f = 1I2rRLCL. The same is true for the input capacitance in combination with the source impedance Rs. Miller effect CCbis another matter. The amplifier has some overall voltage gain Gv,so a small voltage wiggle at the input results in a wiggle Gv times larger (and inverted) at the collector. This means that the signal source sees a current through CCbthat is Gv+ 1 times as large as if CCbwere con- nected from base to ground; i.e., for the purpose of input rolloff frequency calcu- lations, the feedback capacitance behaves like a capacitor of value Ccb(Gv+ 1) from input to ground. This effective increase of Ccbis known as the Miller effect. It of- ten dominates the rolloff characteristics of amplifiers, since a typical feedback capaci- tance of 4pF can look like several hundred picofarads to ground. There are several methods available to beat the Miller effect. It is absent alto- gether in a grounded base stage. You can decrease the source impedance driving a grounded emitter stage by using an emit- ter follower. Figure 2.74 shows two other possibilities. The differential amplifier cir- cuit (with no collector resistor in Q1) has no Miller effect; you can think of it as an emitter follower driving a grounded base amplifier. The second circuit is the famous cascode configuration. Q1 is a grounded emitter amplifier with RL as its collector resistor. Q2 is interposed in the collector path to prevent Ql's collector from swing- ing (thereby eliminating the Miller effect) while passing the collector current through to the load resistor unchanged. V+ is a fixed bias voltage, usually set a few volts above Ql's emitter voltage to pin Ql's SOME AMPLIFIER BUILDING BLOCKS 2.19 Capacitance and Miller effect toutput Figure 2.74. Two circuit configurations that avoid Miller effect. Circuit B is the cascode. collector and keep it in the active region. This fragment is incomplete as shown; you could either include a bypassed emitter resistor and base divider for biasing (as we did earlier in the chapter) or include it within an overall loop with feedback at dc. V+might be provided from a divider or Zener, with bypassing to keep it stiff at signal frequencies. EXERCISE 2.14 Explain in detail why there is no Miller effect in either transistor in the preceding differential amplifier and cascode circuits. Capacitive effects can be somewhat more complicated than this brief introduc- tion might indicate. In particular: (a) The rolloffs due to feedback and output capaci- tances are not entirely independent; in the terminology of the trade there is pole split- ting, an effect we will explain in the next chapter. (b) The input capacitance still
- 57. TRANSISTORS 104 Chapter 2 has an effect, even with a stiff input sig- nal source. In particular, current that flows through Cb, is not amplified by the tran- sistor. This base current "robbing" by the input capacitance causes the transistor's small-signal current gain hf, to drop at high frequencies, eventually reaching unity at a frequency known as fT. (c) To com- plicate matters, the junction capacitances depend on voltage. Cb, changes so rapidly with base current that it is not even spec- ified on transistor data sheets; fT is given instead. (d) When a transistor is operated as a switch, effects associated with charge stored in the base region of a saturated transistor cause an additional loss of speed. We will take up these and other topics hav- ing to do with high-speed circuits in Chap- ter 13. 2.20 Field-effect transistors In this chapter we have dealt exclusively with bipolar junction transistors (BJTs), characterized by the Ebers-Moll equation. BJTs were the original transistors, and they still dominate analog circuit design. How- ever, it would be a mistake to continue without a few words of explanation about the other kind of transistor, the field-effect transistor (FET), which we will take up in detail in the next chapter. The FET behaves in many ways like an ordinary bipolar transistor. It is a 3- terminal amplifying device, available in both polarities, with a terminal (the gate) that controls the current flow between the other two terminals (source and drain). It has a unique property, though: The gate draws no current, except for leakage. This means that extremely high input impedances are possible, limited only by capacitance and leakage effects. With FETs you don't have to worry about providing substantial base current, as was necessary with the BJT circuit design of this chapter. Input currents measured in picoamperes are commonplace. Yet the FET is a rugged and capable device, with voltage and current ratings comparable to those of bipolar transistors. Most of the available devices fabricated with transistors (matched pairs, differen- tial and operational amplifiers, compara- tors, high-current switches and amplifiers, radiofrequency amplifiers, and digital logic) are also available with FET construc- tion, often with superior performance. Furthermore, microprocessors and mem- ory (and other large-scale digital electron- ics) are built almost exclusively with FETs. Finally, the area of micropower design is dominated by FE'T circuits. FETs are so important in electronic de- sign that we will devote the next chapter to them, before treating operational ampli- fiers and feedback in Chapter 4. We urge the reader to be patient with us as we lay the groundwork in these first three difficult chapters; that patience will be rewarded many times over in the succeeding chap- ters, as we explore the enjoyable topics of circuit design with operational amplifiers and digital integrated circuits. SOME TYPICAL TRANSISTOR CIRCUITS To illustrate some of the ideas of this chapter, let's look at a few examples of circuits with transistors. The range of circuits we can cover is necessarily limited, since real-world circuits often use negative feedback, a subject we will cover in Chapter 4. 2.21 Regulated power supply Figure 2.75 shows a very common config- uration. R1 normally holds Q1 on; when the output reaches 10 volts, Q2 goes into conduction (base at 5V), preventing fur- ther rise of output voltage by shunting base current from Ql's base. The supply can be made adjustable by replacing R2 and R3
- 58. SOME TYPICAL TRANSISTOR CIRCUITS 2.22 Temperature controller 105 Q1 +12V to +25V 2N3055 - +1OV - (unregulated) 0 to 1OOrnA Figure 2.75. Feedback voltage regulator. by a potentiometer. This is actually an example of negative feedback: Q2 "looks at" the output and does something about it if the output isn't at the right voltage. 2.22 Temperature controller The schematic diagram in Figure 2.76 shows a temperature controller based on a thermistor sensing element, a device that changes resistance with temperature. Dif- ferential Darlington Q1 - Q4compares the voltage of the adjustable reference divider R4-Rs with the divider formed from the thermistor and R2. (By comparing ratios from the same supply, the comparison be- comes insensitive to supply variations; this particular configuration is called a Wheat- stone bridge.) Current mirror QsQs pro- vides an active load to raise the gain, and mirror Q7Q8provides emitter current. Qg compares the differential amplifier output with a fixed voltage, saturating Darlington QloQll, which supplies power to the heat- er, if the thermistor is too cold. R9 is a current-sensing resistor that turns on pro- tection transistor Q12 if the output cur- rent exceeds about 6 amps; that removes base drive from QloQll, preventing damage. +50V (unregulated) - R9 0.1R +15V R l 15k 1OR 50W heater 5- -- -- Figure 2.76. Temperature controller for 50 watt heater.
- 59. TRANSISTORS 106 Chapter 2 seat Figure 2.77. Both diodes and tran- sistors are used to make digital logic "gates" in this seat-belt buzzer circuit. 10- 1 I I I I 1OMA 100pA 1mA lOrnA 1OOmA 1 A collector current, lc Figure 2.78. Curves of typical transistor current gain, ~ F E ,for a selection of transistors from Table 2.1. These curves are taken from manufacturers' literature. You can expect production spreads of +100°/o, -50% from the "typical" values graphed.
- 60. Figure 2.79 SELF-EXPLANATORYCIRCUITS 2.25 Bad circuits 107 2.23 Simple logic with transistors and diodes Figure 2.77 shows a circuit that performs a task we illustrated in Section 1.32: sounding a buzzer if either car door is open and the driver is seated. In this circuit the transistors all operate as switches (either off or saturated). Diodes Dl and D2 form what is called an OR gate, turning off Q1 if either door is open (switch closed). However, the collector of Ql stays near ground, preventing the buzzer from sounding unless switch S3 is also closed (driver seated); in that case R2 turns QQ on, putting 12 volts across the buzzer. D3 provides a diode drop so that Q1is off with S1or S2closed, and D4protects Q3from the buzzer's inductive turn-off transient. In Chapter 8 we will discuss logic circuitry in detail. Table 2.1 presents a selection of useful and popular small-signal transistors; Fig- ure 2.78 shows corresponding curves of current gain. See also Appendix K. SELF-EXPLANATORY CIRCUITS 2.24 Good circuits Figure 2.80 shows a couple of circuit ideas that use transistors. 2.25 Bad circuits A lot can be learned from your own mistakes or someone else's mistakes. In this section we present a gallery of blunders (Fig. 2.81). You can amuse yourself by thinking of variations on these bad circuits, and then avoiding them! ADDITIONAL EXERCISES (I) Design a transistor switch circuit that allows you to switch two loads to ground via saturated npn transistors. Closing switch A should cause both loads to be powered, whereas closing switch B should power only one load. Hint: Use diodes.
- 62. TABLE 2.1. SELECTEDSMALL-SIGNALTRANSISTORSa Metal Plastic IC Ccb f~ TO-5e TO-18' TO-92h "CEO maX hFE lc typC typd Gain (V) (mA) typb (mA) (pF) (MHz) curve npn PnP nPn PnP nPn PnP General 20 500 100 150 16 200 - - - - - - purpose 25 200 200 2 1.8-2.8 300 4 - - - - 4124 4126 40 200 200 10 1.8-2.8 300 - - 3947 3251 3904 3906 High gain, 25 50 300 10 2-7 150 - - - - 3 3 9 1 ~ ~ , 3 7 0 7 ~4 0 5 8 ~ low noise 25 300 250 50 4 300 - - - - 6008~ 6009~ 25 50 500 5 1.5-4 500 - - - - 5089 - 40 20 700 1 14 200 2 LM394 - - - - - 45 50 1000 10 1.5 300 1 - - - - 5962 - 50 50 350 5 1.8 400 3 - - 2848 3965 4967,5210 4965,5087 High 30-60 600 150 150 5 300 5 2219 2905 2222 2907,3251 4401 4403 current 50 1000 100 200 7 450 3725 5022 4014 - - - 60 1000 70 80 15 100 2102,3107 4036 - - - - 75 2000 70 500 20 60 7,9 5320 5322 - - - - High 150 600 100 10 3-6 250 - 4929 - 5550 5401- voltage 300 1000 50 50 10 50 3439 5416 - - - - High 12 50 80 3 0.7 1500 6 - - - 5179 3662h - speed 12 100 50 8 1.5 900 8 - - 918 4208 5770 - 12 200 75 25 3 500 - - 2369 2894 5769 5771 (a) all transistors are 2Nxxx numbers, except for the LM394 dual transistor. Devices listed on a single row are similar in characteristics and in some cases are electrically identical. (b) see figure 2.76. 6)at VcB=lOV. (d)see figure 13.4. or TO-39. (') or TO-72, TO-46. (h) TO-92 and its variants have two basic pinouts: EBC and ECB. Transistors with superscript hare ECB; all others are EBC.
- 63. TRANSISTORS 110 Chapter 2 (2) Consider the current source in Figure 2.79. (a) What is Iload? What is the output compliance? Assume V B ~is 0.6 volt. (b) If hFE varies from 50 to 100 for collector voltages within the output compliance range, how much will the output current vary? (There are two effects here.) (c) If VBE varies according to AVBE = -0.0001 AVcE (Early effect), how much will the load current vary over the compliance range? (d) What is the temperature coefficient of output current assuming that hFE does not vary with temperature? What is the temperature coefficient of output current assuming that hFE increases from its nominal value of 100 by 0.4°/o/0C? (3) Design a common-emitter npn ampli- fier with voltage gain of 15, Vcc of +15 volts, and Ic of 0.5mA. Bias the collector at 0.5Vcc, and put the low-frequency 3dB point at 1OOHz. (4) Bootstrap the circuit in the preceding problem in order to raise the input imped- ance. Choose the rolloff of the bootstrap appropriately. (5) Design a dc-coupled differential am- plifier with voltage gain of 50 (to a single- ended output) for input signals near ground, supply voltages of f15 volts, and quiescent currents of O.1mA in each tran- sistor. Use a current source in the emitter and an emitter follower output stage. (6) In this problem you will ultimately de- sign an amplifier whose gain is controlled by an externally applied voltage (in Chap- ter 3 you will see how to do the same thing with FETs). (a) Begin by design- ing a long-tailed pair differential amplifier with emitter current source and no emitter resistors (undegenerated). Use f15 volt supplies. Set Ic (each transistor) at lmA, and use Rc = 1.0k. Calculate the volt- age gain from a single-ended input (other input grounded) to a single-ended output. (b) Now modify the circuit so that an ex- ternally applied voltage controls the emit- ter current source. Give an approximate g 1 Figure 2.82 + 2v + "cc -'in 4 0, 1 - t o further stages Figure 2.83. Base-current cancellation scheme, commonly used in high-quality operational amplifiers. formula for the gain as a function of controlling voltage. (In a real circuit you might arrange a second set of voltage- controlled current sources to cancel the quiescent-point shift that gain changes produce in this circuit, or a differential- input second stage could be added to your circuit.) (7) Disregarding the lessons of this chap- ter, a disgruntled student builds the am- plifier shown in Figure 2.82. He adjusts R until the quiescent point is 0.5Vcc. (a) What is Zi, (at high frequencies where Zc e O)? (b) What is the small-signal volt- age gain? (c) What rise in ambient temper- ature (roughly) will cause the transistor to saturate?
- 64. SELF-EXPLANATORYCIRCUITS 2.25 Bad circuits 111 (8) Several commercially available pre- differential amplifier is shown in detail; the cision op-amps (e.g., the venerable OP- other half works the same way). Explain 07 and the recent LT1012) use the circuit how the circuit works. Note: Q1 and Qz in Figure 2.83 to cancel input bias cur- are a beta-matched pair. Hint: It's all done rent (only half of the symmetrical-input with mirrors.
- 65. Ch3: Field-Effect Transistors INTRODUCTION Field-effect transistors (FETs) are different from the ordinary transistors (sometimes called "bipolar transistors," "bipolar junc- tion transistors," or BJTs, to distinguish them from FETs) that we talked about in the last chapter. Broadly speaking, however, they are similar devices, which we might call charge-control de- vices: In both cases we have a 3-terminal device in which the conduction between two electrodes depends on the availabil- ity of charge carriers, which is controlled by a voltage applied to a third control electrode. Here's how they differ: In an npn BJT the collector-base junction is back-biased, so no current normally flows. Forward- biasing the base-emitter junction by ~ 0 . 6 volts overcomes its diode "contact poten- tial barrier," causing electrons to enter the base region, where they are strongly at- tracted to the collector; although some base current results, most of these "minority carriers" are captured by the collector. This results in a collector current, con- trolled by a (smaller) base current. The collector current is proportional to the rate of injection of minority carriers into the base region, which is an exponential function of the BE potential difference (the Ebers-Moll equation). You can think of a bipolar transistor as a current amplifier (with roughly constant current gain, hFE) or as a transconductance device (Ebers- Moll). In a FET, as the name suggests, conduc- tion in a channel is controlled by an elec- tricjield, produced by a voltage applied to the gate electrode. There are no forward- biased junctions, so the gate draws no cur- rent; this is perhaps the most important advantage of the FET. As with BJTs, there are two polarities, n-channel FETs (con- duction by electrons) and p-channel FETs (conduction by holes). These two polari- ties are analogous to the familiar npn and pnp bipolar transistors, respectively. In ad- dition, however, FETs tend to be confusing at first because they can be made with two different kinds of gates (thus JFETs and MOSFETs), and with two different kinds of channel doping (leading to enhancement and depletion modes). We'll sort out these possibilities shortly.
- 66. FIELD-EFFECT TRANSISTORS 114 Chapter 3 First, though, some motivation and per- spective: The FET's nonexistent gate cur- rent is its most important characteristic. The resulting high input impedance (which can be greater than 1 0 ~ ~ 0 )is essential in many applications, and in any case it makes circuit design simple and fun. For applications like analog switches and am- plifiersof ultrahigh input impedance, FETs have no equal. They can be easily used by themselves or combined with bipolar tran- sistors to make integrated circuits: In the next chapter we'll see how successful that process has been in making nearly perfect (and wonderfully easy to use) operational ampl$ers, and in Chapters 8-11 we'll see how digital electronics has been revolu- tionized by MOSFET integrated circuits. Because many FETs using very low current can be constructed in a small area, they are especially useful for large-scale integra- tion (LSI) digital circuits such as calculator chips, microprocessors, and memories. In addition, high-current MOSFETs (30A or more) of recent design have been replacing bipolar transistors in many applications, often providing simpler circuits with im- proved performance. 3.01 FET characteristics Beginners sometimes become catatonic when directly confronted with the confus- ing variety of FET types (see, for exam- ple, the first edition of this book!), a vari- ety that arises from the combined choices of polarity (n-channel or p-channel), form of gate insulation (semiconductor junction [JFET]or oxide insulator[MOSFET]), and channel doping (enhancement or depletion mode). Of the eight resulting possibilities, six could be made, and five actually are. Four of those five are of major importance. It will aid understanding (and sanity), however, if we begin with one type only, just as we did with the npn bipolar tran- sistor. Once comfortable with FETs, we'll have little trouble with their family tree. FET V-l curves Let's look first at the n-channel enhance- ment-mode MOSFET, which is analogous to the npn bipolar transistor (Fig. 3.1). In normal operation the drain collector) is more positive than the source (-emitter). No current flows from drain to source unless the gate base) is brought positive with respect to the source. Once the gate is thus "fonvard-biased" there will be drain current, all of which flows to the source. Figure 3.2 shows how the drain current IDvaries with drain-source voltage VDs, for a few values of controlling gate- source voltage VGS.For comparison, the corresponding "family" of curves of Ic versus VBEfor an ordinary npn bipolar transistor is shown. Obviously threre are a lot of similarities between n-channel MOSFETs and npn bipolar transistors. d r a ~ n collector source emitter n~channelMOSFET npn b~polartransistor Figure 3.1 Like the npn transistor, the FET has a high incremental drain impedance, giving roughly constant current for VDs greater than a volt or two. By an unfortunate choice of language, this is called the "satu- ration" region of the FET and corresponds to the "active" region of the bipolar tran- sistor. Analogous to the bipolar transistor, larger gate-to-source bias produces larger drain current. If anything, FETs behave more nearly like ideal transconductance devices (constant drain current for con- stant gate-source voltage) than do bipolar
- 67. INTRODUCTION 3.01 FET characteristics 115 0 10 20 0 0 1 0 2 v,, IVI v,, IV, B Figure 3.2. Measured MOSFETItransistor characteristic curves. A. VN0106 n-channel MOSFET: ID versus VDS for various values of VGS. B. 2N3904 npn bipolar transistor: Ic versus VCE for various values of VBE. transistors; the Ebers-Moll equation pre- dicts perfect transconductance characteris- tics for bipolar transistors, but that ideal behavior is degraded by the Early effect (Section 2.10). So far, the FET looks just like the npn transistor. Let's look closer, though. For one thing, over the normal range of cur- rents the saturation drain current increases rather modestly with increasing gate volt- age (VGS). In fact, it is proportional to (VGS- VT)~,where VT is the "gate thresh- old voltage" at which drain current begins (VT M 1.63V for the FET in Fig. 3.2); compare this mild quadratic law with the steep exponential transistor law, as given to us by Ebers and Moll. Second, there is zero dc gate current, so you mustn't think of the FET as a device with current gain (which would be infinite). Instead, think
- 68. FIELD-EFFECT TRANSISTORS 116 Chapter 3 of the FET as a transconductance device, with gate-source voltage programming the drain current, as we did with the bipolar transistor in the Ebers-Moll treatment; re- call that the transconductance g, is sim- ply the ratio id/vgS (recall the conven- tion of using lower-case letters to indicate "small-signal" changes in a parameter; e.g., id/vgs = GId/SVss). Third, the gate of a MOSFET is truly insulated from the drain- source channel; thus, unlike the situation for bipolar transistors (or JFETs, as we'll see), you can bring it positive (or negative) at least 10 volts or more without worrying about diode conduction. Finally, the FET differs from the bipolar transistor in the so-called linear region of the graph, where it behaves rather accurately like a resistor, even for negative VDs;this turns out to be quite useful because the equivalent drain- source resistance is, as you might guess, programmed by the gate-source voltage. Two examples FETs have more surprises in store for us. Before getting into more details, though, let's look at two simple switching applications. Figure 3.3 shows the MOS- FET equivalent of Figure 2.3, our first sat- urated transistor switch. The FET circuit is even simpler, because we don't have to concern ourselves with the inevitable compromise of providing adequate base drive current (considering worst-case min- imum hFEcombined with the lamp's cold resistance) without squandering excessive power. Instead, we just apply a full-swing dc voltage drive to the cooperative high- impedance gate. As long as the switched- on FET behaves like a resistance small compared with the load, it will bring its drain close to ground; typical power MOS- FETs have RON< 0.2 ohm, which is fine for this job. Figure 3.4 shows an "analog switch" application, which cannot be done at all with bipolar transistors. The idea here is to switch the conduction of a FET from open- Figure 3.3. MOSFET switch. 15. s w ~ t c hON I ground. s w ~ t c hOFF --&- .- Figure 3.4 circuit (gate reverse-biased) to short-circuit (gate fonvard-biased), thus blocking or passing the analog signal (we'll see plenty of reasons to do this sort of thing later). In this case we just arrange for the gate to be driven more negative than any in- put signal swing (switch open), or a few volts more positive than any input signal swing (switch closed). Bipolar transistors aren't suited to this application, because the base draws current and forms diodes with the emitter and collector, producing awkward clamping action. The MOSFET is delightfully simple by comparison, needing only a voltage swing into the (essentially open-circuit) gate. Warning:
- 69. INTRODUCTION 3.02 FET types 117 I conducting n ~ t y p eregion forms here when gate IS brought pos~tive Figure 3.5. An n-channel MOSFET. It's only fair to mention that our treat- ment of this circuit has been somewhat simplistic, for instance ignoring the effects of gate-channel capacitance and the variation of RONwith signal swing. We'll have more to say about analog switches later. 3.02 FET types n-channel, p-channel Now for the family tree. First of all, FETs (like BJTs) can be fabricated in both po- larities. Thus, the mirror twin of our n- channel MOSFET is a p-channel MOSFET. Its behavior is symmetrical, mimicking pnp transistors: The drain is normally neg- ative with respect to the source, and drain current flows if the gate is brought at least a volt or two negative with respect to the source. The symmetry isn't perfect be- cause the carriers are holes, rather than electrons, with lower "mobility" and "mi- nority carrier lifetime." These are semi- conductor parameters of importance in transistor performance. The consequence is worth remembering - p-channel FETs usually have poorer performance, manifested as higher gate threshold vol- tage, higher RON, and lower saturation current. MOSFET, JFET In a MOSFET ("Metal-Oxide-Semicon- ductor Field-Effect Transistor") the gate region is separated from the conducting channel by a thin layer of SiOz (glass) grown onto the channel (Fig. 3.5). The gate, which may be either metal or doped silicon, is truly insulated from the source- drain circuit, with characteristic input resistance >loi4 ohms. It affects channel conduction purely by its electric field. MOSFETs are sometimes called insulated- gate FETs, or IGFETs. The gate insulating layer is quite thin, typically less than a wavelength of light, and can withstand gate voltages up to f20 volts or more. MOSFETs are easy to use because the gate can swing either polarity relative to the source without any gate current flowing. They are, however, quite susceptible to damage from static electricity; you can destroy a MOSFET device literally by touching it. The symbols for MOSFETs are shown in Figure 3.6. The extra terminal is the "body," or "substrate," the piece of sili- con in which the FET is fabricated (see Fig. 3.5). Because the body forms a diode junction with the channel, it must be held at a nonconducting voltage. It can be tied to the source, or to a point in the
- 70. FIELD-EFFECT TRANSISTORS 118 Chapter 3 dra~n drain source source drain drain gate A 6.d~ gate 1 +body source source A.n-channel MOSFET B. p-channel MOSFET Figure 3.6 circuit more negative (positive) than the source for n-channel @-channel) MOS- FETs. It is common to see the body terminal omitted; furthermore, engineers often use the symbol with the symmetrical gate. Unfortunately, with what's left you can't tell source from drain; worse still, you can't tell n-channel from p-channel! We will use the lower set of schematic symbols exclusively in this book to avoid confusion, although we will often leave the body pin unconnected. In a JFET ( "Junction Field-Effect Tran- sistor") the gate forms a semiconductor junction with the underlying channel. This has the important consequence that a JFET gate should not be forward biased with re- spect to the channel, to prevent gate cur- rent. For example, diode conduction will occur as the gate of an n-channel JFET approaches +0.6 volt with respect to the more negative end of the channel (which is usually the source). The gate is therefore operated reverse-biased with respect to the channel, and no current (exceptdiode leak- age) flows in the gate circuit. The cir- cuit symbols for JFETs are shown in Fig- ure 3.7. Once again, we favor the symbol with offset gate, to identify the source. As we'll see later, FETs (both JFET and MOS- FET) are nearly symmetrical, but the gate- drain capacitance is usually designed to be less than the gate-source capacitance, making the drain the preferred output terminal. drain I source drain gate 4 gate 4,(4source I I source I A. n-channel JFET or drain gate 4source B. p-channel JFET Figure 3.7 Enhancement, depletion The n-channel MOSFETs with which we began the chapter were nonconducting, with zero (or negative) gate bias, and were driven into conduction by bringingthe gate positive with respect to the source. This kind of FET is known as enhancement mode. The other possibility is to manu- facture the n-channel FET with the chan- nel semiconductor "doped" so that there is plenty of channel conduction even with zero gate bias, and the gate must be reverse- biased a few volts to cut off the drain cur- rent. Such a FET is known as depletion mode. MOSFETs can be made in either variety, since there is no restriction on gate polarity. But JFETs permit only reverse gate bias and therefore can be made only in depletion mode. A graph of drain current versus gate- source voltage, at a fixed value of drain voltage, may help clarify this distinction (Fig. 3.8). The enhancement-mode device draws no drain current until the gate
- 71. INTRODUCTION 3.03 Universal FET characteristics 119 is brought positive (these are n-channel FETs) with respect to the source, whereas the depletion-mode device is operating at nearly its maximum value of drain current when the gate is at the same voltage as the source. In some sense the two categories are artificial, because the two curves are identical except for a shift along the VGS axis. In fact, it is possible to manufacture "in-between" MOSFETs. Nevertheless, the distinction is an important one when it comes to circuit design. log plot V enhancement C Figure 3.8 Note that JFETs are always depletion- mode devices and that the gate cannot be brought more than about 0.5 volt more positive (for n-channel) than the source, since the gate-channel diode will conduct. MOSFETs could be either enhancement or depletion, but in practice you rarely see depletion-mode MOSFETs (the exceptions being n-channel GaAs FETs and "dual- gate" cascodes for radiofrequency applica- tions). For all practical purposes, then, you have to worry only about (a) depletion- mode JFETs and (b) enhancement-mode MOSFETs; they both come in the two po- larities, n-channel and p-channel. 3.03 Universal FET characteristics A family tree (Fig. 3.9) and a map (Fig. 3.10) of inputloutput voltage (source grounded) may help simplify things. The different devices (including garden-variety npn and pnp bipolar transistors) are drawn in the quadrant that characterizes their in- put and output voltages when they are in the active region with source (or emitter) grounded. You don't have to remember the properties of the five kinds of FETs, though, because they're all basically the same. A An-channel p~channel depletion enhancement In-channel n-channel p-channel Figure 3.9 output + 4 n~channeldepletion n-channel enhancement n-channel JFET npn transistors I input -- a-++ input p-channel enhancement pnp transistors t - output Figure 3.10 First, with the source grounded, a FET is turned on (brought into conduction) by bringing the gate voltage "toward" the active drain supply voltage. This is true for all five types of FETs, as well as the bipolar transistors. For example, an n-channel JFET (which is automatically depletion- mode) uses a positive drain supply, as do all n-type devices. Thus a positive-going gate voltage tends to turn on the JFET.
- 72. FIELD-EFFECT TRANSISTORS 120 Chapter 3 The subtlety for depletion-mode devices is that the gate must be (negatively) back- biased for zero drain current, whereas for enhancement-mode devices zero gate voltage is sufficient to give zero drain current. Second, because of the near symmetry of source and drain, either terminal can act as the effective source (exception: not true for power MOSFETs, where the body is internally connected to the source). When thinking of FET action, and for purposes of calculation, the effective source terminal is always the one most "away" from the active drain supply. For example, suppose a FET is used to switch a line to ground, and both positive and negative signals are present on the switched line, which is usu- ally selected to be the FET drain. If the switch is an n-channel MOSFET (therefore enhancement), and a negative voltage hap- pens to be present on the (turned-off)drain terminal, then that terminal is actually the "source" for purposes of gate turn-on volt- age calculation. Thus a negative gate volt- age larger than the most negative signal, rather than ground, is needed to ensure turn-off. The graph in Figure 3.1 1 may help you sort out all these confusing ideas. Again, the difference between enhancement and depletion is merely a question of displace- ment along the VGS axis - i.e., whether there is a lot of drain current or no drain current at all when the gate is at the same potential as the source. The n-channel and p-channel FETs are complementary in the same way as npn and pnp bipolar transis- tors. In Figure 3.11 we have used standard symbols for the important FET parame- ters of saturation current and cutoff volt- age. For JFETs the value of drain current with gate shorted to source is specified on the data sheets as IDssand is nearly the maximum drain current possible. (IDss means current from drain to source with the gate shorted to the source. Throughout the chapter you will see this notation, in which the first two subscripted letters des- ignate the pair of terminals, and the third specifies the condition.) For enhancement- mode MOSFETs the analogous specifica- tion is ID(ON),given at some forward gate voltage ("IDss" would be zero for any enhancement-mode device). log plot enhancement -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 VP v, v , VP VGS-Figure 3.1 1 For JFETs the gate-source voltage at which drain current approaches zero is called the "gate-source cutoff voltage," VGS(OFF),or the "pinch-off voltage," Vp, and is typically in the range of -3 to -10 volts (positive for p-channel, of course). For enhancement-mode MOSFETs the analogous quantity is the "threshold volt- age," VT (or the gate-source volt- age at which drain current begins to flow. VTis typically in the range of 0.5 to 5 volts, in the "forward" direction, of course. In- cidentally, don't confuse the MOSFET VT with the VT in the Ebers-Moll equation that describes bipolar transistor collector current; they have nothing to do with each other. With FETs it is easy to get confused about polarities. For example, n-channel devices, which usually have the drain
- 73. INTRODUCTION 3.04 FET drain characteristics 121 positive with respect to the source, can have positive or negative gate voltage, and positive (enhancement) or negative (deple- tion) threshold voltages. To make mat- ters worse, the drain can be (and often is) operated negative with respect to the source. Of course, all these statements go in reverse for p-channel devices. In or- der to minimize confusion, we will always assume n-channel devices unless explicitly stated otherwise. Likewise, because MOS- FETs are nearly always enhancement- mode, and JFETs are always depletion- mode, we'll omit those designations from now on. 3.04 FET drain characteristics In Figure 3.2 we showed a family of curves of IDversus VDs that we measured for a VN0106, an n-channel enhancement- mode MOSFET. (The VNOl comes in various voltage ratings, indicated by the last two digits of the part number. For example, a VN0106 is rated at 60V.) We remarked that FETs behave like pretty good transconductance devices over most of the graph (i.e., IDnearly constant for a given VGS), except at small VDs, where they approximate a resistance (i.e., ID proportional to VDs). In both cases the applied gate-source voltage controls the behavior, which can be well described by the FET analog of the Ebers-Moll equation. Let's look at these two regions a bit more closely. Figure 3.12 shows the situation sche- matically. In both regions the drain cur- rent depends on VGS - VT, the amount by which the applied gate-source voltage exceeds the threshold (or pinch-off) volt- age. The linear region, in which drain current is approximately proportional to VDS, extends up to a voltage VDs(s,t), after which the drain current is approx- imately constant. The slope in the lin- ear region, ID/VDs, is proportional to the gate bias, VGS - VT. Furthermore, the drain voltage at which the curves enter the "saturation region," VDs(,at), equals VGS-VT, making the saturation drain cur- rent, ID(,,,), proportional to (VGS- VT)~, the quadratic law we mentioned earlier. For reference, here are the universal FET drain-current formulas: (linear region) ID= ~ ( V G S- (saturation region) 1 (near / region 1 saturatlon reglon ( VGS- V, I = 3v saturatlon d r a ~ ncurrent I fl p r o p o t o n to vm - V T 2 ( v,, - V, i = 2v (V,, - V,) = 1v l~nearreglon extends to V ~ ~ , 5 , ~ ~' G S Figure 3.12 If we call VGS - VT (the amount by which the gate-source voltage exceeds the threshold) the "gate drive," the important results are that (a) the resistance in the linear region is inversely proportional to gate drive, (b) the linear region extends to a voltage equal to the gate drive, and (c) saturation drain current is proportional to the square of the gate drive. These equa- tions assume that the body is connected to the source. Note that the "linear region" is not really linear, because of the V& term; we'll show a clever circuit fix later. The scale factor k depends on particu- lars such as the geometry of the FET, ox- ide capacitance, and carrier mobility. It has a temperature dependence k oc T - ~ / ~ , which alone would cause IDto decrease
- 74. FIELD-EFFECTTRANSISTORS 22 Chapter 3 with increasing temperature. However, V- also depends slightly on temperature (2- SmV/"C); the combined effect produces the curve of drain current versus tempera- ture shown in Figure 3.13. Sauare root lot 30mA ' '0 5rnA zero temperature coefflc~ent 5 10 v,, (V) extrapolated V, Figure 3.13 At large drain currents the negative tem- perature coefficient of Ic causes the drain current to decrease with increasing tem- perature - goodbye thermal runaway! As a consequence, FETs of a given type can be paralleled without the external current- equalizing ("emitter-ballasting") resistors that you must use with bipolar transis- tors (see Section 6.07). This same nega- tive coefficient also prevents thermal run- away in local regions of the junction (an effect known as "current hogging"), which severely limits the power capability of large bipolar transistors, as we'll see when we discuss "second breakdown" and "safe op- erating area" in Chapter 6. At small drain currents (where the tem- perature coefficient of VT dominates), ID has a positive tempco, with a point of zero temperature coefficient at some drain current in between. This. effect is ex- ploited in FET op-amps to minimize temperature drift, as we'll see in the next chapter. Subthreshold region Our expression given earlier for satura- tion drain current does not apply for very small drain currents. This is known as the "subthreshold" region, where the chan- nel is below the threshold for conduction, but some current flows anyway because of a small population of thermally ener- getic electrons. If you've studied physics or chemistry, you probably know in your bones that the resulting current is exponen- tial: We measured some MOSFETs over 9 decades of drain current (I nA to IA) and plotted the result as a graph of IDversus VGS (Fig. 3.14). The region from InA to ImA is quite precisely exponential; above this subthreshold region the curves enter the normal saturation region. For the n-channel MOSFET (type VNO1) we checked out a sample of 20 transistors (from four different manufacturing runs spread over 2 years), plotting the extreme range to give you an idea of the variability (see next section). Note the somewhat poorer characteristics (VT, ID(ON))of the "complementary" VPOI. 3.05 Manufacturing spread of FET characteristics Before we look at some circuits, let's take a look at the range of FET parameters (such as IDssand VT), as well as their manufacturing "spread" among devices of the same nominal type, in order to get a better idea of the FET. Unfortunately, many of the characteristics of FETs show much greater process spread than the cor- responding characteristics of bipolar tran- sistors, a fact that the designer must keep in mind. For example, the VNOl (a typ- ical n-channel MOSFET) has a specified VT of 0.8 to 2.4 volts (ID = ImA), com- pared with the analogous VBE spread of
- 75. INTRODUCTION 3.05 Manufacturing spread of FET characteristics 12: Figure 3.14. Measured MOSFET drain current versus gate-source voltage. 0.63 to 0.83 volt (also at Ic = 1mA) for an npn bipolar transistor. Here's what you can expect: Characteristic Available range Spread Z ~ s s , 1mA to lOOA x 5 RDS(ON) 0.050 to 10k x 5 gm @ 1mA 500-3000~s x 5 Vp (JFETs) 0.5-1OV 5V VT (MOSFETs) 0.5-5V 2V B ~ D S ( O F F ) 6-1OOOV B ~ G S ( O F F ) 6-125V RD(ON)is the drain-source resistance (linear region, i.e., small VDs) when the FET is conducting fully, e.g., with the gate grounded in the case of JFETs or with a large applied gate-source voltage (usually specified as IOV) for MOSFETs. IDssand ID(ON)are the saturation-region (large VDs) drain currents under the same turned-on gate drive conditions. Vp is the pinch-off voltage (JFETs), VT is the turn- on gate threshold voltage (MOSFETs),and the BVs are breakdown voltages. As you can see, a JFET with grounded source may be a good current source, but you can't predict very well what the current will be. Likewise, the VGS needed to produce some value of drain current can vary considerably, in contrast to the predictable (e0.6V) VBE of bipolar transistors. Matching of characteristics As you can see, FETs are inferior to bipo- lar transistors in VGS predictability, i.e., they have a large spread in the VGS re- quired to produce a given ID. Devices with a large process spread will, in gen- eral, have larger offset (voltage unbalance) when used as differential pairs. For in- stance, typical run-of-the-mill bipolar tran- sistors might show a spread in VBE of 50mV or so, at some collector current, for a selection of off-the-shelf transistors. The comparable figure for MOSFETs is more like 1 volt! Because FETs have some very desirable characteristics otherwise, it is worthwhile putting in some extra effort to reduce these offsets in specially manu- factured matched pairs. IC designers use techniques like interdigitation (two devices sharing the same general piece of IC real estate) and thermal-gradient cancellation schemes to improve performance (Fig. 3.15). The results are impressive. Although FET devicesstill cannot equal bipolar tran- sistors in VGSmatching, their performance is adequate for most applications. For ex- ample, the best available matched FET has a voltage offset of 0.5mV and tempco of 5,uVI0C (max), whereas the best bipolar pair has values of 25,uV and 0.6,uV1°C (max), roughly 10 times better. Opera- tional amplifiers (the universal high-gain differential amplifiers we'll see in the next chapter) are available in both flavors; you would generally choose one with bipolar innards for high precision (because of its
- 76. FIELD-EFFECTTRANSISTORS 24 Chapter 3 FET 1 FET 2 A. interdigitation heat 8.temperature-gradient cancellation Figure 3.15 flow close input-transistor VBE matching), whereas a FET-input op-amp is the ob- vious choice for high-impedance applica- tions (because its inputs - FET gates - draw no current). For example, the inex- pensive JFET-input LF411 that we will use as our all-around op-amp in the next chap- ter has a typical input current of 50pA and costs $0.60; the popular MOSFET-input TLC272 costs about the same and has a typical input current of only lpA! Com- pare this with a common bipolar op-amp, the pA741, with typical input current of 80,000pA (80nA). Tables 3.1-3.3 list a selection of typi- cal JFETs (both single and dual) and small-signal MOSFETs. Power MOSFETs, which we will discuss in Section 3.14, are listed in Table 3.5. BASIC FET CIRCUITS Now we're ready to look at FET circuits. You can usually find a way to convert a circuit that uses BJTs into one using FETs. However, the new circuit may not be an improvement! For the remainder of the chapter we'd like to illustrate cir- cuit situations that take advantage of the unique properties of FETs, i.e., cir- cuits that work better with FETs, or that you can't build at all with bipolar transis- tors. For this purpose it may be helpful- - to group FET applications into catego- ries; here are the most important, as we see it: High-impedance/low-current. Buffers or amplifiers for applications where the base current and finite input impedance of BJTs limit performance. Although you can build such circuits with discrete FETs, current practice favors using integrated circuits built with FETs. Some of these use FETs as a high-impedance front-end for an otherwise bipolar design, whereas others use FETs throughout. Analog switches. MOSFETs are excellent voltage-controlled analog switches, as we hinted in Section 3.01. We'll look briefly at this subject. Once again, you should generally use dedicated "analog switch" ICs, rather than building discrete circuits. Digital logic. MOSFETs dominate micro- processors, memory, and most high- performance digital logic. They are used exclusively in micropower logic. Here, too, MOSFETs make their appearance in integrated circuits. We'll see why FETs are preferable to BJTs. Power switching. Power MOSFETs are of- ten preferable to ordinary bipolar power transistors for switching loads, as we sug- gested in our first circuit of the chapter. For this application you use discrete power FETs. Variable resistors; current sources. In the "linear" region of the drain curves, FETs behave like voltage-controlled resistors; in the "saturation" region they are voltage- controlled current sources. You can exploit this intrinsic behavior of FETs in your circuits.
- 77. BASIC FET CIRCUITS 3.06 JFET current sources 125 TABLE 3.1. JFETs IDSS VGS(OFF),VP Chs Cn. BVGss min max min max max max Type (V) @A) (mA) (V) (V) (PF) (PF) Comments n-channel 2N4117A- 40 0.03 0.09 0.6 1.8 3 2N4119A 40 0.24 0.6 2 6 4 '5 low leakage: 1pA (max) 1.5 2N4416 30 5 15 2.5 6 4 0.8 VHF low noise: <2dB@100MHz 2N4867A- 40 0.4 1.2 0.7 2 25 5 low freq, low noise: 2N4869A 40 2.5 7.5 1.8 5 25 5 10n~/d~z(max)@10Hz 2N5265- 60 0.5 1 - 3 7 2 series of 6, tight I,,, spec; 2N5270 60 7 14 8 7 2 2N5358-64 p-chan complement- 2N5432 25 150 - 4 10 30 15 switch: RoN=5R(max) 2N5457- 25 1 5 0.5 6 7 3 general purpose; 2N5459 25 4 16 2 8 7 3 2N5460-2 p-chan complement 2N5484- 25 1 5 0.3 3 5 1 2N5486 25 8 20 2 6 5 low noise RF; inexpensive 2SK117 50 0.6 14 0.2 1.5 13' 3' ultra low noise: 1nVldHz 2SK147 40 5 30 0.3 1.2 75' 15' ultra low noise: 0 . 7 n ~ l d ~ z p-channel 2N5114 30 30 90 5 10 25 7 switch: RoN=75Q(max) 2N5358- 40 0.5 1 0.5 3 6 2 series of 7, tight lDssspec; 2N5364 40 9 18 2.5 8 6 2 2N5265-70 n-chan complement 2N5460- 40 1 5 0.75 6 7 2 general purpose; 2N5462 40 4 16 1.8 9 7 2 2N5457-9 n-chan complement 2SJ72 25 5 30 0.3 2 185' 55' ultra low noise: 0.7n~ldHz Generalized replacement for bipolar tran- sistors. You can use FETs in oscillators, amplifiers, voltage regulators, and radio- frequency circuits (to name a few), where bipolar transistors are also normally used. FETs aren't guaranteed to make a better circuit - sometimes they will, sometimes they won't. You should keep them in mind as an alternative. Now let's look at these subjects. We'll adopt a slightly different order, for clarity. 3.06 JFET current sources JFETs are used as current sources within integrated circuits (particularly op-amps), and also sometimes in discrete designs. The simplest JFET current source is shown in Figure 3.16; we chose a JFET, rather than a MOSFET, because it needs no gate bias (it's depletion mode). From a graph of FET drain characteristics (Fig. 3.17) you can see that the current will be reasonably
- 78. FIELD-EFFECT TRANSISTORS 126 Chapter 3 TABLE 3.2. SELECTED MOSFETs 8c. E V ~ ~ ( t h ) I~(on n R ~ ~ ( o n ) (vDS.1 bv) c,. g max @VGS min max rnln rnax BVDs BVGs I,,, Type Mfga % (n) (V) (V) (V) (mA) (PF) (V) (V) (nA) Comments n-channel 3SK38A TO 3N170 IL SD210 SI SD211 SI VN1310 ST IT1750 IL VN2222L SI CD3600 RC 2N3796 MO 2N4351 MO+ 25 0.01 0.1 low RON 10 low RON 0.1 small VMOS; D-S diode 0.01 0.1 small VMOS; D-S diode 0.01 equiv to 4007 array 0.001 depletion; IDss=l.5mA 0.01 popular - -- p-channel 3N163 IL - 250 20 2 5 5 0.7 40 40 0.01 VP1310 ST - 25 10 1.5 3.5 250 5 100 20 0.1 small VMOS; D-S diode IT1700 IL - 400 10 2 5 2 1.2 40 40 0.01 CD3600 RC 500 10 1.8' - 1.3 0.8 15 15 0.02 equiv to 4007 array 2N4352 MO+ - 600 10 1.5 6 2 2.5 25 35 0.01 popular 3N172 IL 250 20 2 5 5 1 40 40 0.2 popular (a) see footnotesto Table 4.1. ('1 typical. Figure 3.16 constant for VDslarger than a couple of volts. However, because of ID^^ spread, the current is unpredictable. For example, the 2N5484 (a typical n-channel JFET) has a specified IDss of 1mA to 5mA. Still, the circuit is attractive because of the sim- plicity of a two-terminal constant-current device. If that appeals to you, you're in luck. You can buy "current-regulator diodes" that are nothing more than JFETs with gate tied to source, sorted according to current. They're the cur- rent analog of a Zener (voltage regulator) diode. Here are the characteristics of the 1N5283-lN5314 series: Currents available 0.22mA to 4.7mA Tolerance 10% Temperaturecoefficient f0.4%1°C Voltage range 1V-2.5V min, IOOVmax Current regulation 590typical Impedance 1M typical (for 1mA device) We plotted I versus V for a IN5294 (rated at 0.75mA); Figure 3.18A shows
- 79. BASIC FET CIRCUITS 3.06 JFET current sources 127 . .- 0 1 0 2 0 V,, IV1 A 0 0 1 0 2 0 3 0 4 0 5 VU, IV1 B Figure 3.17. Measured JFET characteristic curves. 2N5484 n-channel JFET: ID versus VDSfor various values of VGS. good constancy of current up to the break- down voltage (140V for this particular specimen), whereas Figure 3.18B shows that the device.reaches full current with somewhat less than 1.5 volts across it. We'll show how to use these devices to make a cute triangle-wave generator in Sec- tion 5.13. Table 3.4 is a partial listing of the lN5283 series. Source self-biasing A variation of the previous circuit (Fig. 3.19) gives you an adjustable current Figure 3.18. IN5294 "current regulatordiode." Figure 3.19 source. The self-biasing resistor R back- biases the gate by IDR,reducing IDand bringing the JFET closer to pinch-off. You can calculate R from the drain curves for the particular JFET. This circuit allows you
- 80. FIELD-EFFECT TRANSISTORS 28 Chapter 3 TABLE 3.3. DUAL MATCHEDn-CHANNEL JFETs l ~ s s VGS(OFF), VP en Crss V,, Drift (VDG=20V) CMRR (10Hz) (VDG=lOV) max max max min min max max max Type (mV) (pV1-C) (PA) (dB) (V) (V) (n'JldHz) (PF) Comments (a) at 100Hz. (b) at lkHz. (') at lOkHz. at 30V. (e) at 20V. ('1 typical. Siliconix gen purp, low drift popular low gate leakage low noise at high freq low noise at low freq cascode: low C,,, ultra low noise to set the current (which must be less than loss), as well as to make it more pre- dictable. Furthermore, the circuit is a bet- ter current source (higher impedance) be- cause the source resistor provides "current- sensing feedback" (which we'll learn about in Section 4.07), and also because FETs tend to be better current sources anyway when the gate is back-biased (as can per- haps be seen from the flatness of the lower drain-current curves in Figs. 3.2 and 3.17). Remember, though, that actual curves of IDfor some value of VGS obtained with a real FET may differ markedly from the values read from a set of published curves, owing to manufacturing spread. You may therefore want to use an adjustable source resistor, if it is important to have a specific current. EXERCISE 3.1 Usethe 2N5484measuredcurvesin Figure3.17 todesign a JFETcurrentsource todeliver1mA. Now ponder the fact that the specified IDssof a 2N5484is 1mA (min),5mA (max). A JFET current source, even if built with source resistor, shows some variation of output current with output voltage; i.e., it has finite output impedance, rather than the desirable infinite ZOut.The measured curves of Figure 3.17, for example, suggest that over a drain voltage range of 5 to 20 volts, a 2N5484 shows a drain current variation of 5% when operated with gate tied to source (i.e., loss). This might drop to 2% or so if you use a source resistor. The same trick used in Figure 2.24 can be used with JFET current sources and is shown in Figure 3.20. The idea (as with BJTs) is to use a second JFET to hold constant the drain-source voltage of the current source. Q1 is an ordinary JFET current source, shown in this case with a source resistor. Q2 is a JFET of larger IDss, connected "in series" with the current source. It passes Ql's (constant) drain current through to the load, while holding Ql's drain at a fixed voltage - namely the gate-source voltage that makes Q2 operate at the same current as Q1. Thus Q2 shields Q1 from voltage swings
- 81. BASIC FET CIRCUITS 3.07 FET amplifiers 129 TABLE 3.4. CURRENT-REGULATORDIODESa Impedance (25V) Vmi, IP min (I r 0.8 lp) Type (mA) (MQ) (V) (a)all operate to 100V and 600mW, and look like diodes in the reverse direction at its output; since Q1 doesn't see drain voltage variations, it just sits there and provides constant current. If you look back at the Wilson mirror (Fig. 2.48), you'll see that it uses this same voltage clamping idea. You may recognize this JFET circuit as the "cascode," which is normally used to circumvent Miller effect (Section 2.19). A JFET cascode is simpler than a BJT cascode, however, because you don't need a bias voltage for the gate of the upper FET: Because it's depletion-mode, you can simply ground the upper gate (compare with Fig. 2.74). EXERCISE 3.2 Explain why the upper JFET in a cascode must have higher IDss than the lower JFET. It may Figure 3.20. Cascode JFET current sink. help to consider a JFET cascode with no source resistor. It is important to realize that a good bipolar transistor current source will give far better predictability and stability than a JFET current source. Furthermore, the op- amp-assisted current sources we'll see in the next chapter are better still. For exam- ple, a FET current source might vary 5% over a typical temperature range and load voltage variation, even after being set to the desired current by trimming the source resistor, whereas an op-amp/transistor (or op-ampIFET) current source is predictable and stable to better than 0.5% without great effort. 3.07 FET amplifiers Source followers and common-source FET amplifiers are analogous to the emitter fol- lowers and common-emitter amplifiers made with bipolar transistors that we talked about in the last chapter. How- ever, the absence of dc gate current makes
- 82. FIELD-EFFECT TRANSISTORS 130 Chapter 3 it possible to realize very high input im- pedances. Such amplifiers are essential when dealing with the high-impedance sig- nal sources encountered in measurement and instrumentation. For some specialized applications you may want to build follow- ers or amplifiers with discrete FETs; most of the time, however, you can take advan- tage of FET-input op-amps. In either case it's worth knowing how they work. With JFETs it is convenient to use the same self-biasing scheme as with JFET current sources (Section 3.06), with a single gate-biasing resistor to ground (Fig. 3.21); MOSFETs require a divider from the drain supply, or split supplies, just as we used with BJTs. The gate-biasing resistors can be quite large (a megohm or more), because the gate leakage current is measured in nanoamps. Figure 3.21 FET transconductance can be estimated from the characteristic curves, either by looking at the increase in ID from one gate-voltage curve to the next on the family of curves (Fig. 3.2 or 3.17), or, more simply, from the slope of the ID-VGS "transfer characteristics" curve (Fig. 3.14). The transconductance depends on drain current (we'll see how, shortly) and is, of course, (Remember that lower-case letters indicate quantities that are small-signal variations.) From this we get the voltage gain just the same as the bipolar transistor re- sult in Section 2.09, with load resistor Rc replaced by RD. Typically, FETs have transconductances of a few thousand mi- crosiemens (micromhos) at a few milli- amps. Because g, depends on drain cur- rent, there will be some variation of gain (nonlinearity) over the waveform as the drain current varies, just as we have with grounded emitter amplifiers (where g, = llr,, proportional to Ic). Furthermore, FETs in general have considerably lower transconductance than bipolar transistors, which makes them less suitable as ampli- fiersand followers. Let's look at this a little further. Transconductance Transconductance of FETs versus BJTs The absence of gate current makes trans- conductance (the ratio of output current to input voltage: g, = iout/vin) the natural gain parameter for FETs. This is in contrast to bipolar transistors in the last chapter, where we at first flirted with the idea of current gain (iout/iin), then introduced the transconductance-oriented Ebers-Moll model: It's useful to think of BJTs either way, depending on the application. To make our last remark quantitative, con- sider a JFET and a BJT, each operating at 1mA. Imagine they are connected as common source (emitter) amplifiers, with a drain (collector) resistor of 5k to a +10 volt supply (Fig. 3.22). Let's ignore details of biasing and concentrate on the gain. The BJT has an re of 25 ohms, hence a g, of 40 mS, for a voltage gain of -200 (which you could have calculated direct- ly as -Rc/re). A typical JFET (e.g., a
- 83. BASIC FET CIRCUITS 3.07 FET amplifiers 131 Figure 3.22 2N4220) has a g, of 2mS at a drain cur- rent of lmA, giving a voltage gain of -10. This seems discouraging by comparison. The low g, also produces a relatively large Zoutin a follower configuration (Fig. 3.23): The JFET has Zout = l/gm which in this case equals 500 ohms (inde- pendent of signal source impedance), to be compared with the BJT, which has Zout =Rs/hfe +re = Rs/hfe + l/g, equal to Rs/h e+ 25 ohms (at 1mA). For typical transistor betas, say hfe = 100, and reasonable signal sources, say with R, < 5k, the BJT follower is an order of magnitude stiffer (Z,,t = 250 to 750). Note, however, that for R, > 50k the JFET follower will be better. To see what is happening, let's look back at the expressions for FET drain current versus gate-source voltage and compare with the equivalent expression (Ebers- Moll) for BJT collector current versus base- emitter voltage. BJT: The Ebers-Moll equation, IC= Is{~xP(VBE/VT)- 11, with VT = kT/q = 25 mV predicts g, = dIC/dVBE = Ic/VT for collector currents large compared with "leakage" current Is. This is our familiar result re(ohms)= 25/Ic(mA), since g, = 1/re- FET: In the "subthreshold" region of very low drain current, which, being exponential like Ebers-Moll, also gives a transconductance proportional - 1- Figure 3.23. Follower output - impedance.
- 84. FIELD-EFFECT TRANSISTORS 132 Chapter 3 to current. However, for real-world val- ues of k (which is determined by FET ge- ometry, carrier mobility, etc.) the FET's transconductance is somewhat lower than the BJT's, about I/40mV for p-channel MOSFETs and I/60mV for n-channel MOSFETs, as compared with I/25mV for BJTs. As the current is increased, the FET enters the normal "saturation" re- gion, where ID= k(VGs - which gives gm = 2(k1~)'/~. That is, the transconductance increases only as the square root of IDand is well below the transconductance of a bipolar transistor at the same operating current; see Fig- ure 3.24. Increasing the constant k in our preceding equations (by raising the widthllength ratio of the channel) increases the transconductance (and the drain cur- rent, for a given VGS)in the region above threshold, but the transconductance still remains less than that of a bipolar tran- sistor at the same current. Figure 3.24. Comparison of gm for bipolar transistorsand FETs. EXERCISE 3.3 Derive the foregoing expressions for gm by differentiating IOutwith respect to v,. The problem of low voltage gain in FET amplifiers can be circumvented by resorting to a current-source (active) load, but once again the bipolar transistor will be better in the same circuit. For this reason you seldom see FETs used as simple amplifiers, unless it's important to take advantage of their unique input properties (extremely high input resistance and low input current). Note that FET transconductance in the saturation region is proportional to VGS- VT; thus, for example, a JFET with gate operated halfway to pinch-off has a trans- conductance approximately half that shown on the data sheet (where it is always given for ID= loss, i.e., VGS= 0). Differential amplifiers Matched FETs can be used to construct high-input-impedance front-end stages for bipolar differential amplifiers, as well as the important op-amps and comparators we'll meet in the next chapter. As we men- tioned earlier, the substantial VGS offsets of FETs will generally result in larger input voltage offsets and offset drifts than with a comparable amplifier constructed entirely with bipolar transistors, but of course the input impedance will be raised enormously. Oscillators In general, FETs have characteristics that make them useful substitutes for bipolar transistors in almost any circuit that can benefit from their uniquely high input im- pedance and low bias current. A particular instance is their use in high-stability LC and crystal oscillators; we'll show examples in Sections 5.18, 5.19, and 13.11. Active load Just as with BJT amplifiers, it is possible to replace the drain-load resistor in a FET amplifier with an active load, i.e., a current
- 85. BASIC FET CIRCUITS 3.08 Source followers 13: source. The voltage gain you get that way can be very large: Gv = -gmRo (with a drain resistor as load) GV = -9mR0 (with a current source as load) where Rois the impedance looking into the drain (called "goSs"), typically in the range of look to 1M. One possibility for an active load is a current mirror as the drain load for a differential FET pair (see Section 2.18); the circuit is not bias-stable, however, without overall feedback. The current mirror can be constructed with either FETs or BJTs. This configuration is often used in FET op- amps, as we'll see in the next chapter. You will see another nice example of the active load technique in Section 3.14 when we discuss the CMOS linear amplifier. 3.08 Source followers Because of the relatively low transconduc- tance of FETs, it's often better to use a FET "source follower" (analogous to an emitter follower) as an input buffer to a conventional BJT amplifier, rather than trying to make a common-source FET am- plifier directly. You still get the high in- put impedance and zero dc input current of the FET, and the BJT's large transcon- ductance lets you achieve high single-stage gain. Furthermore, discrete FETs (i.e., those that are not part of an integrated circuit) tend to have higher interelectrode capacitance than BJTs, leading to greater Miller effect (Section 2.19) in common- source amplifiers; the source follower con- figuration, like the emitter follower, has no Miller effect. FET followers, with their high input im- pedance, are commonly used as input stages in oscilloscopes as well as other mea- suring instruments. There are many ap- plications in which the signal source impedance is intrinsically high, e.g., ca- pacitor microphones, pH probes, charged- particle detectors, or microelectrode sig- nals in biology and medicine. In these cases a FET input stage (whether discrete or part of an integrated circuit) is a good solution. Within circuits there are situa- tions where the following stage must draw little or no current. Common examples are analog "sample-and-hold" and "peak detector" circuits, in which the level is stored on a capacitor and will "droop" if the next amplifier draws significant input current. In all these applications the negligible input current of a FET is more important than its low transcon- ductance, making source followers (or even common-source amplifiers) attrac- tive alternatives to the bipolar emitter follower. Figure 3.25 Figure 3.25 shows the simplest source follower. We can figure out the output amplitude, as we did for the emitter fol- lower in Section 2.11, using the transcon- ductance. We have since ig is negligible; but
- 86. FIELD-EFFECT TRANSISTORS 134 Chapter 3 For Rr, >> llg, it is a good follower (v, x v,), with gain approaching, but always less than, unity. Output impedance The preceding equation for v, is precisely what you would predict if the source follower's output impedance were equal to l/gm (try the calculation, assuming a source voltage of v, in series with llg, driving a load of RL). This is exactly analogous to the emitter follower situation, where the output impedance was re = 25/Ic, or llg,. It can be easily shown explicitly that a source follower has output impedance l/g, by figuring the source current for a signal applied to the output with grounded gate (Fig. 3.26). The drain current is typically a few hundred ohms at currents of a few milliamps. As you can see, FET source followers aren't nearly as stiff as emitter followers. Figure 3.26 There are two drawbacks to this circuit: 1. The relatively high output impedance means that the output swing may be signif- icantly less than the input swing, even with high load impedance, because RL alone forms a divider with the source's output impedance. Furthermore, because the drain current is changing over the signal waveform, g, and therefore the output impedance will vary, producing some non- linearity (distortion) at the output. The sit- uation is improved if FETs of high transconductance are used, of course, but a combination FET-bipolar follower is often a better solution. 2. Because the VGS needed to produce a certain operating current is a poorly controlled parameter in FET manufacture, a source follower has an unpredictable dc offset, a serious drawback for dc-coupled circuits. Active load The addition of a few components im- proves the source follower enormously. Let's take it in stages: clj3or (better) 1Sf"k + - "ss -vss A B Figure 3.27 First, replace RL with a (pull-down) current source (Fig. 3.27). The constant source current makes VGS approximately constant, thus reducing nonlinearities. You can think of this as the previous case with infinite RL, which is what a current source is. The circuit on the right has the advantage of providing low output imp- edance,while still providing a(rough1y)con- stant source current of VBE/RB. We still have the problem of unpredictable (and therefore nonzero) offset voltage (from in- put to output) of VGS (VGS + VBE for
- 87. BASIC FET CIRCUITS 3.09 FET gate current 13 the circuit on the right). Of course, we could simply adjust Isinkto the particu- lar value of IDssfor the given FET (in the first circuit) or adjust RB (in the sec- ond). This is a poor solution, for two reasons: (a) It requires individual adjust- ment for each FET. (b) Even so, ID may vary by a factor of two over the normal operating temperature range for a given VGS- A better circuit uses a matched FET pair to achieve zero offset (Fig. 3.28). Q1 and Q2 are a matched pair, on a single chip of silicon. Qz sinks a current exactly appropriate to the condition VGS = 0. So, for both FETs, VGS = 0, and Q1 is therefore a follower with zero offset. Because Q2 tracks Q1 in temperature, the offset remains near zero independent of temperature. input 4.l +-- output Figure 3.28 You usually see the preceding circuit with source resistors added (Fig. 3.29). A little thought should convince you that R1 is necessary and that R1 = R2guarantees that VOut= V,, if Ql and Q2are matched. This circuit modification gives better ID predictability, allows you to set the drain current to some value less than l o s s , and gives improved linearity, since FETs are better current sources when operated below loss. This follower circuit is popular as the input stage for oscilloscope vertical amplifiers. For the utmost in performance you can add circuitry to bootstrap the drain (eliminating input capacitance) and use a bipolar output stage for low output impedance. That same output signal can then be used to drive an inner "guard" shield in order to effectively eliminate the effects of shielded-cable capacitance, which would otherwise be devastating for the high source impedances that you might see with this sort of high-impedance input buffer amplifier. input -Co1 Figure 3.29 3.09 FET gate current We said at the outset that FETs in general, and MOSFETs in particular, have essen- tially zero gate current. This is perhaps the most important property of FETs, and it was exploited in the high-impedance am- plifiers and followers in the previous sec- tions. It will prove essential, too, in ap- plications to follow - most notably analog switches and digital logic. Of course, at some level of scrutiny we might expect to see some gate current. It's important to know about gate current, because a naive zero-current model is guaranteed to get you in trouble sooner or later. In fact, finite gate current arises from
- 88. FIELD-EFFECT TRANSISTORS 136 Chapter 3 50 0 50 temperature ("C) several mechanisms: Even in MOSFETs the silicon dioxide gate insulation is not perfect, leading to leakage currents in the picoampere range. In JFETs the gate "in- sulation" is really a back-biased diode junc- tion, with the same impurity and junction leakage current mechanisms as ordinary diodes. Furthermore, JFETs (n-channel in particular) suffer from an additional effect known as"impact-ionization" gate current, which can reach astounding levels. Finally, both JFETs and MOSFETs have dynamic gate current, caused by ac signals driving the gate capacitance; this can cause Miller effect, just as with bipolar transistors. In most cases gate input currents are negligible in comparison with BJT base currents. However, there are situations in which a FET may actually have higher input current! Let's look at the numbers. Gate leakage The low-frequency input impedance of a FET amplifier (or follower) is limited by gate leakage. JFET data sheets usually specify a breakdown voltage, BVGss, de- fined as the voltage from gate to channel Figure 3.30. The input current of a FET amplifier is gate leakage, which doubles every (source and drain connected together) at which the gate current reaches 1pA. For smaller applied gate-channel voltages, the gate leakage current, IGsS,again measured with the source and drain connected to- gether, is considerably smaller, dropping quickly to the picoampere range for gate- drain voltages well below breakdown. With MOSFETs you must never allow the gate insulation to break down; instead, gate leakage is specified as some maximum leakage current at a specified gate-channel voltage. Integrated circuit amplifiers with FETs (e.g., FET op-amps) use the mislead- ing term "input bias current," I g , to spec- ify input leakage current; it's usually in the picoampere range. The good news is that these leakage cur- rents are in the picoampere range at room temperature. The bad news is that they in- crease rapidly (in fact, exponentially) with temperature, roughly doubling every 1O°C. By contrast, BJT base currents aren't leak- age, and in fact tend to decrease slightly with increasing temperature. The compar- ison is shown graphically in Figure 3.30, a plot of input current versus tempera- ture for several IC amplifiers (op-amps).
- 89. BASIC FET CIRCUITS 3.09 FET gate current 13' The FET-input op-amps have the lowest input currents at room temperature (and below), but their input current rises rapidly with temperature, crossing over the curves for amplifiers with carefully designed BJT input stages like the LMl 1 and LT1012. These BJT op-amps, along with "premi- um" low-input-current JFET op-amps like the OPAI 11 and AD549, are fairly expen- sive. However, we also included everyday "jellybean" op-amps like the bipolar 358 and JFET LF411 in the figure to give an idea of input currents you can expect with inexpensive (less than a dollar) op-amps. JFET impact-ionization current In addition to conventional gate leakage ef- fects, n-channel JFETs suffer from rather large gate leakage currents when operated with substantial VDsand ID (the gate leak- age specified on data sheets is measured under the unrealistic conditions Vos = ID= O!). Figure 3.31 shows what happens. The gate leakage current remains near the IGss value until you reach a critical drain- gate voltage, at which point it rises pre- cipitously. This extra "impact-ionization" current is proportional to drain current, and it rises exponentially with voltage and temperature. The onset of this current oc- curs at drain-gate voltages of about 25% of BVGss, and it can reach gate currents of a microamp or more. Obviously a "high- impedance buffer" with a microamp of in- put current is worthless. That's what you would get if you used a 2N4868A as a fol- lower, running 1mA of drain current from a 40 volt supply. This extra gate leakage current afflicts primarily n-channel JFETs, and it occurs at higher values of drain-gate voltage. Some cures are to (a) operate at low drain- gate voltage, either with a low-voltage drain supply or with a cascode, (b) use a p-channel JFET, where the effect is much smaller, or (c) use a MOSFET. The most important thing is to be aware of the effect so that it doesn't catch you by surprise. Figure 3.31. JFET gate leakage increases disastrously at higher drain-gate voltages and is proportional to drain current. Dynamic gate current Gate leakage is a dc effect. Whatever is driving the gate must also supply an ac current, because of gate capacitance. Con- sider a common-source amplifier. Just as with bipolar transistors, you can have the simple effect of input capacitance to ground (called Cis,), and you can have the capacitance-multiplying Miller effect (which acts on the feedback capacitance C,,,). There are two reasons why capaci- tive effects are more serious in FETs than in bipolar transistors: First, you use FETs (rather than BJTs) because you want very low input current; thus the capacitive cur- rents loom relatively larger for the same capacitance. Second, FETs often have considerably larger capacitance than equiv- alent bipolar transistors. To appreciate the effect of capacitance, consider a FET amplifier intended for a signal source of lOOk source impedance.
- 90. FIELD-EFFECTTRANSISTORS 138 Chapter 3 At dc there's no problem, because the pi- coampere currents produce only microvolt drops across the signal source's internal impedance. But at IMHz, say, an input capacitance of 5pF presents a shunt imped- ance of about 30k, seriously attenuating the signal. In fact, any amplifier is in trou- ble with a high-impedance signal at high frequencies, and the usual solution is to operate at low impedance (50R is typical) or use tuned LC circuits to resonate away the parasitic capacitance. The point to un- derstand is that the FET amplifier doesn't look like a 1012ohm load at signal frequen- cies. CMOS d ~ g ~ t a llog~c nv~0 + 1ov - 1mA, max+ I+ Figure 3.32 As another example, imagine switching a 10 amp load with a power MOSFET (there aren't any power JFETs), in the style of Figure 3.32. One might naively as- sume that the gate could be driven from a digital logic output with low current- sourcing capability, for example the so- called CMOS logic, which can supply out- put current on the order of ImA with a swing from ground to +10 volts. In fact, such a circuit would be a disaster, since with IrnA of gate drive the 350pFfeedback capacitance of the 2N6763 would stretch the output switching speed to a leisurely 20ps. Even worse, the dynamic gate cur- rents (Igate= CdVD/dt) would force cur- rents back into the logic device's output, possibly destroying it via a perverse effect known as "SCR latchup" (more of which in Chapters 8 and 9). Bipolar power tran- sistors turn out to have comparable ca- pacitances, and therefore comparable dy- namic input currents; but when you design a circuit to drive a 10-amp power BJT, you're expecting to provide 500mAor so of base drive (via a Darlington or what- ever), whereas with a FET you tend to take low input current for granted. In this example, once again, the ultra-high- impedance FET has lost some of its luster. EXERCISE 3.4 Show that the circuit of Figure 3.32 switches in about 20ps, assuming 1mA of available gate drive. 3.10 FETs as variable resistors Figure 3.17 showed the region of JFET characteristic curves (drain current versus VDs for a small family of VGS voltages), both in the normal ("saturated") regime and in the "linear" region of small VDs. We showed the equivalent pair of graphs for a MOSFET at the beginning of the chapter (Fig. 3.2). The ID-versus-VDs curves are approximately straight lines for VDs smaller than VGS - VT, and they extend in both directions through zero, i.e., the device can be used as a voltage- controlled resistor for small signals of either polarity. From our equation for ID versus VGS in the linear region (Section 3.04) we easily find the ratio (ID/VDs) to be The last term represents a nonlinearity, i.e., a departure from resistive behavior (resistance shouldn't depend on voltage). However, for drain voltages substantially less than the amount by which the gate is above threshold (VDs -+ O), the last
- 91. BASIC FET CIRCUITS 3.10 FETs as variable resistors 13 term becomes unimportant, and the FET behaves approximately like a resistance: Because the device-dependent parameter k isn't a quantity you are likely to know, it's more useful to write RDs as where the resistance RDs at any gate voltage VG is written in terms of the (known) resistance Roat some gate voltage VGO- EXERCISE 3.5 Derive the preceding "scaling" law. From either formula you can see that the conductance (= l/RDs) is propor- tional to the amount by which the gate voltage exceeds threshold. Another useful fact is that RDs = llg,, i.e., the channel resistance in the linear region is the inverse of the transconductance in the saturated region. This is a handy thing to know, because g, is a parameter nearly always specified on FET data sheets. EXERCISE 3.6 Show that RDs = l/gm by finding the trans- conductance from the saturation drain-current formulain Section 3.04. Typically, the values of resistance you can produce with FETs vary from a few tens of ohms (as low as O.1R for power MOSFETs) all the way up to an open circuit. A typical application might be an automatic-gain-control (AGC)circuit in which the gain of an amplifier is adjusted (via feedback) to keep the output within the linear range. In such an AGC circuit you must be careful to put the variable- resistance FET at a place in the circuit where the signal swing is small, preferably less than 200mV or so. The range of VDs over which the FET behaves like a good resistor depends on the particular FET and is roughly propor- tional to the amount by which the gate voltage exceeds Vp (or VT). Typically, you might have nonlinearities of about 2% for VDS < O.l(VGs- Vp), and perhaps 10% nonlinearity for VDs -" 0.25(VGs - Vp). Matched FETs make it easy to design a ganged variable resistor to control several signals at once. JFETs intended for use as variable resistors are available (Siliconix VCR series) with resistance tolerances of 30°/o, specified at some VGS. It is possible to improve the linearity, and simultaneously the range of VDs over which a FET behaves like a resistor, by a simple compensation scheme. We'll illustrate with an application. Linearizing trick: electronic gain control By looking at the preceding equation for l/RDs, you can see that the linearity will be nearly perfect if you can add to the gate voltage a voltage equal to one-half the drain-source voltage. Figure 3.33 shows two circuits that do exactly that. In the first, the JFET forms the lower half of a resistive voltage divider, thus forming a voltage-controlled attenuator (or "volume control"). R1and Rzimprove the linearity by adding a voltage of 0.5Vos to VGS, as just discussed. The JFET shown has an ON resistance (gate grounded) of 60 ohms (max), giving the circuit an attenuation range of 0 to 40dB. The second circuit uses a MOSFET as a variable emitter resistance in an emitter- degenerated ac amplifier. Note the use of a constant-dc-current emitter pulldown (Wilson mirror or FET current-regulator diode); this (a) looks like a very high im- pedance at signal frequencies, thus letting the variable-resistance FET set the gain over a wide range (including Gv << I), and (b) provides simple biasing. By us- ing a blocking capacitor, we've arranged the circuit so that the FET affects only the
- 92. FIELD-EFFECT TRANSISTORS 140 Chapter 3 Figure 3.33. Variable-gain circuits. - ac (signal) gain. Without the capacitor, the transistor biasing would vary with FET resistance. out EXERCISE 3.7 The VN13 has an ON resistance (VGS= +5V) of 15 ohms(max). Whatis the rangeof amplifier gain in the second circuit (assume that the current sink looks like 1MR)? What is the low- frequency3dB point when the FET is biased so that the amplifier gain is (a) 40dB or (b) 20dB? 56k - 125OPA v4(4:l current - m~rror) - VCO~,,OI VN13 (positive1 The linearization of RDs with a resis- tive gate divider circuit, as above, is re- markably effective. In Figure 3.34 we've compared actual measured curves of ID versus VDs in the linear (low-VDs) region for FETs with and without the linearizing circuit. The linearizing circuit is essential for low-distortion applications with signal swings of more than a few millivolts. When considering FETs for an appli- cation requiring a gain control, e.g., an AGC or "modulator" (in which the am- plitude of a high-frequency signal is var- ied at an audio rate, say), it is worth- while to look also at "analog-multiplier" ICs. These are high-accuracy devices with good dynamic range that are normally used to form the product of two voltages. One of the voltages can be a dc control sig- nal, setting the multiplication factor of the device for the other input signal, i.e., the gain. Analog multipliers exploit the g,- versus-Ic characteristic of bipolar transis- tors [g, = Ic(mA)/25 siemens], using matched arrays to circumvent problems of offsets and bias shifts. At very high frequencies (1OOMHz and above), passive "balanced mixers" (Section 13.12) are of- ten the best devices to accomplish the same task. It is important to remember that a FET in conduction at low VDs behaves like a good resistance all the way down to zero volts from drain to source (there are no diode drops or the like to worry about). We will see op-amps and digital logic families (CMOS) that take advantage of this nice property, giving outputs that saturate cleanly to the power supplies. FET SWITCHES The two examples of FET circuits that we gave at the beginning of the chapter were both switches: a logic-switching ap- plication and a linear signal-switchingcir- cuit. These are among the most important FET applications and take advantage of the FET's unique characteristics: high gate impedance and bipolarity resistive conduc- tion clear down to zero volts. In practice
- 93. FET SWITCHES 3.11 FET analog switches 141 0 0 1 0 2 0 3 0.4 0 5 vu,,, cvr / JFET Figure 3.34. Measured curves of ID versus Vos for bare and linearized FETS. A. 2N5484 JFET B. VN0106 MOSFET you usually use MOSFET integrated cir- cuits (rather than discrete transistors) in all digital logic and linear switch appli- cations, and it is only in power switch- ing applications that you resort to discrete FETs. Even so, it is essential (and fun!) to understand the workings of these chips; otherwise you're almost guaranteed to fall prey to some mysterious circuit pathology. 3.11 FET analog switches A common use of FETs, particularly MOS- FETs, is as analog switches. Their combi- nation of low ON resistance (all the way to zero volts), extremely high OFF resistance, low leakage currents, and low capacitance makes them ideal as voltage-controlled switch elements for analog signals. An ideal analog, or linear, switch behaves like
- 94. FIELD-EFFECT TRANSISTORS 142 Chapter 3 a perfect mechanical switch: In the ON state it passes a signal through to a load without attenuation or nonlinearity; in the OFF state it is an open circuit. It should have negligible capacitance to ground and negligible coupling to the signal of the switching level applied to the control in- put. signal out 47k ov control Figure 3.35 Let's look at an example (Fig. 3.35). Q1 is an n-channel enhancement-mode MOS- FET, and it is nonconducting when the gate is grounded or negative. In that state the drain-source resistance (ROFF)is typically more than 10,00OM, and no signal gets through (though at high frequencies there will be some coupling via drain-source ca- pacitance; more on this later). Bringing the gate to +15 volts puts the drain-source channel into conduction, typically 25 to 100 ohms (RON) in FETs intended for use as analog switches. The gate signal level is not at all critical, as long as it is suffi- ciently more positive than the largest sig- nal (to maintain RONlow), and it could be provided from digital logic circuitry (per- haps using a FET or BJT to generate a full- supply swing) or even from an op- amp (whose f13V output swing would do nicely, since gate breakdown voltages in MOSFETs are typically 20V or more). Swinging the gate negative (as from an op-amp output) doesn't hurt, and in fact has the added advantage of allowing the switching of analog signals of either polar- ity, as will be described later. Note that the FET switch is a bidirectional device; signals can go either way through it. Or- dinary mechanical switches work that way, too, so it should be easy to understand. The circuit as shown will work for positive signals up to about 10 volts; for larger signals the gate drive is insufficient to hold the FET in conduction (RON begins to rise), and negative signals would cause the FET to turn on with the gate grounded (it would also forward bias the channel-body junction; see Section 3.02). If you want to switch signals that are of both polarities (e.g., signals in the range -10V to +lOV), you can use the same circuit, but with the gate driven from -15 volts (OFF) to +15 volts (ON); the body should then be tied to -15 volts. With any FET switch it is important to provide a load resistance in the range of lk to lOOk in order to reduce capacitive feedthrough of the input signal that would otherwise occur during the OFF state. The value of the load resistance is a compro- mise: Low values reduce feedthrough, but they begin to attenuate the input signal because of the voltage divider formed by RONand the load. Because RON varies over the input signal swing (from changing VGS),this attenuation also produces some undesirable nonlinearity. Excessively low load resistance appears at the switch input, of course, loading the signal source as well. Several possible solutions to this problem (multiple-stage switches, RON cancella- tion) are shown in Sections 3.12 and 4.30. An attractive alternative is to use a second FET switch section to connect the output to ground when the series FET is off, thus effectively forming an SPDT switch (more on this in the next section). CMOS linear switches Frequently it is necessary to switch sig- nals that may go nearly to the supply volt- ages. In that case the simple n-channel switch circuit just described won't work, since the gate is not forward-biased at the
- 95. FET SWITCHES 3.11 FET analog switches l r peak of the signal swing. The solution is to use paralleled complementary MOSFET ("CMOS") switches (Fig. 3.36). The tri- angular symbol is a digital inverter, which we'll discuss shortly; it inverts a HIGH input to a LOW output, and vice versa. When the control input is high, Q1 is held ON for signals from ground to within a few volts of VDD(where R O ~starts increas- ing dramatically). Q2 is likewise held ON (by its grounded gate) for signals from VDD to within a few volts of ground (where its RON increases dramatically). Thus, sig- nals anywhere between VDDand ground are passed through with low series resis- tance (Fig. 3.37). Bringing the control sig- nal to ground turns off both FETs, pro- viding an open circuit. The result is an analog switch for signals between ground and VDD.This is the basic construction of the 4066 CMOS "transmission gate." It is bidirectional, like the switches described earlier; either terminal can be the input. signal in (Out) 7 open <cl:~kF+control signal out (in) Figure 3.36. CMOS analog switch. There is a variety of integrated circuit CMOS analog switches available, with var- ious switch configurations (e.g., several in- dependent sections with several poles each). The 4066 is the classic 4000-series CMOS"analog transmission gate," just an- other name for an analog switch for sig- nals between ground and a single positive supply. The IH5040 and IH5140 series from Intersil and Harris and the DG305 and DG400 series from Siliconix are very convenient to use; they accept logic-level (OV = LOW, > 2.4V = HIGH) control signals, they will handle analog signals to f15 volts (compared with only f7.5V for the 4000 series), they come in a variety of configurations, and they have relatively low ON resistance (25R for some mem- bers of these families). Analog Devices, Maxim, and PMI also manufacture nice analog switches. p-channel n channel signal -voltage Figure 3.37 Multiplexers A nice application of FET analog switches is the "multiplexer" (or MUX), a circuit that allows you to select any of several in- puts, as specified by a digital control signal. The analog signal present on the selected input will be passed through to the (sin- gle) output. Figure 3.38 shows the basic scheme. Each of the switches SWO through SW3 is a CMOS analog switch. The "se- lect logic" decodes the address and en- ables (jargon for "turns on") the addressed switch only, disabling the remaining switches. Such a multiplexer is usually used in conjunction with digital circuitry that generates the appropriate addresses. A typical situation might involve a data- acquisition instrument in which a number of analog input voltages must be sampled in turn, converted to digital quantities, and used as input to some computation. Because analog switches are bidirec- tional, an analog multiplexer such as this is
- 96. FIELD-EFFECTTRANSISTORS 44 Chapter 3 1 address decoder I "address" of LSB select input [ MSB Figure 3.38. Analog multiplexer. output also a "demultiplexer": A signal can be fed into the "output" and will appear on the selected "input." When we discuss digital circuitry in Chapters 8 and 9, you will see that an analog multiplexer such as this can also be used as a "digital multiplexer/demultiplexer," because logic levels are, after all, nothing but voltages that happen to be interpreted as binary 1's and 0's. Typical of analog multiplexers are the DG506-509 series and the IH6108 and 6116 types, 8- or 16-input MUX circuits that accept logic-level address inputs and operate with analog voltages up to f15 volts. The 4051-4053 devices in the CMOS digital family are analog multi- plexers/demultiplexers with up to 8 inputs, but with 15 volt pp maximum signal lev- els; they have a VEEpin (and internal level shifting) so that you can use them with bipolarity analog signals and unipolarity (logic-level)control signals. Other analog switch applications Voltage-controlled analog switches form essential building blocks for op-amp cir- integrators, sample-and-hold circuits, and peak detectors. For example, with op- amps we will be able to build a "true" in- tegrator (unlike the approximation to an integrator we saw in Section 1.15): A con- stant input generates a linear ramp output (not an exponential), etc. With such an in- tegrator you must have a method to reset the output; a FET switch across the inte- grating capacitor does the trick. We won't try to describe these applications here; be- cause op-amps form essential parts of the circuits, they fit naturally into the next chapter. Great things to look forward to! 3.12 Limitations of FET switches Speed FET switches have ON resistances R O ~ of 25 to 200 ohms. In combination with substrate and stray capacitances, this resis- tance forms a low-pass filter that limits op- erating speeds to frequencies of the order of IOMHz or less (Fig. 3.39). FETs with lower RONtend to have larger capacitance (up to 50pF with some MUX switches), so no gain in speed results. Much of the rolloff is due to protection components - current-limiting series resistance, and ca- pacitance of shunt diodes. There are a few "RFIvideo" analog switches that ob- tain higher speeds, probably by eliminat- ing some protection. For example, the RON= 300R Input noutput c,,,= 5pF I I C,,,,= 22pF - -- - - 24MHzf3dB= --- 2aRonCou, Hl-508 analog rnultlplexer - ON values cuits we'll see in the next chapter - Figure 3.39
- 97. FET SWITCHES 3.12 Limitations of FET switches 145 IH5341 and IH5352 switches handle ana- log signals over the usual f15 volt range and have a bandwidth of 100MHz; the 74HC4051-53 series of "high-speed" CMOS multiplexers also provide a 3dB analog bandwidth of lOOMHz, but handle signals only to f5 volts. The MAX453-5 from Maxim combine a video multiplexer with an output video amplifier,so you can drive low-impedance cables or loads (usu- ally 75R) directly; they have 5OMHz typ- ical bandwidth and are intended for f1 volt low-impedance video signals. ON resistance CMOS switches operated from a relatively high supply voltage (15V, say) will have low RONover the entire signal swing, be- cause one or the other of the transmis- sion FETs will have a forward gate bias at least half the supply voltage. However, when operated with lower supply voltages, the switch's RONvalue will rise, the max- imum occurring when the signal is about halfway between the supply and ground (or halfway between the supplies, for dual- supply voltages). Figure 3.40 shows why. As V D ~is reduced, the FETs begin to have significantly higher ON resistance (es- pecially near VGS = VDD/~),since for enhancement-mode FETs VT is at least a few volts, and a gate-source voltage of as much as 5 to 10 volts is required to achieve low RON.Not only will the parallel re- sistances of the two FETs rise for signal voltages between the supply voltage and ground, but also the peak resistance (at half VDD)will rise as VDDis reduced, and for sufficiently low VDD the switch will become an open circuit for signals near VDD/~. signal voltage L Figure 3.40 There are various tricks used by the de- signers of analog switch ICs to keep RON low, and approximately constant (for low distortion), over the signal swing. For ex- ample, the original 4016 analog switch used the simple circuit of Figure 3.36, pro- ducing RONcurves that look like those in Figure 3.41. In the improved 4066 switch the designers added a few extra FETs so that the n-channel body voltage follows the signal voltage, producing the RONcurves of Figure 3.42. The "volcano"shape, with = 1ov 4016 analog switch 6 soone 0 l I I o 5 10 1'5 Figure 3.41. ON resistancefor 4016 signal voltage CMOS switch.
- 98. FIELD-EFFECT TRANSISTORS 146 Chapter 3 Figure 3.42. ON resistance for the I , , , improved 4066 CMOS switch; note o 5 10 15 change of scale from previous s~gnalvoltage figure. 1 I 1 I - 10 5 0 + 5 +10 signal voltage its depressed central R o ~ ,replaces the "Everest" shape of the 4016. Sophisti- cated switches like the IH5140 series (or AD7510 series), intended for serious ana- log applications, succeed even better, with gentle RONcurves like those shown in Figure 3.43. The recent DG400 series from Siliconix achieves an ex- cellent RONof 20 ohms, at the expense of increased "charge transfer" (see the later section on glitches); this switch family (like the IH5140 series) has the additional advantage of zero quiescent current. Figure 3.43. ON resistance for the IH5140-series bipolarity analog switches; note vertical scale. Capacitance FET switches exhibit capacitance from input to output (CDs), from channel to ground (CD, Cs), from gate to channel, and from one FET to another within one IC package (Coo, Css); see Figure 3.44. Let's look at the effects: CDs: Capacitance from input to output. Capacitance from input to output causes signal coupling in an OFF switch, rising at high frequencies. Figure 3.45 shows the effect for the IH5140 series. Note the use
- 99. FET SWITCHES 3.12 Limitations of FET switches 147 Figure 3.44. Analog switch capacitances - AD7510 4-channel switch. frequency (Hz1 1 2 0 - - 100- 8 0 - - m D 2 6 0 - . Figure 3.45 OFF isolation IH5140 serles of a stiff 50 ohm load, common in radiofre- quency circuits, but much lower than nor- mal for low-frequency signals, where a typ- ical load impedance is IOk or more. Even with a 50 ohm load, the feedthrough be- comes significant at high frequencies (at 30MHz 1pF has a reactance of 5k, giving -40dB of feedthrough). And, of course, there is significant attenua- tion (and nonlinearity) driving a 50 ohm load, since RONis typically 30 ohms (75R worst-case). With a 10k load the feedthrough situation is much worse, of course. P v'""Tlvo", -- Figure 3.46 Figure 3.47 EXERCISE 3.8 Calculate the feedthrough into 10k at lMHz, assuming CDs= 1pF. In most low-frequency applications ca- pacitive feedthrough is not a problem. If it is, the best solution is to use a pair of cascaded switches (Fig. 3.46) or, bet- ter still, a combination of series and shunt switches, enabled alternately (Fig. 3.47). The series cascade doubles the attenuation (in decibels), at the expense of additional RON,whereas the series-shunt circuit (ef- fectively an SPDT configuration) reduces feedthrough by dropping the effectiveload resistance to RONwhen the series switch is off. EXERCISE 3.9 Recalculate switch feedthrough into 10k at 1MHz, assuming CDs= 1pFand RON= 50 ohms, for the configurationof Fig. 3.47. CMOS SPDT switches with controlled break-before-make are available commer- cially in single packages; in fact, yod can
- 100. FIELD-EFFECT TRANSISTORS 148 Chapter 3 get a pair of SPDT switches in a single package. Examples are the DG188 and IH5142, as well as the DG191, IH5143, and AD7512 (dual SPDT units). Because of the availability of such convenient CMOSswitches, it is easy to use this SPDT configuration to achieve excellent perfor- mance. The RFIvideo switches mentioned earlier use a series-shunt circuit internally. CD, Cs: Capacitance to ground. Shunt capacitance to ground leads to the high frequency rolloff mentioned earlier. The situation is worst with a high-impedance signal source, but even with a stiff source the switch's RONcombines with the shunt capacitance at the output to make a low- pass filter. The following problem shows how it goes. EXERCISE 3.10 An AD7510 (here chosen for its complete ca- pacitance specifications, shown in Fig. 3.44) is driven by a signal source of 10k,with a load im- pedance of 1OOk at the switch's output. Where is the high-frequency -3dB point? Now repeat the calculation,assuming a perfectly stiff signal source, and a switch RONof 75 ohms. Capacitance from gate to channel. Ca- pacitance from the controlling gate to the channel causes a different effect, namely the coupling of nasty little transients into your signal when the switch is turned on or off. This subject is worth some serious discussion, so we'll defer it to the next section on glitches. CDD, Css: Capacitance between switches. If you package several switches on a single piece of silicon the size of a kernel of corn, it shouldn't surprise you if there is some coupling between channels ("cross-talk"). The culprit, of course, is cross-channel capacitance. The effect in- creases with frequency and with signal im- pedance in the channel to which the signal is coupled. Here's a chance to work it out for yourself: EXERCISE 3.11 Calculate the coupling, in decibels, between a pair ofchannelswith CDD= Css =0.5pF(Fig. 3.44) for the source and load impedancesof the last exercise. Assume that theinterfering signal is 1MHz. In eachcasecalculatethe coupling for (a) OFF switch to OFF switch, (b) OFF switch to ON switch, (c)ON switch to OFF switch, and (d) ON switch to ON switch. It should be obvious from this example why most. broadband radiofrequency cir- cuits use low signal impedances, usually 50 ohms. If cross-talk is a serious prob- lem, don't put more than one signal on one chip. Glitches During turn-on and turn-off transients, FET analog switches can do nasty things. The control signal being applied to the gate(s) can couple capacitively to the chan- nel(~),putting ugly transients on your sig- nal. The situation is most serious if the signal is at high impedance levels. Multi- plexers can show similar behavior during transitions of the input address, as well as momentary connection between inputs if turn-off delay exceeds turn-on delay. A re- lated bad habit is the propensity of some switches (e.g., the 4066) to short the input to ground momentarily during changes of state. Let's look at this in a bit more detail. Figure 3.48 shows a typical wave- form you might see at the output of an n-channel MOSFET analog switch circuit similar to Figure 3.35, with an input drive I 1 Figure 3.48
- 101. FET SWITCHES 3.12 Limitations of FET switches 149 signal levelof zero voltsand an output load consisting of 10k in parallel with 20pC re- alistic values for an analog switch circuit. The handsome transients are caused by charge transferred to the channel, through the gate-channel capacitance, at the tran- sitions of the gate. The gate makes a sud- den step from one supply voltage to the other, in this case between f15 volt sup- plies, transferring a slug of charge Q = CGc [VG(finish) - VG(start)] CGC is the gate-channel capacitance, typically around 5pE Note that the amount of charge transferred to the channel de- pends only on the total voltage change at the gate, not on its rise time. Slowing down the gate signalgives rise to a smaller- amplitude glitch of longer duration, with the same total area under its graph. Low- pass filtering of the switch's output signal has the same effect. Such measures may help if the peak amplitude of the glitch must be kept small, but in general they are ineffective in eliminating gate feedthrough. In some cases the gate-channel capacitance may be predictable enough for you to cancel the spikes by coupling an inverted version of the gate signal through a small adjustable capacitor. The gate-channel capacitance is distri- buted over the length of the channel, which means that some of the charge is coupled back to the switch's input. As a result, the size of the output glitch depends on the signal source impedance and is smallest when the switch is driven by a voltage source. Of course, reducing the size of the load impedance will reduce the size of the glitch, but this also loads the source and introduces error and nonlinearity due to finite RON. Finally, all other things being equal, a switch with smaller gate- channel capacitance will introduce smaller switching transients, although you pay a price in the form of increased RON. Figure 3.49 shows an interesting com- parison of gate-induced charge transfers for three kinds of analog switches, includ- ing JFETs. In all cases the gate signal is making a full swing, i.e., either 30 volts or the indicated supply voltage for MOSFETs, and a swing from -15 volts to the signal level for the n-channel JFET switch. The JFET switch shows a strong Figure 3.49. Charge transfer for various , FET linear switches -15 - 10 - 5 o + 5 + 10 +15 as a function of signal v,,,,, (V) voltage.
- 102. FIELD-EFFECT TRANSISTORS 150 Chapter 3 CMOS -c~rcuit T - dependence of glitch size on signal, be- cause the gate swing is proportional to the level of the signal above -15 volts. Well- balanced CMOS switches have relatively low feedthrough because the charge contri- butions of the complementary MOSFETs tend to cancel out (one gate is rising while the other is falling). Just to give scale to these figures, it should be pointed out that 30pC corresponds to a 3mV step across a 0.01pF capacitor. That's a rather large fil- ter capacitor, and you can see that this is a real problem, since a 3mV glitch is pretty large when dealing with low-level analog signals. Latchup and input current All CMOS integrated circuits have some form of input protection circuit, because otherwise the gate insulation is easily de- stroyed (see the later section on handling precautions). The usual protection net- work is shown in Figure 3.50: Although it may use distributed diodes, the network is equivalent to clamping diodes to Vss and to VDD, combined with resistive current limiting. If you drive the inputs (or out- puts) more than a diode drop beyond the supply voltages, the diode clamps go into conduction, making the inputs (or outputs) look like a low impedance to the respec- tive supplies. Worse still, the chip can be driven into "SCR latchup," a terrifying (and destructive) condition we'll describe in more detail in Section 14.16. For now, all you need to know about it is that you don't want it! SCR latchup is triggered * I .output Figure 3.50. CMOS inputloutput protection networks. The series resistor at the output is often omitted. by input currents (through the protection network) of roughly 20mA or more. Thus, you must be careful not to drive the analog inputs beyond the rails. This means, for instance, that you must be sure the power supply voltages are applied before any sig- nals that have significant drive current ca- pability. Incidentally, this prohibition goes for digital CMOS ICs as well as the analog switches we have been discussing. The trouble with diode-resistor protec- tion networks is that they compromise switch performance, by increasing RON, shunt capacitance, and leakage. With clever chip design (making use of "dielec- tric isolation") it is possible to eliminate SCR latchup without the serious perfor- mance compromises inherent in traditional protection networks. Many of the newer analogswitch designsare "fault protected"; for example, Intersil's IH5108 and IH5116 analog multiplexers claim you can drive the analog inputs to f25 volts, even with the supply at zero (you pay for this robust- ness with an RONthat is four times higher than that of the conventional IH6108116). Watch out, though, because there are plen- ty of analog switch ICs around that are not forgiving! You can get analog switches and multi- plexers built with n-channel JFETs rather than complementary MOSFETs. They perform quite well, improving on CMOS switches in several characteristics. In par- ticular, the series of JFET switches from PMI has superior constancy of RONver- sus analog voltage, complete absence of
- 103. FET SWITCHES 3.13 Some FET analog switch examples 151 latchup, and low susceptibility to electro- static damage. Other switch limitations Some additional characteristics of analog switches that may or may not be impor- tant in any given application are switch- ing time, settling time, break-before- make delay, channel leakage current (both ON and OFF; see Section 4.19, RON matching, temperature coefficient of R O ~ ,and signal and power supply ranges. We'll show unusual restraint by ending the discussion at this point, leaving the reader to look into these de- tails if the circuit application demands it. the output impedance is high. You'll see how to make "perfect" followers (precise gain, high Zin,low ZOut,and no VBEoff- sets, etc.) in the next chapter. Of course, if the amplifier that follows the filter has high input impedance, you don't need the buffer. 4-lnput MUX Input output ?.----4+ 1 .>-- 2 - b ~ t I I' L,' address Figure 3.51 3.13 Some FET analog switch examples As we indicated earlier, many of the nat- ural applications of FET analog switches are in op-amp circuits, which we will treat in the next chapter. In this section we will show a few switch applications that do not require op-amps, to give a feeling for the sorts of circuits you can use them in. Figure 3.52 shows a simple variation in which we've used four independent switches, rather than a 4-input multiplexer. With the resistors scaled as shown, you can generate 16 equally spaced 3dB frequen- cies by turning on binary combinations of the switches. SwitchableRC low-pass filter Figure 3.51 shows how you could make a simple RC low-pass filter with selectable 3dB points. We've used a multiplexer to inputpI I 80k select one of four preset resistors, via a 2-bit (digital) address. We chose to put 1 1 output the switch at the input, rather than after O.0lpF the resistors, because there is less charge A, A, A , AO I- - injection at a point of lower signal imped- - rolloff frequency ance. Another possibility, of course, is to select use FET switches to select the capacitor. TO generate a very wide range of time con- Figure 3.52. RC low-pass filter with choice of stants you might have to do that, but the 15 equally spaced time constants. switch's finite RONwould limit attenua- tion at high frequencies, to a maximum of RoN/Rseries. We've also indicated a EXERCISE 3.12 unity-gain buffer, following the filter, since What are the 3dB points for this circuit?
- 104. FIELD-EFFECT TRANSISTORS 152 Chapter 3 Figure 3.53. An analog multi- plexer selects appropriate emitter degeneration resistors to achieve decade-switchable gain. buffer buffer I - '"" hold - Figure 3.54. Sample-and-hold. Switchable gain amplifier Sample-and-hold Figure 3.53 shows how you can apply the same idea of switching resistors to pro- duce an amplifier of selectable gain. Al- though this idea is a natural for op-amps, we can use it with the emitter-degenerated amplifier. We used a constant-current sink as emitter load, as in an earlier exam- ple, to permit gains much less than unity. We then used the multiplexer to sel- ect one of four emitter resistors. Note the blocking capacitor, needed to keep the quiescent current independent of gain. Figure 3.54 shows how to make a "sample- and-hold" circuit, which comes in handy when you want to convert an analog signal to a stream of digital quantities ("analog- to-digital conversion") - you've got to hold each analog level steady while you figure out how big it is. The circuit is simple: A unity-gain input buffer generates a low-impedance copy of the input signal, forcing it across a small capacitor. To hold the analog level at any moment, you simply open the switch. The high input impedance of the second buffer (which
- 105. FET SWITCHES 3.14 MOSFET logic and power switches 153 should have FET input transistors, to keep get you up to speed on them in Chapters input current near zero) prevents loading 8-11!). of the capacitor, so it holds its voltage until the switch is again closed. 3.14 MOSFET logic and power switches EXERCISE 3.13 The other kinds of FET switch applications The input buffermust supplycurrent to keep the are logic and Power switching circuits. The capacitor following a varying signal. Calculate distinction is simple: In analog signal the buffer'speak output current when the circuit switching you use a FET as a series switch, is driven by an input sine wave of 1 volt passing or blocking a signal that has some amplitudeat 10kHz. range of analog voltage. The analog signal is usually a low-level signal,at insignificant Flying-capacitor voltage converter Here's a nice way (Fig. 3.55) to generate a needed negative power-supply voltage in a circuit that is powered by a single positive supply. The pair of FET switches on the left connects C1across the positive supply, charging it to V,,, while the switches on the right are kept open. Then the input switches are opened, and the switches on the right are closed, connecting charged C1 across the output, transferring some of its charge onto C2. The switches are diabolically arranged so that C1 gets turned upside down, generating a negative output! This particular circuit is available power levels. In logic switching, on the other hand, MOSFET switches open and close to generate full swings between the power supply voltages. The "signals" here are really digital, rather than analog-they swing between the power supply voltages, representing the two states HIGH and LOW. In-between voltages are not useful or desirable; in fact, they're not even legal! Finally, "power switching" refers to turning on or off the power to a load such as a lamp, relay coil, or motor winding; in these applications, both voltages and currents tend to be large. We'll take logic switching first. as the 7662 voltage converter chip, which Logic awnching we'll talk about in Sections 6.22 and 14.07. The device labeled "inverter" turns Figure 3.56 shows the simplest kind of a HIGH voltage into a LOW voltage, and logic switching with MOSFETs: Both vice versa. We'll show you how to make circuits use a resistor as load and perform one in the next section (and we'll really the logical function of inversion - a HIGH m -- Figure 3.55. Flying-capacitor voltage lnverter inverter.
- 106. FIELD-EFFECT TRANSISTORS 154 Chapter 3 Figure 3.56. NMOS and PMOS logic inverters. input generates a LOW output, and vice versa. The n-channel version pulls the out- put to ground when the gate goes HIGH, whereas the p-channel version pulls the resistor HIGH for grounded (LOW) in- put. Note that the MOSFETs in these cir- cuits are used as common-source invert- ers, rather than as source followers. In digital logic circuits like these we are usu- ally interested in the output voltage ("logic level") produced by a certain input volt- age; the resistor serves merely as a passive drain load, to make the output swing to the drain supply when the FET is off. If, on the other hand, we replace the resistor by a light bulb, relay, printhead hammer, or some other hefty load, we've got a power- switching application (Fig. 3.3). Although we're using the same "inverter" circuit, in the power switching application we're in- terested instead in turning the load on and off. CMOS inverter The NMOS and PMOS inverters of the preceding circuits have the disadvantage of drawing current in the ON state and having relativelyhigh output impedance in the OFF state. You can reduce the output impedance (by reducing R), but only at the expense of increased dissipation, and vice versa. Except for current sources, of course, it's never a good idea to have high output impedance. Even if the in- tended load is high impedance (another MOSFET gate, for example), you are invit- ing capacitive noise pickup problems, and you will suffer reduced switching speeds for the ON-to-OFF ("trailing") edge (be- cause of stray loading capacitance). In this case, for example, the NMOS inverter with a compromise value of drain resistor, say 10k, would produce the waveform shown in Figure 3.57. Figure 3.57 The situation is reminiscent of the single-ended emitter follower in Section 2.15, in which quiescent power dissipation and power delivered to the load were in- volved in a similar compromise. The so- lution there - the push-pull configuration - is particularly well suited to MOSFET switching. Look at Figure 3.58, which you might think of as a push-pull switch: In- put grounded cuts off the bottom transis- tor and turns on the top transistor, pulling the output HIGH. A HIGH input (+VDo) does the reverse, pulling the output to ground. It's an inverter with low output
- 107. FET SWITCHES 3.14 MOSFET logic and power switches 155 source inverters, whereas the complementary bipolar transistors in the push-pull circuits of Section 2.15 are (non-inverting) emitter foilow- input T$output ers. Try drawing a "complementary BJT in- verter," analogous to the CMOS inverter. Why won't it work? We'll be seeing much more of digital CMOS in the chapters on digital logic and microprocessors (Chapters 8-11). For now, - it should be evident that CMOS is a low Figure 3.58. CMOS logic inverter. power logic family (with zero quiescent power) with high-impedance inputs, and impedance in both states, and no quiescent current whatsoever. It's called a CMOS (complementary MOS) inverter, and it is the basic structure of all digital CMOS logic, the logic family that has become dominant in large-scale integrated circuits (LSI), and seems destined to replace ear- lier logic families (with names like "TTL") based on bipolar transistors. Note that the CMOS inverter is two complementary MOSFET switches in series, alternately enabled, while the CMOS analog switch (treated earlier in the chapter) is two com- plementary MOSFET switches in parallel, enabled simultaneously. with stiff outputs that swing the full supply range. Before leaving the subject, however, we can't resist the temptation to show you one additional CMOS circuit (Fig. 3.59). This is a logic NAND gate, whose output goes LOW only if input A AND input Bare both HIGH. The operation is surprisingly easy to understand: If A and B are both HIGH, series NMOS switches Q1 and Q2 are both ON, pulling the output stiffly to ground; PMOS switches Qg and Qq cooperate by being OFF; thus, no current flows. However, if either A or B (or both) is LOW, the corresponding PMOS transistor is ON, pulling the output HIGH; since one (or both) of the series chain QIQz is OFF, EXERCISE 3.14 no current flows. The complementary MOS transistors in the This is called a "NAND" gate because CMOS inverter are both operating as common- it performs the logical AND function, but output Q = F B +QZL- - Figure 3.59. CMOS NAND gate, AND gate.
- 108. FIELD-EFFECTTRANSISTORS 156 Chapter 3 with inverted ("NOT") output - it's a NOT-AND, abbreviated NAND. Although gates and their variants are properly a subject for Chapter 8, you will enjoy trying your hand at the following problems. EXERCISE 3.15 Draw a CMOS AND gate. Hint: AND = NOT- NAND. EXERCISE 3.16 Now draw a NOR gate: The output is LOW if either A OR B (or both) is HIGH. EXERCISE 3.17 You guessed it -draw a CMOS OR gate. EXERCISE 3.18 Draw a 3-input CMOS NAND gate. The CMOS digital logic we'll be see- ing later is constructed from combinations of these basic gates. The combination of very low power dissipation and stiff rail- to-rail output swing makes CMOS logic the family of choice for most digital cir- cuits, accounting for its popularity. Fur- thermore, for micropower circuits (such as wristwatches and small battery-powered instruments) it's the only game in town. Lest we leave the wrong impression, however, it's worth noting that CMOS logic is not zero-power. There are two mechanisms of current drain: During tran- sitions, a CMOS output must supply a transient current I = CdVldt to charge any capacitance it sees (Fig. 3.60). You get load capacitance both from wiring ("stray" capacitance) and from the input capaci- tance of additional logic that you are driv- ing. In fact, because a complicated CMOS chip contains many internal gates, each driving some on-chip internal capacitance, there is some current drain in any CMOS circuit that is making transitions, even if the chip is not driving any external load. Not surprisingly, this "dynamic" current drain is proportional to the rate at which transitions take place. The second mecha- nism of CMOS current drain is shown in Figure 3.61: As the input jumps between the supply voltage and ground, there is a region where both MOSFETs are conduct- ing, resulting in large current spikes from VoDto ground. This is sometimes called "class-A current" or "power supply crow- barring." You will see some consequences of this in Chapters 8, 9, and 14. As long as we're dumping on CMOS, we should mention that an additional disadvantage of CMOS (and, in fact, of all MOSFETs) is its vulnerability to damage from static electricity. We'll have more to say about this in Section 3.15. Figure 3.60. Capacitive charging current. 0, alone,, 1 ' 0 v," voo 0 , conducting 0, conduct~ng 0 Figure 3.61. Class-A CMOS conduction. CMOS linear amplifier CMOS inverters - and indeed all CMOS digital logic circuits - are intended to be
- 109. FET SWITCHES 3.14 MOSFET logic and power switches 157 used with digital signal levels. Except dur- ing transitions between states, therefore, the inputs and outputs are close to ground or VDD (usually +5V). And except during those transitions (with typical durations of a few nanoseconds), there is no quiescent current drain. The CMOS inverter turns out to have some interesting properties when used with analog signals. Look again at Figure 3.61. You can think of Q1 as an active (current- source) load for inverting amplifier Q2, and vice versa. When the input is near VDD or ground, the currents are grossly mismatched, and the amplifier is in satu- ration (or "clipping") at ground or VDD, respectively. This is, of course, the nor- mal situation with digital signals. How- ever, when the input is near half the sup- ply voltage, there is a small region where the drain currents of Q1and Q2are nearly equal; in this region the circuit is an in- verting linear amplifier with high gain. Its transfer characteristic is shown in Figure 3.62. The variation of Rloadand g, with drain current is such that the highest volt- age gain occurs for relatively low drain currents, i.e., at low supply voltages (say 5V). This circuit is not a good amplifier; it has the disadvantage of very high output impedance (particularly when operated at low voltage), poor linearity, and unpre- dictable gain. However, it is simple and inexpensive (CMOS inverters are available 6 to a package for under half a dollar), and it is sometimes used to amplify small input signals whose waveforms aren't im- portant. Some examples are proximity switches (which amplify 60Hz capacitive pickup), crystal oscillators, and frequency- sensing input devices whose output is a frequency that goes to a frequency counter (see Chapter 15). To use a CMOS inverter as a linear amplifier, it's necessary to bias the input so that the amplifier is in its active re- gion. The usual method is with a large- very h ~ y hgain for small signals 1 2 3 4 5 A V," (V) v+= 3v 50 - 40 I 3 0 - v+= 1ov gain (dB) 20 - 10 - I I I 1 I 10 100 l k lOk look l M lOM lOOM frequency B Figure 3.62 value resistor from output to input (which we'll recognize as "dc feedback" in the next chapter), as shown in Figure 3.63. That puts us at the point VOut = V,, in Figure 3.62. As we'll learn later, such a connection (circuit A) also acts to lower the input impedance, through "shunt feed- back," making circuit B desirable if a high input impedance at signal frequencies is important. The third circuit is the clas- sic CMOS crystal oscillator, discussed in Section 5.13. Figure 3.64 shows a vari- ant of circuit A, used to generate a clean lOMHz full-swing square wave (to drive digital logic) from an input sine wave. The circuit works well for input amplitudes from 50mV rms to 5 volts rms. This is a good example of an "I don't know the gain, and I don't care" application. Note the input-protection network, consisting of a current-limiting series resistor and clamp- ing diodes.
- 110. FIELD-EFFECT TRANSISTORS 158 Chapter 3 A B Figure 3.63. CMOS linear amplifier circuits. 0.001 100 lOMHz in 0.05-5"rms wvrr74HC04 74HC04 Figure 3.64 Power switching MOSFETs work well as saturated switches, as we suggested with our simple circuit in Section 3.01. Power MOSFETs are now available from many manufacturers, mak- ing the advantages of MOSFETs (high in- put impedance, easy paralleling, absence of "second breakdown") applicable to power circuits. Generally speaking, power MOSFETs are easier to use than conven- tional bipolar power transistors. However, there are some subtle effects to consider, and cavalier substitution of MOSFETs in switching applications can lead to prompt disaster. We've visited the scenes of such disasters and hope to avert their repetition. Read on for our handy guided tour. than a few tens of milliamps, until the late 1970s, when the Japanese introduced "vertical-groove" MOS transistors. Power MOSFETs are now manufactured by all the manufacturers of discrete semiconduc- tors (e.g, GE, IR, Motorola, RCA, Sili- conix, Supertex, TI, along with European companies like Amperex, Ferranti, Sie- mens, and SGS, and many of the Japanese companies), with names like VMOS, TMOS, vertical DMOS, and HEXFET. They can handle surprisingly high voltages (up to IOOOV), and peak currents to 280 amps (continuous currents to 70A), with RON as low as 0.02 ohm. Small power MOSFETs sell for much less than a dollar, and they're available in all the usual tran- sistor packages, as well as multiple tran- Power MOSFETs. FETs were feeble low- sistors packaged in the convenient DIP current devices, barely able to run more (dual in-line package) that most integrated
- 111. FET SWITCHES 3.14 MOSFET logic and power switches 15' C / -- B Figure 3.65. A large- junction-area transistor can be thought of as many paralleled small- E area transistors. circuits come in. Ironically, it is now discrete low-level MOSFETs that are hard to find, there being no shortage of power MOSFETs. See Table 3.5 for a listing of representative power MOSFETs. High impedance, thermal stability. The two important advantages of the power MOSFET, compared with the bipolar power transistor, are its high input imped- ance (but watch out for high input capac- itance, particularly with high-current de- vices; see below) and its complete absence of thermal runaway and second breakdown. This latter effect is very important in power circuits and is worth understanding: The large junction area of a power transistor (whether BJT or FET) can be thought of as a large number of small junctions in parallel (Fig. 3.65), all with the same ap- plied voltages. In the case of a bipolar power transistor, the positive temperature coefficientof collector current at fixed VBE (approximately +9°/o/0C, see Section 2.10) means that a local hot spot in the junc- tion will have a higher current density, thus producing additional heating. At suf- ficiently high VCE and Ic, this "current hogging" can cause local thermal runaway, known as second breakdown. As a result, bipolar power transistors are limited to a "safe operating area" (on a plot of collector current versus collector voltage) smaller than that allowed by transistor power dis- sipation alone (we'll see more of this in Chapter 6). The important point here is that the negative temperature coefficient of MOS drain current (Fig. 3.13) prevents these junction hot spots entirely. MOS- FETs have no second breakdown, and their safe operating area (SOA) is limited only by power dissipation (see Fig. 3.66, where we've compared the SOAs of an npn and an NMOS power transistor of the same Imax,Vmax,and Pdiss).For the same rea- son, MOSFET power amplifiers don't have the nasty runaway tendencies that we've all grown to love in bipolar transistors (see Section 2.15), and as an added bonus, power MOSFETs can be paralleled with- out the current-equalizing "emitter- ballasting" resistors that are necessary with bipolar transistors (see Section 6.07). Power switching examples and cautions. You often want to control a power MOS- FET from the output of digital logic. Al- though there are logic families that gen- erate swings of 10 volts or more ("4000- series CMOS"), the most common logic families use levels of +5 volts ("high-speed CMOS") or +2.4 volts ("TTL"). Figure 3.67 shows how to switch loads from these three logic families. In the first circuit, the +10 volt gate drive will fully turn on any MOSFET, so we chose the VN0106, an in- expensive transistor that specifies RON< 5 ohms at VGS = 5 volts. The diode protects against inductive spike (Section 1.31); the series gate resistor, though not essential, is a good idea, because MOSFET drain-gate capacitance can couple the load's inductive transients back to the delicate CMOS logic (more on this soon). In the second circuit we have 5 volts of gate drive, still fine for the VNOl/VPOl series; for variety we've
- 112. FIELD-EFFECTTRANSISTORS 160 Chapter 3 1 2 5 10 20 50 100 a0 nC V,,. V ~ s( v ~ down. 3.66. suffer Power MOSFETs from second break- used a p-channel MOSFET, driving a load +5 volt -swing from the TTL output, returned to ground. which then drives a normal MOSFET; The last two circuits show two ways alternatively, we can use something like to handle the +2.4 volt (worst-case; it's the TN0106, a "low-threshold" MOSFET usually around +3.5V)HIGH output from designed for logic-level drive. Watch out, TTL digital logic: We can use a pullup though, for misleading specifications. For resistor to +5 volts to generate a full exam~le.the TNOl svecifies ''V~9/+h =
- 113. FET SWITCHES 3.14 MOSFET logic and power switches 161 Magnecraft W97Cpx-2 power relay 1N4002 + 1ov I 0.3 V max when on 40h=GVNO106 - 10V CMOS VP0106 RON= 150 (maxl @ v,, = - 5 v 5V load Figure 3.67. MOSFETs can switch power loads when driven from digital logic levels. 1.5 volts (max)," which sounds fine until you read the fine print ("at ID = 1mA"). It takes considerably more gate voltage than VGS(th) to turn the MOSFET on fully (Fig. 3.68). However, the circuit will probably work OK, because (a) a HIGH TTL output is rarely less than +3 volts, and typically more like +3.5 volts, and (b) the TNOl further specifies ''RoN(typ) = 50 at VGS= 3V." This example illustrates a frequent de- signer's quandary, namely a choice be- tween a complicated circuit that meets the strict worst-case design criterion, and is therefore guaranteed to work, and a sim- ple circuit that doesn't meet worst-case specifications, but is overwhelmingly likely to function without problems. There are times when you will find yourself choosing the latter, ignoring the little voice whisper- ing into your ear. Capacitance. In the preceding examples we put a resistor in series with the gate when there was an inductive load. As we mentioned earlier in the chapter (Section
- 114. FIELD-EFFECTTRANSISTORS 162 Chapter 3 i output characterist~cs 3.0 - transfer characteristics 2.4 - 1.8 - - 5 0.1.2 - 0.6 - 0 Figure 3.68. Drain characteristics of an n- channel low-threshold MOSFET (type TNO104). The series resistance is a compromise between speed and protection, with values of 100 ohms to 10k being typical. Even without inductive loads there is dynam- ic gate current, of course: The capaci- tance to ground, Cis,, gives rise to I = CissdVGs/dt,while the (smaller) feedback capacitance, C,,,, produces an input cur- rent I = CTs,dVDG/dt.The latter may dominate in a common-source switch, be- cause A V D ~is usually much larger than the AVGs gate drive (Miller effect). EXERCISE 3.19 An IRF520 MOSFET controlling a 2 amp load is switched off in 100ns (by bringing the gate from +10V to ground), during which the drain goes from 0 to 50 volts. What is the average gate current during the 1OOns, assuming CGS (alsocalledCis,)is 450pF,and CDG(alsocalled CTss)is 50pF? 3.09), MOSFETs have essentially infinite gate resistance,but finite impedance owing to gate-channel capacitance. With high- current MOSFETs the capacitance can be staggering: Compared with 45pF of input capacitance for the 1 amp VNO1, the 10 amp IRF520 has Ci, = 450pF, and the macho 70 amp SMM70N05 from Siliconix has Cin = 4300pF! A rapidly-changing drain voltage can produce milliamps of transient gate current, enough to overdrive (and even damage, via "SCR crowbarring") delicate CMOS driver chips. 0 5 10 15 gate charge (nC1 Figure 3.69. Gate charge versus VGS. In a common-source switch, the Miller- effect contribution to gate current oc- curs entirely during the drain transitions, whereas the gate-source capacitance causes current whenever the gate voltage is chang- ing. These effects are often plotted as a graph of "gate charge versus gate-source voltage," as in Figure 3.69. The horizon- tal portion occurs at the turn-on voltage, where the rapidly falling drain forces the
- 115. FET SWITCHES 3.14 MOSFET logic and power switches 163 gate driver to supply additional charge to Crss(Miller effect). If the feedback capaci- tance were independent of voltage, the hor- izontal portion would be proportional to drain voltage, after which the curve would continue at the previous slope. In fact, feedback capacitance Crssrises rapidly at low voltage (Fig. 3.70), which means that most of the Miller effect occurs during the low-voltage portion of the drain waveform. This explains the change in slope of the gate charge curve, as well as the fact that the horizontal portion is almost indepen- dent of drain voltage. IRF520 VGS= 0 C,,, = C,, + Cgd,Cdsshorted CgsCgd coss = Cd, + - Cgs + Cgd " Cds + cgd I I I I J 0 1 0 2 0 3 0 4 0 5 0 v,, (V) Figure 3.70. Power MOSFET capacitances. EXERCISE 3.20 How does the voltage dependence of Crss explain the change in slope of the gate charge curves? Other cautions. Power MOSFETs have some additional idiosyncrasies you should know about. All manufacturers of power MOSFETs seem to connect the body in- ternally to the source. Because the body forms a diode with the channel, this means that there is an effective diode from drain to source (Fig. 3.71); some manufactur- ers even draw the diode explicitly in their MOSFET symbol so that you won't for- get. This means that you cannot use power MOSFETs bidirectionally, or at least not with more than a diode drop of reverse drain-source voltage. For example, you couldn't use a power MOSFET to zero an integrator driven with a bipolarity signal, and you couldn't use a power MOSFET as an analog switch for bipolarity signals. This problem does not occur with inte- grated circuit MOSFETs (analog switches, for example), where the body is connected to the most negative power-supply termi- nal. Figure 3.71. Power MOSFETs connect body to source, forming a drain-source diode. Another trap for the unwary is the fact that gate-source breakdown voltages (f20V is a common figure) are lower than drain-source breakdown voltages (which range from 20V to 1000V). This doesn't matter if you're driving the gate from the small swings of digital logic, but you get into trouble immediately if you think you can use the drain swings of one MOSFET to drive the gate of another. Finally, the issue of gate protection: As we discuss in the final section of this chap- ter, all MOSFET devices are extremely sus- ceptible to gate oxide breakdown, caused by electrostatic discharge. Unlike JFETs or other junction devices, in which junc- tion avalanche current can safely discharge the overvoltage, MOSFETs are damaged irreversibly by a single instance of gate breakdown. For this reason it is a very good idea to use gate series resistors of lk-lOk, particularly when the gate signal
- 116. FIELD-EFFECTTRANSISTORS 164 Chapter 3 comes from another circuit board. This stantial dc gate current. Another precau- greatly reduces the chances of damage; it tion is to make sure you don't leave MOS- also prevents circuit loading if the gate FET gates unconnected, because they are is damaged, because the most common much more susceptible to damage when symptom of a damaged MOSFET is sub- floating (there is then no circuit path for - TABLE 3.5. POWER MOSFETs Cont drain Turn-on CUrr RDS(O~)@"GSVGS(~II) Ciss Crss charge BVDSa max mar max tYP tYP tYP (V) (A) (R) (V) (V) (pF) (pF) (nC) caseb Type/Commentsc n-channel 30 0.8 1.8 5 2.5 110 35 - DIP-14 ~ ~ 3 0 0 1J'; 2N, 2P in DIP 40 4 2.5 5 1.5 60 5 0.8 TO-92 TN0104N3; low threshold 60 0.2 6 5 2.5 60 5 - TO-92 ~ ~ 0 6 1 0 ~ ~ ;gate protec; sim to VN2222 60 0.4 5 5 2.5 60 10 - DIP-14 ~ ~ 1 0 0 4 ~ 'uad in DIP 60 15 0.14 5 2 900 180 ,'4.- TO-220 RFP15NO6L , low threshold VN1310N3, BSS100 VN0210N3 IRFDl2O RFP~NIOL~;low threshold IRF510, MTP4N10, VNIllON5,2SK295 IRF520, BUZ72A, 2SK383, VN121ON5 IRF540,MTP25N10 IRF150,2N6764 VNEOOSA' 120 0.2 10 2.5 2 125 20 - TO-92 ~ ~ 1 2 0 6 ~ ' ;low threshold
- 117. FET SWITCHES 3.14 MOSFET logic and power switches 165 Cont drain Turn-on CU" RDS(O~)@~GSVGS(~~)Ciss Crss charge BVDS a max max max tYP tYP tYP (V) (A) (a) (V) (V) (pF) (pF) (nC) caseb Type/Commentsc p-channel 30 0.6 2 12 4.5 150 60 - DIP-14 ~ ~ 3 0 0 1J' ; 2N, 2P in DIP 60 0.4 5 10 4.5 150 20 - DIP-14 ~ ~ 2 0 0 4 ~ ' ;quad in DIP BVGSis +20V, except ('I +40V, (*) k1OV, (3) +15, -0.3V, and (4) k15V (b) QJA:DIP-4=12O0CMI;DIP-14=10O"C/W;TO-92=200'C/W; OJC:TO-220=2.5'C/W; TO-3=0.8'C/W. Pdiss@ Tamb=75'C: DIP-4=0.6W; DIP-14=0.8W; TO-92=0.3W; Pdiss@ Tcase=75'C:TO-220=30W; TO-3=90W. (') expect var~at~onsin characteristics between manufacturers; those shown are typical. (m) maximum. static discharge, which otherwise provides a measure of safety). This can happen unexpectedly if the gate is driven from another circuit board. The best practice is to connect a pulldown resistor (say lOOk to 1M)from gate to source of any MOSFETs whose gates are driven from an off-card signal source. MOSFETs versus BJTs as high-current switches. Power MOSFETs are attractive alternatives to conventional power BJTs most of the time. They currently cost somewhat more, for the same capability; but they're simpler to drive, and they don't suffer from second breakdown and consequently reduced safe-operating-area (SOA) constraints (Fig. 3.66). Keep in mind that an ON MOSFET behaves like a small resistance, rather than a saturated bipolar transistor, for small values of drain voltage. This can be an advantage, because the "saturation voltage" goes clear to zero for small drain currents. There is a general perception that MOSFETs don't saturate as well at high currents, but our research shows this to be largely false. In Table 3.6 we've chosen comparable pairs (npn versus n-channel MOSFET), for which we've looked up the specified VcE(sat) or RDs(,,). The low- current MOSFET makes a poor showing when compared with its "small-signal" npn cousin, but in the range of 10-50 amps, 0- 100 volts, the MOSFET does better. Note particularly the enormous base currents
- 118. FIELD-EFFECT TRANSISTORS 166 Chapter 3 TABLE 3.6. BJT-MOSFETCOMPARISON V,t(max) tout (25°C) (125'C) (10V) Price Class TYPe 1c.b (v) (v) 1,. VGS max (100 PC) 60V, 0.5A NPN - 2N4400 0.5A 0.75 NMOS - VN0610 0.5A 2.5 60V, 10A NPN - 2N3055 10A 3 NMOS - MTP3055A 1OA 1.5 1OOV, 50A NPN - 2N6274 20A 1 NMOS - VNE003A 20A 0.7 400V, 1 5 ~ NPN - 2N6547 15A 1.5 NMOS - IRF350 15A 3 needed to bring the bipolar power transis- tor into good saturation - 10% or more of the collector current (!) - compared with the (zero-current) 10 volt bias at which MOSFETs are usually specified. Note also that high-voltage MOSFETs (say, BVDs > 200V) tend to have larger RDs(,,), with larger temperature coefficients, than the lower-voltage units. Along with saturation data, we've listed capacitances in the ta- ble, because power MOSFETs often have more capacitance than BJTs of the same rated current; in some applications (partic- ularly if switching speed is important) you might want to consider the product of ca- pacitance and saturation voltage as a figure of merit. Remember that power MOSFETs can be used as BJT substitutes for linear power circuits, for example audio amplifiers and voltage regulators (we'll treat the latter in Chapter 6). Power MOSFETs are also available as p-channel devices, although there tends to be a greater variety available among the (better performing) n-channel devices. Some MOSFET power switching exam- ples. Figure 3.72 shows three ways to use a MOSFET to control the dc power to some sub-circuit that you want to turn on and off. If you have a battery-operated instrument that needs to make some mea- surements occasionally, you might use circuit A to switch the power-hungry microprocessor off except during those intermittent measurements. Here we've used a PMOS switch, turned on by a 5 volt logic swing to ground. The "5V logic" is micropower CMOS digital circuitry, kept running even when the microprocessor is shut off (remember, CMOS logic has zero static dissipation). We'll have much more to say about this sort of "power-switching" scheme in Chapter 14. In the second circuit (B), we're switch- ing dc power to a load that needs +12 volts, at considerable current; maybe it's a radio transmitter, or whatever. Because we have only a 5 volt logic swing avail- able, we've used a small n-channel switch to generate a full 12 volt swing, which then drives the PMOS gate. Note the high-value NMOS drain resistor, perfectly adequate here because the PMOS gate draws no dc current (even a beefy 10A brute), and we don't need high switching speed in an ap- plication like this. The third circuit (C) is an elaboration of circuit B, with short-circuit current lim- iting via the pnp transistor. That's always a good idea in power supply design, be- cause it's easy to slip with the oscilloscope probe. In this case, the current limiting
- 119. FET SWITCHES 3.14 MOSFET logic and power switches 167 5 v -logic kr-to 12V load circuit + lav 0 . 5 0 VP12 1ZV load 1OOk -10k - Figure 3.72. dc power switching with MOSFETs. also prevents momentary short-circuiting Figure 3.73A shows a simple MOSFET of the +12 volt supply by the initially switching example, one that takes advan- uncharged bypass capacitor. See if you can tage of the high gate impedance. You might figure out how the current limiting circuit want to turn on exterior lighting automat- works. ically at sunset. The photoresistor has low resistance in sunlight, high resistance in EXERCISE 3.21 darkness. You make it part of a resis- How doesthe currentlimiting circuitwork? How much load current does it allow? Why is the tive divider, driving the gate directly (no NMOS drain resistor split in two? dc loading!). The light goes on when the gate voltage reaches the value that pro- The limited gate breakdown voltages of MOSFETs (usually f20V) would create a real problem here if you attempted to operate the circuit from higher supply voltage. In that case you could replace the lOOk resistor with lOk (allowing operation to 40V), or other appropriate ratio, always keeping the VP12 gate drive less than 20 volts. duces enough drain current to close the re- lay. Sharp-eyed readers may have noticed that this circuit is not particularly precise or stable; that's OK, because the photore- sistor undergoes an enormous change in resistance (from 1Ok to lOM, say) when it gets dark. The circuit's lack of a precise and stable threshold just means that the light may turn on a few minutes early or
- 120. FIELD-EFFECT TRANSISTORS 168 Chapter 3 Figure 3.73. Ambient-light-controlled power switch. to 120V ac lamp l~ghtingcircu~t (or relay) 1OOk s 6-bL- - m~ O O ~ H Z Figure 3.74. MOSFET piezo 1OM t* 4 ) late. Note that the MOSFET may have to dissipate some power during the time the gate bias is inching up, since we're operat- ing in the linear region. That problem is remedied in Figure 3.73B, where a pair of cascaded MOSFETs delivers much higher gain, augmented by some positive feed- back via the 10M resistor; the latter causes the circuit to snap on regeneratively as it reaches threshold. Figure 3.74 shows a real power MOS- FET job: A 200 watt amplifier to drive a piezoelectric underwater transducer at 0 power driver. --- -- 200kHz. We've used a pair of hefty NMOS transistors, driven alternately to create ac drive in the (high-frequency) transformer primary. The bipolar push-pull gate dri- vers, with small gate resistors, are needed to overcome capacitive loading, since the FETs must be turned on fully in something less than a microsecond. Finally, in Figure 3.75 we show a linear circuit example with power MOSFETs. Ceramic piezoelectric transducers are of- ten used in optical systems to produce controlled small motions; for example,
- 121. FET SWITCHES 3.15 MOSFET handling precautions 169 180pF o r 0 +1ov 3.3k - 'use five resistors - In series -protection 0- 1kV piezo dr~ver circuit lOOOV pp to 1kHz Figure 3.75. IkV low-power piezo driver. in adaptive optics you might use a piezo- electrically controlled "rubber mirror" to compensate for local variations in the in- dex of refraction of the atmosphere. Piezo transducers are nice to use, because they're very stiff. Unfortunately, they require a kilovolt or more of voltage to produce sig- nificant motions. Furthermore, they're highly capacitive - typically 0.01pF or more - and have mechanical resonances in the kilohertz range, thus presenting a nasty load. We needed dozens of such driver amplifiers, which for some reason cost a few thousand dollars apiece if you buy them commercially. We solved our problem with the circuit shown. The BUZ- 50B is an inexpensive ($4) MOSFET, good for 1kV and 2 amps. The first transistor is a common-source inverting amplifier, driv- ing a source follower. The npn transis- tor is a current-limiter and can be a low- voltage unit, since it floats on the output. One subtle feature of the circuit is the fact that it's actually push-pull, even though it piezo CLc 10,OOOpF looks single-ended: You need plenty of cur- rent to push 10,000pF around at 2 volts per microsecond (how much?); the output transistor can source current, but the pull- down resistor can't sink enough (look back to Section 2.15, where we motivated push- pull with the same problem). In this circuit the driver transistor is the pulldown, via the gate-source diode! The rest of the cir- cuit involves feedback (with an op-amp), a forbidden subject until the next chapter; in this case the magic of feedback makes the overall circuit linear (100V of output per volt of input), whereas without it the output voltage would depend on the (non- linear) ID-versus-VGs characteristic of the input transistor. 3.15 MOSFET handling precautions The MOSFET gate is insulated by a layer of glass (SOa) a few thousand angstroms (1A = 0.lnm) thick. As a result it has very high resistance, and no resistive or
- 122. FIELD-EFFECT TRANSISTORS 170 Chapter 3 junction-like path that can discharge static electricity as it is building up. In a classic situation you have a MOSFET (or MOS- FET integrated circuit) in your hand. You walk over to your circuit, stick the device into its socket, and turn on the power, only to discover that the FET is dead. You killed it! You should have grabbed onto the circuit board with your other hand before inserting the device. This would have dis- charged your static voltage, which in win- ter can reach thousands of volts. MOS de- vices don't take kindly to "carpet shock," which is officially called electrostatic dis- charge (ESD). For purposes of static elec- tricity, you are equivalent to lOOpF in se- ries with 1.5k; in winter your capacitor may charge to lOkV or more with a bit of shuffling about on a fluffy rug, and even a simple arm motion with shirt or sweater can generate a few kilovolts (see Table 3.7). TABLE 3.7. TYPICAL ELECTROSTATICVOLTAGESa Electrostatic voltage 10%-20% 65'0-90% humidity humidity Action ('J) ('J) tion. (If the spark comes from your finger, your additional lOOpF only adds to the in- jury.) Figure 3.76 (from a series of ESD tests on a power MOSFET) shows the sort of mess this can make. Calling this "gate breakdown" gives the wrong idea; the col- orful term "gate rupture" is closer to the mark! highpower (X1200) Figure 3.76. Scanning electron micrograph of a 6 amp MOSFET destroyed b y IkV charge o n "human body equivalent" (1.5k in series with 100pF) applied t o its gate. (Courtesy o f Motor- ola, Inc.) walk on carpet 35,000 1,500 walk on vinyl floor 12,000 250 work at bench 6,000 100 handle vinyl envelope 7,000 600 pick up poly bag 20,000 1,200 shift position on foam chair 18,000 1,500 (a) adapted from Motorola Power MOSFET Data Book. Although any semiconductor device can be clobbered by a healthy spark, MOS de- vices are particularly susceptible because the energy stored in the gate-channel ca- pacitance, when it has been brought up to breakdown voltage, is sufficient to blow a hole through the delicate gate oxide insula- The electronics industry takes ESD very seriously. It is probably the leading cause of nonfunctional semiconductors in instru- ments fresh off the assembly line. Books are published on the subject, and you can takes courses on it. MOS devices, as well as other susceptible semiconductors (which includes just about everything; e.g., it takes about 10 times as much voltage to zap a BJT), should be shipped in conductive foam or bags, and you have to be careful about voltages on soldering irons, etc., dur- ing fabrication. It is best to ground solder- ing irons, table tops, etc., and use conduc- tive wrist straps. In addition, you can get "antistatic" carpets, upholstery, and even
- 123. clothing (e.g., antistatic smocks containing 2% stainless steel fiber). A good antistatic workstation includes humidity control, air ionizers (to make the air slightly conduc- tive, which keeps things from charging up), and educated workers. In spite of all this, failure rates increase dramatically in win- ter. Once a semiconductor device is safely soldered into its circuit, the chances for damage are greatly reduced. In addition, most small-geometry MOS devices (e.g., CMOS logic devices, but not power MOS- FETs) have protection diodes in the input gate circuits. Although the internal pro- tection networks of resistors and clamping diodes (or sometimes zeners) compromise performance somewhat, it is often worth- while to choose those devices because of the greatly reduced risk of damage by static electricity. In the case of unprotected devices, for example power MOSFETs, small-geometry (low current) devices tend to be the most troublesome, because their low input capacitance is easily brought to high voltage when it comes in contact with a charged lOOpF human. Our personal SELF-EXPLANATORY CIRCUITS 3.17 Bad circuits 171 experience with the small-geometry VN13 MOSFET has been so dismal in this regard that we no longer use it in production in- struments. It is hard to overstate the problem of gate damage due to breakdown in MOSFETs. Luckily, MOSFET designers realize the seriousness of the problem and are responding with new designs with higher BVGs; for example, Motorola's new "TMOS IV" series features f50 volt gate-source breakdown. SELF-EXPLANATORY CIRCUITS 3.16 Circuit ideas Figure 3.77 presents a sampling of FET circuit ideas. 3.17 Bad circuits Figure 3.78 presents a collection of bad ideas, some of which involve a bit of subtlety. You'll learn a lot by figuring out why these circuits won't work.
- 126. Ch4: Feedback and Operational Amplifiers INTRODUCTION Feedback has become such a well-known concept that the word has entered the gen- eral vocabulary. In control systems, feed- back consists in comparing the output of the system with the desired output and making a correction accordingly. The "sys- tem" can be almost anything: for instance, the process of driving a car down the road, in which the output (the position and ve- locity of the car) is sensed by the driver, who compares it with expectations and makes corrections to the input (steering wheel, throttle, brake). In amplifier cir- cuits the output should be a multiple of the input, so in a feedback amplifier the input is compared with an attenuated version of the output. 4.01 Introduction to feedback Negative feedback is the process of cou- pling the output back in such a way as to cancel some of the input. You might think that this would only have the effect of reducing the amplifier's gain and would be a pretty stupid thing to do. Harold S. Black, who attempted to patent nega- tive feedback in 1928, was greeted with the same response. In his words, "Our patent application was treated in the same manner as one for a perpetual-motion ma- chine." (See the fascinating article in IEEE Spectrum, December 1977.) True, it does lower the gain, but in exchange it also im- proves other characteristics, most notably freedom from distortion and nonlinearity, flatness of response (or conformity to some desired frequency response), and predict- ability. In fact, as more negative feedback is used, the resultant,amplifier character- istics become less dependent on the char- acteristics of the open-loop (no-feedback) amplifier and finally depend only on the properties of the feedback network itself. Operational amplifiers are typically used in this high-loop-gain limit, with open-loop voltage gain (no feedback) of a million or SO. A feedback network can be frequency- dependent, to produce an equalization amplifier (with specific gain-versus- frequency characteristics, an example being the famous RIAA phono amplifier 175
- 127. FEEDBACK AND OPERATIONAL AMPLIFIERS 176 Chapter 4 characteristic), or it can be amplitude- dependent, producing a nonlinear ampli- fier (a popular example is a logarithmic amplifier, built with feedback that exploits the logarithmic VBEversus IC of a diode or transistor). It can be arranged to pro- duce a current source (near-infinite out- put impedance) or a voltage source (near- zero output impedance), and it can be con- nected to generate very high or very low in- put impedance. Speaking in general terms, the property that is sampled to produce feedback is the property that is improved. Thus, if you feed back a signal propor- tional to the output current, you will gen- erate a good current source. Feedback can also be positive; that's how you make an oscillator, for instance. As much fun as that may sound, it sim- ply isn't as important as negative feed- back. More often it's a nuisance, since a negative-feedback circuit may have large enough phase shifts at some high frequency to produce positive feedback and oscil- lations. It is surprisingly easy to have this happen, and the prevention of un- wanted oscillations is the object of what is called compensation, a subject we will treat briefly at the end of the chapter. Having made these general comments, we will now look at a few feedback exam- ples with operational amplifiers. types, with the universal symbol shown in Figure 4.1, where the (+) and (-) in- puts do as expected: The output goes posi- tive when the noninverting input (+)goes more positive than the inverting input (-), and vice versa. The (+) and (-) sym- bols don't mean that you have to keep one positive with respect to the other, or any- thing like that; they just tell you the rela- tive phase of the output (which is impor- tant to keep negative feedback negative). Using the words "noninverting" and "in- verting," rather than "plus" and "minus," will help avoid confusion. Power-supply connections are frequently not displayed, and there is no ground terminal. Oper- ational amplifiers have enormous voltage gain, and they are never (well, hardly ever) used without feedback. Think of an op- amp as fodder for feedback. The open- loop gain is so high that for any reason- able closed-loop gain, the characteristics depend only on the feedback network. Of course, at some level of scrutiny this gen- eralization must fail. We will start with a naive view of op-amp behavior and fill in some of the finer points later, when we need to. 4.02 Operational amplifiers Most of our work with feedback will in- volve operational amplifiers, very high gain dc-coupled differential amplifiers with single-ended outputs. You can think of the classic long-tailed pair (Section 2.18) with its two inputs and single output as a prototype, although real op-amps have much higher gain (typically lo5 to lo6) and lower output impedance and allow the output to swing through most of the sup- ply range (you usually use a split supply, most often f15V).Operational amplifiers are now available in literally hundreds of Figure 4.1 There are literally hundreds of different op-amps available, offering various perfor- mance trade-offs that we will explain later (look ahead to Table 4.1 if you want to be overwhelmed by what's available). A very good all-around performer is the popular LF411 ("411" for short), origi- nally introduced by National Semi- conductor. Like all op-amps, it is a wee beastie packaged in the so-called mini- DIP (dual in-line package), and it looks
- 128. BASIC OP-AMP CIRCUITS 4.04 Inverting amplifier 177 Figure 4.2. Mini-DIP integrated circuit. as shown in Figure 4.2. It is inexpensive (about 60 cents) and easy to use; it comes in an improved grade (LF411A) and also in a mini-DIP containing two independent op-amps (LF412, called a "dual" op-amp). We will adopt the LF411 throughout this chapter as our "standard" op-amp, and we recommend it as a good starting point for your circuit designs. d 411 offset null 1 top view Figure 4.3 Inside the 411 is a piece of silicon con- taining 24 transistors (21 BJTs, 3 FETs), 11 resistors, and 1 capacitor. The pin con- nections are shown in Figure 4.3. The dot in the corner, or notch at the end of the package, identifies the end from which to begin counting the pin numbers. As with most electronic packages, you count pins counterclockwise, viewing from the top. The "offset null" terminals (also known as "balance" or "trim") have to do with cor- recting (externally) the small asymmetries that are unavoidable when making the op- amp. You will learn about this later in the chapter. 4.03 The golden rules Here are the simple rules for working out op-amp behavior with external feedback. They're good enough for almost everything you'll ever do. First, the op-amp voltage gain is so high that a fraction of a millivolt between the input terminals will swing the output over its full range, so we ignore that small voltage and state golden rule I: I. The output attempts to do whatever is necessary to make the voltage difference between the inputs zero. Second, op-amps draw very little input current (0.2nA for the LF411; picoamps for low-input-current types); we round this off, stating golden rule 11: II. The inputs draw no current. One important note of explanation: Golden rule I doesn't mean that the op- amp actually changes the voltage at its in- puts. It can't do that. (How could it, and be consistent with golden rule II?) What it does is "look" at its input terminals and swing its output terminal around so that the external feedback network brings the input differential to zero (if possible). These two rules get you quite far. We will illustrate with some basic and impor- tant op-amp circuits, and these will prompt a few cautions listed in Section 4.08. BASIC OP-AMP CIRCUITS 4.04 Inverting amplifier Let's begin with the circuit shown in Figure 4.4. The analysis is simple, if you remember your golden rules: 1. Point B is at ground, so rule I implies that point A is also.
- 129. FEEDBACK AND OPERATIONAL AMPLIFIERS 178 Chapter 4 2. This means that (a) the voltage across R2 is VOutand (b) the voltage across R1 is Vn- Figure 4.4. Inverting amplifier. 3. So, using rule 11, we have In other words, voltage gain = Vout/Kn= -R2/R1 Later you will see that it's often better not to ground B directly, but through a resistor. However, don't worry about that now. Our analysis seems almost too easy! In some ways it obscures what is actually happening. To understand how feedback works, just imagine some input level, say +1 volt. For concreteness, imagine that R1 is 1Ok and R2 is 100k. Now, suppose the output decides to be uncooperative, and sits at zero volts. What happens? R1 and R2form a voltage divider, holding the inverting input at +0.91 volt. The op- amp sees an enormous input unbalance, forcing the output to go negative. This action continues until the output is at the required -10.0 volts, at which point both op-amp inputs are at the same voltage, namely ground. Similarly, any tendency for the output to go more negative than -10.0 volts will pull the inverting input below ground, forcing the output voltage to rise. What is the input impedance? Simple. Point A is always at zero volts (it's called a virtual ground). So Zin= R1. At this point you don't yet know how to figure the output impedance; for this circuit, it's a fraction of an ohm. Note that this analysis is true even for dc - it's a dc amplifier, So if you have a signal source offset from ground (collector of a previous stage, for instance), you may want to use a coupling capacitor (sometimes called a blocking capacitor, since it blocks dc but couples the signal). For reasons you will see later (having to do with departures of op-amp behavior from the ideal), it is usually a good idea to use a blocking capacitor if you're only interested in ac signals anyway. This circuit is known as an inverting amplifier. Its one undesirable feature is the low input impedance, particularly for amplifiers with large (closed-loop) voltage gain, where R1 tends to be rather small. That is remedied in the next circuit (Fig. 4.5). Figure 4.5. Noninverting amplifier. 4.05 Noninverting amplifier Consider Figure 4.5. Again, the analysis is simplicity itself: VA = Kn But VAcomes from a voltage divider: VA= VoutRl/(Rl+R2) Set VA= V,,, and you get gain = Vout/Kn= 1 +R2IR1 This is a noninverting amplifier. In the approximation we are using, the input impedance is infinite (with the 411 it would be 1012R or more; a bipolar op-amp
- 130. BASIC OP-AMP CIRCUITS 4.06 Follower 179 will typically exceed 108R). The output impedance is still a fraction of an ohm. As with the inverting amplifier, a detailed look at the voltages at the inputs will persuade you that it works as advertised. Once again we have a dc amplifier. If the signal source is ac-coupled, you must provide a return to ground for the (very small) input current, as in Figure 4.6. The component values shown give a voltage gain of 10 and a low-frequency 3dB point of 16Hz. Figure 4.6 Figure 4.7 An ac amplifier Again, if only ac signals are being ampli- fied, it is often a good idea to "roll off' the gain to unity at dc, especially if the amplifier has large voltage gain, in order to reduce the effects of finite "input off- set voltage." The circuit in Figure 4.7 has a low-frequency 3dB point of 17Hz, the frequency at which the impedance of the capacitor equals 2.0k. Note the large ca- pacitor value required. For noninverting amplifiers with high gain, the capacitor in this ac amplifier configuration may be un- desirably large. In that case it may be preferable to omit the capacitor and trim the offset voltage to zero, as we will dis- cuss later (Section 4.12). An alternative is to raise R1 and R2, perhaps using a T network for the latter (Section 4.18). In spite of its desirable high input im- pedance, the noninverting amplifier con- figuration is not necessarily to be preferred over the inverting amplifier configuration in all circumstances. As we will see later, the inverting amplifier puts less demand on the op-amp and therefore gives some- what better performance. In addition, its virtual ground provides a handy way to combine several signals without interac- tion. Finally, if the circuit in question is driven from the (stiff) output of another op-amp, it makes no difference whether the input impedance is 10k(say)or infinity, because the previous stage has no trouble driving it in either case. out Figure 4.8. Follower. 4.06 Follower Figure 4.8 shows the op-amp version of an emitter follower. It is simply a noninvert- ing amplifier with R1 infinite and Rz zero (gain = 1). There are special op-amps, us- able only as followers, with improved char- acteristics (mainly higher speed), e.g., the LM310 and the OPA633, or with simpli- fied connections, e.g., the TL068 (which comes in a 3-pin transistor package). An amplifier of unity gain is sometimes called a bufler because of its isolating
- 131. FEEDBACK AND OPERATIONAL AMPLIFIERS 180 Chapter 4 properties (high input impedance, low output impedance). (from a voltage divider or perhaps a signal) Figure 4.9 I I I I I I I I - I t R2 I power I supply I R corn - I I I 4.07 Current sources The circuit in Figure 4.9 approximates an ideal current source, without the VBE off- set of a transistor current source. Nega- tive feedback results in Kn at the invert- ing input, producing a current I = Kn/R through the load. The major disadvan- tage of this circuit is the "floating" load (neither side grounded). You couldn't gen- erate a usable sawtooth wave with respect to ground with this current source, for in- stance. One solution is to float the whole circuit (power supplies and all) so that you can ground one side of the load (Fig. 4.10). I I - The circuit in the box is the previous cur- rent source, with its power supplies shown explicitly. R1 and Rg form a voltage di- vider to set the current. If this circuit seems confusing, it may help to remind yourself that "ground" is a relative con- cept. Any one point in a circuit could be called ground. This circuit is useful for generating currents into a load that is re- turned to ground, but it has the disadvan- tage that the control input is now floating, so you cannot program the output current with an input voltage referenced to ground. Some solutions to this problem are pre- sented in Chapter 6 in the discussion of constant-current power supplies. 1 I I Current sources for loads returned to ground L 1 Figure 4.10. Current source with grounded load and floating power supply. With an op-amp and external transistor it is possible to make a simple high-quality current source for a load returned to ground; a little additional circuitry makes it possible to use a programming input ref- erenced to ground (Fig. 4.11). In the first circuit, feedback forces a voltage Vcc -Kn across R, giving an emitter current (and therefore an output current) IE= (VCC- Kn)/R.There are no VBE offsets, or their variations with temperature, Ic, VCE,etc., to worry about. The current source is im- perfect (ignoring op-amp errors: Ib, V,,) only insofar as the small base current may vary somewhat with VCE(assuming the op-amp draws no input current), not too high a price to pay for the convenience of a grounded load; a Darlington for Q1 would reduce this error considerably. This error comes about, of course, because the op- amp stabilizes the emitter current, whereas the load sees the collectorcurrent. A varia- tion of this circuit, using a FET instead of a bipolar transistor, avoids this problem al- together, since FETs draw no gate current.
- 132. BASIC OP-AMP CIRCUITS 4.07 Current sources 181 With this circuit the output current is proportional to the voltage drop below Vcc applied to the op-amp's noninverting input; in other words, the programming voltage is referenced to Vcc, which is fine if K, is a fixed voltage generated by a volt- age divider, but an awkward situation if an external input is to be used. This is remedied in the second circuit, in which a similar current source with npn transistor is used to convert an input voltage (refer- enced to ground) to a Vcc-referenced in- put to the final current source. Op-amps and transistors are inexpensive. Don't hes- itate to use a few extra components to im- prove performance or convenience in cir- cuit design. One important note about the last cir- cuit: The op-amp must be able to operate with its inputs near or at the positive sup- ply voltage. An op-amp like the 307, 355, or OP-41 is good here. Alternatively, the op-amp could be powered from a separate V+ voltage higher than Vcc. source. It has the advantage of zero base current error, which you get with FETs, without being restricted to output currents less than IDS(ON).In this circuit (actually a current sink), Q2 begins to EXERCISE 4.1 What is the output current in the last circuit for Figure 4.12. FETtbipolar Current source suit- a given input voltage &? able for high currents. Figure 4.12 shows an interesting vari- conduct when Q1 is drawing about 0.6mA ation on the op-ampltransistor current drain current. With Ql's minimum IDss
- 133. FEEDBACK AND OPERATIONAL AMPLIFIERS 182 Chapter 4 of 4mA and a reasonable value for Qz's beta, load currents of lOOmA or more can be generated (Q2 can be replaced by a Darlington for much higher currents, and in that case R1 should be reduced accordingly). We've used a JFET in this particular circuit, although a MOSFET would be fine; in fact, it would be better, since with a JFET (which is a depletion- mode device) the op-amp must be run from split supplies to ensure a gate voltage range sufficient for pinch-off. It's worth noting that you can get plenty of current with a simple power MOSFET ("VMOS"); but the high interelectrode capacitances of power FETs may cause problems that you avoid with the hybrid circuit here. Even so, its performance is limited by the CMRR of the op-amp. For large output currents, the resistors must be small, and the compliance is limited. Also, at high frequencies (where the loop gain is low, as we'll learn shortly) the output impedance can drop from the desired value of infinity to as little as a few hundred ohms (the op- amp's open-loop output impedance). As clever as it looks, the Howland current source is not widely used. 4.08 Basic cautions for op-amp circuits 1. In all op-amp circuits, golden rules I and I1 (Section 4.03) will be obeyed only if the op-amp is in the active region, i.e., inputs and outputs not saturated at one of Howland current source the supply voltages. For instance, overdriving one of the Figure 4.13 shows a nice "textbook" cur- amplifier configurations will cause output rent source. If the resistors are chosen ,-lipping at output swings near vcc or so that = R4/Ri7then it can be V . During clipping, the inputs will shown that Iload= -Kn/R2. no longer be maintained at the same Figure 4.13. Howland current source. EXERCISE 4.2 Show that the preceding result is correct. This sounds great, but there's a hitch: The resistors must be matched exactly; otherwise it isn't a perfect current source. voltage. The op-amp output cannot swing beyond the supply voltages (typicallyit can swing only to within 2V of the supplies, though certain op-amps are designed to swing all the way to one supply or the other). Likewise, the output compliance of an op-amp current source is set by the same limitation. The current source with floating load, for instance, can put a maximum of Vcc - V;,, across the load in the "normal" direction (current in the same direction as applied voltage) and V,, - VEEin the reverse direction (the load could be rather strange, e.g., it might contain batteries, requiring the reverse sense of voltage to get a forward current; the same thing might happen with an inductive load driven by changing currents). 2. The feedback must be arranged so that it is negative. This means (among other things) that you must not mix up the inverting and noninverting inputs.
- 134. AN OP-AMP SMORGASBORD 4.09 Linear circuits 183 3. There must always be feedback at dc in an op-amp circuit. Otherwise the op-amp is guaranteed to go into saturation. For instance, we were able to put a capacitor from the feedback network to ground in the noninverting amplifier (to reduce gain at dc to 1, Fig. 4.7), but we could not similarly put a capacitor in series between the output and the inverting input. 4. Many op-amps have a relatively small maximum differential input voltage limit. The maximum voltage difference between the inverting and noninverting inputs might be limited to as little as 5 volts in ei- ther polarity. Breaking this rule will cause large input currents to flow, with degrada- tion or destruction of the op-amp. We will take up some more issues of this type in Section 4.11 and again in Section 7.06 in connection with precision circuit design. AN OP-AMP SMORGASBORD In the following examples we will skip the detailed analysis, leaving that fun for you, the reader. 4.09 Linear circuits Optional inverter The circuits in Figure 4.14 let you invert, or amplify without inversion, by flipping a switch. The voltage gain is either + I or -1, depending on the switch position. EXERCISE 4.3 Show that the circuits in Figure 4.14 work as advertised. Follower with bootstrap As with transistor amplifiers, the bias path can compromise the high input impedance you would otherwise get with an op-amp, Figure 4.14 Figure 4.15 particularly with ac-coupled inputs, where a resistor to ground is mandatory. If that is a problem, the bootstrap circuit shown in Figure 4.15 is a possible solution. As in the transistor bootstrap circuit (Section 2.17), the 0.lpF capacitor makes the upper 1M resistor look like a high-impedance current source to input signals. The low- frequency rolloff for this circuit will begin at about lOHz, dropping at 12dB per octave for frequencies somewhat below this. Note: You might be tempted to
- 135. FEEDBACK AND OPERATIONAL AMPLIFIERS 184 Chapter 4 reduce the input coupling capacitor, since its load has been bootstrapped to high impedance. However, this can generate a peak in the frequency response, in the manner of an active filter (see Section 5.06). Ideal current-to-voltageconverter Remember that the humble resistor is the simplest I-to-V converter. However, it has the disadvantage of presenting a nonzero impedance to the source of input current; this can be fatal if the device providing the input current has very little compliance or does not produce a constant current as the output voltage changes. A good example is a photovoltaic cell, a fancy name for a sun battery. Even the garden- variety signal diodes you use in circuits have a small photovoltaic effect (there are amusing stories of bizarre circuit behavior finally traced to this effect). Figure 4.16 shows the good way to convert current photovoltaic diode -- 'Figure 4.16 to voltage while holding the input strictly at ground. The inverting input is a vir- tual ground; this is fortunate, since a pho- tovoltaic diode can generate only a few tenths of a volt. This particular circuit has an output of 1 volt per microamp of input current. (With BJT-input op-amps you sometimes see a resistor connected be- tween the noninverting input and ground; its function will be explained shortly in connection with op-amp shortcomings.) Of course, this transresistance configu- ration can be used equally well for devices that source their current via some positive excitation voltage, such as Vcc. Photo- multiplier tubes and phototransistors (both devices that source current from a positive supply when exposed to light) are often used this way (Fig. 4.17). LPT 100 (no base connection) PFigure 4.17 EXERCISE 4.4 Use a 411 and a 1mA (full scale) meter to construct a "perfect" current meter (i.e., one with zero input impedance) with 5mA full scale. Design the circuit so that the meter will never be driven more than f150% full scale. Assume thatthe411 outputcan swingto f 13volts(* 15V supplies) and that the meter has 500 ohms internalresistance. Differential amplifier The circuit in Figure 4.18 is a differential amplifier with gain R2/R1. As with the current source that used matched resistor ratios, this circuit requires precise resistor matching to achieve high common-mode rejection ratios. The best procedure is to stock up on a bunch of lOOk 0.01% resistors next time you have a chance. All your differential amplifiers will have unity gain, but that's easily remedied with further (single-ended) stages of gain. We will treat differential amplifiers in more detail in Chapter 7.
- 136. AN OP-AMP SMORGASBORD 4.09 Linear circuits 185 Figure 4.18. Classic differential amplifier. Summing amplifier The circuit shown in Figure 4.19 is just a variation of the inverting amplifier. Point X is a virtual ground, so the input current is Vl/R + V2/R + V3/R. That gives VOut = -(Vl + V2 + V3). Note that the inputs can be positive or negative. Also, the input resistors need not be equal; if they're unequal, you get a weighted sum. For instance, you could have four inputs, each of which is +I volt or zero, representing binary values 1, 2, 4, and 8. By using input resistors of 10k, 5k, 2.5k, and 1.25k you will get an output in volts equal to the binary count input. This scheme can be easily expanded to several digits. It is the basis of digital- to-analog conversion, although a different input circuit (an R - 2R ladder) is usually used. EXERCISE 4.5 Show how to make a two-digit digital-to-analog converter by appropriately scaling the input resistors in a summing amplifier. The digital input represents two digits, each consisting of four lines that represent the values 1, 2, 4, and 8 for the respectivedigits. An input line is either at +1 volt or at ground, i.e., the eight input lines represent 1,2,4,8,10,20,40,and 80. Because op-ampoutputsgenerallycannotswingbeyond f13 volts, you will have to settle for an output in volts equal to one-tenththe value of the input number. Figure 4.19 L - -- - - - - - frequency (log scale) -B Figure 4.20. Op-amp RIAA phono playback amplifier. RIAA preamp The RIAA preamp is an example of an am- plifier with a specificallytailored frequency response. Phonograph records are cut with approximately flat amplitude characteris- tics; magnetic pickups, on the other hand, respond to velocity, so a playback ampli- fier with rising bass response is required.
- 137. FEEDBACK AND OPERATIONAL AMPLIFIERS 186 Chapter 4 Power booster The circuit shown in Figure 4.20 produces VVV For high output current, a power transis- tor follower can be hung on an op-amp output (Fig. 4.21). In this case a nonin- verting amplifier has been drawn; the fol- lower can be added to any op-amp configu- ration. Notice that feedback is taken from the emitter; thus, feedback enforces the de- sired output voltage in spite of the VBE drop. This circuit has the usual problem that the follower output can only source current. As with transistor circuits, the remedy is a push-pull booster (Fig. 4.22). You will see later that the limited speed with which the op-amp can move its out- put (slew rate) seriously limits the speed the required response. The RIAA play- Figure 4.23 + VCC of this booster in the crossover region, creating distortion. For slow-speed appli- cations you don't need to bias the push- pull pair into quiescent conduction, be- cause feedback will take care of most of the crossover distortion. Commercial op- amp power boosters are available, e.g., the LT1010, OPA633, and 3553. These are unity-gain push-pull amplifiers capable of 200mA of output current and operation to lOOMHzand above. You can include them inside the feedback loop without any wor- ries (See Table 7.4). back amplifier frequency response (relative to OdB at 1kHz) is shown in the graph, with the breakpointsgiven in terms of time constants. The 47pF capacitor to ground e output rolls off the gain to unity at dc, where it would otherwise be about 1000; as we have - hinted earlier, the reason is to avoid ampli- fication of dc input "offsets." The LM833 is a low-noise dual op-amp intended for - VEE audio applications (a "gold-plated" op- Figure 4.22 amp for this application is the ultra-low- noise LT1028, which is 13dB quieter, and 2N3055 t heat sink lOdB more expensive, than the 833!). , 1 I/, input output + v c c t 1 2 V to t30V- 7 ;+1OV (regulated) (unregulated) O t o l A 10k 0 41 output 1.Ok - -- - Figure 4.21
- 138. AN OP-AMPSMORGASBORD 4.10 Nonlinear circuits 187 Power supply An op-amp can provide the gain for a feedback voltage regulator (Fig. 4.23). The op-amp compares a sample of the output with the zener reference, changing the drive to the Darlington "pass transistor" as needed. This circuit supplies 10 volts regulated, at up to 1 amp load current. Some notes about this circuit: 1. The voltage divider that samples the output could be a potentiometer, for ad- justable output voltage. 2. For reduced ripple at the zener, the 10k resistor should be replaced by a current source. Another approach is to bias the zener from the output; that way you take advantage of the regulator you have built. Caution: When using this trick, you must analyze the circuit carefully to be sure it will start up when power is first applied. 3. The circuit as drawn could be damaged by a temporary short circuit across the out- put, because the op-amp would attempt to drive the Darlington pair into heavy con- duction. Regulated power supplies should always have circuitry to limit "fault" cur- rent (see Section 6.05 for more details). 4. Integrated circuit voltage regulators are available in tremendous variety, from the time-honored 723 to the convenient 3- terminal adjustable regulators with inter- nal current limit and thermal shutdown (see Tables 6.8-6.10). These devices, complete with temperature-compensated Figure 4.24 internal zener reference and pass transis- tor, are so easy to use that you will almost never use a general-purpose op-amp as a regulator. The exception might be to gen- erate a stable voltage within a circuit that already has a stable power-supply voltage available. In Chapter 6 we will discuss voltage regulators and power supplies in detail, including special ICs intended for use as voltage regulators. 4.10 Nonlinear circuits Power-switching driver For loads that are either on or off, a switch- ing transistor can be driven from an op- amp. Figure 4.24 shows how. Note the diode to prevent reverse base-emitter breakdown (op-amps easily swing more than -5V). The 2N3055 is everyone's power transistor for noncritical high- current applications. A Darlington (or power MOSFET) can be used if currents greater than about 1 amp need to be driven, Active rectifier Rectification of signals smaller than a diode drop cannot be done with a sim- ple diode-resistor combination. As usual, op-amps come to the rescue, in this case by putting a diode in the feedback loop (Fig. 4.25). For Enpositive, the diode pro- vides negative feedback; the output follows the input, coupled by the diode, but with- out a VBEdrop. For V,, negative, the op- amp goes into negative saturation and VOut is at ground. R could be chosen smaller for lower output impedance, with the tradeoff of higher op-amp output current. A better solution is to use an op-amp follower at the output, as shown, to produce very low output impedance regardlessof the resistor value.
- 139. FEEDBACK AND OPERATIONAL AMPLIFIERS 188 Chapter 4 Figure 4.25. Simple active rectifier. VCCr 1 diode d r o ~ Figure 4.26. Effect of finite slew rate on the simple active rectifier. There is a problem with this circuit that becomes serious with high-speed signals. Because an op-amp cannot swing its output infinitely fast, the recovery from negative saturation (as the input waveform passes through zero from below) takes some time, during which the output is incorrect. It looks something like the curve shown in Figure 4.26. The output (heavy line) is an accurate rectified version of the input (light line), except for a short time interval after the input rises through zero volts. During that interval the op-amp output is racing up from saturation near -VEE, so the cir- cuit's output is still at ground. A general- purpose op-amp like the 411 has a slew rate (maximum rate at which the output can change) of 15 volts per microsecond; re- covery from negative saturation therefore takes about Ips, which may introduce sig- nificant output error for fast signals. A circuit modification improves the situation considerably (Fig. 4.27). u Figure 4.27. Improved active rectifier. Dl makes the circuit a unity-gain inverter for negative input signals. D2 clamps the op-amp's output at one diode drop below ground for positive inputs, and since Dl is then back-biased, VOutsits at ground. The improvement comes because the op-amp's output swings only two diode drops as the input signal passes through zero. Since the op-amp output has to slew only about 1.2 volts instead of VEE volts, the "glitch" at zero crossings is reduced more than tenfold. This rectifier is invert- ing, incidentally. If you require a nonin- verted output, attach a unity-gain inverter to the output. The performance of these circuits is im- proved if you choose an op-amp with a high slew rate. Slew rate also influences the performance of the other op-amp ap- plications we've discussed, for instance the simple voltage amplifier circuits. At this point it is worth pausing for a while to see in what ways real op-amps depart from the ideal, since that influences circuit design, as we have hinted on several occasions. A good understanding of op-amp limitations and their influence on circuit design and performance will help you choose your op- amps wisely and design with them effec- tively. A DETAILED LOOK AT OP-AMP BEHAVIOR Figure 4.28 shows the schematic of the 741, a very popular op-amp. Its circuit is
- 140. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.11 Departure from ideal op-amp performance 185 relatively straightforward, in terms of the kinds of transistor circuits we discussed in the last chapter. It has a differential input stage with current mirror load, followed by a common-emitter npn stage (again with active load) that pro- vides most of the voltage gain. A pnp emitter follower drives the push-pull emit- ter follower output stage, which includes current-limiting circuitry. This circuit is typical of many op-amps now avail- able. For many applications the prop- erties of these amplifiers approach ideal op-amp performance characteristics. We will now take a look at the extent to which real op-amps depart from the ideal, what the consequences are for circuit design, and what to do about it. 4.11 Departure from ideal op-amp performance The ideal op-amp has these characteristics: I. Input impedance (differential or com- mon mode) = infinity 2. Output impedance (open loop) = 0 3. Voltage gain = infinity 4. Common-mode voltage gain = 0 5. VOut= 0 when both inputs are at the same voltage (zero "offset voltage7 ') 6. Output can change instantaneously (infinite slew rate) offset null boffset null Figure 4.28. Schematic of the 741 op-amp. (Courtesy of Fairchild Camera and Instrument Corp.)
- 141. FEEDBACK AND OPERATIONAL AMPLIFIERS 190 Chapter4 All of these characteristics are indepen- for high-speed operation have higher bias dent of temperature and supply voltage currents. changes. Real op-amps depart from these char- current acteristics in the following ways (see Table 4.1 for some typical values). Input offset current is a fancy name for the difference in input currents between the two inputs. Unlike input bias current, Input current the offset current, I,,, is a result of man- The input terminals sink (or source, de- pending on the op-amp type) a small current called the input bias current, IB, which is defined as half the sum of the in- put currents with the inputs tied together (the two input currents are approximately equal and are simply the base or gate cur- rents of the input transistors). For the JFET-input 411 the bias current is typi- cally 50pA at room temperature (but as much as 2nA at 70°C), while a typical BJT- input op-amp like the OP-27 has a typical ufacturing variations, since an op-amp's symmetrical input circuit would otherwise result in identical bias currents at the two inputs. The significance is that even when it is driven by identical source impedances, the op-amp will see unequal voltage drops and hence a difference voltage between its inputs. You will see shortly how this influ- ences design. Typically, the offset current is one-half to one-tenth the bias current. For the 411, IOffset= 25pA, typical. bias current of 15nA, varying little with temperature. As a rough guide, BJT-input Input impedance op-amps have bias currents in the tens of Input impedance refers to the differential nanoamps, while FET-in~utop-amps have input resistance (impedance looking into input currents in the tens of ~ i c o a m ~ s(i.e-9 one input, with the other input grounded), 1000 times lower). Generally speaking, which is usually much less than the corn- you can ignore input current with FET op- man-mode resistance (a typical input stage amps, but not with bi~olar-in~utop-amps. looks like a long-tailed pair with current The significance of input bias Wrrent source). For the FET-input 411 it is about is that it causes a voltage drop across 1012 ohms, while for B J T - ~ ~ ~ ~op-amps the resistors of the feedback network, bias like the 741 it is about 2 ~ 0 .Because of network, or source impedance- How small the input bootstrapping effect of negative a resistor this restricts you to depends on feedback (it attempts to keep both inputs the dc gain of your circuit and how much at the same voltage, thus eliminating most output variation you can tolerate. YOUwill of the differential input signal), zi, in see how this works later. practice is raised to very high values and Op-amps are available with input bias usually is not as important a parameter as currents down to a nanoamp or less for input bias current. (bipolar) transistor-input circuit types or down tb a few picoamps ( I O - ~ ~ A )for FET-input circuit types. The very lowest Common-mode input range bias cuirents are typified by the superbeta The inputs to an op-amp must stay within Darlington LM11, with a maximum input a certain voltage range, typically less than current of 50pA, the AD549, with an the full supply range, for proper operation. input current of 0.06pA, and the MOSFET If the inputs go beyond this range, the ICH8500, with an input current of 0.OlpA. gain of the op-amp may change drastically, In general, transistor op-amps intended even reversing sign! For a 411 operating
- 142. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.11 Departure from ideal op-amp performance 191 from f15 volt supplies, the guaranteed common-mode input range is f11 volts minimum. However, the manufacturer claims that the 411 will operate with common-mode inputs all the way to the positive supply, though performance may be degraded. Bringing either input down to the negative supply voltage causes the amplifier to go berserk, with symptoms like phase reversal and output saturation to the positive supply. There are op-amps available with com- mon-mode input ranges down to the neg- ative supply, e.g., the LM358 (a good dual op-amp) or the LM10, CA3440, or OP-22, and up to the positive supply, e.g., the 301, OP-41, or the 355 series. In addition to the operating common-mode range, there are maximum allowableinput voltages beyond which damage will result. For the 411 they are f15 volts (but not to exceed the nega- tive supply voltage, if it is less). or sometimes just a few values for typi- cal load resistances. Many op-amps have asymmetrical output drive capability, with the ability to sink more current than they can source (or vice versa). For the 411, output swings to within about 2 volts of Vcc and VEE are possible into load resis- tances greater than about lk. Load resis- tances significantly less than that will per- mit only a small swing. Some op-amps can produce output swings all the way down to the negative supply (e.g., the LM358), a particularly useful feature for circuits op- erated from a single positive supply, since output swings all the way to ground are then possible. Finally, op-amps with MOS transistor outputs (e.g., the CA3130, 3160, ALD1701, and 1CL761x)can swing all the way to both rails. The remarkable bipo- lar LM 10shares this property, without the limited supply voltage range of the MOS op-amps (usually f8V max). Differential input range Voltage gain and phase shift Some bipolar op-amps allow only a lim- Typically the voltage gain A,, at dc is ited voltage between the inputs, sometimes 100,000 to 1,000,000 (often specified in as small as f0.5 volt, although most are decibels), dropping to unity gain at a fre- more forgiving, permitting differential in- quency (called fT) of lMHz to IOMHz. puts nearly as large as the supply voltages. This is usually given as a graph of open- Exceeding the specified maximum can de- loop voltage gain as a function of frequen- grade or destroy the op-amp. cy. For internally compensated op-amps this graph is simply a 6dBfoctave rolloff Output impedance; output swing versus load resistance Output impedance Ro means the op-amp's intrinsic output impedance without feed- back. For the 411 it is about 40 ohms, but with some low-power op-amps it can be as high as several thousand ohms (see Fig. 7.16). Feedback lowers the output im- pedance into insignificance(or raises it, for a current source); so what usually matters more is the maximum output current, with typical values of 20mA or so. This is fre- quently given as a graph of output voltage swing V,, as a function of load resistance, beginningat some fairly low frequency (for the 411 it begins at about IOHz), an inten- tional characteristic necessary for stability, as you will see in Section 4.32. This rolloff (the same as a simple RC low-pass filter) results in a constant 90" lagging phase shift from input to output (open-loop) at all fre- quencies above the beginningof the rolloff, increasing to 120"to 160° as the open-loop gain approaches unity. Since a 180' phase shift at a frequency where the voltage gain equals 1 will result in positive feedback (oscillations), the term "phase margin" is used to specify the difference between the phase shift at fT and 180".
- 143. FEEDBACK AND OPERATIONAL AMPLIFIERS 192 Chapter 4 lnput offset voltage Op-amps don't have perfectly balanced in- put stages, owing to manufacturing vari- ations. If you connect the two inputs to- gether for zero input signal, the output will usually saturate at either Vcc or VEE (YOU can't predict which). The difference in in- put voltages necessary to bring the output to zero is called the input offset voltage V,, (it's as if there were a battery of that voltage in series with one of the inputs). Usually op-amps make provision for trim- ming the input offset voltage to zero. For a 411 you use a 10k pot between pins 1 and 5, with the wiper connected to VEE. Of greater importance for precision ap- plications is the drift of the input offset voltage with temperature and time, since any initial offset can be trimmed to zero. A 411has a typical onset voltage of 0.8mV (2mV maximum), with temperature coeffi- cient ("tempco") of 7pVI0C and unspec- ified coefficient of offset drift with time. The OP-77, a precision op-amp, is laser- trimmed for a typical offset of 10 micro- volts, with temperature coefficient TCV,, of 0.2pVI0C and long-term drift of 0.2pVlmonth. Slew rate The op-amp "compensation" capacit- ance (discussed further in Section 4.32) and small internal drive currents act to- gether to limit the rate at which the output can change, even when a large input unbal- ance occurs. This limiting speed is usually specified as slew rate or slewing rate (SR). For the 41 1 it is 15VIps; low-power op- amps typically have slew rates less than IVIps, while a high-speed op-amp might slew at 1OOVIps, and the LH0063C "damn fast buffer" slews at 6000VIps. The slew rate limits the amplitude of an undistorted sine-wave output swing above some criti- cal frequency (the frequency at which the full supply swing requires the maximum slew rate of the op-amp, Fig. 4.29), thus explaining the "output voltage swing as a function of frequency" graph. A sine wave of frequency f hertz and amplitude A volts requires a minimum slew rate of 27rAf volts per second. at zero cross~ng 14V Figure 4.29. Slew-rate-induced distortion. For externally compensated op-amps the slew rate depends on the compensation network used. In general, it will be lowest for "unity gain compensation," increasing to perhaps 30 times faster for x 100 gain compensation. This is discussed further in Section 4.32. Temperature dependence All these parameters have some temper- ature dependence. However, this usually doesn't make any difference, since small variations in gain, for example, are almost entirely compensated by feedback. Fur- thermore, the variations of these param- eters with temperature are typically small compared with the variations from unit to unit. The exceptions are input offset voltage and input offset current. This will mat- ter, particularly if you've trimmed the off- sets approximately to zero, and will ap- pear as drifts in the output. When high precision is important, a low-drift "instru- mentation" op-amp should be used, with external loads kept above 10k to minimize
- 144. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.12 Effects of op-amp limitations on circuit behavior 193 the horrendous effects on input-stage per- formance caused by temperature gradients. We will have much more to say about this subject in Chapter 7. For completeness, we should mention here that op-amps are also limited in com- mon-mode rejection ratio (CMRR), power- supply rejection ratio (PSRR), input noise voltage and current (en, in), and output crossover distortion. These become signif- icant limitations only in connection with precision circuits and low-noise amplifiers, and they will be treated in Chapter 7. 4.12 Effects of op-amp limitations on circuit behavior Let's go back and look at the inverting amplifier with these limitations in mind. You will see how they affect performance, and you will learn how to design effectively in spite of them. With the understanding you will get from this example, you should be able to handle other op-amp circuits. Figure 4.30 shows the circuit again. Figure 4.30 Open-loop gain Because of finite open-loop gain, the volt- age gain of the amplifier with feedback (closed-loop gain) will begin dropping at a frequency where the open-loop gain ap- proaches R2/R1 (Fig. 4.31). For garden- variety op-amps like the 411, this means that you're dealing with a relatively low frequency amplifier; the open-loop gain is down to 100 at SOkHz, and fT is 4MHz. Note that the closed-loop gain is always less than the open-loop gain; this means, for instance, that a x 100 amplifier built with a 411 will show a noticeable falloff of gain for frequencies approaching 5OkHz. Later in the chapter (Section 4.25), when we deal with transistor feedback circuits with finite open-loop gains, we will have a more accurate statement of this behavior. 105 open-loop lo4C gain f r f 3 < 1 ~= C.- 1 / G (closed loopl g, lo3 -. closed-loop in' gain frequency (Hz1 Figure 4.31. LF411 gain versus frequency ("Bode plot"). , ,drops as 1If L: Y m 8 a 4 0 l k 10k look 1M 10M frequency (Hz) Figure 4.32. Output swing versus frequency (LF411). Slew rate Because of limited slew rate, the maximum undistorted sine-wave output swing drops above a certain frequency. Figure 4.32 shows the curve for a 411, with its 15Vlps
- 145. FEEDBACK AND OPERATIONAL AMPLIFIERS 194 Chapter 4 slew rate. For slew rate S, the output amplitude is limited to A(pp) 5 Slrf for a sine wave of frequency f , thus explaining the llf dropoff of the curve. The flat portion of the curve reflects the power- supply limits of output voltage swing. As an aside, the slew-rate limitation of op-amps can be usefully exploited to filter sharp noise spikes from a desired signal, with a technique known as nonlinear low- pass&filtering By deliberately limiting the slew rate, the fast spikes can be dramati- cally reduced without any distortion of the underlying signal. Output current Because of limited output current capabil- ity, an op-amp's output swing is reduced for small load resistances. Figure 4.33 shows the graph for a 411. For precision applications it is a good idea to avoid large output currents in order to prevent on-chip thermal gradients produced by excessive power dissipation in the output stage. load resistance (k) output could be as large as f0.2 volt when the input is grounded (V,, = 2mV max). Solutions: (a) If you don't need gain at dc, use a capacitor to drop the gain to unity at dc, as in Figure 4.7, as well as the RIAA amplifier circuit (Fig. 4.20). In this case you could do that by capacitively coupling the input signal. (b) Trim the voltage offset to zero using the manufacturer's recommended trimming network. (c) Use an op-amp with smaller V,,. (d) Trim the voltage offset to zero using an external trimming network as described in Section 7.06 (Fig. 7.5). Input bias current Even with a perfectly trimmed op-amp (i.e., V,, = O), our inverting amplifier cir- cuit will produce a non-zero output volt- age when its input terminal is connected to ground. That is because the finite input bias current, IB, produces a voltage drop across the resistors, which is then ampli- fied by the circuit's voltage gain. In this circuit the inverting input sees a driving impedance of R1 11 R2,so the bias current produces a voltage v/;,= IB(RI 11 R2), which is then amplified by the gain at dc, -R2/R1. With FET-input op-amps the effect is usually negligible, but the substantial input current of bipolar op-amps can cause real problems. For example, consider an in- verting amplifier with R1 = 10kand R2= 1M; these are reasonable values for an inverting stage, where we might like to keep Zin at least 1Ok. If we chose the low-noise bipolar LM833, the Figure 4.33. Output swingversusload (LF411). output (for grounded input) could be as large as 100x 1000nAx9.9k. or 0.99 volt Offset voltage - (GdcX~Runbalance),which is unacceptable. By comparison, for our jellybean LF411 Because of input offset voltage, a zero (JFET-input) op-amp the corresponding input produces an output of Vout = worst-case output (for grounded input) is Gd,Vo,. For an inverting amplifier with 0.2mV; for most applications this is neg- voltage gain of 100 built with a 411, the ligible, and in any case is dwarfed by the
- 146. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.12 Effects of op-amp limitations on circuit behavior 19! V,,-produced output error (200mV, worst- case untrimmed, for the LF411). There are several solutions to the prob- lem of bias-current errors. If you must use an op-amp with large bias current, it is a good idea to ensure that both inputs see the same dc driving resistance, as in Fig- ure 4.34. In this case, 9.lk is chosen as the parallel resistance of 10k and 100k. In addition, it is best to keep the resistance of the feedback network small enough so that bias current doesn't produce large offsets; typical values for the resistance seen from the op-amp inputs are lk to lOOk or so. A third cure involves reducing the gain to unity at dc, as in the RIAA amplifier ear- lier. 1OOk -- Figure 4.34. With bipolar op-amps, use a compensation resistor to reduce errors caused by input bias current. In most cases, though, the simplest so- lution is to use op-amps with negligible in- put current. Op-amps with JFET or MOS- FET input stages generally have input cur- rents in the picoamp range (watch out for its rapid rise versus temperature, though, roughly doubling every 10°C), and many modern bipolar designsuse superbeta tran- sistors or bias-cancellation schemes to achieve bias currents nearly as low, de- creasing slightly with temperature. With these op-amps, you can have the advan- tages of bipolar op-amps (precision, low noise) without the annoying problems caused by input current. For example, the precision low-noise bipolar OP-27 has IB=10nA (typ), the inexpensive bipolar LM312 has IB=I .5nA (typ), and its im- proved bipolar cousins (the LT1012 and LM11) have IB= 30pA (typ). Among in- expensive FET op-amps, the JFET LF411 has IB= 50pA (typ), and the MOSFET TLC270 series, priced under a dollar, have IB= IPA (~YP)- Input offset current As we just described, it is usually best to design circuits so that circuit impedances, combined with op-amp bias current, pro- duce negligible errors. However, occasion- ally it may be necessary to use an op-amp with high bias current, or to deal with sig- nals of extraordinarily high ThCvenin im- pedances. In that case the best you can do is to balance the dc driving resistances seen by the op-amp at its input termi- nals. There will still be some error at the output (GdcIoffsetRsource),due to unavoid- able asymmetry in the op-amp input cur- rents. In general, Ioffsetis smaller than Ibiasby a factor of 2 to 20 (with bipolar op-amps generally showing better match- ing than FET op-amps). In the preceding paragraphs we have discussed the effectsof op-amp limitations, taking the example of the simple invert- ing voltage amplifier circuit. Thus, for example, op-amp input current caused a voltage error at the output, In a different op-amp application you may get a different effect; for example, in an op-amp integrator circuit, finite input current produces an output ramp (rather than a constant) with zero applied input. As you become familiar with op-amp cir- cuits you will be able to predict the ef- fects of op-amp limitations in a given circuit and therefore choose which op- amp to use in a given application. In general, there is no "best" op-amp (even when price is no object): For example,
- 147. TABLE 4.1. OPERATIONAL AMPLIFIERS Total Voltage o SUPPlY Current # per n u voltage Supp Offset 5 3 DriA pkgb en 0 curr Bias Offset @lkHz .E ;;.e min max max typ max typ max max max Type Mfga 1 2 4 c W Z (V) (V) (mA) (mV) (mVi (pVI C) (pVInC) ("A) (nA) n?!Hz BIPOLAR, PRECISION OP-07A PM+ A - OP-07E PM+ ' A - OP-21A PM A A OP-27E PM+ ' A A OP-27G PM+ A A OP-37E PM+ .A - OP-50E PM - - OP-77E PM A A OP-90E PM A A OP-97E PM - - MAX400M MA - - LM607A NS - - AD707C AD A - AD8466 AD - - LT1001A LT * A - LT1007A LT * - - LT1012C LT+ A - LT1028A LT - - LT1037A LT - - RC4077A RA - - HA5134A HA - - HA5135 HA * - - HA5147A HA - - BIPOLAR, LOW-BIAS (see also "bipolar, precision'7 OP-08E PM - - - U 10 40 0.5 0.07 0.15 LMlO NS+ a - - a - 1 1 45 0.4 0.3 2 LMl1 NS+ - - " 1 5 40 0.6 0.1 0.3 OP-12E PM+ - - - - 1 10 40 0.5 0.07 0.15 LM308 NS+ * A - - * U 10 36 0.8 2 7.5 LM312 NS+ * - - * ' 1 10 40 0.8 2 7.5 LP324 NS - - - - 1 4 32 0.25 2 4 BIPOLAR, SINGLE-SUPPLY 324A NS+ A A * - - 1 3 3 2 3 2 3 LP324 NS - - - - 1 4 32 0.25 2 4 LT1013C LT - * A - - 1 4 44 1 0.06 0.3 HA5141A HA * A A - - 1 2 40 0.07 0.5 2 BIPOLAR, SINGLE-SUPPLY PRECISION LT1006A LT • - 1 2.7 44 0.5 0.02 0.05 LT1013A LT - * A - - 1 4 44 1 0.04 0.15
- 148. Swing to supplies?'J Slew Max Max - ratee fT CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputf - Type (Vtps) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments OP-08E LMlO LM11 OP-12E LM308 LM312 LP324 low power low noise cheap grade low noise, decomp OP-27 high current, low noise improved OP-07 micropower low power OP-77 lowest non-chopper V,, improvedOP-07; dual = 708 current feedback; fast low noise, -0P-27 improved 312; dual = 1024 ultra low noise decomp 1007, -0P-37 lowest non-chopper V,, quad, low noise low noise, high speed, uncomp 0.12 0.8 104 104 98 5 0.5 - - - - precision 308 0.12 0.1 93 90 102 20 40 - 1Vop-amp; precision; volt. ref. 0.3 0.5 110 100 100 2 0.5 - - - - precision; lowest bias bipolar 0.12 0.8 104 104 98 5 0.5 - - - - precision 312 0.15 0.3 80 80 88 5 0.5 - - - - original low-bias (superbeta) 0.15 0.3 80 96 88 5 0.5 - - - - compensated 308 0.05 0.1 80 90' 94 5 32 - - low power, single supply 0.5 1 65 65 88 20 30 - - • a classic; duaL358A 0.05 0.1 80 90' 94 5 32 - - low power, low bias 0.4 0.8 97 100 122 25 30 - - improved 3581324;quad = 1014 1.5 0.4 80 94 94 1 7 -*-• micropower 0.4 1 100 106 120 20 30 -*-• optional I, = 9 0 M 0.4 0.8 100 103 124 25 30 -*-• improved 3581324;quad = 1014
- 149. TABLE 4.1 (cont'd) Total Voltage o supply Current #per E u voltage Supp Offset Drifi en pkgb Q % curr -Bias Offset @lkHz E - c min rnax rnax typ rnax typ rnax rnax rnax Type Mfga :d f (V) (V) (mA) (mV) (mV) (pVInC) (pVIsC) ("A) (nA) nd?Hz BIPOLAR, HIGH-SPEED OP-62E PM - - OP-63E PM - - OP-64E PM - - OP-65E PM - - CLC400 CL - - AD509K AD - - SL541B PL - - VA705L VT A A VA706K VT A A VA707K VT A A LM837 NS - - AD840K AD - - AD841K AD - - AD847J AD * - - AD848J AD a - - AD849J AD - - HA2539 HA - - SL2541B PL - - HA2541 HA - - HA2542 HA - - HA2544 HA - - CA3450 RC - - HA5101 HA A A HA5111 HA * A A HA5147A HA * - - HA5195 HA - - LM6361 NS - - LM6364 NS - - LM6365 NS - - BIPOLAR, OTHER OP-20B PM - A A * - 1 4 36 0.08 0.06 0.25 0.75 1.5 LM833 NS - - - 1 1 0 36 8 0.3 5 2 CA3193A RC - - - 1 7 36 3.5 0.14 0.2 1 3 XR4560 XU - - - - 1 8 36 2 0.5 6 HA5151 HA * A A - - 1 2 40 0.25 2 3 3 NE5534 SN+ A - 3 6 44 8 0.5 4 MC33078 MO - A - - 1 10 36 5 0.15 2 2 MC33171 MO A A - 1 3 44 0.25 2 4.5 10 MC34071A MO A A - 1 3 44 2.5 0.5 1.5 10
- 150. Swing to supplies?g Slew Max Max - ratee f, CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputf - Type (Vlps) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments precision transimpedance; decomp=401 fast fast, video video, drives 50Q; fast settle video, drives 50R; fast settle decornp, fast, 50Q low noise, low distortion decornp 841;842 has G>2 fast settle; decomp versions fast settle; decomp versions decomp 847 uncornp 847 low noise, sim to 2540 has uncommitted unity gain buf fast settle, low distortion fast settle, decomp video video amptline driver low noise low noise, uncomp low noise, precision, uncomp Elantec EL2195 = improved vertical PNP vertical PNP vertical PNP 30 -.-- accurate low power 30 - - - - low noise, low distortion 5 - - - - 30 - - - - intended for audio 7 ---. low power 0.5 - - - - low noise, intended for audio 36 - - - - low noise, low distortion 44 - .- - 44 -.-- drives 0.01pF
- 151. TABLE 4.1 (cont'd) Total Voltage o S~PP~Y Current #per g U voltage Supp Offset Drift en pkgb 8 w curr Bias Offset @lkHz .k ;.5 rnin rnax rnax typ rnax typ rnax rnax rnax Type Mfga 1 2 4 c IU S (V) (V) (mA) (mV) (mV) (pVI C) (pVI°C) (nA) (nA) n:%Hz BIPOLAR, OBSOLESCENT OP-OIE PM * - - * - 1 1 0 44 3 1 OP-02E PM A - - 1 1 0 44 2 0.3 OP-05E PM+ A - - 1 6 44 4 0.2 OP-l1E PM --• - - 1 1 0 44 6 0.3 307 NS+ 0 - - - - 1 1 0 44 2.5 2 LM318 NS+ - - 1 10 40 10 4 349 NS --. - - 5 10 36 4.5 1 AD517L AD - - - 1 1 0 36 3 - AD518J AD * - - 1 10 40 10 4 NE530 SN A - - 1 1 0 36 3 2 NE531 SN - - • U 12 44 10 2 NE538 SN A - - 5 10 36 2.8 2 pA725 FA+ - - U 6 44 3 0.5 pA739 FA - - - U 8 3 6 1 4 1 741C FA+ * A A * - 1 10 36 2.8 2 748C FA+ - - U 10 36 3.3 2 pA749 FA - - - U 8 3 6 1 0 1 1435 TP * - - * * l o 24 32 30 2 1456 MO .-- .-1 1 0 36 3 5 HA2505 HA - - r n . 1 20 40 6 4 HA2515 HA - - 0 . 1 20 40 6 5 HA2525 HA - - ' - 3 20 40 6 5 HA2605 HA - - * * I 1 0 4 5 4 3 HA2625 HA - - 0 5 5 1 0 4 5 4 3 CA3100 RC - - 10 13 36 11 1 4558 RA+ - a - - - 1 8 36 5.6 2 NE5535 SN A - - 1 1 0 36 2.8 2 5539 SI+ - - - * 7 6 24 15 2.5 JFET, PRECISION OP-41E PM * - - * - 1 10 36 1 0.2 0.25 2.5 5 OP-43E PM - - - 1 10 36 1 0.2 0.25 2.5 5 OPAlOlB BB - - - 1 1 0 40 8 0.05 0.25 3 5 OPAlllB BB ' A - * - 1 10 36 3.5 0.05 0.25 0.5 1 AD547L AD A - - 1 5 36 1.5 - 0.25 - 1 AD548C AD A - - 1 9 36 0.2 0.1 0.25 - 2 OPA627B BB - - - 1 9 36 8 0.04 0.1 0.5 0.8 AD711C AD * A A - 1 9 36 2.8 0.1 0.25 2 3 AD845K AD - - - 1 9.5 36 12 0.1 0.25 1.5 5 LT1055A LT * - - - 1 1 0 40 4 0.05 0.15 1.2 4 HA5170 HA - - - 1 9 44 2.5 0.1 0.3 2 5
- 152. Swing to supplies?g Slew Max Max - ratee fT CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputf - Type (Vlps) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments OP-41E OP-43E OPAl01B OPA111B AD547L AD548C OPA627B AD711C AD845K LT1055A HA5170 fast, precision precision, low current precision quad a classic; uncomp=301 was popular decomp 348 (quad 741) fast; dual=5530 fast; dual=5538 original precision op-amp low noise, intended for audio old classic; dual=1458, quad=348 uncomp 741 sim to 739 fast settle fast 1458 fast small output swing low bias, low dist; OP-43 faster low bias, low dist; OP-41 stabler low noise; decomp = OPA102 low noise, low bias dual = AD642,647 improved LF441; dual = AD648 fast improved LF41112 fast LT1056 is 20% faster low noise
- 153. TABLE 4.1 (cont'd) Total Voltage l2 Supply Current # per nu: voltage Supp Offset Drift pkgb 's en u curr Bias Offset elkHz .E .E min max max typ max typ max max max Type Wga 1 2 4 c LU S (V) (V) (mA) (mV) (mV) (pVi C) (yVI.C) (nA) A ) n$!Hz JFET, HIGH-SPEED OP-42E PM - - - 1 15 40 6.5 0.3 0.75 4 10 OP-44E PM - - - 3 16 40 6 0.03 0.75 4 10 3578 NS+ .-- * - 5 1 0 36 7 3 5 5 AD380K AD - - U 12 40 15 - 1 10 LF401A NS - - 1 15 36 12 - 0.2 OPA404B BB - - . - - 1 10 36 10 0.26 0.75 3 LF457B NS - - - 5 10 36 10 0.18 0.4 3 4 OPA602C BB - - - 1 10 36 4 0.1 0.25 1 2 OPA605K BB - - * * 5 0 0 40 9 0.25 0.5 5 OPA606L BB - - - 1 10 36 9.5 0.1 0.5 3 5 AD744C AD A - 2 9 36 4 0.1 0.25 2 3 AD843B AD - - - 1 9 36 12 0.5 1 15 AD845K AD - - - 1 9.5 36 10.2 0.1 0.25 1.5 3 LT1022A LT * - 1 20 40 7 0.08 0.25 1.3 5 HA5160 HA * - - - U 14 40 10 1 3 20 MC34080A MO A A - 2 6 44 3.4 0.3 0.5 10 MC34081A MO A A - 1 6 44 3.4 0.3 0.5 10 JFET, OTHER TL031C TI TLO5lC TI TLO61C TI+ TL071C TI+ TLO8lB TI+ OPA121 BB OPA128L BB LF351 NS+ 355B NS+ 3568 NS+ LF411 NS+ LFnnn NS LF441 NS LF455B NS LF456B NS AD549L AD AD611K AD LT1057A LT HA5180 HA MC34001A MO MC34181 MO * A A - 1 10 36 0.28 0.5 1.5 6 * A A - 1 10 36 3.2 0.6 1.5 8 * A A .- 1 4 36 0.25 3 15 10 * A A * - 1 7 36 2.5 3 10 10 - A A * - 1 7 36 2.8 2 3 10 .-- .-1 1 0 36 4 0.5 2 3 10 .--.- 1 10 36 1.5 0.14 0.5 5 A A - 1 10 36 3.4 5 10 10 .--. - 1 1 0 36 4 3 5 5 .--. - 1 1 0 36 7 3 5 5 A - . - 1 10 36 3.4 0.8 2 7 20 -.- - - 1 6 36 25 1 * A A • - 1 10 36 0.25 1 5 10 20 .--. - 1 1 0 36 4 0.18 0.4 3 4 .--. - 1 10 36 8 0.18 0.4 3 4 .--.- 1 10 36 0.7 0.3 0.5 5 10 .--.- 1 10 36 2.5 0.25 0.5 5 10 - . A - - 1 20 40 3.8 0.15 0.45 1.8 7 .--.- 1 10 40 1 0.1 0.5 5 * A A * - 1 8 36 2.5 1 2 10 - A A * - 1 3 36 0.2 0.5 2 10
- 154. Swing to supplies?g Slew Max Max - ratee fT CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputf - Type (Vlps) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments TL031C 3 TL051C 24 TLO61C 3.5 TL071C 13 TL081B 13 OPA121 2 OPA128L 3 LF351 13 3558 5 3568 12 LF411 15 LFnnn 20 LF441 1 LF455B 5 LF456B 12.5 AD549L 3 AD611K 13 LT1057A 13 HA5180 7 MC34001A 13 MC34181 10 low Zout decornp 356 hybrid, fast, 50R accurate accurate quad low noise; drives 0.01~F low bias, fast settle uncornp improved LF356 very low dist (3pprn); fast settle fast settle fast settle low bias Vi, > V.+4V; decornp 34081 vi, > v-+4v low power; improved TL061 low dist; improved TL0711081 low power lower noise low noise very low bias 353=dual, 347=quad popular faster 355 jellybean lowest noise JFET low current jellybean low noise; drives 0.01pF low noise; drives 0.01pF electrometer; guard pin low dist, gen purp JFET accurate duallquad JFET very low bias over temp; noisy low power, fast, low dist.
- 155. TABLE 4.1 (cont'd) Total Voltage supply # per voltage Supp Offset Drift pkgb 8 - curr E - c min max max typ max typ max'= X .- Type Mfga 1 2 4 + U B (V) (V) (rnA) (mV) (rnV) (pV1C) (pV1-C) JFET, OBSOLESCENT OP-15E PM+ ' A - OP-16E PM+ - - AD515L AD - - AD542L AD - - AD544L AD - - AD545L AD - - ICH8500A IL - - MOSFET OP-80E PM - - TLC27L2A TI A A TLC27M2A TI A A TLC272A TI A A TLC279C TI - - LMC660A NS - - .TLC1078C TI - A ALDl701 AL - - ALD1702 AL - - CA3140A RC A - CA3160A RC A - CA3410A RC - - CA3420A RC * - - CA5160A RC ' A - CA5420A RC * - - CA5422 RC - - ICL7612B IL+ * - - ICL7641B IL+ A A CHOPPERSTABILIZED MAX420E MA - - MAX422E MA - - LMC668A NS - - TSC9OOA TS - - TSC901 TS A A TSC911A TS ' A A TSC915 TS - - TSC918 TS - - LTCl050 LT - - LTCl052 LT - - ICL7650 IL+ - - ICL765OS IL - - ICL7652 IL+ - - ICL7652S IL - - TSC76HV52TS - - Current en Bias Offset @IkHz max max (nA) ( A ) n%z
- 156. Swing to supplies?g Slew Max Max - ratee fT CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputt - Type (Vlys) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments OP-15E 17 6 86 86 100 15 40 - - - - precision fast 355 OP-16E 25 8 86 86 100 20 40 - - - - precision fast 356 (OP-17=decomp) AD515L 1 0.4 70 74 94 10 20 - - - - very low bias, precision AD542L 3 1 80 80 110 10 20 - - - - precision AD544L 13 2 80 80 94 15 20 - - - - precision, low noise AD545L 1 0.7 76 74' 92 10 20 - - - - precision ICH8500A 0.5 0.5 60 80' 100' 10 0.5 - - - - ultra low bias MAX420E MAX422E LMC668A TSCSOOA TSC9Ol TSC911A TSC915 TSC918 LTC1050 LTC1052 ICL7650 ICL765OS ICL7652 ICL7652S TSC76HV52 electrometer; 1,<20pA @ 125°C CMOS jellybeans CMOS jellybeans CMOS jellybeans best V,, of 272-series quad CMOS jellybean low offset rail-to-rail; specs @ +5V supply rail-to-rail; specs @ +5V supply MOS inlout (3130=uncomp) high speed 324-type replacement low lb,good input protec. CMOS output similar to 3420 unusual 2-section design programmable; inlout to both rails gen purp, low voltage f15V V,; 0.1yvlmo; 430 has Cint f15V V,; 0.1yV/mo; 432 has C,,, low power k15V supply; int caps int caps, noisy k15V supply inexpensive int caps; 50nVldmonth improved 7652; 0.1yV/month 0.1yV1month improved 7650; 0.1yVlmonth 0.15yVImonth improved 7652; 0.15yVlmonth k15V supply 20!
- 157. TABLE 4.1 (cont'd) Total Voltage Supply Current # per voltage Supp Offset Drift en pkgb 8 w curr Bias Offset @IkHz .i.;; .s rnin rnax rnax typ max typ max max rnax Type Mfga 1 2 1 c IU I (V) (V) (mA) (mV) (mV) (pVIC) (1VI.C) (nA) (nA) n?JHz HIGH VOLTAGE LM343 NS LM344 NS OPA445B BB 1436 MO+ HA2645 HA 3580 BB 3581 BB 3582 BB 3583 BB 3584 BB MONOLITHIC POWER LM12 NS * - - - - 1 20 80 80 2 7 50 OPA541B BB - - 1 2 0 80 25 0.1 1 15 30 LM675 NS - - - - 10 16 60 50 1 10 25 SG1173 SG • - - 1 1 0 50 20 2 4 - 30 (a)manufacturersare as follows (a "+"suffix designates multiple sources): AD - Analog Devices HO - Honeywell AL - Advanced Linear Devices HS - Hybrid Systems AM - Advanced Micro Devices ID - Integrated Device Technology AN - Analogic IL - GEIlntersil AP - Apex IN - Intel BB - Burr-Brown IR - International Rectifier BT - Brooktree KE - M.S.Kennedy Corp CL - Comlinear LT - Linear Technology Corp CR - Crystal Semiconductor MA - Maxim CY - Cypress MN - Micro Networks DA - Datel MO - Motorola EL - Elantec MP - Micro Power Systems FA - Fairchild (National) NE - NEC FE - Ferranti NS - NationalSemiconductor GE - General Electric OE - Optical Electronics Inc GI - General Instrument PL - Plessey HA - Harris PM - Precision Monolithics HI - Hitachi RA - Raytheon RC - GEIRGA RO - Rockwell SG - Silicon General SI - Siliconix SN - Signetics SO - Sony ST - Supertex TI -Texas Instruments TM - Telmos TO - Toshiba TP - Teledyne Philbrick TQ - TriQuint TR - TRW TS - Teledyne Semiconductor VT - VTC XI - Xicor XR - Exar ZI - Zilog
- 158. Swing to supplies?g Slew Max Max - ratee fT CMRR PSRR Gain output diff'l In Out typ typ min min min curr inputf - Type (Vlps) (MHz) (dB) (dB) (dB) (mA) (V) + - + - Comments monolithic uncomp 343 low-bias, monolithic monolithic monolithic hybrid hybrid hybrid fast JFET, hybrid uncomp JFET, hybrid LM12 9 0.7 75 80 94 10A 80 - - - - full output protection OPA541B 10 1.6 95 100 90 10A 80 - - - - isolated case; no int. protec. LM675 8 5.5 70 70 70 3000 60 - - - - full output protection SG1173 0.8 1 76 80 92 3500 50 - - - - thermal shutdown (b) the symbol indicates the number of op-amps per package for the part number shown; an " A indicates the availability of other quantities of op-amps per package from the same manufacturer; some electrical characteristics (particularly offset voltage) may be degraded somewhat in multiple packages. (') pins are provided for external compensation. (d) a number gives the minimum closed-loopgain without instability. Op-amps with pins for external compensation can generally be operated at lower gain, if an appropriateext comp network is used. The letter U means that the op-amp is uncompensated- external capacitance is necessary for any small value of closed-loopgain. (e) at minimum stable closed-loop gain (usually unity gain), unless otherwise noted. (') the maximum value without damage to the chip; not to exceed the total supply voltage used, if that is less. (9) a dot in an IN column means that the input operating common-moderange includes that supply rail; a dot in an OUT column means that the op-amp can swing its output all the way to the corresponding supply rail. (h) resistor-diode network draws input current for input differential greater than +1V. (j) pV pp, 0.1-1OHz. (k) current-sensing inverting input ("current feedback"configuration);the bias currents at the two inputs may differ widely. The listed bias current is for the non-inverting input. (I) "raw" output (no current limit) available at pin 8, in addition to the conventional (protected)output at pin 6; the latter is limited to fl5mA. minlmax (worst case). ('1 typical.
- 159. TABLE 4.2. RECOMMENDED OP-AMPS Total supply Amps per Offset Offset Input voltage Supply en,typ Slew packageb voltage drift curr curr rate f~ max max max min max max lOHz lkHz typ tYP Type Mfga 1 2 4 (mV) (yV/"C) (nA) (V) (V) (mA) (nVldHz) ( n ~ l d ~ z )(V/p) (MHz) Comments LF411 NS A - AD711K AD ' A - LM358A NS+ - A TLC27M2A TI A A OP-27E PM+ ' A A OP-37E PM+ ' A - HA5147A HA - - OP-77E PM A A LT1028A LT - - LTlOl3A LT - A LT1055A LT - - LTlOl2C LT+ A - OPAlllB BB A - AD744K AD - - LTC1052 IL+ - - OP-90E PM A A CA3440A RC - - AD549L AD - - LMlO NS+ - - 10 36 3.4 9 36 3 3 32 1.2 3 18 0.6 8 44 5 8 44 5 8 44 4 6 44 2 8 44 9.5 4 44 1 10 40 4 4 40 0.6 10 36 3.5 9 36 4 4.8 16 2 1.6 36 0.02 4 15 (d) 10 36 0.7 1.1 40 0.4 (a)see footnotes to Table 4.1. (b) = this part number; A = available. (') G>10. (d) programmable 0.02pA-10yA. (m) rninlrnax. (') typical. 4 general purpose jellybean 4 improved LF411 1 single supply jellybean 0.7 CMOS jellybean 8 precision, low-noise 63h ditto, faster (decomp, min. gain = 5) 140' ditto, still faster (min.gain = 10) 0.6 precision 75 precision ultra-low-noise 0.8 precision single-supply 5 precision JFET 0.8 precision low-bias 2 precision low-bias JFET 13' ultra low dist, stable, fast settle 1.2 chopper 0.02 precision micropower 0.005e nanopower (programmable) 1 ultra low input current JFET 0.4 low supply voltage, rail-to-rail output
- 160. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.12 Effects of op-amp limitations on circuit behavior 209 op-amps with the very lowest input cur- Limitations imply trade-offs rents (MOSFET types) generally have poor voltage offsets, and vice versa. Good cir- The limitations of op-amp performance we cuit designers choose their components have talked about will have an influence with the right trade-offs to optimize perfor- on component values in nearly all circuits. mance, without going overboard on un- For instance, the feedback resistors must necessary "gold-plated" parts. be large enough so that they don't load the "Here Yesterday, Gone Today" In its untiring quest for better and fancier chips, the semiconductor industry can sometimes cause you great pain. It might go something like this: You've designed and prototyped a wonderful new gadget; debugging is complete, and you're ready to go into production. When you try to order the parts, you discover that a crucial IC has been discontinued by the manufacturer! An even worse nightmaregoes like this: Customershave beencomplainingabout late delivery on some instrument that you've been manufacturing for many years. When you go to the assembly area to find out what's wrong, you discover that a whole production run of boards is built, except for one IC that "hasn't come in yet." You then ask purchasing why they haven't expedited the order; turns out they have, just haven't receivedit. Then you learn from the distributor that the part was discontinued six months ago, and that none is available! Why does this happen, and what do you do about it? We've generally found four reasons that ICsare discontinued: I. Obsolescence: Much better parts come along, and it doesn't make much sense to keep making the old ones. This has beenparticularly true with digital memory chips (e.g., small static RAMSand EPROMs, which are superseded by denser and faster versions each year), though linear ICshave not entirelyescapedthe purge. In these cases there is often apin-compatibleimproved version that you can plug into the old socket. 2. Not selling enough: Perfectly good ICs sometimes disappear. If you are persistent enough, you maygetanexplanationfrom themanufacturer- "there wasn't enoughdemand," or somesuchstory. You might characterize this as a case of "discontinued for the convenience of the manufacturer." We've been particularly inconvenienced by Harris's discontinuation of their splendid HA4925 - a fine chip, the fastest quad comparator, now gone, with no replacement anything like it. Harris also discontinued the HA2705 - another great chip, the fastest low-power op-amp, now gone without a trace! Sometimes a good chip is discontinued when the wafer fabrication line changes over to a larger wafer size (e.g., from the original 3" diameter wafer to a 5" or 6" wafer). We've noticed that Harris has a particular fondness for discontinuing excellent and unique chips; lntersil and GE have done the same thing. 3. Lostschematics: You might not believeit, but sometimesthe semiconductorhouse loses track of the schematic diagram of some chip and can't make any more! This apparently happened with the Solid State Systems SSS-4404CMOS &stage divider chip. 4. Manufacturer out ofbusiness: This also happenedto the SSS-4404! If you're stuck with a board and no available IC, you've got several choices. You can redesign the board (and perhaps the circuit) to use somethingthat is available. This is probably best if you're goinginto production with a new design or if you arerunning a largeproduction of an existing board. A cheap and dirty solution is to make a little "daughterboard" that plugs into the empty IC socket and includes whatever it takes to emulate the nonexistent chip. Although this latter solution isn't terribly elegant, it gets the job done.
- 161. FEEDBACK AND OPERATIONAL AMPLIFIERS 210 Chapter 4 output significantly, but they must not be so large that input bias current produces sizable offsets. High impedances in the feedback network also increase suscepti- bility to capacitive pickup of interfering signals and increase the loading effects of stray capacitance. These trade-offs typi- cally dictate resistor values of 2k to lOOk with general-purpose op-amps. Similar sorts of trade-offs are involved in almost all electronic design, including the simplest circuits constructed with tran- sistors. For instance, the choice of quies- cent current in a transistor amplifier is lim- ited at the high end by device dissipation, increased input current, excessive supply current, and reduced current gain, whereas the lower limit of operating current is lim- ited by leakage current, reduced current gain, and reduced speed (from stray capac- itance in combination with the high resis- tance values). For these reasons you typ- ically wind up with collector currents in the range of a few tens of microamps' to a few tens of milliamps (higher for power circuits, sometimes a bit lower in "mi- cropower" applications), as mentioned in Chapter 2. In the next three chapters we will look more carefully at some of these problems in order to give you a good understanding of the trade-offs involved. EXERCISE 4.6 Draw a dc-coupledinverting amplifier with gain of 100 and Zi, = 10k. Include compensation for input bias current, and show offset voltage trimming network (10k pot between pins 1 and 5, wiper tied to V-). Now add circuitry so that Zi, > lo8ohms. 4.13 Low-power and programmable op-amps For battery-powered applications there is a popular group of op-amps known as "programmable op-amps," because all of the internal operating currents are set by an externally applied current at a bias programming pin. The internal quiescent currents are all related to this bias current by current mirrors, rather than by internal resistor-programmed current sources. As a consequence, such amplifiers can be programmed to operate over a wide range of supply currents, typically from a few POPULAR OP-AMPS Sometimes a new op-amp comes along at just the right time, filling a vacuum with its combination of performance, convenience, and price. Several companies begin to manufacture it (it becomes "second-sourced"),designers become familiar with it, and you have a hit. Here is a list of some popular favorites of recent times: 301 First easy-to-use op-amp; first use of "lateralpnp." Externalcompensation. National. 741 The industry standardfor many years. Internal compensation. Fairchild. 1458 Motorola's answer to the 741; two 741s in a mini-DIP, with no offset pins. 308 National's precision op-amp. Low power, superbeta, guaranteeddrift specifications. 324 Popular quad op-amp (358=dual, mini-DIP).Single-supply operation. National. 355 All-purpose bi-FET op-amp (356, 357 faster). Practically as precise as bipolar, but faster and lower input current. National. (Fairchild tried to get the FET ball rolling with their 740, which flopped because of poor performance. Would you believe 0.1V input offset?) TL081 Texas Instruments' answer to the 355 series. Low-cost comprehensiveseries of singles, duals, quads; low power, low noise, many packagestyles. LF411 National's improved bi-FET series. Low offset, low bias, fast, low distortion, high output current, low cost. Dual (LF412)and low-power variants (LF4411214).
- 162. A DETAILED LOOK AT OP-AMP BEHAVIOR 4.13 Low-powerand programmableop-amps 21 microamps to a few milliamps. The slew rate, gain-bandwidth product fT, and input bias current are all roughly proportional to the programmed operating current. When programmed to operate at a few microamps, programmable op-amps are extremely useful in battery-powered circuits. We will treat micropower design in detail in Chapter 14. The 4250 was the original programma- ble op-amp, and it is still a good unit for many applications. Developed by Union Carbide, this classic is now "second- sourced" by many manufacturers, and it even comes in duals and triples (the 8022 and 8023, respectively). As an example of the sort of performance you can expect for operation at low supply currents, let's look at the 4250 running at 1OpA. To get that operating current, we have to supply a bias current of 1.5pA with an external resistor. When it is operated at that current, fT is 75kHz, the slew rate is 0.05V/ps, and the input bias current IB is 3nA. At low op- erating currents the output drive capabil- ity is reduced considerably, and the open- loop output impedance rises to astound- ing levels, in this case about 3.5k. At low THE 741 AND ITS FRIENDS Bob Widlardesignedthe first really successfulmonolithic op-amp back in1965,the FairchildpA709. It achieved greatpopularity,but it had some problems, in particular thetendencyto go into alatch-up mode when the input was overdriven and its lack of output short-circuit protection. It also required externalfrequencycompensation(twocapacitors andoneresistor) andhadaclumsy offset trimming circuit (againrequiring three external components). Finally, its differential input voltage was limited to 5 volts. Widlar moved from Fairchild to National, where he went on to design the LM301, an improved op-amp with short-circuit protection, freedom from latch-up, and a 30-volt differential input range. Widlar didn't provide internal frequency compensation, however, because he liked the flexibility of user compensation. The 301 could be compensatedwith a single capacitor, but because there was only one unused pin remaining, it still required three external components for offset trimming. Meanwhile, over at Fairchild the answer to the 301 (the now-famous 741) was taking shape. It had the advantagesof the 301, but Fairchild engineers opted for internal frequency compensation, freeing two pins to allow simplifiedoffset trimming with a single external trimmer. Since most circuit applications don't require offset trimming (Widlar was right), the 741 in normal use requires no components other than the feedback network itself. The rest is history - the 741 caught on like wildfire and became firmly entrenched as the industry standard. There are now numerous741-typeamps, essentially similar in design and performance, but with various features such as FET inputs, dual or quad units, versions with improved specifications, decompensatedand uncompensatedversions, etc. We list some of them here for reference and as ademonstration of man's instinct to clutch onto the coattails of the famous(seeTable 4.1 for a more complete listing). Single units 741s MC741N OP-02 4132 LF13741 748 NE530 TL081 LF411 Dual units fast ( l0VIps) 747 low noise OP-04 precision 1458 low power (35pA) 4558 FET low input current TL082 uncompensated fast (25VIps) LF412 FET, fast (similar to LF35 1) FET, fast Quad units dual 74 1 MC4741 quad 741(alias 348) precision OP-11 precision mini-DIP package 4136 fast (3MHz) fast (15VIps) HA4605 fast (4VIps) FET, fast (similar TL084 FET, fast (similar to LF353) to LF347) FET, fast
- 163. FEEDBACK AND OPERATIONAL AMPLIFIERS 212 Chapter 4 operating currents the input noise voltage rises, while the input noise current drops (see Chapter 7). The 4250 specifications claim that it can run from as little as 1 volt total supply voltage, but the claimed minimum supply voltages of op-amps may not be terribly relevant in an actual circuit, particularly where any significant output swing or drive capability is needed. The 776 (or 3476) is an upgraded 4250, with better output-stage performance at lower currents. The 346 is a nice quad programmable op-amp, with three sections programmed by one of the programming inputs, and the fourth programmed by the other. Some other programmable op-amps constructed with ordinary bipolar transis- tors are the OP-22, OP-32, HA2725, and CA3078. Programmable CMOS op-amps include the ICL7612, TLC251, MC14573, and CA3440. These feature operatipn at very low supply voltage (down to 1V for the TLC251)and, for the astounding 3440, operation at quiescent currents down to 20 nanoamps. The 7612 and 251 use a variation of the usual programming scheme; their quiescent current is pin- selectable (lOpA, 100pA, or ImA), according to whether the programming pin is connected to V+ or V- or is left open. In addition to these op-amps, there are several nonprogrammable op-amps that have been designed for low supply currents and low-voltage operation and should be considered for low-power applications. Notable among these is the outstanding bipolar LMIO, an op-amp that is fully specified at 1 volt total supply voltage (f0.5V, for example). This is extraordi- nary, considering that VBE increases with decreasing temperature and is close to 1 volt at -55OC, the lower limit of the LMlO's operating range. Some other excellent "micropower" op-amps (and their operating currents) are the precision OP-20 (40pA), OP-90 (12pA), and LT1006 (90pA), the inexpensive quad LP324 (20,uA per amplifier), the JFET LF4411214 (150pA per amplifier), and the MOSFET TLC27L4 (10pA per ampli- fier). output - 1.OV/decade Figure 4.35. Logarithmic converter. QI and Qz compose a monolithic matched pair.
- 164. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.14 Logarithmic amplifier 213 TABLE 4.3. HIGH-VOLTAGE OP-AMPS Total supply Diff'l E Slew Output Pdiss = inputb 8 f, rate current (50'C) min max max L ~ . E typ typ max max Type Mfga (V) (V) (V) k w c (MHz) (Vlps) (mA) (W) CaseC Comments TO-220 TO-99 TO-99 TO-31 TO-3 TO-31 TO-31 TO-99 TO-3 P-DIP TO-3 TO-99 TO-99 TO-3 TO-31 P-DIP TO-3 TO-31 TO-3 TO-3 TO-31 TO-31 TO-31 monolithic pwr op-amp superbeta superbeta monolithic high-power VMOS output monolithic high-pwr original, still good VMOS output VMOS output fast unity-gain cornp same as Philbrick 1332 monolithic; miniDlP also current limit VMOS output; curr lim low V,,, low en low IQ,Vo,, en,VMOS low V,,, low en, VMOS (a) see notes to Table 4.1. (b) not to exceed total supply voltage. (') "I" = isolated. (d) when cornp for G>10. (e)when cornp for G>100. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS The performance of the next few circuits is affected significantly by the limitations of op-amps; we will go into a bit more detail in their description. 4.14 Logarithmic amplifier The circuit shown in Figure 4.35 exploits the logarithmic dependence of VB,y on Ic to produce an output proportional to the logarithm of a positive input voltage. R1 converts K, to a current, owing to the virtual ground at the inverting input. That current flows through Q1, putting its emitter one VBEdrop below ground, according to the Ebers-Moll equation. Q2, which operates at a fixed current, provides a diode drop of correction voltage, which is essential for temperature compensation. The current source (whichcan be a resistor, since point B is always within a few tenths of a volt of ground) sets the input current at which the output voltage is zero. The second op-amp is a noninverting amplifier with a voltage gain of 16, in order to give an output voltage of -1.0 volt per decade of input current (recall that VBEincreases 60mV per decade of collector current). Some further details: Ql's base could have been connected to its collector, but the base current would then have caused an error (remember that Ic is an accurate exponential function of VBE). In this
- 165. FEEDBACK AND OPERATIONAL AMPLIFIERS 214 Chapter 4 -- TABLE 4.4. POWER OP-AMPS 0 5.-- f Vsupply 0 c. SR fT pwr VOs(max) 5+.E I,,, min max Pdiss typ typ BW Type MfgaE kC pkgb (A) (V) (V) (W) (Vlps) (MHz) (kHz) (mV) (pVIoC) (pVMI) - PA03 AP - * * PD 30 15 75 500 10 5 70 3 30 20' PA04A AP - - PD 20 15 100 200 50 2 90 5 30 10' OPA512 BB - - - 31 15 10 50 125 4 4 20 3 40 20' LM12 NS * - - 3 10 10 40 90 9 0.7 60 7 50 50 OPA501 BB - - - 31 10 10 40 80 1.4"' 1 16 5 40 35' OPA512B BB - - - 31 10 10 50 125 4 4 20 6 65 20' OPA541B BB - 31 10 10 40 90 10 2 55 2 30 60 1468 TP - - - 3 10 10 50 125 4 4 20 6 65 20' PAISA AP - - 31 5 15 40 70 900 100 3500 0.5 10 20' OPA511 BB - - - 31 5 10 30 67 1.8 1 23 10 65 20' PAO9A AP - 31 4 10 40 78 400 75 2500 0.5 10 SG1173 SG * - - 220 3.5 5 25 20 0.8 1 4 30 LM675 NS - - 220 3 8 30 40 8 5.5 10 25' 25' LHOlOl NS - - 3 2 5 20 62 10 5 300 3 10' 150' 3572 BB - * - 31 2 15 40 60 3 0.5 16 2 40 20' 3573 BB - - - 31 2 10 34 45 1.5 1 23 10 65 LH0021 NS - - - 3 1 5 15 23 3 1 20 3 25 15 MSK792 KE --• 3 1 5 22 5 2 1 11 0.1 2 1463 TP - 3 1 15 40 40 165 17 5 20' 1461 TP - * * PD 0.75 15 40 12OOU 1000" 5 50 LH0061 NS --• 3 0.5 - 15 20 70 - 1000 4 5' 5' WAOlA AP - - 31 0.4 12 16 10 4000 1000 150000 5 25 10' CLC203 CL - - - PD 0.2 9 20 6000 5000 60000 1.5 15 1460 TP --• 3 0.15 15 40 2.5 300U1000U 1500 5 50 35548 BB - ' 31 0.15 5 18 5 1200 100 19000 1 15 HA2542 HA - D 0.1 5 15 1.6 375 120 4700"' 10"' 20 LH4101 NS - D 0.1 - 15 4 250 28 - 15 25' LH4104 NS - ' C 0.1 - 15 2.5 40 18 - 5 20' 1480 TP - * * 3 0.08 15 150 100 20 120 3 100 1481 TP - * * 3 0.08 15 75 15 25 4.5 50 3 25 CA3450 RC - D 0.08 - 7 1.5 420 190 10000 15 3583 BB - * . 31 0.08 40 140 10 30 5 60 3 23 OP-50E PM - D 0.07 5 18 0.5 3 25 20 0.03 0.3 - 3580 BB - * * 31 0.06 15 35 4.5 15 5 100 10 30 AMP-01E PM - D 0.05 5 15 0.5 4.5 1 20 0.05 0.3 - 3581 BB - 31 0.03 32 75 4.5 20 5 60 3 25 358214 BB - 31 0.02 70 150 4.5 201150 7 301135 3 25 (a) see Table 4.1 notes. (b) 3 - TO-3; 220 - TO-220; PD - power DIP; D - DIP; I - isolated; C -metal can. (C) current limit: T- thermallimit; E -external adjust. min or max. (') typical. uncompensated.
- 166. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.14 Logarithmic amplifier 215 - t, (~YP) m "sat 2 5 ' ~ T,,, 11imc eType (nA) (nA) (V) @ (A) (ps) to (%) (A) Comments PA03 0.05 PA04A 0.02 OPA512 20 LM12 300 OPA501 20 OPA512B 30 OPA541B 0.05 1468 30 PA19A 0.05 OPA511 40 PAO9A 0.02 SG1173 500 LM675 2lA LHOl01 0.3 3572 0.1 3573 40 LH0021 100 MSK792 100 1463 0.2 1461 0.1 LH0061 100 WAOlA lOpA CLC203 20pA 1460 10pA 3554B 0.05 HA2542 35pA LH4101 0.5 LH4104 0.6 1480 0.2 1481 0.1 CA3450 350 3583 0.02 OP-50E 5 3580 0.05 AMP-O1E 3 3581 0.02 358214 0.02 a mighty brute high voltage brute PA-12 similar PA-51 similar monolithic JFET VMOS output, wideband, prec PA-01 similar fast PA-02 similar PA-07 similar; 3571 to 1A PA-73 similar ext comp VMOS output VMOS output; ext comp ext comp fast settle, wideband, prec VMOS output; ext comp fast decomp (G>2) LH4105 has VO,<0.5mV high voltage video amp high voltage low noise, precision low noise, prec inst amp high voltage
- 167. FEEDBACK AND OPERATIONAL AMPLIFIERS 216 Chapter 4 circuit the base is at the same voltage as the collector because of the virtual ground, but there is no base-current error. Q1 and Q2 should be a matched pair, ther- mally coupled (a matched monolithic pair like the LM394 or MAT-01 is ideal). This circuit will give accurate logarithmic out- put over seven decades of current or more (1nA to 1OmA, approximately), providing that low-leakagetransistors and a low-bias- current input op-amp are used. An op-amp like the 741 with 80nA of bias current is unsuitable, and a FET-input op-amp like the 411 is usually required to achieve the full seven decades of linearity. Further- more, in order to give good performance at low input currents, the input op-amp must be accurately trimmed for zero off- set voltage, since V,, may be as small as a few tens of microvolts at the lower limit of current. If possible, it is better to use a current input to this circuit, omitting R1 altogether. The capacitor C1 is necessary to stabi- lize the feedback loop, since Q1 contributes voltage gain inside the loop. Diode Dl is necessary to prevent base- emitter breakdown (and destruction) of Q1 in the event the input voltage goes nega- tive, since Q1 provides no feedback path for positive op-amp output voltage. Both these minor problems are avoided if Q1 is wired as a diode, i.e., with its base tied to its collector. Temperature compensation of gain Q2compensates changes in Ql's VBEdrop as the ambient temperature changes, but the changes in the slope of the curve of VBEversus ICare not compen- sated. In Section 2.10 we saw that the "60mVldecade" is proportional to abso- lute temperature. The output voltage of this circuit will look as shown in Figure 4.36. Compensation is perfect at an input current equal to lo, Q2's collector current. A change in temperature of 30°C causes a Figure 4.36 10°/o change in slope, with corresponding error in output voltage. The usual solu- tion to this problem is to replace R2 with a series combination of an ordinary resis- tor and a resistor of positive temperature coefficient. Knowing the temperature co- efficient of the resistor (e.g., the TG 118 type manufactured by Texas Instruments has a coefficient of +0.67%I0C) allows you to calculate the value of the ordinary resis- tor to put in series in order to effect perfect compensation. For instance, with the 2.7k TG 118 type "sensistor" just mentioned, a 2.4k series resistor should be used. There are several logarithmic converter modules available as complete integrated circuits. These offer very good perfor- mance, including internal temperature compensation. Some manufacturers are Analog Devices, Burr-Brown, Philbrick, Intersil, and National Semiconductor. EXERCISE 4.7 Finishup the log converter circuitby (a)drawing the current source explicitly and (b) using a TG 118 resistor (+0.67%I0C tempco) for thermal slope compensation. Choose values so that VOut= +1 volt per decade, and provide an output offset control so that Voutcan be set to zeroforanydesiredinputcurrent(dothiswithan invertingamplifier offsetcircuit, notby adjusting 10).
- 168. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.15 Active peak detector 217 4.15 Active peak detector There are numerous applications in which it is necessary to determine the peak value of some input waveform. The simplest method is a diode and capacitor (Fig. 4.37). The highest point of the input waveform charges up C, which holds that value while the diode is back-biased. Figure 4.39 Figure 4.37 This method has some serious problems. The input impedance is variable and is very low during peaks of the input wave- form. Also, the diode drop makes the cir- cuit insensitive to peaks less than about 0.6 volt and inaccurate (by one diode drop) for larger peak voltages. Furthermore, since the diode drop depends on temperature and current, the circuit's inaccuracies de- pend on the ambient temperature and on the rate of change of output; recall that I = C(dV/dt). An input emitter follower would improve the first problem only. Figure 4.38 shows a better circuit, using feedback. By taking feedback from the voltage at the capacitor, the diode drop doesn't cause any problems. The sort of output waveform you might get is shown in Figure 4.39. Figure 4.38. Op-amp peak detector. Op-amp limitations affect this circuit in three ways: (a) Finite op-amp slew rate causes a problem, even with relativelyslow input waveforms. To understand this, note that the op-amp's output goes into negative saturation when the input is less positive than the output (try sketching the op-amp voltage on the graph; don't forget about diode forward drop). So the op-amp's output has to race back up to the output voltage (plus a diode drop) when the input waveform next exceedsthe output. At slew rate S, this takes roughly (Vo - V-)IS, where V- is the negative supply voltage and Vois the output voltage. (b) Input bias current causes a slow discharge (or charge, depending on the sign of the bias current) of the capacitor. This is sometimes called "droop," and it is best avoided by using op-amps with very low bias current. For the same reason, the diode must be a low- leakage type (e.g., the FJT1100, with less than 1pAreverse current at 20V, or a "FET diode"such as the PAD-1 from Siliconix or the ID101from Intersil), and the following stage must also present high impedance (ideally it should also be a FET or FET- input op-amp). (c) The maximum op-amp output current limits the rate of change of voltageacross the capacitor, i.e., the rate at which the output can follow a rising input. Thus, the choice of capacitor value is a compromise between low droop and high output slew rate. For instance, a 1pF capacitor used in this circuit with the common 741 (which
- 169. FEEDBACK AND OPERATIONAL AMPLIFIERS 218 Chapter 4 would be a poor choice because of its high bias current) would droop at dV/dt = IB/C = 0.08VIs and would follow input changes only up to dV/dt = IoutPut/C= 0.02VIps. This maximum follow rate is much less than the op-amp's slew rate of 0.5V/ps7 being limited by the maximum output current of 20mA driving 1pE By decreasing C you could achieve greater output slewing rate at the expense of greater droop. A more realistic choice of components would be the popular LF355 FET-input op-amp as driver and output follower (30pA typical bias current, 20mA output current) and a value of C = 0.01pE With this combination you would get a droop of only 0.006VIs and an overall circuit slew rate of 2VIps. For better performance, use a FET op-amp like the OPA111 or AD549, with input currents of 1pA or less. Capacitor leakage may then limit performance even if unusually good capacitors are used, e.g., polystyrene or polycarbonate (see Section 7.05). A circuit cure for diode leakage voltage on the capacitor follows a rising input waveform: IC1 charges the capaci- tor through both diodes and is unaffected by IC2's output. When the input drops below the peak value, IC1 goes into neg- ative saturation, but IC2 holds point X at the capacitor voltage, eliminating leak- age altogether in D2. Dl's small leakage current flows through R1,with negligible drop across the resistor. Of course, both op-amps must have low bias current. The OPAll lB is a good choice here, with its combination of precision (V,, = 250pV, max) and low input current (lpA, max). This circuit is analogous to the so-called guard circuits used for high-impedance or small-signal measurements. Note that the input op-amps in both peak-detector circuits spend most of their time in negative saturation, only popping up when the input level exceeds the peak voltage previously stored on the capacitor. However, as we saw in the active rectifier circuit (Section 4.10)' the journey from negative saturation can take a while (e.g., Ips-2ps for the LF411). This may restrict your choice to high-slew-rate op-amps. Quite often a clever circuit configuration can provide a solution to problems caused by nonideal behavior of circuit compo- R1 nents. Such solutions are aesthetically 47k pleasing as well as economical. At this point we yield to the temptation to take a closer look at such a high-performance Vln - design, rather than delaying until Chapter 7, where we treat such subjects under the heading of precision design. Suppose we want the best possible per- formance in a peak detector, i-e., highest ratio of output slew rate to droop. If the - lowest-input-current op-amps are used in - a peak-detector circuit (some are available Figure 4.40 with bias currents as low as O.OlpA), the droop will be dominated by diode leakage; i.e., the best available diodes have higher a peak detector leakage currents (see Table 1.1) than the op-amps' bias currents. Figure 4.40 shows In practice it is usually desirable to reset a clever circuit solution. As before, the the output of a peak detector in some way.
- 170. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.15 Active peak detector 219 One possibility is to put a resistor across to the base then zeros the output. A FET the output so that the circuit's output switch is often used instead. For example, decays with a time constant RC. In this in Figure 4.38 you could connect an n- way it holds only the most recent peak channel MOSFET across C; bringing the values. A better method is to put a gate momentarily positive then zeros the transistor switch across C; a short pulse capacitor voltage. FET inp~ lr.signal 15V Input T output acquisition time I- charge droop injection ("hold step") capacitor voltage hold sample hold sample- time- output s , yinput I 0.OOlpF (external) Figure 4.41. Sample-and-hold. A. standard configuration, -- with exaggerated waveform. B. LF398 single-chip S/H.
- 171. FEEDBACK AND OPERATIONAL AMPLIFIERS 220 Chapter 4 4.16 Sample-and-hold and the follower cause C's voltage to Closely related to the peak detector is the "sample-and-hold" (S/H) circuit (some- times called "follow-and-hold"). These are especiallypopular in digital systems, where you want to convert one or more analog voltages to numbers so that a computer can digest them: The favorite method is to grab and hold the voltage(s), then do the digital conversion at your leisure. The basic ingredients of a S/H circuit are an op-amp and a FET switch; Figure 4.41A shows the idea. IC1 is a follower to provide a low-impedance replica of the input. Q1 passes the signal through during "sample" and disconnects it during "hold." Whatever signal was present when Q1 was turned OFF is held on capacitor C. IC2 is a high-input-impedance follower (FET inputs), so that capacitor current during "hold" is minimized. The value of C is a compromise: Leakage currents in Q1 "droop" during the hold interval, accord- ing to dV/dt = II,,~,,/C. Thus C should be large to minimize droop. But Ql's ON resistance forms a low-pass filter in com- bination with C, so C should be small if high-speed signals are to be followed ac- curately. IC1 must be able to supply C's charging current I = CdV/dt and must have sufficient slew rate to follow the in- put signal. In practice, the slew rate of the whole circuit will usually be limited by IC17soutput current and Ql's ON resis- tance. EXERCISE 4.8 Suppose IC1 can supply lOmA of output cur- rent, and C = O.01pF. What is the maximum input slewrate the circuit can accuratelyfollow? If Q1 has 50 ohms ON resistance, what will be the output error for an input signal slewing at O.lVIps? If the combined leakage of Q1 and DIELECTRIC ABSORPTION Capacitors are not perfect. The most commonly appreciated shortcomings are leakage (parallel resistance), series resistance and inductance,and nonzero temperature coefficientof capacitance. A more subtleproblem is dielectric absorption,an effect that manifests itself clearlyas follows: Take a large-value tantalum capacitor that is charged up to 10 volts or so, and rapidly discharge it by momentarily putting a 100 ohm resistor across it. Remove the resistor, and watch the capacitor's voltage on a high-impedance voltmeter. You will be amazed to see the capacitor charge back up, reaching perhaps a volt or so after a few seconds! The origins of dielectric absorption (or dielectric soakage, dielectric memory) are not entirely understood, but the phenomenon is believed to be related to remnant polarization trapped on dielectric interfaces; mica, for example, with its layered structure, is particularly poor in this regard. Fromacircuit point of view, this extra polarization behaves like a set of additionalseries RCsacross the capacitor (Fig. 4.42A), with time constants generallyin the range of x100ps to severalseconds. Dielectrics vary widely in their susceptibility to dielectric absorption; Figure 4.42B shows data for severalhigh-qualitydielectrics, plotted as voltage memory versus time after a 10 volt step of 1Oops duration. Dielectricabsorption can cause significanterrors in integrators and other analogcircuits that rely on theidealcharacteristics of capacitors. In the case of a samplelholdfollowed by precision analog- to-digital conversion,theeffectcanbe devastating. Insuchsituationsthe best approachistochoose your capacitors carefully (Teflon dielectric seems to be best), retaining a healthy skepticism until proven wrong. In extreme cases you may have to resort to tricks such as compensation networks that use carefully trimmed RCs to electrically cancel the capacitor's internal dielectric absorption. This approach is used in some high-quality samplelhold modules made by Hybrid Systems.
- 172. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.18 Absolute-valuecircuit 221 ICn is InA, what is the droop rate during the +15 "holdwstate? I For both the samplelhold circuit and the peak detector, an op-amp drives a v," capacitive load. When designing such circuits, make sure you choose an op- amp that is stable at unity gain when loaded by the capacitor C. Some op-amps, (e.g., the LF35516)are specificallydesigned to drive large (0.OlpF) capacitive loads -- directly. Some other tricks you can use are discussed in Section 7.07 (see Fig. 7.17). Figure 4.43 u "glitches" O.' r / Figure 4.44 available, if you need better performance polystyrene than the LF398 offers; for example, the E 0.01 AD585 from Analog Devices includes an rn internal capacitor and guarantees a max- imum acquisition time of 3ps for 0.01% accuracy following a 10 volt step. lolls 1 0 0 ~ ~ 1ms lOms time after pulse 4.17 Active clamp B Figure 4.43 showsa circuit that is an active Figure 4.42. Dielectricabsorptionin capaci- version of the clamp function we discussed tors. A. model B. measured properties for sev- in Chapter 1. For the values shown, era1dielectrics. (AfterHybrid Systems HS9716 V,, < +10 volts puts the op-amp output data sheet.) at positive saturation, and VOut= I$,. When q, exceeds +10 volts the diode You don't have to design SIH circuits closes the feedback loop, clamping the from scratch, because there are nice mono- output at 10 volts. In this circuit, op-amp lithic ICs that contain all the parts YOU slew-ratelimitations allow small glitchesas need except for the capacitor. National's the input reaches the clamp voltage from LF398 is a popular part, containing the below (Fig. 4.44). FET switch and two op-amps in an inex- pensive (S2) '-pin package' Figure 4'41B 4-18 *bsolute-va,ue circuit shows how to use it. Note how feedback closes the feedback loop around both op- The circuit shown in Figure 4.45 gives a amps. There are plenty of fancy SIH chips positive output equal to the magnitude of
- 173. FEEDBACK AND OPERATIONAL AMPLIFIERS 222 Chapter 4 the input signal; it is a full-wave rectifier. As usual, the use of op-amps and feedback eliminates the diode drops of a passive full-wave rectifier. input. Figure 4.45. Active full-wave rectifier. output Figure 4.46 EXERCISE 4.9 Figure out how the circuit in Figure 4.45 works. Hint: Applyfirst apositiveinput voltage, andsee what happens; then do negative. Figure 4.46 shows another absolute- value circuit. It is readily understandable as a simple combination of an optional inverter (IC1) and an active clamp (ICz). For positive input levels the clamp is out of the circuit, with its output at negative saturation, making IC1 a unity- gain inverter. Thus the output is equal to the absolute value of the input voltage. By running IC2 from a single positive supply, you avoid problems of slew-rate limitations in the clamp, since its output moves over only one diode drop. Note that no great accuracy is required of Rg. Figure 4.47. Integrator. 4.19 Integrators Op-amps allow you to make nearly perfect integrators, without the restriction that Vout << K,. Figure 4.47 shows how it's done. Input current V,,/R flows through C. Because the inverting input is a virtual ground, the output voltage is given by K n / R = -C(dVout/dt) 1 Vout= J K. dt +constant The input can, of course, be a current, in which case R will be omitted. One problem with this circuit as drawn is that the output tends to wander off, even with the input grounded, due to op-amp offsets and bias current (there's no feedback at dc, which violates rule 3 in Section 4.08). This problem can be minimized by using a FET op-amp for low input current and offset, trimming the op-amp input offset voltage, and using large R and C values. In addition, in many applications the in- tegrator is zeroed periodically by closing a
- 174. A DETAILED LOOK AT SELECTED OP-AMP CIRCUITS 4.19 Integrators 22: +15n reset reset 1 - l o r-'" n-channel MOSFET p!{ positive .output only - 4.48. Op-amp integrators with reset switches. switch placed across the capacitor (usually a FET), so only the drift over short time scales matters. As an example, an inex- pensive FET op-amp like the LF411 (25pA typical bias current) trimmed to a voltage offset of 0.2mV and used in an integrator with R =lOMR and C = lOpF will pro- duce an output drift of less than 0.003 volt in 1000seconds. If the residual drift of the integrator is still too large for a given application, it may be necessary to put a large resistor R2 across C to provide dc feedback for sta- ble biasing. The effect is to roll off the integrator action at very low frequencies, f <11R2C. Figure 4.48 shows integrators with FET zeroing switch and with resis- tor bias stabilization. The feedback resis- tor may become rather large in this sort of application. Figure 4.49 shows a trick for producing the effect of a large feedback resistor using smaller values. In this case the feedback network behaves like a sin- gle lOMR resistor in the standard invert- ing amplifier circuit giving a voltage gain (Section 4.09). For example, the circuit of Figure 4.49, driven from a high-impedance source (e.g., the current from a photodi- ode, with the input resistor omitted), has an output offset of 100 times V,,, whereas the same circuit with a 10Ma feedback re- sistor has an output equal to v,, (assuming the offset due to input current is negligi- ble). Figure 4.49 of -100. This technique has the advan- tage of using resistors of convenient values A circuit cure for FET leakage without the problems of stray capacitance, In the integrator with a FET reset switch etc., that occur with very large resistor val- (Fig. 4.48), drain-source leakage sources a ues. Note that this "T-network" trick may small current into the summing junction increase the effective input offset voltage, even when the FET is OFF With an ultra- if used in a transresistance configuration low-input-current op-amp and low-leakage
- 175. FEEDBACK AND OPERATIONAL AMPLIFIERS 224 Chapter 4 capacitor, this can be the dominant error small leakage passes to ground through R2 in the integrator. For example, the ex- with negligible drop. There is no leakage cellent AD549 JFET-input "electrometer" current at the summing junction because op-amp has a maximum input current of Ql's source, drain, and substrate are all 0.06pA, and a high-quality 0.01pF metal- at the same voltage. Compare this circuit lized Teflon or polystyrene capacitor spec- with the zero-leakage peak-detector circuit ifies leakage resistance as 10' megohms, of Figure 4.40. minimum. Thus the integrator, exclusive of reset circuit, keeps stray currents at the summing junction below IpA (for a worst- case 10V full-scale output), corresponding to an output dV/dt of less than O.OlmV/s. Compare this with the leakage contribu- tion of a MOSFET such as the popular 2N4351(enhancement mode), which spec- +?-fJ- ifies a maximum leakage current of lOnA at VDs= 10V and VGS= OV! In other Figure 4.51 words, the FET contributes 10,000 times as much leakage as everything else com- bined. 4.20 Differentiators CRC tvpe J93 (1, = 60fA, max) -- Figure 4.50 Differentiators are similar to integrators, but with R and C reversed (Fig. 4.51). Since the inverting input is at ground, the rate of change of input voltage produces a current I = C(dV,/dt) and hence an output voltage Differentiators are bias-stable, but they generally have problems with noise and instabilities at high frequencies because of the op-amp's high gain and internal phase shifts. For this reason it is necessary to roll off the differentiator action at some maximum frequency. The usual method is shown in Figure 4.52. The choice of the rolloff components R1 and C2 depends on the noise level of the signal and the bandwidth of the op-amp. At Figure 4.50 shows a clever circuit solu- high frequencies this circuit becomes an tion. Although both n-channel MOSFETs integrator, due to R1 and C2. are switched together, Q1 is switched with gate voltages ofzero and +15 volts so that gate leakage (as well as drain-source leak- ,-JOP-AMP OPERATION WITH age) is entirely eliminated during the OFF A SINGLE POWER SUPPLY state (zero gate voltage). In the ON state the capacitor is discharged as before, but Op-amps don't require f15 volt regulated with twice RON. In the OFF state, Q2's supplies. They can be operated from split
- 176. OP-AMP OPERATION WITH A SINGLE POWER SUPPLY 4.22 Single-supplyop-amps 225 Figure 4.52 supplies of lower voltages, or from un- symmetrical supply voltages (e.g, +12 and -3), as long as the total supply voltage (V+ - V-) is within specifications (see Ta- ble 4.1). Unregulated supply voltages are often adequate becauseof the high "power- supply rejection ratio" you get from nega- tive feedback (for the 411 it's 90dB typ). But there are many occasions when it would be nice to operate an op-amp from a single supply, say +12 volts. This can be done with ordinary op-amps by generating a "reference" voltage above ground, if you are careful about minimum supply volt- ages, output swing limitations, and max- imum common-mode input range. With some of the more recent op-amps whose input and output ranges include the neg- ative supply (i.e., ground, when run from a single positive supply), single-supply op- eration is attractive because of its sim- plicity. Keep in mind, though, that oper- ation with symmetrical split supplies re- mains the usual technique for nearly all applications. 4.21 Biasing single-supply ac amplifiers For a general-purposeop-amp like the 411, the inputs and output can typically swing to within about 1.5 volts of either supply. With V- connected to ground, you can't have either of the inputs or the output at ground. Instead, by generating a reference voltage (e.g., 0.5V+) you can bias the op- amp for successful operation (Fig. 4.53). This circuit is an audio amplifier with 40dB gain. Vref= 0.5V+ gives an output swing of about 17 volts pp before onset of clipping. Capacitive coupling is used at the input and output to block the dc level, which equals Vref. input Figure 4.53 4.22 Single-supply op-amps There is a class of op-amps that permit simplified operation with a single positive supply, because they permit input voltages all the way down to the negative rail (normally tied to ground). They can be further divided into two types, according to the capability of the output stage: One type can swing all the way down to V-, and the other type can swing all the way to both rails: 1. The LM324(quad) 1LM358 (dual), LT1013, and TLC270 types. These have input common-mode ranges all the way down to 0.3 volt below V-, and the output can swing down to V-. Both inputs and output can go to within 1.5 volts of V+. If
- 177. FEEDBACK AND OPERATIONAL AMPLIFIERS 226 Chapter 4 instead you need an input range up to V+, use something like an LM3011307, OP- 41, or a 355; an example is illustrated in Section 6.24 in the discussion of constant- current supplies. In order to understand some of the subtleties of this sort of op- amp, it is helpful to look at the schematic (Fig. 4.54). It is a reasonably straight- forward differential amplifier, with current mirror active load on the input stage and push-pull complementary output stage with current limiting. The special things to remember are these (calling V- ground): Inputs: The pnp input structure allows swings of 0.3 volt below ground; if that is exceeded by either input, weird things happen at the output (it may go negative, for instance). Output: QISpulls the output down and can sink plenty of current, but it goes only to within a diode drop of ground. Outputs below that are provided by the 50pA current sink, which means you can't drive a load that sources more than 50pA and get closer than a diode drop above inputs ground. Even for "nice" loads (an open circuit, say), the current source won't bring the output lower than a saturation voltage (0.1V) above ground. If you want the output to go clear down to ground, the load should sink a small current to ground; it could be a resistor to ground, for instance. Recent additions to the family of pnp- input single-supply op-amps include the precision LT1006 and LT1014 (single and quad, respectively) and the micropower OP-20 and OP-90 (both single), and LP324 (quad). We will illustrate the use of these op- amps with some circuits, after mentioning the other kind of op-amp that lends itself well to single-supply operation. 2. The LMlO (bipolar) or CA513015160 (MOSFET) complementary-output-stage op-amps. When saturated, they look like a small resistance from the output to the supply (V+ or V-). Thus the output can swing all the way to either supply. In addition, the inputs can go 0.5 volt be- low V-. Unlike the LM10, the CA5130 output Figure 4.54. Schematic of the popular 324 and 358 op-amps. (NationalSemiconductorCorp.)
- 178. OP-AMP OPERATION WITH A SINGLE POWER SUPPLY 4.22 Single-supplyop-amps 227 0 to 5V for 0 to 500nA Rl 1OM -L -- Figure 4.55.Single-supply photometer. battery + 5 to + 1 5 6 and 5160 are limited to 16 volts (max) to- tal supply voltage and f8 volts differen- tial input voltage. Although most CMOS op-amps permit rail-to-rail output swings, watch out for some varieties that can only swing all the way to one rail; also note that the input common-mode range of most CMOS op-amps, like ordinary bipolar op- amps, includes at most one power-supply rail. For example, the popular TLC27xx A series from TI has input and output ca- pability to the negative rail only, whereas the LMC660 from National, along with the Intersil ICL76xx series and RCA's CMOS op-amps, has output swing to both rails (but input common-mode range only to the negative rail). Unique among op-amps are the CMOS ICL7612 and ALD170112, which claim both input and output opera- tion to both rails. - -photodtode + -A - -- -- TLC251C Figure 4.56. Output stages c D used in single-supplyop-amps.
- 179. FEEDBACK AND OPERATIONAL AMPLIFIERS 228 Chapter 4 Figure 4.57. Connecting a load to a single- supply op-amp. All single-supply types (A-D) can swing all the way to ground while sourcing current. Some types (A and B) can swing nearly toground whilesinking moderateor substantial currents; type C can sink up to 50pA, and type D requiresa load resistor returned to ground to operate near ground. is convenient. We discussed a similar cir- cuit earlier under the heading of current- to-voltage converters. Since a photocell circuit might well be used in a portable light-measuring instrument, and since the output is known to be positive only, this is a good candidate for a battery-operated single-supplycircuit. R1 sets the full- scale output at 5 volts for an input photocur- rent of 0.5pA. No offset voltage trim is needed in this circuit, since the worst-case untrimmed offset of lOmV corresponds to a negligible 0.2% of full-scale meter indi- cation. The TLC251 is an inexpensive micropower (1OpA supply current) CMOS op-amp with input and output swings to the negative rail. Its low input current (IpA, typ, at room temperature) makes it good for low-current applications like this. Note that if you choose a bipolar op-amp for an application like this, better performance at low light levels results if the photodiode is connected as in the circuit shown in Figure 4.945. When using "single-supply" op-amps, watch out for misleading statements about output swing to the negative rail (ground). There are really four different kinds of output stages, all of which "swing down Example: single-supply photometer to ground," but they have very different properties (Fig. 4.56): (a) Op-amps with Figure 4.55 shows a typical example of a complementary MOS output transistors circuit for which single-supply operation give true rail-to-rail swing; such a stage is "single-supply'' op-amp positive input (OK to OVI - positive I output IOK to OV) -- -- 1 -- -- Figure 4.58. Single-supply dc amplifier.
- 180. COMPARATORS AND SCHMI'IT TRIGGER 4.23 Comparators 22' capable of pulling its output to ground, even when sinking moderate current. Some examples are the ICL76xx, the LMC660, and CA5160. (b) Op-amps with an npn common-emitter transistor to ground be- have similarly, i.e., they can pull their out- put to ground even while sinking current. Examples are the LMIO, CA5422, and LT1013114. Both kinds of output stages can, of course, handle an open circuit or a load that sinks current to ground. (c) Some op-amps, notably the 358 and 324, use a pnp follower to ground (which can only pull down to within a diode drop of ground), in parallel with an npn current sink (with compliance clear to ground). In the 358, the internal current sink is set at 50pA. Such a circuit can swing clear down to ground as long as it doesn't have to sink more than 50pA from the load. If the load sources more current, the out- put only works to within a diode drop of ground. As before, this kind of output cir- cuit is happy sourcing current to a load that is returned to ground (as in the pho- tometer example earlier). (d) Finally, some single-supply op-amps (e.g., the OP-90) use a pnp follower to ground, without the par- allel current sink. Such an output stage can swing to ground only if the load helps out by sinking current, i.e., by being returned to ground. If you want to use such an op- amp with a load that sources current, you have to add an external resistor to ground (Fig. 4.57). A note of caution: Don't make the mis- take of assuming that you can make any op-amp's output work down to the nega- tive rail simply by providing an external current sink. In most cases the circuitry driving the output stage does not permit that. Look for explicit permission in the data sheet! Example: single-supply dc amplifier Figure 4.58 shows a typical single-supply noninverting amplifier to amplify an input signal of known positive polarity. The input, output, and positive supply are all referenced to ground, which is the neg- ative supply voltage for the op-amp. The output "pulldown" resistor may be needed with what we called type-1 amplifiers to en- sure output swing all the way to ground; the feedback network or the load itself could perform this function. An important point: Remember that the output cannot go negative; thus you cannot use this am- plifier with, say, ac-coupled audio signals. Single-supply op-amps are indispens- able in battery-operated equipment. We'll have more to say about this in Chapter 14. COMPARATORS AND SCHMITT TRIGGER It is quite common to want to know which of two signals is larger, or to know when a given signal exceeds a predetermined value. For instance, the usual method of generating triangle waves is to supply positive or negative currents into a ca- pacitor, reversing the polarity of the cur- rent when the amplitude reaches a preset peak value. Another example is a digital voltmeter. In order to convert a voltage to a number, the unknown voltage is applied to one input of a comparator, with a lin- ear ramp (capacitor + current source) ap- plied to the other. A digital counter counts cycles of an oscillator while the ramp is less than the unknown voltageand displays the result when equality of amplitudes is reached. The resultant count is propor- tional to the input voltage. This is called single-slope integration; in most sophisti- cated instruments a dual-slope integration is used (see Section 9.21). 4.23 Comparators The simplest form of comparator is a high- gain differential amplifier, made either with transistors or with an op-amp (Fig. 4.59). The op-amp goes into positive or
- 181. FEEDBACK AND OPERATIONAL AMPLIFIERS 230 Chapter 4 Figure 4.59 negative saturation according to the differ- ence of the input voltages. Because the voltage gain typically exceeds 100,000, the inputs will have to be equal to within a fraction of a millivolt in order for the out- put not to be saturated. Although an ordi- nary op-amp can be used as a comparator (and frequently is), there are special inte- grated circuits intended for use as com- parators. Some examples are the LM306, LM311, LM393, NE527, and TLC372. These chips are designed for very fast re- sponse and aren't even in the same league as op-amps. For example, the high-speed NE521 slews at several thousand volts per microsecond. With comparators, the term "slew rate" isn't usually used; you talk in- stead about "propagation delay versus in- put overdrive." Comparators generally have more flexi- ble output circuits than op-amps. Whereas an ordinary op-amp uses a push-pull out- put stage to swing between the supply volt- ages (f13V, say, for a 411 running from f15V supplies), a comparator chip usu- ally has an "open-collector" output with grounded emitter. By supplying an exter- nal "pullup" resistor (that's accepted ter- minology, believe it or not) connected to a voltage of your choice, you can have an output swingfrom +5 volts to ground, say. You will see later that logic circuits have well-defined voltages they like to operate between; the preceding example would be ideal for driving a TTL circuit, a popular type of digital logic. Figure 4.60 shows the circuit. The output switchesfrom +5 volts to ground when the input signal goes nega- tive. This use of a comparator is really an example of analog-to-digital conversion. Figure 4.60 This is the first example we have pre- sented of an open-collector output; this is a common configuration in logic circuits, as you will see throughout Chapters 8-11. If you like, you can think of the external pullup resistor as completing the compara- tor's internal circuit by providing a collec- tor load resistor for an npn output tran- sistor. Since the output transistor operates as a saturated switch, the resistor value is not at all critical, with values typically be- tween a few hundred ohms and a few thou- sand ohms; small values yield improved switching speed and noise immunity at the expense of increased power dissipation. Incidentally, in spite of their superficial resemblance to op-amps, comparators are never used with negative feedback because they would not be stable (see Sections 4.32-4.34). However, some positive feedback is often used, as you will see in the next section. Comments on comparators Some points to remember: (a) Because there is no negative feedback, golden rule I is not obeyed. The inputs are not at the same voltage. (b) The absence of negative feedback means that the (differential) in- put impedance isn't bootstrapped to the high values characteristic of op-amp cir- cuits. As a result, the input signal sees a changing load and changing (small) input current as the comparator switches; if the driving impedance is too high,
- 182. strange things may happen. (c) Some com- parators permit only limited differential input swings, as little as f5 volts in some cases. Check the specs! See Table 9.3 and the discussion in Section 9.07 for the prop- erties of some popular comparators. J input trlgger point (voltage at other Input of comparator) Figure 4.61 without feedback A with feedback B Figure 4.62 4.24 Schmitt trigger The simple comparator circuit in Figure 4.60 has two disadvantages. For a very COMPARATORS AND SCHMITT TRIGGER 4.24 Schmitt trigger 23 slowly varying input, the output swing can be rather slow. Worse still, if the input is noisy, the output may make several transitions as the input passes through the trigger point (Fig. 4.61). Both these problems can be remedied by the use of positive feedback (Fig. 4.62). The effect of RJ is to make the circuit have two thresholds, depending on the output state. In the example shown, the threshold when the output is at ground (input high) is 4.76 volts, whereas the threshold with the output at +5 volts is 5.0 volts. A noisy input is less likely to produce multiple triggering (Fig. 4.63). Furthermore, the positive feedback ensures a rapid output transition, regardless of the speed of the input waveform. (A small "speedup" capacitor of 10-100pF is often connected across Rgto enhance switching speed still further.) This configuration is known as a Schmitt trigger. (If an op-amp were used, the pullup would be omitted.) h~ghthreshold +4 76 Figure 4.63 input Figure 4.64 The output depends both on the input volt- age and on its recent history, an effect called hysteresis. This can be illustrated with a diagram of output versus input, as in Figure 4.64. The design procedure
- 183. FEEDBACK AND OPERATIONAL AMPLIFIERS 232 Chapter 4 is easy for Schmitt triggers that have a small amount of hysteresis. Use the cir- cuit of Figure 4.62B. First choose a resis- tive divider (R1, R2) to put the threshold at approximately the right voltage; if you want the threshold near ground, just use a single resistor from noninverting input to ground. Next, choose the (positive) feed- back resistor Rg to produce the required hysteresis, noting that the hysteresisequals the output swing, attenuated by a resistive divider formed by R3and R111R2. Finally, choose an output pullup resistor R4 small enough to ensure nearly full supply swing, taking account of the loading by Rg. For the case where you want thresholds sym- metrical about ground, connect an off- setting resistor of appropriate value from the noninverting input to the nega- tive supply. You may wish to scale all resistor values in order to keep the output current and impedance levels with- in a reasonable range. Figure 4.65 output Discrete-transistor Schmitt trigger A Schmitt trigger can also be made simply with transistors (Fig. 4.65). Q1 and Q2 share an emitter resistor. It is essential that Ql's collector resistor be larger than Q2's. In that way the threshold to turn on Q1, which is one diode drop above the emitter voltage, rises when Q1 is turned off, since the emitter current is higher with Q2 conducting. This produces hysteresis in the trigger threshold, just as in the preceding integrated circuit Schmitt trigger. EXERCISE 4.10 DesignaSchmitttriggerusinga311comparator (open-collector output) with thresholdsat +1.0 voltand +1.5 volts. Use a1.Ok pullupresistorto +5 volts, and assume that the 311 is powered from f15 volt supplies. FEEDBACK WITH FINITE-GAIN AMPLIFIERS We mentioned in Section 4.12 that the fi- nite open-loop gain of an op-amp limits its performance in a feedback circuit. Specifi- cally, the closed-loopgain can never exceed the open-loop gain, and as the open-loop gain approaches the closed-loop gain, the amplifier begins to depart from the ideal behavior we have come to expect. In this section we will quantify these statements so that you will be able to predict the performance of a feedback amplifier con- structed with real (less than ideal) compo- nents. This is important also for feedback amplifiers constructed entirely with dis- crete components (transistors), where.the open-loop gain is usually much less than with op-amps. In these cases the output impedance, for instance, will not be zero. Nonetheless, with a good understanding of feedback principles you will be able to achieve the performance required in any given circuit. 4.25 Gain equation Let's begin by considering an amplifier of finite voltage gain, connected with feed- back to form a noninverting amplifier (Fig. 4.66). The amplifier has open-loop voltage gain A, and the feedback network subtracts a fraction B of the output voltage from the input. (Later we will generalize
- 184. FEEDBACK WITH FINITE-GAIN AMPLIFIERS 4.26 Effects of feedback on amplifier circuits 23 things so that inputs and outputs can be currents or voltages.) The input to the gain block is then V,, - BVout. But the output is just the input times A: In other words, and the closed-loop voltage gain, Vout/Vn, is just Some terminology: The standard designa- tions for these quantities are as follows: G = closed-loopgain, A = open-loop gain, AB = loop gain, 1 + AB = return differ- ence, or desensitivity. The feedback net- work is sometimes called the beta network (no relation to transistor beta, hf,). Figure 4.66 4.26 Effects of feedback on amplifier circuits Let's look at the important effects of feed- back. The most significant are predictabil- ity of gain (and reduction of distortion), changed input impedance, and changed output impedance. Predictability of gain The voltage gain is A/(l + AB). In the limit of infinite open-loop gain A, G = 11B. We saw this result in the noninvert- ing amplifier configuration, where a volt- age divider on the output provided the signal to the inverting input (Fig. 4.69). The closed-loop voltage gain was just the inverse of the division ratio of the volt- age divider. For finite gain A, feedback still acts to reduce the effects of variations of A (with frequency, temperature, ampli- tude, etc.). For instance, suppose A de- pends on frequency as in Figure 4.67. This Figure 4.67 will surely satisfy anyone's definition of a poor amplifier (the gain varies over a fac- tor of 10 with frequency). Now imagine we introduce feedback, with B = 0.1 (a sim- ple voltage divider will do). The closed- loop voltage gain now varies from 1000/[1 +(1000x0.1)], or 9.90, to 10,000/[1 + (10,000x0.1)], or 9.99, a variation of just 1% over the same range of frequency! To put it in audio terms, the original amplifier is flat to flOdB, whereas the feedback am- plifier is flat to f0.04dB. We can now re- cover the original gain of 1000with nearly this linearity by just cascading three such stages. It was for just this reason (namely, the need for extremely flat telephone re- peater amplifiers) that negative feedback was invented. As the inventor, Harold Black, described it in his first open publica- tion on the invention (Electrical Engineer- ing, 53:114, 1934),"by building an ampli- fier whose gain is made deliberately, say 40 decibels higher than necessary (10,000- fold excess on energy basis) and then feed- ing the output back to the input in such a way as to throw away the excess gain, it has been found possible to effect extraordi- nary improvement in constancy of ampli- fication and freedom from nonlinearity."
- 185. FEEDBACK AND OPERATIONAL AMPLIFIERS 234 Chapter 4 Figure 4.68 It is easy to show, by taking the partial derivativeof G with respect to A (BGJaA), that relative variations in the open-loop gain are reduced by the desensitivity: Thus, for good performance the loop gain AB should be much larger than 1. That's equivalent to saying that the open-loop gain should be much larger than the closed- loop gain. A very important consequence of this is that nonlinearities, which are simply gain variations that depend on signal level, are reduced in exactly the same way. goes to infinity or zero, respectively. This is easy to understand, since voltage feed- back tends to subtract signal from the in- put, resulting in a smaller change (by the factor AB) across the amplifier's input re- sistance; it's a form of bootstrapping. Cur- rent feedback reduces the input signal by bucking it with an equal current. Let's see explicitly how the effective in- put impedance is changed by feedback. We will illustrate the case of voltage feed- back only, since the derivations are similar for the two cases. We begin with an op- amp model with (finite) input resistance as shown in Figure 4.68. An input V;,, is re- duced by BVOUt,putting a voltage Vdiff= V;,, - BVOutacross the inputs of the am- plifier. The input current is therefore giving an effective input resistance input impedance Feedback can be arranged to subtract a voltage or a current from the input (these are sometimes called seriesfeedback and shunt feedback, respectively). The nonin- verting op-amp configuration, for instance, subtracts a sample of the output voltage from the differential voltage appearing at the input, whereas in the inverting con- figuration a current is subtracted from the input. The effects on input impedance are opposite in the two cases: Voltage feed- back multiplies the open-loop input im- pedance by 1 +AB, whereas current feed- back reduces it by the same factor. In the limit of infinite loop gain the input im- pedance (at the amplifier's input terminal) Figure 4.69 The classic op-amp noninverting amplifier is exactly this feedback configuration, as shown in Figure 4.69. In this circuit, B = R1/(R1 + R2), giving the usual voltage-gain expression G, = 1+ R2/R1 and an infinite input impedance for the ideal case of infinite open-loop voltagegain
- 186. FEEDBACK WITH FINITE-GAIN AMPLIFIERS 4.26 Effects of feedback on amplifier circuits 23 A. For finite loop gain, the equations as previously derived apply. The opamp inverting amplifier circuit is different from the noninverting circuit and has to be analyzed separately. It's best to think of it as a combination of an input resistor driving a shunt feedback stage(Fig. 4.70). The shunt stage alone has its input at the "summing junction" (the inverting input of the amplifier), where the currents from feedback and input signals are combined (this amplifier connection is really a "transresistance" configuration; it converts a current input to a voltage output). Feedback reduces the impedance looking into the summing junction, R2,by a factor of 1 +A (see if you can prove this). In cases of very high loop gain (e.g, an op- amp) the input impedance is reduced to a fraction of an ohm, a good characteristic for a current-input amplifier. Some good examples are the photometer amplifier in Section 4.22 and the logarithmic converter in Section 4.14. The classic op-amp inverting amplifier connection is a combination of a shunt feedback transresistance amplifier and a series input resistor, as in the figure. As a result, the input impedance equals the sum of R1and the impedance looking into the summing junction. For high loop gain, Rin approximately equals R1. Fpi* - -- z,,= ' - A 1 + A R2 Z (open loop) Z,,= R , + - ZO", = 1 + A 1 + A Z (open loop1 Z.", = 1 + A 6 Figure 4.70. Input and output impedances for (A) transresistance amplifier and (B) inverting amplifier. It is a straightforward exercise to derive an expression for the closed-loop voltage gain of the inverting amplifier with finite loop gain. The answer is G = -A(1 - B ) / ( l + AB) where B is defined as before, B = R1/(R1+Rz).In the limit of large open- loop gain A, G = - 1/B+ 1 (i.e., G = -R2/R1). EXERCISE 4.11 Derive the foregoing expressions for input impedance and gain of the inverting amplifier. Figure 4.71 Output impedance Again, feedback can extract a sample of the output voltage or the output current. In the first case the open-loop output impedance will be reduced by the factor 1 + AB, whereas in the second case it will be increased by the same factor. We will illustrate this effect for the case of voltagesampling. We begin with the model shown in Figure 4.7 1 . This time we have shown the output impedance explicitly. The calculation is simplified by a trick: Short the input, and apply a voltage V to the output; by calculating the output current I , we get the output impedance = VII. Voltage V at the output
- 187. FEEDBACK AND OPERATIONAL AMPLIFIERS 236 Chapter 4 puts a voltage -BV across the amplifier's desired output impedance. This equation input, producing a voltage -ABV in the reduces to the previous results for the usual amplifier's internal generator. The output situation in which feedback is derived current is therefore from either the output voltage or the V - (- ABV) V ( 1 + AB) output current. I = -- Ro Ro Loading by the feedback network giving an effective output impedance In feedback computations, you usually as- Rb = V / I= Ro/(l+ AB) sume that the beta network doesn't load If feedback is connected instead to the amplifier's output. If it does, that sample the output current, the expression must be taken into account in ComPut- becomes ing the open-loop gain. Likewise, if the connection of the beta network at the am- Rb = &(l + AB) plifier's input affects the open-loop gain ~t is possible to have multiple feedback (feedback removed, but network still con- paths, sampling both voltage and current. nected), You must use the modified open- In the general case the output impedance loop gain. Finally, the preceding expres- is given by Blackman's impedance relation sions assume that the beta network is uni- directional, i.e., it does not couple signal Rb = &1+(AB)sc from the input to the output. 1 + (AB)oc 4.27 Two examples of transistor where (AB)sc is the loop gain with the wit,, feedback output shorted to ground and (AB)oc is the loop gain with no load attached. Figure 4.72 shows a transistor amplifier Thus, feedback can be used to generate a with negative feedback. signal in Figure 4.72. Transistor power amplifier with negative feedback.
- 188. FEEDBACK WITH FINITE-GAIN AMPLIFIERS 4.27 Two examples of transistor amplifiers with feedback 23' Circuit description important to make sure that the dc re- It may look complicated, but it is extreme- sistances seen from the inputs are equal, ly straightforward in design and is rela- as shown (a Darlington input stage would tively easy to analyze. Q1 and Q2 form probably be better here). a differential pair, with common-emitter amplifier Q3 amplifying its output. Rs is Analysis Q3's collector load resistor, and push-pull analyze this circuit in detail, de- pair Q4 an' Q5 form the output emitter termining the gain, input and output follower. The output voltage is sampled by impedances, and distortion. T~ illustrate the feedback network consisting of voltage the utility of feedback, we will find these divider R4 and Ra, with C2 included to parameters for both the open-loop and reduce the gain at dc for closed-loop situations (recognizingthat bi- biasing. R3 sets the quiescent current in asing would be hopeless in the open~loop the differential pair, and since overall feed- ca,). To get a feeling for the linearizing back guarantees that the quiescent Output effect of the feedback, the gain will be voltage is at ground, Q3's quie~centcur- culated at + 10volts and -10volts output, rent is seen be lomA ( V ~ ~ as well as the quiescent point (zero volts). R6,approximately). As we have discussed earlier (Section 2.151, the diodes bias the Open loop. Input impedance: We cut push-pull pair intoconduction, leaving One the feedback at point X and ground the diode drop across the series pair R7 and right side of R4. The input signal sees 1OOk R8, i.e., 60mA quiescent current. That's in parallel with the impedance looking into class AB operation, good for minimizing the base. The latter is hfe times twice crossover distortion, at the cost of 1 watt the intrinsic emitter resistance the standby dissipation in each Output transis- impedance seen at Q27S emitter due to the tor. feedback network at Q2's base. For hfe = From the point of view of our earlier 250, zi, 250~[(2~25)+(3.3k/250)]; circuits, the only unusual feature is Q17s i.e., zin 16k. quiescent collector voltage, one diode drop Output impedance: Since the imped- below Vcc. That is where it must sit in ance looking back into Q3's collector is order to hold Q3 in conduction, and the high, the output transistors are driven by feedback path ensures that it will. (For a 1.5k source (R6). The output impedance instance, if Q1 were to pull its ~ollector is about 15 ohms (hfe x 100) plus the 5 closer to ground, Q3 would conduct heav- ohm emitter resistance, or 20 ohms. The ily, raising the output voltage, which in intrinsic emitter resistance of 0.4 ohm is turn would force Q2to conduct more heav- negligible. ily, reducing QI's collector current and Gain: The differential input stage sees hence restoring the status quo.) R2 was a load of R2 paralleled by Q3's base re- chosen to give a diode drop at QI's quies- sistance. Since Q3 is running lOmA quies- cent current in order to keep the collector cent current, its intrinsic emitter resistance currents in the differential pair approxi- is 2.5 ohms, giving a base impedance of mately equal at the quiescent point. In about 250 ohms (again, hf, =loo). The this transistor circuit the input bias current differential pair thus has a gain of is not negligible (4pA), resulting in a 0.4 volt drop across the lOOk input resistors. 25011620 or 3.5 In transistor amplifier circuits like this, in 2 x which the input currents are considerably The second stage, Q3, has a voltage gain of larger than in op-amps, it is particularly 1.5W2.5ohms,or 600. The overall voltage
- 189. FEEDBACK AND OPERATIONAL AMPLIFIERS 238 Chapter 4 gain at the quiescent point is 3.5 x 600, or 2100. Since Q3's gain depends on its collector current, there is substantial change of gain with signal swing, i.e., nonlinearity. The gain is tabulated in the followingsection for three values of output voltage. Closed loop. Input impedance: This circuit uses series feedback, so the input impedance is raised by (1 + loop gain). The feedback network is a voltage divider with B = 1/30 at signal frequencies, so the loop gain AB is 70. The input impedance is therefore 70 x 16k, still paralleled by the lOOk bias resistor, i.e., about 92k. The bias resistor now dominates the input impedance. Output impedance: Since the output voltage is sampled, the output impedance is reduced by (1 + loop gain). The output impedance is therefore 0.3 ohm. Note that this is a small-signal impedance and does not mean that a 1 ohm load could be driven to nearly full swing, for instance. The 5 ohm emitter resistors in the output stage limit the large signal swing. For instance, a 4 ohm load could be driven only to 10 volts pp, approximately. Gain: The gain is A/(1 +AB). At the quiescent point, that equals 30.84, using the exact value for B. In order to illustrate the gain stability achieved with negative feedback, the overall voltage gain of the circuit with and without feedback is tabulated at three values of output level at the end of this paragraph. It should be obvious that negative feedback has Open loop Closed loop Vout -10 0 +I0 -10 0 $10 Zi, 16k 16k 16k 92k 92k 92k Zout 200 200 200 0.30 0.30 0.30 Gain 1360 2100 2400 30.60 30.84 30.90 Series feedback pair Figure 4.73 Figure 4.73 shows another transistor am- plifier with feedback. Thinking of Q1 as an amplifier of its base-emitter voltage drop (thinking in the Ebers-Moll sense), the feedback samples the output voltage and subtracts a fraction of it from the input signal. This circuit is a bit tricky because Q2's collector resistor doubles as the feed- back network. Applying the techniques we used earlier, you should be able to show that G(open loop) =200, loop gain = 20, Zout(openloop) =1Ok, Zout(closedloop) =500 ohms, and G(c1osed loop) =9.5. brought about considerable improvement in the amplifier's characteristics, although soMEp P l c A ~O ~ - ~ M Pc l R c " l ~ ~ in fairness it should be pointed out that the amplifier could have been designed for better open-loop performance, e-g., by 4.28 General-purpose lab amplifier - - - . using a current source for Q3's collector Figure 4.74 shows a dc-coupled "decade load and degenerating its emitter, by using amplifier" with settable gain, bandwidth, a current source for the differential-pair and wide-range dc output offset. IC1 is emitter circuit, etc. Even so, feedback a FET-input op-amp with noninverting would still make a large improvement. gain from unity (OdB) to x100 (40dB) in
- 190. SOME TYPICAL OP-AMP CIRCUITS 4.28 General-purposelab amplifier 23 accurately calibrated lOdB steps; a vernier is provided for variable gain. IC2 is an inverting amplifier; it allows offsetting the output over a range of f10 volts, accu- rately calibrated via R14, by injecting cur- rent into the summing junction. C2- C4 set the high-frequency rolloff, since it is often a nuisance to have excessive band- width (and noise). IC5 is a power booster for driving low-impedance loads or cables; it can provide fl5OmA output current. Some interesting details: A lOMR in- put resistor is small enough, since the bias current of the 411 is 25pA (0.3mV error with open input). R2,in combination with Dl and D2,limits the input voltage at the op-amp to the range V- to V++ 0.7. D3 is used to generate a clamp voltage at V- +0.7, since the input common mode range extends only to V- (exceeding V- causes the output to reverse phase). With the protection components shown, the input can go to f150 volts without damage. offset l-J Figure 4.74. Laboratory dc amplifier with output offset.
- 191. FEEDBACK AND OPERATIONAL AMPLIFIERS 240 Chapter 4 EXERCISE 4.12 is HIGH and open-circuited when the out- Check that the gain is as advertised. How does put is LOW. the variable offset circuitry work? An unusual feature of this circuit is its operation from a single positive supply. 4.29 Voltage-controlled oscillator Figure 4.75 shows a clever circuit, bor- rowed from the application notes of several manufacturers. IC1 is an inte- grator, rigged up so that the capacitor current (Vin/200k) changes sign, but not magnitude, when Q1 conducts. IC2 is connected as a Schmitt trigger, with thresholds at one-third and two-thirds of V+. Q1 is an n-channel MOSFET, used here as a switch; it is simpler to use than bipolar transistors in this sort of application, but an alternative cir- cuit using npn transistors is shown in ad- dition. In either case, the bottom side of R4 is pulled to ground when the output 0 4 V,, 4 2 ( V +- 1.5V) The 3160 (internally compensated version of the 3130) has FETs as output transis- tors, guaranteeing a full swing between V+ and ground at the output; this ensures that the thresholds of the Schmitt don't drift, as they would with an op-amp of conventional output-stage design, with its ill-defined limits of output swing. In this case this means that the frequency and am- plitude of the triangle wave will be sta- ble. Note that the frequency depends on the ratio &,/V+; this means that if v, is generated from V+ by a resistive di- vider (made from some sort of resistive transducer, say), the output frequency won't vary with V+, only with changes in resistance. a n r 8" 49.9k 1OOk 1% -L bipolar substitute V+ for FET Q, I triangle out a l.nJ-Lrground"' sauare out 2N4124 47k Figure 4.75. Voltage-controlled waveform - -- - generator.
- 192. SOME TYPICAL OP-AMP CIRCUITS 4.30 JFET linear switch with RONcompensation 241 EXERCISE 4.13 Show that the output frequency is given by f(Hz) = 150F,/V+. Along the way,verify that the Schmitt thresholds and integrator currents are as advertised. 4.30 JFET linear switch with RONcompensation In Chapter 3 we considered MOSFET linear switches in some detail. It is also possible to use JFETs as linear switches. However, you have to be more careful about gate signals so that gate conduction doesn't occur. Figure 4.76 shows a typical arrangement. The gate is held well below ground to keep the JFET pinched off. This means that if the input signals go negative, the gate must be held at least Vp below the most negative input swing. To bring the FET into conduction, the control input is brought more positive than the most positive input excursion. The diode is then reverse-biased,and the gate rides at source voltage via the 1M resistor. output ground - 15 Figure 4.76 The awkwardness of this circuit prob- ably accounts for much of the popularity of MOSFETs in linear switch applications. However, it is possible to devise an elegant JFET linear switch circuit if you use an op- amp, since you can tie the JFET source to the virtual ground at the summing junction of an inverting amplifier. Then you simply bring the gate to ground potential to turn the JFET on. This arrangement has the added advantage of providing a method of canceling precisely the errors caused by finite RONand its nonlinearity. Figure 4.77 shows the circuit. Figure 4.77. JFET-switched amplifier with RONcancellation. R , 10k 1% 0, L - There are two noteworthy features of this circuit: (a) When Q1 is ON (gate grounded), the overall circuit is an inverter with identical impedances in the input and feedback circuits. That results in the can- cellation of any effects of finite or non- linear ON resistance, assuming the FETs are matched in RON.(b) Because of the low pinch-off voltage of JFETs, the circuit will work well with a control signal of zero to +5 volts, which is what you get with standard digital logic circuits (see Chap- ters 8 and 9). The inverting configuration, with Q17ssource connected to a virtual ground (the summing junction), simplifies circuit operation, since there are no sig- nal swings on Ql's source in the ON state; Dl prevents FET turn-on for positive in- put swings when Q1 is OFF, and it has no effect when the switch is closed. There are p-channel JFETs with low pinch-off voltages available in useful con- figurations at low prices. For example, the IH5009-IH5024 family includes devices with four input FETs and one cancellation FET in a single DIP package, with RONof 100 ohms and a price less than two dol- lars. Add an op-amp and a few resistors and you've got a Cinput multiplexer. Note that the same RONcancellation trick can be used with MOSFET switches. * 11 -- -- 0,.Oz: matched pair +5x,,u T L 1ev.s) ov
- 193. FEEDBACK AND OPERATIONAL AMPLIFIERS 242 Chapter 4 4.31 TTL zero-crossing detector The circuit shown in Figure 4.78 generates an output square wave for use with TTL logic (zero to +5V range) from an input wave of any amplitude up to 100 volts. R1, combined with Dl and D2,limits the input swing to -0.6 volt to +5.6 volts, approximately. Resistive divider R2R3 is necessary to limit negative swing to less than 0.3 volt, the limit for a 393 compara- tor. Rs and Rg provide hysteresis, with R4 setting the t~iggerpoints symmetrically about ground. The input impedance is nearly constant, because of the large R1 value relative to the other resistors in the input attenuator. A 393 is used because its inputs can go all the way to ground, mak- ing single-supply operation simple. current, for use with a current regulator, metering circuit, or whatever. The voltage across the 4-terminal resistor Rs goesfrom zero to 0.1 volt, with probable common- mode offset due to the effects of resistance in the ground lead (note that the power supply is grounded at the output). For that reason the op-amp is wired as a differen- tial amplifier, with gain of 100. Voltage offset is trimmed externally with Rs, since the LT1013doesn't have internal trimming circuitry (the single LT1006 does, how- ever). A Zener reference with a few percent stability is adequate for trimming, since the trimming is itself a small correction (you hope!). The venerable 358 could have been chosen because both inputs and out- put also go all the way to ground. V+could be unregulated, since the power-supply re- jection of the op-amp is more than ade- EXERCISE 4.14 quate, loodB (typ) in this case. Verifythatthe trigger points are at f25mVat the input signal. FEEDBACK AMPLIFIER FREQUENCY 4.32 Load-current-sensing circuit COMPENSATION The circuit shown in Figure 4.79 provides If you look at a graph of open-loop voltage a voltage output proportional to load gain versus frequency for several op-amps, posit~veprotection center hysteres~s rnax. IN914 negative - protection - nto log~cgates, etc 4.7MS2 R6 225rnV hysteresis (at lnput) 4.7kp- Figure 4.78. Zero-crossinglevel detector with input protection.
- 194. FEEDBACK AMPLIFIER FREQUENCY COMPENSATION 4.33 Gain and phase shift versus frequency 243 t12V to t30V (unrequlated OK) you'll see something like the curves in Figure 4.80. From a superficial look at such a Bode plot (a log-log plot of gain R , 100 1% frequency (Hz) Figure 4.80 vi& Vo = /L (Rs-3 ! A- R3 '74 100 1% 10k 1% --- /I 6.2V IN5234 7L and phase versus frequency) you might conclude that the 741 is an inferior op- amp, since its open-loop gain drops offso rapidly with increasing frequency. In fact, that rolloff is built into the op-amp intentionally and is recognizable as the J - same -6dbloctave curve characteristic of an RC low-pass filter. The 748, by corn- parison, is identical with the 741 except that it is uncompensated (as is the 739). Op-amps are generally available in inter- nally compensated varieties and uncom- pensated varieties; let's take a look at this business of frequency compensation. source 4.33 Gain and phase shift versus frequency - - -- An op-amp (or, in general, any multistage amplifier) will begin to roll off at some frequency because of the low-pass filters formed by signals of finite source imped- ance driving capacitive loads within the amplifier stages. For instance, it is corn- mon to have an input stage consisting of a differential amplifier, perhaps with cur- rent mirror load (see the LM358 schematic in Fig. 4.54), driving a common-emitter second stage. For now, imagine that the capacitor labeled Cc in that circuit is re- moved. The high output impedance of the input stage, in combination with 4 terminal - Figure 4.79. High-power reslstor 1ow ground at oufput terminal current-sensingamplifier. power /
- 195. FEEDBACK AND OPERATIONAL AMPLIFIERS 244 Chapter 4 junction capacitance Ci,and feedback ca- pacitance Ccb(Miller effect, see Sections 2.19 and 13.04) of the following stage, forms a low-pass filter whose 3dB point might fall somewhere in the range of lOOHz to 10kHz. The decreasing reactance of the capac- itor with increasing frequency gives rise to the characteristic 6dbloctave rolloff: At sufficiently high frequencies (which may be below IkHz), the capacitive loading domi- nates the collector load impedance, result- ing in a voltage gain GV = g,Xc, i.e., the gain drops off as llf. It also produces a 90' lagging phase shift at the output rel- ative to the input signal. (You can think of this as the tail of an RC low-pass fil- ter characteristic, where R represents the equivalent source impedance driving the capacitive load. However, it is not nec- essary to have any actual resistors in the circuit.) Figure 4.81 -0- ;m -- C_ m a 0- t g In a multistage amplifier there will be additional rolloffs at higher frequencies, caused by low-pass filter characteristics in the other amplifier stages, and the over- all open-loop gain will look something like that shown in Figure 4.81. The open- loop gain begins dropping at 6dBloctave at some low frequency fl, due to capac- itive loading of the first-stage output. It ' I I l $ - - L continues dropping off with that slope un- til an internal RC of another stage rears its ugly head at frequency fi, beyond which the rolloff goes at 12dB/octave, and so on. f 1 frequency (log scale) I -20 t frequency (log scale) I Figure 4.82. Bode plot: gain and phase versus frequency. I I frequency (log) Figure 4.83 What is the significance of all this? Remember that an RC low-pass filter has a phase shift that looks as shown in Figure 4.82. Each low-pass filter within the amplifier has a similar phase-shift characteristic, so the overall phase shift of the hypothetical amplifier will be as shown in Figure 4.83.
- 196. FEEDBACK AMPLIFIER FREQUENCY COMPENSATION 4.34 Amplifier compensation methods 245 Now here's the problem: If you were to connect this amplifier as an op-amp follower, for instance, it would oscillate. That's because the open-loop phase shift reaches 180' at some frequency at which the gain is still greater than 1 (negative feedback becomes positive feedback at that frequency). That's all you need to generate an oscillation, since any signal whatsoever at that frequency builds up each time around the feedback loop, just like a public address system with the gain turned up too far. Stability criterion The criterion for stability against oscilla- tion for a feedback amplifier is that its open-loop phase shift must be less than 180' at the frequency at which the loop gain is unity. This criterion is hardest to satisfy when the amplifier is connected as a follower, since the loop gain then equals the open-loop gain, the highest it can be. Internally compensated op-amps are de- signed to satisfy the stability criterion even when connected as followers; thus they are stable when connected for any closed-loop gain with a simple resistive feedback net- work. As we hinted earlier, this is accom- plished by deliberately modifying an exist- ing internal rolloff in order to put the 3dB point at some low frequency, typically 1Hz to 20Hz. Let's see how that works. 4.34 Amplifier compensation methods Dominant-pole compensation The goal is to keep the open-loop phase shift much less than 180' at all frequencies for which the loop gain is greater than 1. Assuming that the op-amp may be used as a follower, the words "loop gain" in the last sentence can be replaced by "open-loop gain." The easiest way to do this is to add enough capacitance at the point in the circuit that produces the initial 6dBloctave rolloff, so that the open- loop gain drops to unity at about the 3dB frequency of the next "natural" RC filter. In this way the open-loop phase shift is held at a constant 90' over most of the passband, increasing toward 180" only as the gain approaches unity. Figure 4.84 increase C 1OOdB E 60dB 0 0- & 40dB 20d B C OdB t Figure 4.84 shows the idea. Without compensation the open-loop gain drops toward 1, first at 6dB/octave, then at 12dB/octave, etc., re- sulting in phase shifts of 180" or more be- fore the gain has reached 1. By moving the first rolloff down in frequency (forming a "dominant pole"), the rolloff is controlled so that the phase shift begins to rise above 90° only as the open-loop gain approaches unity. Thus, by sacrificing open-loop gain, you buy stability. Since the natural rolloff of lowest frequency is usually caused by Miller effect in the stage driven by the in- put differential amplifier, the usual method of dominant-pole compensation consists simply of adding additional feedback ca- pacitance around the second-stage transis- tor, so that the combined voltage gain of
- 197. FEEDBACK AND OPERATIONAL AMPLIFIERS 246 Chapter 4 the two stages is gmXc or gm/2.rrf C,,,, over the compensated region of the am- plifier's frequency response (Fig. 4.85). In practice, Darlington-connected transistors would probably be used for both stages. + "cc Figure 4.85. Classic op-amp input stage with compensation. which it intersects the unity-gain axis (Fig. 4.86). don't know (or care) p'ck C,,,,,,, for galn out here OdB 1 frequency (log) Figure 4.86 Uncompensated op-amps If an op-amp is used in a circuit with closed-loop gain greater than 1 (i.e., not a follower), it is not necessary to put the pole (the term for the "corner frequency" of a low-pass filter)at such a low frequency, since the stability criterion is relaxed be- cause of the lower loop gain. Figure 4.87 shows the situation graphically. By putting the dominant-pole unity-gain 1(uncompensated) crossingat the 3dB point of the next rolloff, open loop galn (compensated for 30dB) you get a phase margin of about 45" in l o o d e the worst case (follower), since a single 8odB! RC filter has a 45" lagging phase shift at G closed loop qaln its 3dB frequency, i.e., the phase margin !6 0 d B - (51 equals 180"- (90' + 45"), with the 90" Z coming from the dominant pole. ? 4ode An additional advantage of using a 20dB [ Miller-effect pole for compensation is that closed loop qaln ( u n ~ t ygaln compensat~on) the compensation is inherently insensitive O ~ B- frequency ( I O ~ ) to changes in voltage gain with temper- I ature, or manufacturing spread of gain: Higher gain causes the feedback capaci- Figure 4-87 tance to look larger, moving the pole down- ward in frequency in exactly the right way For a closed-loop gain of 30dB, the loop to keep the unity-gain crossing frequency gain (which is the ratio of the open-loop unchanged. In fact, the actual 3dB fre- gain to the closed-loop gain) is less than quency of the compensation pole is quite for a follower, so the dominant pole can be irrelevant; what matters is the point at placed at a higher frequency. It is chosen
- 198. FEEDBACK AMPLIFIER FREQUENCY COMPENSATION 4.35 Frequency response of the feedback network 247 so that the open-loop gain reaches 30dB (rather than OdB) at the frequency of the next natural pole of the op-amp. As the graph shows, this means that the open-loop gain is higher over most of the frequency range, and the resultant amplifier will work at higher frequencies. Some op-amps are available in uncompensated versions [e.g., the 748 is an uncompensated 741; the same is true for the 308 (312), 3130 (3160), HA5102 (HA5112), etc.], with recommended external capacitance values for a selection of minimum closed-loop gains. They are worth using if you need the added bandwidth and your circuit operates at high gain. An alternative is to use "decompensated" (a better word might be "undercompensated") op-amps, such as the 357, which are internally compensated for closed-loop gains greater than some minimum (Av> 5 in the case of the 357). t -- -- -- - I frequency (log) Figure 4.88 amplifier to move upward somewhat in frequency, an effect known as "pole split- ting." The frequency of the canceling zero will be chosen accordingly. 4.35 Frequency response of the feedback network 7Pole-zero compensation It is possible to do a bit better than with dominant-pole compensation by using a compensation network that begins drop- ping (6dB/octave, a "pole") at some low frequency, then flattens out again (it has a "zero") at the frequency of the second nat- ural pole of the op-amp. In this way the amplifier's second pole is "canceled,"giv- ing a smooth 6dBloctave rolloff up to the amplifier's third pole. Figure 4.88 shows a frequency response plot. In practice, the zero is chosen to cancel the amplifier's second pole; then the position of the first pole is adjusted so that the overall response reaches unity gain at the frequency of the amplifier's third pole. A good set of data sheets will often give suggested component values (an R and a C) for pole-zero com- pensation, as well as the usual capacitor values for dominant-pole compensation. As you will see in Section 13.06, moving the dominant pole downward in frequency actually causes the second pole of the In all of the discussion thus far we have assumed that the feedback network has a flat frequency response; this is usually the case, with the standard resistive volt- age divider as a feedback network. How- ever, there are occasions when some sort of equalization amplifier is desired (inte- grators and differentiators are in this cat- egory) or when the frequency response of the feedback network is modified to im- prove amplifier stability. In such cases it is important to remember that the Bode plot of loop gain versus frequency is what matters, rather than the curve of open- loop gain. To make a long story short, the curve of ideal closed-loop gain versus fre- quency should intersect the curve of open- loop gain, with a difference in slopes of 6dBloctave. As an example, it is com- mon practice to put a small capacitor (a few picofarads) across the feedback resis- tor in the usual inverting or noninverting amplifier. Figure 4.89 shows the circuit and Bode plot.
- 199. FEEDBACK AND OPERATIONAL AMPLIFIERS 248 Chapter 4 lOOdB 80dB + open loop galn m ... .. kedbac, network wif,o,, = ruaa + (closed loop galn. > 20dB B Figure 4.89 with C, uncompensated op-amps. It is simplest to use the compensated variety, and that's the usual choice. You might consider the internally compensated LF411 first. If you need greater bandwidth or slew rate, look for a faster compensated op-amp (see Table 4.1 or 7.3 for many choices). If it turns out that nothing is suitable, and the closed-loop gain is greater than unity (as it usually is), you can use an uncompensated op-amp, with an external capacitor as specified by the manufacturer for the gain you are using. A number of op-amps offer another choice: a "decompensated" version, re- quiring no external compensation compo- nents, but only usable at some minimum gain greater than unity. For example, the popular OP-27 low-noiseprecision op-amp (unity-gain-compensated) is available as the decompensated OP-37 (minimum gain of 5), offering roughly seven times the speed, and also as the decompensated HA-5147 (minimum gain of lo), with 15 times the speed. The amplifier would have been close to Example: 60Hz power source instability with a flat feedback network, since the loop gain would have been dropping at nearly 12dBloctave where the curves meet. The capacitor causes the loop gain to drop at 6dBloctave near the cross- ing, guaranteeing stability. This sort of consideration is very important when de- signing differentiators, since an ideal dif- ferentiator has a closed-loopgain that rises at 6dB/octave; it is necessary to roll off the differentiator action at some moder- ate frequency, preferably going over to a 6dBloctave rolloff at high frequencies. In- tegrators, by comparison, are very friendly in this respect, owing to their 6dBloctave closed-loop rolloff. It takes real talent to make a low-frequency integrator oscillate! What to do In summary, you are generally faced with the choice of internally compensated or Uncompensated op-amps also give you the flexibility of overcompensating, a simple solution to the problem of additional phase shifts introduced by other stuff in the feedback loop. Figure 4.90 shows a nice example. This is a low-frequency amplifier designed to generate a 115 volt ac power output from a variable 60Hz low-level sine-wave input (it goes with the 60Hz synthesizer circuit described in Section 8.31). The op-amp, together with R2 and R3, forms a x 100 gain block; this is then used as the relatively low "open-loopgain" for overall feedback. The op-amp output drives the push-pull output stage, which in turn drives the transformer primary. Low-frequency feedback is taken from the transformer output via Rlo,in order to generate low distortion and a stable output voltage under load variations. Because of
- 200. 2.5V rms Input - 50-70Hz ~-+16 (unregulated) Figure 4.90. Output amplifier for 60Hz power source.
- 201. FEEDBACK AND OPERATIONAL AMPLIFIERS 250 Chapter 4 the unacceptably large phase shifts of such a transformer at high frequencies, the cir- cuit is rigged up so that at higher fre- quencies the feedback comes from the low- voltage input to the transformer, via C3. The relative sizes of R9 and Rloare cho- sen to keep the amount of feedback con- stant at all frequencies. Even though high- frequency feedback is taken directly from the push-pull output, there are still phase shifts associated with the reactive load (the transformer primary) seen by the transis- tors. In order to ensure good stability, even with reactive loads at the 115 volt output, the op-amp has been overcompen- sated with an 82pF capacitor (30pF is the normal value for unity gain compensation). The loss of bandwidth that results is unim- portant in a low-frequency application like this. output voltage VS frequency + VS 3 a output power.- with the transformer's finite output imped- ance, causes additional phase shifts within the low-frequency feedback loop. Since this circuit was built to derive a telescope's synchronous driving motors (highly induc- tive loads), the loop gain was intentionally kept low. Figure 4.91 shows a graph of the ac output voltage versus load, which illus- trates good (but not great) regulation. Motorboating In ac-coupled feedback amplifiers, stability problems can also crop up at very low fre- quencies, due to the accumulated leading phase shifts caused by several capacitively coupled stages. Each blocking capacitor, in combination with the input resistance due to bias strings and the like, causes a leading phase shift that equals 45" at the low-frequency 3dB point and approaches 90" at lower frequencies. If there is enough loop gain, the system can go into a low- frequency oscillation picturesquely known as "motorboating." With the widespread use of dc-coupled amplifiers, motorboating is almost extinct. However, old-timers cat^ tell you some good stories about it. SELF-EXPLANATORY CIRCUITS 1050 L I 50 55 60 65 70 frequency (Hz) power (W) Figure 4.9 1 An application such as this represents a compromise, since ideally you would like to have plenty of loop gain to stabilize the output voltage against variations in load current. But a large loop gain increases the tendency of the amplifier to oscillate, espe- cially if a reactive load is attached. This is because the reactive load, in combination 4.36 Circuit ideas Some interesting circuit ideas, mostly lifted from manufacturers' data sheets, are shown in Figure 4.94. 4.37 Bad circuits Figure 4.95 presents a zoo of intentional (mostly) blunders to amuse, amaze, and educate you. There are a few real howlers here this time. These circuits are guar- anteed not to work. Figure out why. All op-amps run from f15 volts unless shown otherwise.
- 202. SELF-EXPLANATORY CIRCUITS 4.37 Bad circuits 251 ADDITIONAL EXERCISES (I) Design a "sensitive voltmeter" to have Zin= 1M a and full-scale sensitivities of lOmV to 10V in four ranges. Use a 1mA meter movement and an op-amp. Trim voltage offsets if necessary, and calculate what the meter will read with input open, assuming (a) IB = 25pA (typical for a 411) and (b) IB = 8OnA (typical for a 741). Use some form of meter protection (e.g., keep its current less than 200% of full scale), and protect the amplifier inputs from voltages outside the supply voltages. What do you conclude about the suitability of the 741 for low-level high-impedance measurements? (2) Design an audio amplifier, using an OP-27 op-amp (low noise, good for audio), with the following characteristics: gain = 20dB, Zin = 10k, -3dB point = 20Hz. Use the noninverting configuration, and roll off the gain at low frequencies in such a way as to reduce the effects of in- put offset voltage. Use proper design to minimize the effects of input bias current on output offset. Assume that the signal source is capacitively coupled. (3) Design a unity-gain phase splitter (see Chapter 2) using 411s. Strive for high input impedance and low output imped- ances. The circuit should be dc-coupled. At roughly what maximum frequency can you obtain full swing (27V pp, with f15V supplies), owing to slew rate limitations? (4) El Cheapo brand loudspeakers are found to have a treble boost, beginning at 2kHz (+3dB point) and rising 6dBloctave. Design a simple RC filter, buffered with AD611 op-amps (another good audio chip) as necessary, to be placed between preamp and amplifier to compensate this rise. Assume that the preamp has ZOut= 50k and that the amplifier has Zin = IOk, approximately. (5) A 741 is used as a simple compara- tor, with one input grounded; i.e., it is a zero-crossing detector. A 1 volt amplitude sine wave is fed into the other input (frequencylkHz). What voltage(s) will the input be when the output passes through zero volts? Assume that the slew rate is O.5Vlps and that the op-amp's saturated output is f13 volts. (6) The circuit in Figure 4.92 is an exam- ple of a "negative-impedance converter." (a) What is its input impedance? (b) If the op-amp's output range goes from V+ to V-, what range of input voltages will this circuit accommodate without saturation? Figure 4.92 (7) Consider the circuit in the preceding problem as the 2-terminal black box (Fig. 4.93). Show how to make a dc amplifier with a gain of -10. Why can't you make a dc amplifier with a gain of +lo? (Hint: The circuit is susceptible to a latchup condition for a certain range of source resistances. What is that range? Can you think of a remedy?) Figure 4.93
- 213. Ch 5: Active Filters and Oscillators With only the techniques of transistors and op-amps it is possible to delve into a num- ber of interesting areas of linear (as con- trasted with digital) circuitry. We believe that it is important to spend some time do- ing this now, in order to strengthen your understanding of some of these difficult concepts (transistor behavior, feedback, op-amp limitations, etc.) before introduc- ing more new devices and techniques and getting into the large area of digital elec- tronics. In this chapter, therefore, we will treat briefly the areas of active filters and oscillators. Additional analog techniques are treated in Chapter 6 (voltage regula- tors and high-current design), Chapter 7 (precision circuits and low noise), Chap- ter 13 (radiofrequency techniques), Chap- ter 14 (low-power design), and Chapter 15 (measurements and signal processing). The first part of this chapter (active filters, Sections 5.01-5.11) describes techniques of a somewhat specialized nature, and it can be passed over in a first reading. How- ever, the latter part of this chapter (oscil- lators, Sections 5.12-5.19) describes tech- niques of broad utility and should not be omitted. ACTIVE FILTERS In Chapter 1 we began a discussion of fil- ters made from resistors and capacitors. Those simple RC filters produced gentle high-pass or low-pass gain characteristics, with a 6dBloctave falloff well beyond the -3dB point. By cascading high-pass and low-pass filters, we showed how to obtain bandpass filters, again with gentle 6dBloctave "skirts." Such filters are suffi- cient for many purposes, especially if the signal being rejected by the filter is far removed in frequency from the desired signal passband. Some examples are by- passing of radiofrequency signals in audio circuits, "blocking"capacitors for elimina- tion of dc levels, and separation of mod- ulation from a communications "carrier" (see Chapter 13). 5.01 Frequency response with RC filters Often, however, filters with flatter pass- bands and steeper skirts are needed. This happens whenever signals must be filtered from other interfering signals nearby in 263
- 214. ACTIVE FILTERS AND OSCILLATORS 264 Chapter 5 frequency. The obvious next question is whether or not (by cascading a number of identical low-pass filters, say) we can generate an approximation to the ideal "brick-wall" low-pass frequency response, as in Figure 5.1. Figure 5.1 We know already that simple cascading won't work, since each section's input impedance will load the previous section seriously, degrading the response. But with buffers between each section (or by arranging to have each section of much higher impedance than the one preceding it), it would seem possible. Nonetheless, the answer is no. Cascaded RC filters do produce a steep ultimate falloff, but the "knee" of the curve of response versus frequency is not sharpened. We might restate this as "many soft knees do not a hard knee make." To make the point graphically, we have plotted some graphs of gain response (i.e., VOut/V,,) versus frequency for low-pass filters constructed from 1, 2, 4, 8, 16, and 32 identical RC sections, perfectly buffered (Fig. 5.2). The first graph shows the effect of cas- cading several RC sections, each with its 3dB point at unit frequency. As more sections are added, the overall 3dB point is pushed downward in frequency, as you could easily have predicted. To compare filter characteristics fairly, the rolloff fre- quencies of the individual sections should be adjusted so that the overall 3dB point is always at the same frequency. The other graphs in Figure 5.2, as well as the next few graphs in this chapter, are all "normalized" in frequency, meaning that the -3dB point frequency (Hz) A L I I I 0 1 2 3 normallzed frequency B normaltzed frequency (log scale) C Figure 5.2. Frequency responses of multisec- tion RCfilters. GraphsA and Bare linear plots, whereas C is logarithmic. The filter responses in B and C have been normalized (or scaled) for 3dB attenuation at unit frequency.
- 215. ACTIVE FILTERS 5.02 Ideal performance with LC filters 265 frequency (kHz) Figure 5.3. An unusually good passive bandpass filter implemented from inductorsand capacitors (inductances in mH,capacitances in pF). Bottom: Measured response of the filter circuit. [Based on Figs. 11 and 12 from Orchard, H. J., and Sheahan,D. E, ZEEE Journal of Solid-State Circuits, Vol. SC-5, NO. 3 (1970).] (or breakpoint, howeverdefined) is at a fre- quency of 1 radian per second (or at 1Hz). To determine the response of a filter whose breakpoint is set at some other frequency, simply multiply the values on the frequen- cy axis by the actual breakpoint frequency f,. In general, we will also stick to the log-log graph of frequency response when talking about filters, because it tells the most about the frequency response. It lets you see the approach to the ultimate rolloff slope, and it permits you to read off accurate values of attenuation. In this case (cascaded RC sections) the normal- ized graphs in Figures 5.2B and 5.2C dem- onstrate the soft knee characteristic of pas- sive RC filters. 5.02 Ideal performance with LC filters As we pointed out in Chapter 1, filters made with inductors and capacitors can have very sharp responses. The parallel LC resonant circuit is an example. By including inductors in the design, it is pos- sible to create filters with any desired flat- ness of passband combined with sharpness of transition and steepness of falloff out- side the band. Figure 5.3 shows an exam- ple of a telephone filter and its character- istics. Obviously the inclusion of inductors in- to the design brings about some magic that cannot be performed without them. In the terminology of network analysis, that magicconsists in the use of "off-axis poles." Even so, the complexity of the filter in- creases according to the required flatness of passband and steepness of falloff outside the band, accounting for the large number of components used in the preceding fil- ter. The transient response and phase-shift characteristics are also generally degraded as the amplitude response is improved to
- 216. ACTIVE FILTERS AND OSCILLATORS 266 Chapter 5 approach the ideal brick-wall characteris- tic. The synthesis of filters from passive components (R, L, C) is a highly devel- oped subject, as typified by the authorita- tive handbook by Zverev (see chapter ref- erences at end of book). The only problem is that inductors as circuit elements fre- quently leave much to be desired. They are often bulky and expensive, and they de- part from the ideal by being"lossy," i.e., by having significant series resistance, as well as other "pathologies" such as nonlinear- ity, distributed winding capacitance, and susceptibility to magnetic pickup of inter- ference. What is needed is a way to make inductorless filters with the characteristics of ideal RLC filters. 5.03 Enter active filters: an overview By using op-amps as part of the filter de- sign, it is possible to synthesize any RLC filter characteristic without using induc- tors. Such inductorless filters are known as active filters because of the inclusion of an active element (the amplifier). Active filters can be used to make low- pass, high-pass, bandpass, and band-reject filters, with a choice of filter types accord- ing to the important features of the re- sponse, e.g., maximal flatness of passband, steepness of skirts, or uniformity of time delay versusfrequency (more on this short- ly). In addition, "all-pass filters" with flat amplitude response but tailored phase ver- sus frequency can be made (they'ie also known as"delay equalizers"), as well as the opposite - a filter with constant phase shift but tailored amplitude response. Negative-impedance converters and gyrators Two interesting circuit elements that should be mentioned in any overview are the negative-impedance converter (NIC) and the gyrator. These devices can mimic the properties of inductors, while using only resistors and capacitors in addition to op-amps. Once you can do that, you can build in- ductorless filters with the ideal properties of any RLC filter, thus providing at least one way to make active filters. The NIC converts an impedance to its negative, whereas the gyrator converts an impedance to its inverse. The followingex- ercises will help you discover for yourself how that works out. EXERCISE 5.1 Show that the circuit in Figure 5.4 is a negative- impedance converter, in particular that Zin = -2. Hint: Apply some input voltage V, and compute the input current I. Thentakethe ratio to find Zin= V / I . Figure 5.4. Negative-impedanceconverter. R2 Z," = 7 R - NIC - T 11 Figure 5.5 EXERCISE 5.2 Show that the circuit in Figure 5.5 is a gyrator, in particular that Zin = R2/Z. Hint: You can analyzeit as a set of voltagedividers,beginning at the right.
- 217. ACTIVE FILTERS 5.04 Key filter performance criteria 265 The NIC therefore converts a capacitor to a "backward" inductor: i.e., it is inductive in the sense of generat- ing a current that lags the applied voltage, but its impedance has the wrong frequency dependence (it goes down, instead of up, with increasing frequency). The gyrator, on the other hand, converts a capacitor to a true inductor: i.e., an inductor with inductance L = CR2 . The existence of the gyrator makes it intuitively reasonable that inductorless fil- ters can be built to mimic any filter us- ing inductors: Simply replace each induc- tor by a gyrated capacitor. The use of gyrators in just that manner is perfectly OK, and in fact the telephone filter illus- trated previously was built that way. In ad- dition to simple gyrator substitution into preexisting RLC designs, it is possible to synthesize many other filterconfigurations. The field of inductorless filter design is ex- tremely active, with new designs appearing in the journals every month. Sallen-and-Key filter Figure 5.6 shows an example of a simple and even partly intuitive filter. It is known as a Sallen-and-Key filter, after its inven- tors. The unity-gain amplifier can be an op-amp connected as a follower, or just an emitter follower. This particular filter is a 2-pole high-pass filter. Note that it would be simply two cascaded RC high-pass fil- ters except for the fact that the bottom of the first resistor is bootstrapped by the out- put. It is easy to see that at very low fre- quencies it falls off just like a cascaded RC, since the output is essentially zero. As the output rises at increasing frequency, how- ever, the bootstrap action tends to reduce the attenuation, giving a sharper knee. Of course, such hand-waving cannot substi- tute for honest analysis, which luckily has already been done for a prodigious variety of nice filters. We will come back to active filter circuits in Section 5.06. Figure 5.6 5.04 Key filter performance criteria There are some standard terms that keep appearing when we talk about filters and try to specify their performance. It is worth getting it all straight at the beginning. Frequency domain The most obvious characteristic of a filter is its gain versus frequency, typified by the sort of low-pass characteristic shown in Figure 5.7. The passband is the region of frequen- cies that are relatively unattenuated by the filter. Most often the passband is con- sidered to extend to the -3dB point, but with certain filters(most notably the "equi- ripple"types) the end of the passband may be defined somewhat differently. Within the passband the response may show vari- ations or ripples, defining a ripple band, as shown. The cutoffrequency, f,, is the end of the passband. The response of the filter then drops off through a transition region (alsocolorfullyknown as the skirt of the fil- ter's response) to a stopband, the region of significant attenuation. The stopband may be defined by some minimum attenuation, e.g., 40dB. Along with the gain response, the other parameter of importance in the frequency
- 218. ACTIVE FILTERS AND OSCILLATORS 268 Chapter 5 ripple 4 1band c Ip :itsi rion region log frequency -A frequency (linear) - frequency (linear) ----t Figure 5.7. Filter characteristics versus frequency. graph of phase shift and amplitude for a low-pass filter that is definitely not a linear- phase filter. Graphs of phase shift versus frequency are best plotted on a linear- frequency axis. domain is the phase shift of the output terms for some undesirable properties of signal relative to the input signal. In other filters. words, we are interested in the complex response of the filter, which usually goes - Time domain by the name of H(s), where s = jw, where s - M H, s, and w all are complex. Phase is ;, 0.8 important because a signal entirely within -$ - the passband of a filter will emerge with 0.6 - its waveform distorted if the time delay of "a - 0.4 different frequencies in going through the u filter is not constant. Constant time delay ,z0.2- corresponds to a phase shift increasing " E, linearly with frequency; hence the term I As with any ac circuit, filters can be described in terms of their time-domain properties: rise time, overshoot, ringing, and settling time. This is of particular importance where steps or pulses may be used. Figure 5.9 shows a typical low- pass-filter step response. Here, rise time is the time required to reach 90% of the final value, whereas settling time is the time required to get within some specified amount of the final value and stay there. Overshoot and ringing are self-explanatory 4n 3n :a .- p- 2~ c c I - n rma o Figure 5.8. Phase and amplitude response for an 8-pole Chebyshev low-pass filter (2dB passband ripple). 0 linear-phase $filter applied to a filter ideal 0.5 1.O 1.5 2.0 normalized frequency in this respect. Figure 5.8 shows a typical (linear scale) 5.05 Filter types Suppose you want a low-pass filter with flat passband and sharp transition to the stopband. The ultimate rate of falloff, well into the stopband, will always be 6ndBloctave, where n is the number of "poles." You need one capacitor (or inductor) for each pole, so the required ultimate rate of falloff of filter response determines, roughly, the complexity of the filter. Now, assume that you have decided to use a 6-pole low-pass filter. You are guaranteed an ultimate rolloff of 36dBl octave at high frequencies. It turns out
- 219. ACTIVE FILTERS 5.05 Filter types 269 15% 1over,sbot settle to 5% time ----c Figure 5.9 that the filter design can now be optimized for maximum flatness of passband re- sponse, at the expense of a slow transition from passband to stopband. Alternatively, by allowing some ripple in the passband characteristic, the transition from pass- band to stopband can be steepened con- siderably. A third criterion that may be important is the ability of the filter to pass signalswithin the passband without distor- tion of their waveforms caused by phase shifts. You may also care about rise time, overshoot, and settling time. There are filter designs available to opti- mize each of these characteristics, or com- binations of them. In fact, rational filter selection will not be carried out as just de- scribed; rather, it normally begins with a set of requirements on passband flatness, attenuation at some frequency outside the passband, and whatever else matters. You will then choose the best design for the job, using the number of poles necessary to meet the requirements. In the next few sections we will introduce the three popu- lar favorites, the Butterworth filter (max- imally flat passband), the Chebyshev fil- ter (steepest transition from passband to stopband), and the Bessel filter (maximally flat time delay). Each of these filter re- sponses can be produced with a variety of different filter circuits, some of which we will discuss later. They are all available in low-pass, high-pass, and bandpass ver- sions. Butterworth and Chebyshev filters The Butterworth filter produces the flattest passband response, at the expense of steep- ness in the transition region from passband to stopband. As you will see later, it also has poor phase characteristics. The ampli- tude response is given by where n is the order of the filter (number of poles). Increasing the number of poles flattens the passband response and steep- ens the stopband falloff,as shown in Figure 5.10. normalized frequency Figure 5.10. Normalized low-pass Butterworth- filter response curves. Note the improved attenuation characteristics for the higher-order filters. The Butterworth filter trades off every- thing else for maximum flatness of re- sponse. It starts out extremely flat at zero frequency and bends over near the cut- off frequency fc (fc is usually the -3dB point). In most applications, all that really mat- ters is that the wiggles in the passband re- sponse be kept less than some amount, say 1dB. The Chebyshev filter responds to this reality by allowing some ripples through- out the passband, with greatly improved
- 220. ACTIVE FILTERS AND OSCILLATORS 270 Chapter 5 sharpness of the knee. A Chebyshev filter is specified in terms of its number of poles and passband ripple. By allowing greater passband ripple, you get a sharper knee. The amplitude is given by where C, is the Chebyshev polynomial of the first kind of degree n, and 6 is a constant that sets the passband ripple. Like the Butterworth, the Chebyshev has phase characteristics that are less than ideal. normalized frequency A normalized frequency Figure 5.11. Comparison of some common 6-pole low-pass filters. The same filters are plotted on both linear and logarithmicscales. Figure 5.11 presents graphs comparing the responses of Chebyshev and Butter- worth 6-pole low-pass filters. As you can see, they're both tremendous improve- ments over a 6-pole RC filter. Actually, the Butterworth, with its max- imally flat passband, is not as attractive as it might appear, since you are always accepting some variation in passband re- sponse anyway (with the Butterworth it is a gradual rolloff near f,, whereas with the Chebyshev it is a set of ripples spread throughout the passband). Furthermore, active filters constructed with components of finite tolerance will deviate from the predicted response, which means that a real Butterworth filter will exhibit some passband ripple anyway. The graph in Fig- ure 5.12 illustrates the effectsof worst-case variations in resistor and capacitor values on filter response. frequency (linear) ---, Figure 5.12. The effect of component tolerance on active filter performance. Viewed in this light, the Chebyshev is a very rational filter design. It is some- times called an equiripple filter: It man- ages to improve the situation in the transi- tion region by spreading equal-size ripples throughout the passband, the number of ripples increasing with the order of the fil- ter. Even with rather small ripples (aslittle as 0.ldB) the Chebyshev filter offers con- siderably improved sharpness of the knee
- 221. ACTIVE FILTERS 5.05 Filter types 271 -m VI 01 C.- m0) I 1 fCYtOff fEIOP Figure 5.13. Specifying filter fre- frequency (log scale) - quency response parameters. as compared with the Butterworth. To make the improvement quantitative, sup- pose that you need a filter with flatness to O.ldB within the passband and 20dB at- tenuation at a frequency 25% beyond the top of the passband. By actual calculation, that will require a 19-pole Butterworth, but only an 8-pole Chebyshev. The idea of accepting some passband ripple in exchange for improved steep- ness in the transition region, as in the equi- ripple Chebyshev filter, is carried to its log- ical limit in the so-called elliptic (or Cauer) filter by trading ripple in both passband and stopband for an even steeper tran- sition region than that of the Chebyshev filter. With computer-aided design tech- niques, the design of elliptic filters is as straightforward as for the classic Butter- worth and Chebyshev filters. Figure 5.13 shows how you specify fil- ter frequency response graphically. In this case (a low-pass filter) you indicate the al- lowable range of filter gain (i.e., the ripple) in the passband, the minimum frequen- cy at which the response leaves the pass- band, the maximum frequency at which the response enters the stopband, and the minimum attenuation in the stop- band. Bessel filter As we hinted earlier, the amplitude re- sponse of a filter does not tell the whole story. A filter characterized by a flat ampli- tude response may have large phase shifts. The result is that a signal in the passband will suffer distortion of its waveform. In situations where the shape of the wave- form is paramount, a linear-phase filter (or constant-time-delay filter) is desirable. A filter whose phase shift varies linearly with frequency is equivalent to a constant time delay for signals within the passband, i.e., the waveform is not distorted. The Bessel filter (alsocalled the Thomson filter) had maximally flat time delay within its passband, in analogy with the Butterworth, which has maximally flat amplitude re- sponse. To see the kind of improvement in time-domain performance you get with the Bessel filter, look at Figure 5.14 for a com- parison of time delay versus normalized frequency for 6-pole Bessel and Butter- worth low-pass filters. The poor time-delay performance of the Butterworth gives rise to effects such as overshoot when driven with pulse signals. On the other hand, the price you pay for the Bessel's constancy of time delay is an amplitude response
- 222. ACTIVE FILTERS AND OSCILLATORS 272 Chapter 5 with even less steepness than that of the Butterworth in the transition region between passband and stopband. frequency (radiansisor w ) Figure 5.14. Comparison of time delays for 6-pole Bessel and Butterworth low-pass filters. The excellent time-domain performance of the Bessel filter minimizes waveform distor- tion. There are numerous filter designs that attempt to improve on the Bessel's good time-domain performance by compromis- ing some of the constancy of time delay for improved rise time and amplitude-versus- frequency characteristics. The Gaussian filter has phase characteristics nearly as good as those of the Bessel, with improved step response. In another class there are in- teresting filters that allow uniform ripples in the passband time delay (in analogy with the Chebyshev's ripples in its amplitude re- sponse) and yield approximately constant time delays even for signals well into the stopband. Another approach to the prob- lem of getting filters with uniform time de- lays is to use all-pass filters, also known as delay equalizers. These have constant amplitude response with frequency, with a phase shift that can be tailored to in- dividual requirements. Thus, they can be used to improve the time-delay constancy of any filter, including Butterworth and Chebyshev types. Filter comparison In spite of the preceding comments about the Bessel filter's transient response, it still has vastly superior properties in the time domain, as compared with the Butterworth and Chebyshev. The Chebyshev, with its highly desirable amplitude-versus-frequen- cy characteristics, actually has the poor- est time-domain performance of the three. The Butterworth is in between in both fre- quency and time-domain properties. Table 5.1 and Figure 5.15 give more information about time-domain performance for these three kinds of filters to complement the frequency-domain graphs presented earlier. They make it clear that the Bessel is a very desirable filter where performance in the time domain is important. % 0 F: '-6-pole Chebyshev (0.5dB ripple) E '6-pole Butterworth '6-pole Bessel cm 0 0.5 1.0 1.5 2.0 2.5 3.0 time (s) Figure 5.15. Step-response comparison for 6- pole low-pass filters normalized for 3dB atten- uation at 1Hz. ACTIVE FILTER CIRCUITS A lot of ingenuity has been used in invent- ing clever active circuits, each of which can be used to generate response functions such as the Butterworth, Chebyshev, etc. You might wonder why the world needs more than one active filter circuit. The reason is that various circuit realizations excel in one or another desirable property, so there is no all-around best circuit. Some of the features to look for in active filters are (a) small numbers of parts, both
- 223. ACTIVE FILTER CIRCUITS 5.06 VCVS circuits 273 TABLE 5.1. TIME-DOMAIN PERFORMANCE COMPARISON FOR LOW-PASS FILTERSa Step Settling time Stopband attenuation rise time Over- f 3 d ~ (0 to 90%) shoot to 1% to 0.1% f = 2f, f = lof, Type (Hz) Poles (s) (%I (s) (S) (dB) (dB) Bessel 1.O 2 0.4 0.4 0.6 1.1 10 36 (-3.0dBat 1.0 4 0.5 0.8 0.7 1.2 13 66 f, = 1.OHz) 1.0 6 0.6 0.6 0.7 1.2 14 92 1.O 8 0.7 0.3 0.8 1.2 14 114 Butterworth 1.0 2 0.4 4 0.8 1.7 12 40 (-3.0dBat 1.0 4 0.6 11 1.0 2.8 24 80 f, = 1.OHz) 1.0 6 0.9 14 1.3 3.9 36 120 1.O 8 1.1 16 1.6 5.1 48 160 Chebyshev 1.39 2 0.4 11 1.1 1.6 8 37 0.5dB ripple 1.09 4 0.7 18 3.0 5.4 31 89 (-0.5dBat 1.04 6 1.1 21 5.9 10.4 54 141 f, = 1.OHz) 1.02 8 1.4 23 8.4 16.4 76 193 Chebyshev 1.07 2 0.4 21 1.6 2.7 15 44 2.0dB ripple 1.02 4 0.7 28 4.8 8.4 37 96 (-2.0dBat 1.01 6 1.1 32 8.2 16.3 60 148 f, = 1.OHz) 1.01 8 1.4 34 11.6 24.8 83 200 (a) a design procedure for these filters is presented in Section 5.07. active and passive,(b) ease of adjustability, (c) small spread of parts values, especially the capacitor values, (d) undemanding use of the op-amp, especially requirements on slew rate, bandwidth, and output imped- ance, (e) the ability to make high-Q fil- ters, and (f)sensitivity of filter characteris- tics to component values and op-amp gain (in particular, the gain-bandwidth product, fT).In many ways the last feature is one of the most important. A filter that requires parts of high precision is difficult to ad- just, and it will drift as the components age; in addition, there is the nuisance that it requires components of good initial ac- curacy. The VCVS circuit probably owes most of its popularity to its simplicity and its low parts count, but it suffers from high sensitivity to component variations. By comparison, recent interest in more com- plicated filter realizations is motivated by the benefits of insensitivity of filter prop- erties to small component variability. In this section we will present several circuits for low-pass, high-pass, and band- pass active filters. We will begin with the popular VCVS, or controlled-source type, then show the state-variable designs avail- able as integrated circuits from several manufacturers, and finally mention the twin-T sharp rejection filter and some in- teresting new directions in switched- capacitor realizations. 5.06 VCVS circuits The voltage-controlled voltage-source (VCVS) filter, also known simply as a controlled-source filter, is a variation of the Sallen-and-Keycircuit shown earlier. It re- places the unity-gain follower with a non- inverting amplifier of gain greater than 1. Figure 5.16 shows the circuits for low-pass, high-pass, and bandpass realizations. The resistors at the outputs of the op-amps create a noninverting voltage amplifier
- 224. ACTIVE FILTERS AND OSCILLATORS 274 Chapter 5 (dc-coupled) I- low-pass filter high-pass filter 1-- band~assfilter Figure 5.16. VCVS active filter circuits. of voltage gain K, with the remaining Rs and Cs contributing the frequency re- sponse properties for the filter. These are 2-pole filters, and they can be Butterworth, Bessel, etc., by suitable choice of compo- nent values, as we will show later. Any number of VCVS 2-pole sections may be cascaded to generate higher-order filters. When that is done, the individual filter sec- tions are, in general, not identical. In fact, each section represents a quadratic poly- nomial factor of the nth-order polynomial describing the overall filter. There are design equations and tables in most standard filter handbooks for all the standard filter responses, usually including separate tables for each of a number of ripple amplitudes for Chebyshev filters. In the next section we will present an easy-to-use design table for VCVS filters of Butterworth, Bessel, and Chebyshev responses (0.5dB and 2dB passband ripple for Chebyshev filters) for use as low-pass or high-pass filters. Bandpass and band- reject filters can be easily made from combinations of these. 5.07 VCVS filter design using our simplified table To use Table 5.2, begin by deciding which filter response you need. As we mentioned earlier, the Butterworth may be attractive if maximum flatness of passband is de- sired, the Chebyshev gives the fastest roll- off from passband to stopband (at the TABLE 5.2. VCVS LOW-PASSFILTERS Chebyshev Chebyshev Butter- Bessel (0.5dB) (2.0dB) 4 worth0 P K f n K f n K f n K 2 1.586 1.272 1.268 1.231 1.842 0.907 2.114
- 225. ACTIVE FILTER CIRCUITS 5.07 VCVS filter design using our simplified table 275 expense of some ripple in the passband), and the Bessel provides the best phase char- acteristics, i.e., constant signal delay in the passband, with correspondingly good step response. The frequency responses for all types are shown in the accompanying graphs (Fig. 5.17). To construct an n-pole filter (n is an even number), you will need to cascade n/2 VCVS sections. Only even-order filters are shown, since an odd-order filter requires as many op-amps as the next higher-order filter. Within each section, R1 = R2 = R, and C1 = Cz = C. As is usual in op-amp circuits, R will typically be chosen in the range 10k to 100k. (It is best to avoid small resistor values, because the rising open-loop output impedance of the op-amp at high frequencies adds to the resistor valuesand upsets calculations.) Then all you need to do is set the gain, K , of each stage according to the table entries. For an n-pole filter there are n/2 entries, one for each section. Butterworth low-pass filters If the filter is a Butterworth, all sections have the same values of R and C, given simply by R C = 1127~f,, where f, is the desired -3dB frequency of the entire filter. To make a 6-pole low-pass Butterworth filter, for example, you cascade three of the low-pass sections shown previously, with gains of 1.07, 1.59, and 2.48 (preferably in that order, to avoid dynamic range problems), and with identical Rs and Cs to set the 3dB point. The telescope drive circuit in Section 8.31 shows such an example, with f, = 88.4Hz (R = 180k, C = 0.OlpF). Bessel and Chebyshev low-pass filters To make a Bessel or Chebyshev filter with the VCVS, the situation is only slightly more complicated. Again we cascade sev- eral 2-pole VCVS filters, with prescribed gains for each section. Within each sec- tion we again use R1 = R2 = R, and C1 = C2 = C. However, unlike the sit- uation with the Butterworth, the RC prod- ucts for the different sections are different and must be scaled by the normalizing fac- tor fn (given for each section in Table 5.2) according to R C =l12.rrfnf,. Here fc is again the -3dB point for the Bessel filter, whereas for the Chebyshev filter it defines the end of the passband, i.e., it is the fre- quency at which the amplitude response falls out of the ripple band on its way into the stopband. For example, the response of a Chebyshev low-pass filter with 0.5dB ripple and fc = lOOHz will be flat within +OdB to -0.5dB from dc to 100Hz, with 0.5dB attenuation at lOOHz and a rapid falloff for frequencies greater than 1OOHz. Values are given for Chebyshev filters with 0.5dB and 2.0dB passband ripple; the lat- ter have a somewhat steeper transition into the stopband (Fig. 5.17). High-pass filters To make a high-pass filter, use the high- pass configuration shown previously, i.e., with the Rs and Cs interchanged. For But- terworth filters, everything else remains unchanged (use the same values for R, C, and K). For the Bessel and Chebyshev fil- ters, the K values remain the same, but the normalizing factors f, must be inverted, i.e., for each section the new fn equals ll(fn listed in Table 5.2). A bandpass filter can be made by cas- cading overlapping low-pass and high-pass filters. A band-reject filter can be made by summing the outputs of nonoverlap- ping low-pass and high-pass filters. How- ever, such cascaded filters won't work well for high-Q filters (extremely sharp band- pass filters) because there is great sensi- tivity to the component values in the in- dividual (uncoupled) filter sections. In such cases a high-Q single-stage bandpass circuit (e.g., the VCVS bandpass circuit
- 226. ACTIVE FILTERS AND OSCILLATORS 276 Chapter 5 0.1 1.o 10 normalized frequency A normallzed frequency B 1.o (2.0dB ripple) normalized frequency normalized frequency D Figure 5.17. Normalized frequency response graphs for the 2-, 4-, 6-, and 8-pole filters in Table 5.2. The Butterworth and Bessel filters are normalized to 3dB attenuation at unit frequency, whereas the Chebyshev filters are normalized to 0.5dB and 2dB attenuations. illustrated previously, or the state-variable sensitivity to component values and am- and biquad filters in the next section) plifier gain, and they don't lend themselves should be used instead. Even a single-stage well to applications where a tunable filter 2-pole filter can produce a response with of stable characteristics is needed. an extremely sharp peak. ~nformation on such filter design is available in the standard references. VCVS filters minimize the number of components needed (2 poleslop-amp) and offer the additional advantages of nonin- verting gain, low output impedance, small spread of component values, easy adjusta- EXERCISE 5.3 Design a 6-pole Chebyshev low-pass VCVS filter with a 0.5dB passband ripple and lOOHz cutoff frequency fc. What is the attenuation at 1.5fc? 5.08 State-variable filters bility of gain, and the ability to operate at The 2-pole filter shown in Figure 5.18 is high gain or high Q. They suffer from high far more complex than the VCVS circuits,
- 227. ACTIVE FILTER CIRCUITS 5.08 State-variablefilters 277 bandpass &- Figure 5.18. State-variable active filter. but it is popular because of its improved stability and ease of adjustment. It is called a state-variable filter and is available as an IC from National (the AFlOO and AF150), Burr-Brown (the UAF series), and others. Because it is a manufactured module, all components except RG, RQ, and the two RFS are built in. Among its nice properties is the availability of high-pass, low-pass, and bandpass outputs from the same circuit; also, its frequency can be tuned while maintaining constant Q (or, alternatively, constant bandwidth) in the bandpass characteristic. As with the VCVS realizations, multiple stages can be cascaded to generate higher-order filters. Extensivedesign formulas and tables are provided by the manufacturers for the use of these convenient ICs. They show how to choose the external resistor values to make Butterworth, Bessel, and Chebyshev filters for a wide range of filter orders, for low-pass, high-pass, bandpass, and band- reject responses. Among the nice features of these hybrid ICs is integration of the capacitors into the module, so that only external resistors need be added. Bandpass filters The state-variable circuit, in spite of its large number of components, is a good choice for sharp (high-Q) bandpass filters. It has low component sensitivities, does not make great demands on op-amp band- width, and is easy to tune. For example, in the circuit of Figure 5.18, used as a band- pass filter, the two resistors RF set the cen- ter frequency, while RQ and RG together determine the Q and band-center gain: RF = 5.03 x 107/fo ohms RQ = 105/(3.48~+G - 1) ohms RG= 3.16 x ~ O ~ Q / Gohms So you could make a tunable-frequency, constant-Q filter by using a 2-section vari- able resistor (pot) for RF. Alternatively, you could make RQadjustable, producing a fixed-frequency, variable-Q (and, unfor- tunately, variable-gain) filter.
- 228. ACTIVE FILTERS AND OSCILLATORS 278 Chapter 5 (Figure 5.19. -- dently settable bandpass out A filter gain and C -- 4- C input bandpass - -- Figure 5.20. Biquad with Q. active filter. indepen- EXERCISE 5.4 Calculateresistor values in Figure5.18 to make a bandpass filter with fo = 1kHz, Q = 50, and G = 10. Figure 5.19 shows a useful variant of the state-variable bandpass filter. The bad news is that it uses four op-amps; the good news is that you can adjust the bandwidth (i.e., Q) without affecting the midband gain. In fact, both Q and gain are set with a single resistor each. Q, gain, and center frequency are completely independent and are given by these simple equations: Biquad filter. A close relative of the state variable filter is the so-called biquad fil- ter, shown in Figure 5.20. This circuit also uses three op-amps and can be con- structed from the state-variable ICs men- tioned earlier. It has the interesting prop- erty that you can tune its frequency (via RF) while maintaining constant bandwidth (rather than constant Q). Here are the de- sign equations: fo = 1/2rRFC BW = 1/2rRBC G = RB/RG fo = 1/2?rR~C The Q is given by fo/BW and equals & = R ~ / R Q RB/RF. AS the center frequency is varied G = R1/& (via RF), the Q varies proportionately, R x 1Ok(noncritical, matched) keeping the bandwidth Qfo constant.
- 229. ACTIVE FILTER CIRCUITS 5.09 Twin-T notch filters 279 When you design a biquad filter from Higher order bandpass filters scratch (rather than with an active filter IC As with our earlier low-pass and high-that already contains most of the parts), the general procedure goes something like pass filters, it is possible to build higher this: order bandpass filters with approximately I. Choose an op-amp whose bandwidth fT flat bandpass and steep transition to the is at least 10 to 20 times Gfo. stopband. You do this by cascading several lower- 2* Pick a rOund-number in order bandpass filters,the tai- the vicinity of lored to realize the desired filter type (But-- - . C = lo/ fo p F terworth, Chebyshev, or whatever). As be- fore, the Butterworth is "maximally flat," 3. Use the desired center frequency to whereas the Chebyshev sacrifices passband calculate the corresponding RF from the flatness for steepness of skirts. Both the first equation given earlier. VCVS and state-variablelbiquad bandpass 4. Use the desired bandwidth to calculate filters just considered are second order RE from the second equation given ear- (two pole). As You increase the filtersharp- lier. ness by adding sections, you generally de- 5. Use the desired band-center gain to grade the transient response and phase calculate RGfrom the third equation given characteristics. The "bandwidth7 ' of a earlier. bandpass filter is defined as the width be- You may have to adjust the capacitor tween -3dB points, except for e q u i r i ~ ~ l e value if the resistor values become awk- filters, for which it is the width between wardly large or small. F~~instance, in frequencies at which the response falls out a high-Q filter you may need to increase the passband C somewhat to keep RE from becoming Can find tables and design proce- too large (or you can use the T-network dLlres for constructing complex filters in trick described in section 4-19). N~~~that standard books on active filters, or in the RF, RE,and RGeach act as op-amp loads, data sheets for active filter ICs. There are and should not become less than, say, 5k, also some very nice filter design programs when jugglingcomponent values, you may that run on inexpensive workstations (IBM find it easier to satisfy requirement 1 PC, Macintosh). by decreasingintegrator gain (increase RF) and simultaneously increasingthe inverter- 5-09 Twin-T notch filters stage gain (increase the 10kfeedback resis- tor). The passive RC network shown in Figure As an example, suppose we want to 5.21 has infinite attenuation at a frequency make a filter with the same characteristics fc = 1/2rRC- Infinite attenuation is as in the last exercise. We would begin by provisionally choosing C = 0.01pE Then we find RF = 15.9k (fo = 1kHz) and RE = 796k (Q = 50; BW=20Hz). Finally, in RG = 79.6k (G = 10). I,'qoEXERCISE 5.5 'Ti- Designa biquadbandpassfilter with fo= 60Hz, - BW=1 Hz, and G = 100. Figure 5.21. Passive twin-T notch filter.
- 230. ACTIVE FILTERS AND OSCILLATORS 280 Chapter 5 uncharacteristic of RC filters in general; this one works by effectively adding two signals that have been shifted 180" out of phase at the cutoff frequency. It requires good matching of components in order to obtain a good null at f,. It is called a twin-T, and it can be used to remove an interfering signal, such as 6OHz power- line pickup. The problem is that it has the same "soft" cutoff characteristics as all passive RC networks, except, of course, near f,, where its response drops like a rock. For example, a twin-T driven by a perfect voltage source is down lOdB at twice (or half) the notch frequency and 3dB at four times (or one-fourth) the notch frequency. One trick to improve its notch characteristic is to "activate" it in the manner of a Sallen-and-Key filter (Fig. 5.22). This technique looks good in principle, but it is generally disappointing in practice, owing to the impossibility of maintaining a good filter null. As the filter notch becomes sharper (more gain in the bootstrap), its null becomes less deep. Twin-T filters are available as prefab modules, going from 1Hz to SOkHz, with notch depths of about 60dB (with some de- terioration at high and low temperatures). They are easy to make from components, but resistors and capacitors of good stabil- ity and low temperature coefficient should be used to get a deep and stable notch. One of the components should be made trimmable. The twin-T filter works fine as a fixed- frequency notch, but it is a horror to make tunable, since three resistors must be si- multaneously adjusted while maintaining constant ratio. However, the remarkably simple RC circuit of Figure 5.23A, which behaves just like the twin-T, can be ad- justed over a significant range of frequency (at least two octaves) with a single poten- tiometer. Like the twin-T (and most active filters) it requires some matching of com- ponents; in this case the three capacitors must be identical, and the fixed resistor must be exactly six times the bottom (ad- justable) resistor. The notch frequency is then given by fnotch = 1 1 2 ~ ~JZZ Figure 5.23B shows an implementation that is tunable from 25Hz to 100Hz. The 50k trimmer is adjusted (once) for maximum depth of notch. As with the passive twin-T, this filter (known as a bridged diferentiator) has a gently sloping attenuation away from the notch and infinite attenuation (assuming perfect matching of component values) at the notch frequency. It, too, can be "activated," by bootstrapping the wiper of the pot with a voltage gain somewhat less than unity (as in Fig. 5.22). Increasing
- 231. ACTIVE FILTER CIRCUITS 5.11 Switched capacitor filters 281 trim ~n A out 50k 10% 464k 1% Figure 5.23. Bridged differentiator tunable- notch filter. The implementation in B tunes from 25Hz to 100Hz. the bootstrap gain toward unity narrows the notch, but also leads to an undesirable response peak on the high frequency side of the notch, along with a reduction in ultimate attenuation. 5.10 Gyrator filter realizations An interesting type of active filter is made with gyrators; basically they are used to substitute for inductors in traditional filter designs. The gyrator circuit shown in Figure 5.24 is popular. Z4will ordinarily be a capacitor, with the other impedances Figure 5.24. Gyrator. being replaced by resistors, creating an in- ductor L = k c , where k = R1R3R5/R2. It is claimed that these gyrator-substituted filtershave the lowest sensitivity to compo- nent variations, exactly analogous to their passive RLC prototypes. 5.11 Switched capacitor filters One drawback to these state-variable or biquad filters is the need for accurately matched capacitors. If you build the circuit from op-amps, you've got to get pairs of stable capacitors (not ceramic or electrolytic), perhaps matched as closely as 2% for optimum performance. You also have to make a lot of connections, since the circuits use at least three op- amps and six resistors for each 2-pole section. Alternatively, you can buy a filter IC, letting the manufacturer figure out how to integrate matched lOOOpF capacitors into his IC. IC manufacturers have solved those problems, but at a price: The AFlOO "Universal Active Filter" IC from National is a hybrid IC and costs about $10 apiece.
- 232. ACTIVE FILTERS AND OSCILLATORS 282 Chapter 5 - 1 V,,, = - [V,. dt- RC. Figure 5.25. A. Switched-capacitorintegrator B. conventional integrator. There's another way to implement the integrators that are needed in the state- variable or biquad filter. The basic idea is to use MOS analog switches, clocked from an externally applied square wave at some high frequency (typically 100 times faster than the analog signals of interest), as shown in Figure 5.25. In the figure, the funny triangular object is a digital inverter, which turns the square wave upside down so that the two MOS switches are closed on opposite halves of the square wave. The circuit is easy to analyze: When S1 is closed, C1 charges to G,, i.e., hold- ing charge CIQn; on the alternate half of the cycle, C1 discharges into the vir- tual ground, transferring its charge to C2. The voltage across C2 therefore changes by an amount AV = AQ/Cz = QnC1/C2. Note that the output voltagechange during each cycle of the fast square wave is pro- portional to Q, (which we assume changes only a small amount during one cycle of square wave), i.e., the circuit is an integra- tor! It is easy to show that the integrators obey the equations in the figure. EXERCISE 5.6 Derive the equations in Figure 5.25 There are two important advantages to using switched capacitors instead of con- ventional integrators. First, as hinted ear- lier, it can be less expensive to implement on silicon: The integrator gain depends only on the ratio of two capacitors, not on their individual values. In general it is easy to make a matched pair of any- thing on silicon, but very hard to make a similar component (resistor or capacitor) of precise value and high stability. As a result, monolithic switched-capacitor filter ICs are very inexpensive - National's uni- versal switched-capacitor filter (the MF10) costs $2 (compared with $10 for the con- ventional AF100) and furthermore gives you two filters in one package! The second advantage of switched- capacitor filters is the ability to tune the filter's frequency (e.g., the center frequency of a bandpass filter, or the -3dB point of a low-pass filter) by merely changing the frequency of the square wave ("clock") in- put. This is because the characteristic fre- quency of a state-variable or biquad filter is proportional to (and depends only on) the integrator gain. Switched-capacitor filters are available in both dedicated and "universal"configu- rations. The former are prewired with on- chip components to form bandpass or low- passfilters, while the latter have various in- termediate inputs and outputs brought out so you can connect external components to make anything you want. The price you pay for universality is a larger IC package and the need for external resistors. For ex- ample, National's self-contained MF4 But- terworth low-pass filter comes in an 8-pin DIP ($1.30), while their MF5 universal fil- ter comes in a 14-pin DIP ($ l .45), requir- ing 2 or 3 external resistors (depending on which filterconfiguration you choose). Fig- ure 5.26 shows just how easy it is to use the dedicated type.
- 233. ACTIVE FILTER CIRCUITS 5.11 Switched capacitor filters 283 sig l n , l - i n MF,-100 o u l l ~sig out (low-pass. f,,, = 1kHz) Figure 5.26 Now for the bombshell: Switched- capacitor filters have three annoying char- acteristics, all related and caused by the presence of the periodic clocking signal. First, there is clock feedthrough, the pres- ence of some output signal (typically about 1OmVto 25mV)at the clock frequency, in- dependent of the input signal. Usually this doesn't matter, because it is far removed from the signal band of interest. If clock feedthrough is a problem, a simple RC fil- ter usually gets rid of it. The second prob- lem is more subtle: If the input signal has any frequency components near the clock frequency, they will be"aliased" down into the passband. To state it precisely, any in- put signalenergy at a frequency that differs from the clock frequency by an amount corresponding to a frequency in the pass- band will appear (unattenuated!) in the passband. For example, if you use an MF4 as a lkHz low-pass filter (i.e., set fclock = lOOkHz), any input signal energy in the range of 99kHz- 101kHz will appear in the output band of dc-1kHz. No filter at the output can remove it! You must make sure the input signal doesn't have energy near the clock frequency. If this isn't natu- rally the case, you can usually use a simple RC filter, since the clock frequency is typi- cally quite far removed from the passband. The third undesirable effect in switched- capacitor filters is a general reduction in signal dynamic range (an increase in the "noise floor") due to incomplete cancella- tion of MOS switch charge injection (see Section 3.12). Typical filter ICs have dy- namic ranges of 80dB-90dB. Like any linear circuit, switched-capaci- tor filters (and their op-amp analogs) suf- fer from amplifier errors such as input off- set voltage and l/f low-frequency noise. These can be a problem if, for example, you wish to low-pass filter some low-level signal without introducing errors or fluc- tuations in its average dc value. A nice solution is provided by the clever folks at Linear Technology, who dreamed up the LTC1062 "DC Accurate Low-Pass Filter" (or the MAX280, with improved offset voltage). Figure 5.27 shows how you use it. The basic idea is to put the filter out- side the dc path, letting the low-frequency signal components couple passively to the output; the filter grabs onto the signal line only at higher frequencies, where it rolls off the response by shunting the signal to sig out I I L------,J fclk d k f 3 d ~= fclk/l O0 - ;v Figure 5.27. LTC1062 "dc-accurate"low-pass filter.
- 234. ACTIVE FILTERS AND OSCILLATORS 284 Chapter 5 ground. The result is zero dc error, and switched-capacitor-type noise only in the vicinity of the rolloff (Fig. 5.28). 0.1 1 1 0 100 l k 10k frequency (Hz) Figure 5.28 Switched-capacitor filter ICs are widely available, from manufacturers such as AMI-Gould, Exar, LTC, National, and EGG-Reticon. Typically you can put the cutoff (or band center) anywhere in the range of dc to a few tens of kilohertz, as set by the clock frequency. The characteristic frequency is a fixed multiple of the clock, usually 50fclk or 100fclk. Most switched- capacitor filter ICs are intended for low- pass, bandpass, or notch (band-stop) use, though a few (e.g., the AM1 3529) are de- signed as high-pass filters. Note that clock feedthrough and discrete (clock frequency) output waveform quantization effects are particularly bothersome in the latter case, since they're both in-band. OSCILLATORS 5.12 Introduction to oscillators Within nearly every electronic instrument it is essential to have an oscillator or wave- form generator of some sort. Apart from the obvious case of signal generators, func- tion generators, and pulsegenerators them- selves, a source of regular oscillations is necessary in any cyclical measuring instru- ment, in any instrument that initiates mea- surements or processes, and in any instru- ment whose function involves periodic states or periodic waveforms. That in- cludes just about everything. For exam- ple, oscillators or waveform generators are used in digital multimeters, oscilloscopes, radiofrequency receivers, computers, ev- ery computer peripheral (tape, disk, prin- ter, alphanumeric terminal), nearly every digital instrument (counters, timers, calcu- lators, and anything with a "multiplexed display"), and a host of other devices too numerous to mention. A device without an oscillator either doesn't do anything or expects to be driven by something else (which probably contains an oscillator). It is not an exaggeration to say that an oscil- lator of some sort is as essential an ingre- dient in electronics as a regulated supply of dc power. Depending on the application, an oscil- lator may be used simply as a source of regularly spaced pulses (e.g., a "clock" for a digital system), or demands may be made on its stability and accuracy (e.g., the time base for a frequency counter), its adjusta- bility (e.g., the local oscillator in a trans- mitter or receiver), or its ability to produce accurate waveforms (e.g., the horizontal- sweep ramp generator in an oscilloscope). In the following sections we will treat briefly the most popular oscillators, from the simple RC relaxation oscillators to the stable quartz-crystal oscillators. Our aim is not to survey everything in exhaustive detail, but simply to make you acquainted with what is available and what sorts of 0s- cillators are suitable in various situations. 5.13 Relaxation oscillators A very simple kind of oscillator can be made by charging a capacitor through a
- 235. OSCILLATORS 5.13 Relaxation oscillators 28: Figure 5.29. Op-amp relaxation oscillator. resistor (or a current source), then dis- charging it rapidly when the voltage reaches some threshold, beginning the cy- cle anew. Alternatively,the external circuit may be arranged to reverse the polarity of the charging current when the threshold is reached, thus generating a triangle wave rather than a sawtooth. Oscillators based on this principle are known as relaxation oscillators. They are inexpensive and sim- ple, and with careful design they can be made quite stable in frequency. In the past, negative-resistance devices such as unijunction transistors and neon bulbs were used to make relaxation oscil- lators, but current practice favors op-amps or special timer ICs. Figure 5.29 shows a classic RC relaxation oscillator. The oper- ation is simple: Assume that when power is first applied, the op-amp output goes to positive saturation (it's actually a toss-up which way it will go, but it doesn't mat- ter). The capacitor begins charging up to- ward V+, with time constant RC. When it reachesone-half the supply voltage, the op- amp switches into negative saturation (it's a Schmitt trigger), and the capacitor begins discharging toward V- with the same time constant. The cycle repeats indefinitely, with period 2.2RC, independent of sup- ply voltage. ACMOS output-stage op-amp (see Sections 4.11 and 4.22) was chosen because its outputs saturate cleanly at the supply voltages. The bipolar LMlO also swings rail-to-rail and, unlike CMOS op- amps, allows operation at a full f15 volts; however, it has a much lower fT (0.1MHz). EXERCISE 5.7 Show that the period is as stated. By using current sources to charge the capacitor, a good triangle wave can be generated. A clever circuit using that principle was shown in Section 4.29. "CMOS inverters" (each is of a 74HC04; 6 powered from + 5V) Figure 5.30 Sometimes you need an oscillator with very low noise content (also called "low sideband noise"). The simple circuit of Figure 5.30 is good in this respect. It uses a pair of CMOS inverters (a form of digital logic we'll use extensively in Chapters 8-11) connected together to form an RC relaxation oscillator with square wave output. Actual measurements
- 236. ACTIVE FILTERS AND OSCILLATORS 286 Chapter 5 74HCU04 (lower no~se 74HC04 (lower current1 Figure 5.31. Low-noise oscillator. on this circuit running at IOOkHz show close-in sideband noise power density (power per square root hertz, measured 1OOHz from the oscillator frequency), down at least 85dB rela- tive to the carrier. You sometimes see a similar circuit, but with Rz and C interchanged. Although it still oscillates fine, it is extremely noisy by compari- son. The circuit of Figure 5.31 has even lower noise and furthermore lets you modulate the output frequency via an external cur- rent applied to the base of Q1. In this circuit Q1operates as an integrator, gener- ating an asymmetrical triangle waveform at its collector. The inverters operate as a noninverting comparator, alternating the polarity of the base drive each half cy- cle. This circuit has close-in noise density of - 9 0 d B c / a measured lOOHz from the 15OkHz carrier, and -1 0 0 d ~ c / f i measured at an offset of 300Hz. Al- though these circuits excel in low side- band noise, the oscillation frequency has more supply-voltage sensitivity than other oscillators discussed in this chap- ter. 5.14 The classic timer chip: the 555 The next level of sophistication involves the use of timer or waveform-generator ICs as relaxation oscillators. The most popular chip around is the 555 (and its successors). It is also a misunderstood chip, and we intend to set the record straight with the equivalent circuit shown in Figure 5.32. Some of the symbols belong to the digital world (Chapter 8 and following), so you won't become a 555 expert for a while yet. But the operation is simple enough: The output goes HIGH (near Vcc) when the 555 receives a TRIGGER' input, and it stays there until the THRESHOLD input is driven, at which time the output goes LOW (near ground) and the DISCHARGE transistor is turned on. The TRIGGER' input is activated by an input level below iVcc, and the THRESHOLD is activated by an input level above Vcc. The easiest way to understand the work- ings of the 555 is to look at an example (Fig. 5.33). When power is applied, the capacitor is discharged; so the 555 is trig- gered, causing the output to go HIGH, the discharge transistor Q1 to turn
- 237. OSCILLATORS 5.14 The classic timer chip: the 555 28' ground 01 Figure 5.32. Simplified 555 schematic. 4 resetA 14 *- reset 3 555 out - lnr -threshold C A ground 0.1pF-r I1 Figure 5.33. The 555 connected as an oscillator. off, and the capacitor to begin charging toward 10 volts through RA+ RB. When it has reached $vcc, the THRESHOLD input is triggered, causing the output to go LOW and Q1 to turn on, discharging C toward ground through RB. Operation is now cyclic, with C's voltage going between $vcc and $vCC, with period T = 0.693(RA+ 2RB)C. The output you generally use is the square wave at the output. EXERCISE 5.8 Show that the period is as advertised,indepen- dent of supply voltage. The 555 makes a respectable oscillator, with stability approaching 1%. It can run from a single positive supply of 4.5 to 16 volts, maintaining good frequency stability with supply voltage variations because the thresholds track the supply fluctuations. The 555 can also be used to generate
- 238. ACTIVE FILTERS AND OSCILLATORS 288 Chapter 5 single pulses of arbitrary width, as well as a bunch of other things. It is really a small kit, containing comparators, gates, and flip-flops. It has become a game in the reset disch- - electronics industry to try to think of new lrs I O ~ H . uses for the 555. Suffice it to say that many - 4 ICL7555 trig _n_n_ succeed at this new form of entertainment. out,? = Acaution about the 555: The 555,along 6 thresh with some other timer chips, generates a grid big (c150mA)supply-current glitch during each output transition. Be sure to use -- a hefty bypass capacitor near the chip. 6.8k (W 1/1 Even so, the 555 may have a tendency to 1 ~ 9 1 4 generate double output transitions. 100: i= CMOS 555s Some of the less desirable properties of the 555 (high supply current, high trigger current, double output transitions, and inability to run with very low supply voltage) have been remedied in a collection of CMOS successors. You can recognize these by the telltale "555" somewhere in the part number. Table 5.3 lists most of these that we could find, along with their important specifications. Note particularly the ability to operate at very low supply voltage (down to IV!) and the generally low supply current. These chips also can run at higher frequency than the original 555. The CMOS output stages give rail- to-rail swing, at least at low load currents (but note that these chips don't have the output-current muscle of the standard 555). All chips listed are CMOS except for the original 555 and the XR-L555. The latter is intended as a bipolar low- power 555 and reveals its pedigree by the hefty output sourcing capability and good tempco. The 555 oscillator of Figure 5.33 gen- erates a rectangular-wave output whose duty cycle (fraction of time the output is HIGH) is always greater than 50°/o. That is because the timing capacitor is charged through the series pair RA + RB, but Figure 5.34. Low-duty-cycle oscillator. discharged (more rapidly) through RB aione. Figure 5.34 shows how to trick the 555 into giving you low duty-cycle posi- tive pulses. The diodelresistor combina- tion charges timing capacitor rapidly via the output, with slower discharge via the internal discharge transistor. You can only play this trick with a CMOS 555, because you need the full positive output swing. By using a current source to charge the timing capacitor, you can make a ramp (or "sawtooth-wave") generator. Figure 5.35 shows how, using a simple pnp current source. The ramp charges to $vcc, then discharges rapidly (through the 555's npn discharge transistor, pin 7) to SvcC, be- ginning the ramp cycle anew. Note that the ramp waveform appears on the capacitor terminal and must be buffered with an op- amp since it is at high impedance. In this circuit you could simplify things somewhat by using a JFET "current-regulator diode" (Section 3.06) in place of the pnp current source; however, the performance (ramp linearity) would be slightly degraded, be- cause a JFET operating at IDss is not as good a current source as the bipolar tran- sistor circuit. Figure 5.36 shows a simple way to
- 239. TABLE 5.3. 555-TYPE OSCILLATORS Supply curr supply per osc Trig, thresh Max freq lout,max Qty per voltage (V, = 5V) current (V, = 5V) v~,t, typ (V,=5V, Vo=2.5V) package Tempco Rail min max typ max typ max min typ typ VOH@lsrc VOL@lsnk to source sink Type Mfga 1 2 4 (V) (V) (PA) (PA) (nA) (nA) (MHz) (MHz) (pprnrC) (V) (rnA) (V) (rnA) rail?b (mA) (rnA) see footnotes to Table 4.1. (b) signifies that the output stage can swing to both rails. (') at Vs=l .2V
- 240. ACTIVE FILTERS AND OSCILLATORS 290 Chapter 5 0 . 0 l p F sawtooth out i--- Figure 5.35. Sawtooth oscillator. generate a triangle wave with a CMOS 555. Here we wired a pair of JFET current reg- ulators in series to generate a bidirectional current regulator (each current regulator behaves like a normal diode in the reverse direction, owing to gate-drain conduction). The rail-to-rail output swing thus generates a constant current, of alternating polarity, producing a triangle waveform (going be- tween the usual ;vcc and $vcc)at the capacitor. As before, you have to buffer the high-impedance waveform with an op- amp. Note that you must use a CMOS 555, particularly when operating the cir- cuit from +5 volts, since the circuit de- pends on a full rail-to-rail output swing. For example, the HIGH output of a bipo- lar 555 is typically 2 diode drops below the positive rail (npn Darlington follower), or +3.8 volts with a 5 volt supply; this leaves only 0.5 volt across the series pair of cur- rent regulators at the top of the waveform, obviously insufficient to turn on the cur- rent regulator (approximately 1V)and the series JFET diode (0.6V). EXERCISE 5.9 Demonstrate that you understand the circuits of Figures 5.35 and 5.36 by calculating the frequency of oscillationin each case. - Figure 5.36. Triangle generator.
- 241. OSCILLATORS 5.16 Quadrature oscillators 291 There are some other interesting timer not-too-great sine wave. VCO chips some- chips available. The 322 timer from Na- times have an awkward reference for the tional includes its own internal precision control voltage (e.g., the positive supply) voltage reference for determining the and complicated symmetrizing schemes threshold. That makes it an excellent for sine-wave output. It is our opinion choice for generating a frequency propor- that the ideal VCO has yet to be devel- tional to an externally supplied current, as, oped. Many of these chips can be used for example, from a photodiode. Another with an external quartz crystal, as we will class of timers uses a relaxation oscillator discuss shortly, for much higher accuracy followed by a digital counter, in order to and stability; in such cases the crystal sim- generate long delay times without resort- ply replaces the capacitor. Figure 5.37 ing to large resistor and capacitor values. shows a VCO circuit with an output fre- Examples of this are the 74HC4060, the quency range of lOHz to lOkHz built with Exar 2243, and the Intersil ICM7242 (also the LM331. made by Maxim). The latter is CMOS, When shopping for VCO chips, don't runs on a fraction of a milliamp, and gen- overlook the ICs known as phase-locked erates an output pulse every 128 oscillator loops (PLL), which contain both a VCO cycles. These timers (and their near rela- and a phase detector. An example is the tives) are great for generating delays from popular CMOS 4046 (and its faster cousin, a few seconds to a few minutes. the 74HC4046). We will discuss PLLs in Sections 9.27-9.31. Table 5.4 lists most of the available VCOs. 5.15 Voltage-controlled oscillators Other IC oscillators are available as ~01- 5-16 Quadrature oscillators tage-controlled oscillators (VCO's), with the output rate variable over some range There are times when you need an Oscil- according to an input control voltage. lator that generates a simultaneous pair Some of these have frequency ranges ex- of equal-amplitude sine waves, 90° out of ceeding 1000:1. Examples are the original phase. You can think of the pair as sine NE566 and later designs like the LM331, and cosine. This is referred to as a quadra- 8038, 2206, and 74LS624-9 series. ture pair (the signals are "in quadrature"). The 74LS624 series, for example, gen- One important application is in radio com- crates digital-logic-level outputs up to 20 munications circuits (quadrature mixers, M~~ and uses external R C ~to set the single-sideband generation). Furthermore, nominal frequency. Faster VCOs like the we'11 explain below, a quadrature pair 1648 can produce outputs to 200MHz, all you need to generate any arbitrary and in Chapter 13 we'll see how to make phase. VCOs that operate in the gigahertz range. The first idea you might invent is to The LM331 is actujlly an example of a apply a s i n e - ~ a ~ esignal to an integrator voltage-to-frequency (V/F) converter, de- differentiator), thus generating a 900- signed for good linearity (see Sections 9-20 shifted cosine wave- The phase shift is and 9.27). Where linearity is important, right, but the amplitude is wrong (figure recent V/F converters like the AD650 Out why)- Here are some methods that do really do the job, with linearity of 0.005%. Most VCOs use internal current sources to generate triangle-wave outputs, and the Switched-ca~acitorresonator 8038 and 2206 even include a set of "soft" Figure 5.38 shows how to use an MF5 clamps to convert the triangle wave to a switched-capacitor filter IC as a self-excited
- 242. ACTIVE FILTERS AND OSCILLATORS 292 Chapter 5 quadrature 4 8 bandpass filter to generate a quadrature stand it is to assume there is already a sine-wave pair. The easiest way to under- sine-wave output present; the comparator b filter lOOk 7 v,n- - ~ ' lf 6 1 - RT l.OuFL LM331 vcc signal RC pump 'pump out 1.89V WEE 41 , 6.19k 1% 5 +I +5 CT 4 1 - Rs - 4 p 10.0k 0.478 Rs f=-- RrCr RL "8" gain- - 5k -- Figure 5.37. Typical VIF converter IC (0 to lOkHz VCO). m l4 c o s ( 2 T ~ t j - - 4- 4.7k A 4 1 - w sin 2 ~ - t 47k ( $0) -0.01pF 15% R' - .3 OUt 0.1pF b +5v == 470 (2) 4-- i ~ ~ o ~ o o k-- - Figure 5.38. Switched-capacitor - oscillator. LF311 47k - 4
- 243. OSCILLATORS 5.16 Quadrature oscillators 292 TABLE 5.4. SELECTED VCOs Supply voltage Max freq min max Linearity Type Mfga ~ a m i l ~ ~(MHz) OutputsC (V) (V) (at 1OkHz) Comments VFC32 BB+ VFC62C BB VFCllOB BB 748124 TI 74LS624-9 TI 74LS724 TI 215 XR LM331 NS AD537 AD 566 SN AD650 AD AD654 AD 1648 MO 1658 MO XR2206 XR XR2207 XR XR2209 XR XR2212 XR XR2213 XR 4024 MO 4046 RC+ HC4046 RC+ 4151 RA 4152 RA 4153A RA 8038 IL TSC9401 TP indus. st'd; good linearity excellent linearity fast, exc lin, int V,,, mini-DIP PLL inexpensive, good linearity excellent linearity inexpensive 0.5% sine dist (trimmed) PLL PLL CMOS PLL fast 4046 excellent lin, easy to use Exar 8038 to 1MHz VIF, linear, stable see footnotes to Table 4.1. (b)families: C - CMOS; E - ECL; L - linear; T - TTL. (') outputs: OC - open collector, pulses; P - pulses; SQ - square waves; SW - sine waves; T -triangle. (d) at 250kHz. converts this to a small-amplitude (1 diode drop) square wave, which is fed back as the filter's input. The filter has a narrow bandpass (Q = lo), so it converts the in- put square wave to a sine-wave output, sustaining the oscillation. A square-wave clock input (CLK) determines the band- pass center frequency, hence the frequency of oscillation, in this case fclk/lOO. The circuit is usable over a frequency range of a few hertz to about lOkHz and gen- erates a quadrature pair of sine waves of equal amplitude. Note that this circuit will actually have a "staircase"approximation to the desired sine-wave output, owing to the quantized output steps of the switched filter. Analog trigonometric-functiongenerator Analog Devices makes an interesting non- linear "function IC" that converts an in- put voltage to an output voltage propor- tional to sin(AV;,,), where the gain A is fixed at 50' per volt. In fact, this chip, the AD639, can actually do a lot more: It has four inputs, called XI, X2, Yl, and Y2, and generates as output the voltage VOut= sin(X1- X2)/sin(Yl - Y2). Thus, for example, by setting X1 = Yl = 90'
- 244. ACTIVE FILTERS AND OSCILLATORS 294 Chapter 5 Figure 5.39. Trigonometric-function oscillator. 1 (i.e., +1.8 volt), Y2 = 0 (ground), and ap- plying an input voltage to X2, we generate cos(X2). tr~angleIn EXERCISE 5.10 Provethe last statement. The AD639 even gives you a precise +1.8 volt output, to make life easy. Thus, a pair of AD639s, driven by a 1.8 volt amplitude triangle wave, generates a quadrature sine- wave pair, as shown in Figure 5.39. The AD639 operates from dc to about 1MHz. v X l s1nIXI - X2) x2 -- Lookup tabk r 1 8 V 6 ref This is a digital technique, which you will fully understand only after you've read Chapter 9. The idea is to program a digital memory with the numerical values of sine and cosine for a large set of equally spaced angle arguments (say for every lo). You then make sine waves by rapidly generat- ing the sequential addresses, reading the memory values for each address (i.e., each sequential angle), and applying the digital values to a pair of digital-to-analog (DIA) converters. This method has some drawbacks. As with the switched-capacitor resonator, the output is actually a staircase wave, since it is constructed from a set of discrete volt- ages, one for each table entry. You can, of course, use a low-pass filter to smooth the output; but having done so, you cannot span a wide range of frequencies, since the low-pass filter must be chosen to pass the sine wave itself while blocking the (higher) anglestep frequency (thesame problem ap- plies to the switched-capacitor resonator). Decreasing the angular step size helps, but reduces the maximum output frequency. With typical DIA converter speeds of something less than a microsecond, you can make sine waves up to a few tens of kilohertz or so, assuming you use an- gle steps of a degree or so. DIA con- verters also tend to generate large output spikes ("glitches") while jumping between 7' YI s ~ n ( Y ,- Y,) 2iy2 -- >AD639 12 requ~red)
- 245. OSCILLATORS 5.16 Quadrature oscillators 295 stability (100ppmI0C, max). The 4423 is a module (not a monolithic IC) in a 14-pin molded DIP; it costs $24 in small quanti- ties. Phase sequence filters There are tricky RC filter circuits that d~odet~m~terat v0~ i:(vs+ v<,,,,<,,1 have the property of accepting an input Figure 5.40 sine wave and producing as output a pair of sine-wave outputs whose phase output voltages. You can get full-scale glitches even when jumping between ad- jacent (closest) output voltage levels! In Chapter 9 we'll see deglitching techniques to eliminate this problem. DIA converters are available with resolutions up to 16 bits (1 part in 65,536). State-variable oscillator The preceding methods all require some hard work. Luckily, the friendly folks at Burr-Brown have done their homework and have come up with the model 4423 "precision quadrature oscillator." It uses the standard 3-op-amp state-variable band- pass filter circuit (Figure 5.18), with the output diode-limited and fed back as in- put (see Fig. 5.40). It claims to operate from 0.002Hz to 20kHz, with good control of phase shift, amplitude, and frequency diflerence is approximately 90'. - The radio hams know this as the "phasing" method of single-sideband generation (due to Weaver), in which the input signal consists of the speech waveform that you want to transmit. Unfortunately, this method works satis- factorily only over a rather limited range of frequencies and requires precision resis- tors and capacitors. A better method for wideband quadra- ture generation uses "phase sequence net- works," consisting of a cyclic repetitive structure of equal resistors and geometri- cally decreasing capacitors, as in Figure 5.41. You drive the network with a sig- nal and its 1SO0 -shifted cousin (that's easy, since all you need is a unity-gain inverter). The output is a fourfold set of quadrature signals, with a 6-section network giving f0.5" error over a 100:1 frequency range. quadrature outputs Figure 5.41. Phase-sequence A B c D network.
- 246. ACTIVE FILTERS AND OSCILLATORS 296 Chapter 5 Quadrature square waves For the special case of square waves, generating quadrature signalsis a lead-pipe cinch. The basic idea is to generate twice the frequency you need, then divide by 2 with digital flip-flops (Chapter 8) and decode with gates (Chapter 8 again). This technique is essentially perfect from dc to at least 1OOMHz. Radiofrequency quadrature At radiofrequencies (upward of a few megahertz) the generation of quadrature sine-wave pairs again becomes easy, using devices known as quadrature hybrids (or quadrature splitter/combiners). At the low- frequency end of the radio spectrum (from a few megahertz to perhaps 1GHz) these take the form of small core-wound trans- formers, while at higher frequencies you find incarnations in the form of stripline (strips of foil insulated from an underlying ground plane) or waveguide (hollow rect- angular tubing). We'll see these again in Chapter 13. These techniques tend to be fairly narrow-band, with typical operating bandwidths of an octave (i.e., ratio of 2:1). Generating a sine wave of arbitrary phase Once you have a quadrature pair, it's easy to make a sine wave of arbitrary phase. You simply combine the in-phase (I)and quadrature (Q) signals in a resistive com- biner, made most easily with a potentiome- ter going between the I and Q signals. As you rotate the pot, you combine the I and Q in different proportions, taking you smoothly from 0" to 90" phase. If you think in terms of phasors, you'll see that the resulting phase is completely indepen- dent of frequency; however, the amplitude varies somewhat as you adjust the phase, dropping 3dB at 45O. You can extend this simple method to the full 360" by simply generating the inverted (180'-shifted) sig- nals, I' and Q', with an inverting amplifier of gain Gv= -1. 5.17 Wien bridge and LC oscillators When a low-distortion sine wave is re- quired, none of the preceding methods is generally adequate. Although wide-range function generators do use the technique of "corrupting" a triangle wave with diode clamps, the resulting distortion can rarely be reduced below 1°/o. By comparison, most hi-fi audiophiles insist on distortion levels below 0.1% for their amplifiers. To test such low-distortion audio components, pure sine-wave signal sources with resid- ual distortion less than 0.05% or so are required. At low to moderate frequencies the Wien bridge oscillator (Fig. 5.42) is a good source of low-distortion sinusoidal signals. The idea is to make a feedback amplifier with 180" phase shift at the desired out- put frequency, then adjust the loop gain so that a self-sustaining oscillation just barely takes place. For equal-value Rs and Cs as shown, the voltage gain from the non- inverting input to op-amp output should be exactly +3.00. With less gain the os- cillation will cease, and with more gain the output will saturate. The distortion is low if the amplitude of oscillation remains within the linear region of the amplifier, i.e., it must not be allowed to go into a full-swing oscillation. Without some trick to control the gain, that is exactly what will happen, with the amplifier's output in- creasing until the effective gain is reduced to 3.0 because of saturation. The tricks involve some sort of long-time-constant gain-setting feedback, as you will see. In the first circuit, an incandescent lamp is used as a variable-resistance feedback element. As the output level rises, the lamp heats slightly, reducing the nonin- verting gain. The circuit shown has less
- 247. OSCILLATORS 5.18 LCoscillators 29; # 3 2 7 lamp 5.18 LC oscillators output OP-37 f=-- 1 2nRC output 1- 2nRC Figure 5.42. Wien-bridge low-distortion oscil- lators. than 0.003% harmonic distortion for au- diofrequencies above 1kHz; see LTC App. Note 5(12/84) for more details. In the second circuit, an amplitude discriminator consisting of the diodes and RC adjusts the ac gain by varying the resistance of the FET, which behaves like a voltage-variable resistance for small applied voltages (see Section 3.10). Note the long time con- stant used (2s); this is essential to avoid distortion, since fast feedback will distort the wave by attempting to control the am- plitude within the time of one cycle. At high frequencies the favorite method of sine-wave generation is an LC-controlled oscillator, in which a tuned LC is con- nected in an amplifier-like circuit to pro- vide gain at its resonant frequency. Over- all positive feedback is then used to cause a sustained oscillation to build up at the LC's resonant frequency; such circuits are self-starting. Figure 5.43 shows two popular configu- rations. The first circuit is the trusty Col- pitts oscillator, a parallel tuned LC at the input, with positive feedback from the out- put. For this circuit it is claimed that its distortion is less than -60dB. The second circuit is a Hartley oscillator, built with an npn transistor. The variable capacitor is for frequency adjustment. Both circuits use link coupling, just a few turns of wire acting as a step-down transformer. LC oscillators can be made electrically tunable over a modest range of frequen- cy. The trick is to use a voltage-variable capacitor ("varactor") in the frequency- determining LC circuit. The physics of diode junctions provides the solution, in the form of a simple reverse-biased diode: The capacitance of a pn junction decreases with increasing reverse voltage (see Fig. 13.3). Although any diode acts as a varac- tor, you can get special varactor diodes de- signed for the purpose; Figure 5.44 shows some representative types. Figure 5.45 shows a simple JFET Colpitts oscillator (with feedback from the source) with flolo tunability. In this circuit the tuning range has been made deliberately small, in order to achieve good stability, by using a rela- tively largefixed capacitor (lOOpF)shunted by a small tunable capacitor (maximum value of 15pF). Note the large biasing re- sistor (sothe diode bias circuit doesn't load the oscillation) and the dc blocking capac- itor. See also Section 13.11. Varactors typically provide a maximum capacitance of a few picofarads to a few
- 248. ACTIVE FILTERS AND OSCILLATORS 298 Chapter 5 distortion lMSl adjust - 20MHz low-distort~on Colpitts oscillator A cf-l:%J- -- -- B Hartley LC oscillator Figure 5.43 hundred picofarads, with a tuning range of about 3:l (although there are wide range varactors with ratios as high as 15:l). Since the resonant frequency of an LC circuit is inversely proportional to the square root of capacitance, it is possible to achieve tuning ranges of up to 4:l in frequency, though more typically you're talking about a tuning range of f25% or SO. In varactor-tuned circuits the oscillation itself (as well as the externally applied dc tuning bias) appears across the varactor, causing its capacitance to vary at the signal frequency. This produces oscillator wave- form distortion, and, more important, it causes the oscillator frequency to depend somewhat on the amplitude of oscillation. In order to minimize these effects, you should limit the amplitude of the oscilla- tion (amplify in following stages, if you need more output); also, it's best to keep the dc varactor bias voltage above a volt or so, in order to make the oscillating voltage small by comparison. Electrically tunable oscillators are used extensively to generate frequency modula- tion, as well as in radiofrequency phase- locked loops. We will treat these subjects in Chapters 9 and 13. For historical reasons we should men- tion a close cousin of the LC oscillator, namely the tuning-fork oscillator. It used the high-Q oscillations of a tuning fork as the frequency-determining element of an oscillator, and it found use in low- frequency standards (stability of a few parts per million, if run in a constant- temperature oven) as well as wristwatches. These objects have been superseded by quartz oscillators, which are discussed in the next section. Parasitic oscillations Suppose you have just made a nice ampli- fier and are testing it out with a sine-wave input. You switch the input function gen- erator to a square wave, but the output remains a sine wave! You don't have an amplifier; you've got trouble. Parasitic oscillations aren't normally as blatant as this. They are normally ob- served as fuzziness on part of a wave- form, erratic current-source operation, un- explained op-amp offsets, or circuits that behave normally with the oscilloscope probe applied, but go wild when the scope isn't looking. These are bizarre manifesta- tions of untamed high-frequency parasitic oscillations caused by unintended Hartley or Colpitts oscillators employing lead in- ductance and interelectrode capacitances.
- 249. OSCILLATORS 5.18 LCoscillators 295 V,," (V) Figure 5.44. Varactor tuning diodes. + 1V to + 12V 2 1 % tuning micap F ~ 2N3819 1OOpF - A - rf out ~k- Figure 5.45. Voltage-tuned LC oscillator. The circuit in Figure 5.46 shows an 0s- seemed to vary excessively (5% to 10%) cillatingcurrent source born in an electron- with load voltage variations within its ex- its lab course where a VOM was used to pected compliance range, a symptom that measure the output compliance of a stan- could be "cured" by sticking a finger on dard transistor current source. The current the collector lead! The collector-base
- 250. ACTIVE FILTERS AND OSCILLATORS 300 Chapter 5 1, Figure 5.46. Parasitic oscillation example. capacitance of the transistor and the meter capacitance resonated with the meter in- ductance in a classic Hartley oscillator cir- cuit, with feedback provided by collector- emitter capacitance. Adding a small base resistor suppressed the oscillation by re- ducing the high-frequency common-base gain. This is one trick that often helps. 5.19 Quartz-crystal oscillators RC oscillators can easily attain stabilities approaching O.l%, with initial predictabil- ity of 5% to 10%. That's good enough for many applications, such as the multiplexed display in a pocket calculator, in which a multidigit numerical display is driven by lighting one digit after another in rapid succession (a lkHz rate is typical). Only one digit is lit at any time, but your eye sees the whole display. In such an appli- cation the precise rate is quite irrelevant - you just want something in the ballpark. As stable sources of frequency, LC oscil- lators can do a bit better, with stabilities of O.OlO/oover reasonable periods of time. That's good enough for oscillators in radio- frequency receivers and television sets. For real stability there's no substitute for a crystal oscillator. This uses a piece of quartz (same chemical as glass, silicon dioxide) that is cut and polished to vibrate at a certain frequency. Quartz is piezo- electric (a strain generates a voltage, and vice versa), so acoustic waves in the crys- tal can be driven by an applied electric field and in turn can generate a voltage at the surface of the crystal. By plating some contacts on the surface, you wind up with an honest circuit element that can be modeled by an RLC circuit, pretuned to some frequency. In fact, its equiva- lent circuit contains two capacitors, giving a pair of closely spaced (within 1%) se- ries and parallel resonant frequencies (Fig. 5.47). The effect is to produce a rapidly changing reactance with frequency (Fig. 5.48). The quartz crystal's high & (typ- ically around 10,000) and good stability make it a natural for oscillator control, as well as for high-performance filters (see Section 13.12). As with LC oscillators, the crystal's equivalent circuit provides posi- tive feedback and gain at the resonant fre- quency, leading to sustained oscillations. I Figure 5.47 Figure 5.49 shows some crystal oscilla- tor circuits. In A the classic Pierce oscilla- tor is shown, using the versatile FET (see Chapter 3). The Colpitts oscillator, with a crystal instead of an LC, is shown in B. An npn bipolar transistor with the crystal
- 251. OSCILLATORS 5.19 Quartz-crystal oscillators 301 as feedback element is used in C. The re- maining circuits generate logic-level out- puts using digital logic functions (D and El. capacitive I B Figure 5.48 The last diagram uses the convenient MC12060112061series of crystal oscillator circuits from Motorola. These chips are in- tended for crystals in the range lOOkHz to 20MHz and are designed to give excellent frequency stability by carefully limiting the amplitude of oscillation via internal ampli- tude discrimination and limiting circuitry. They provide sine-wave and square-wave outputs (both "TTL" and "ECL" logic lev- els). An even more convenient alternative, if you're willing to accept a square wave output only, and if utmost stability isn't needed, is the use of complete crystal os- cillator modules, usually provided as DIP IC-sized metal packages. They come in lots of standard frequencies (e.g., 1, 2, 4, 5, 6, 8, 10, 16, and 20MHz), as well as weird frequencies commonly used in mi- croprocessor systems (e.g., 14.31818MHz, used for video boards). These "crystal clock modules" typically provide accura- cies (over temperature, power supply volt- age, and time) of only 0.01% (lOOppm), but you get it cheap ($2 to $ 9 , and you don't have to wire up any circuitry. Fur- thermore, they are guaranteed to oscillate, which isn't by any means assured when you wire your own oscillator: Crystal os- cillator circuits depend on electrical prop- erties of the crystal (such as series versus parallel mode, effective series resistance, and mount capacitance) that aren't always well specified. All too often you may find that your home-built crystal oscillator os- cillates, but at a frequency unrelated to that stamped on the crystal! Our own ex- perience with discrete crystal oscillator cir- cuits has been, well, checkered. Quartz crystals are available from about lOkHz to about lOMHz, with overtone- mode crystals going to about 250MHz. Although crystals have to be ordered for a given frequency, most of the commonly used frequencies are available off the shelf. Frequencies such as 1OOkHz, 1.OMHz, 2.0MHz, 4.0MHz7S.OMHz, and 1O.OMHz are always easy to get. A 3.579545MHz crystal (available for less than a dollar) is used in TV color-burst oscillators. Digital wristwatches use 32.768kHz (divide by 215 to get lHz), and other powers of 2 are also common. A crystal oscillator can be adjusted slightly by varying a series or parallel capacitor, as shown in Figure 5.49D. Given the low cost of crystals (typically about 2 to 5 dollars), it is worth considering a crystal oscillator in any application where you would have to strain the capabilities of RC relaxation oscillators. If you need a stable frequency with a very small amount of electrical tunability, you can use a varactor to "pull" the frequency of a quartz-crystal oscillator. The resulting circuit is called a "VCXO"
- 252. ACTIVE FILTERS AND OSCILLATORS 302 Chapter 5 2.5rnH 1OOOpF output - A. Pierce oscillator 0. Colpitts oscillator C CMOS inverter Figure 5.49. Various crystal oscillators. v output (voltage-controlled crystal oscillator), and combines the good-to-excellentstability of crystal oscillators with the tunability of LC oscillators. The best approach is proba- bly to buy a commercial VCXO, rather than attempt to design your own. Typ- ically they produce maximum deviations of flOppm to fIOOppm from center fre- quency, though wide-deviation units (up to f1000ppm) are also available. Without great care you can obtain fre- quency stabilities of a few parts per mil- 1OMR 1- oscillator) with somewhat better perfor- mance. Both TCXOs and uncompensated oscillators are available as complete mod- ules from many manufacturers, e.g., Bliley, CTS Knights, Motorola, Reeves Hoffman, Statek, and Vectron. They come in various sizes, ranging down to DIP packages and TO-5 standard transistor cans. TCXOs deliver stabilities of lppm over the range 0°C to 50°C(inexpensive) down to 0.lppm over the same range (expensive). - + 5 v lion over normal temperature ranges with crystal oscillators. By using temperature- Temperature-stabilizedoscillators compensation schemes yo; can- make a For the utmost in stability, you may need a TCXO (temperature-compensated crystal crystal oscillator in a constant-temperature Trir 1 5 11 16 1OOk 1 ) 10; 4 ) 32,768Hz -7sine 1?OPF g outputs 9 1 - - - MC12060 (100kHz-2MHz) --L -- MC12061 (2MHz-20MHzl D E + slne 42 -0 -sine 3 -d}reout 10TTL out
- 253. SELF-EXPLANATORYCIRCUITS 5.20 Circuit ideas 303 oven. A crystal with a zero temperature coefficient at some elevated temperature (80°C to 90°C) is used, with the thermo- stat set to maintain that temperature. Such oscillators are available as small modules for inclusion into an instrument or as complete frequency standards ready for rack mounting. The 10811 from Hewlett- Packard is typical of high-performance modular oscillators, delivering 1OMHz with stabilities of a few parts in 10'' over periods of seconds to hours. When thermal instabilities have been reduced to this level, the dominant ef- fects becomecrystal"aging"(the frequency tends to decrease continuously with time), power-supply variations, and environmen- tal influences such as shock and vibration (the latter are the most serious problems in quartz wristwatch design). To give an idea of the aging problem, the oscillator mentioned previously has a specified aging rate at delivery of 5 parts in 10'' per day, maximum. Aging effects are due in part to the gradual relief of strains, and they tend to settle down after a few months, particularly in a well-manufactured crystal. Our specimen of the 10811 oscillator ages about 1 part in 1011 per day. Atomic frequency standards are used where the stability of ovenized-crystal standards is insufficient. These use a mi- crowave absorption line in a rubidium gas cell, or atomic transitions in an atomic ce- sium beam, as the reference to which a quartz crystal is stabilized. Accuracy and stability of a few parts in 1012can be ob- tained. Cesium-beam standards are the of- ficial timekeepers in this country, with tim- ing transmissions from the National Bureau of Standards and the Naval Ob- servatory. Atomic hydrogen masers have been suggested as the ultimate in stable clocks, with claimed stabilities ap- proaching a few parts in loi4. Recent research in stable clocks has centered on techniques using "cooled ions" to achieve even better stability. Many physicists be- lieve that ultimate stabilities of parts in 1018may be possible. SELF-EXPLANATORY CIRCUITS 5.20 Circuit ideas Figure 5.51 presents a variety of circuit ideas, mostly taken from manufacturers' data sheets and applications literature. ADDITIONAL EXERCISES 1. Design a 6-pole high-pass Bessel filter with cutoff frequency 1kHz. 2. Design a 60Hz twin-T notch filter with op-amp input and output buffers. 3. Design a sawtooth-wave oscillator, to deliver 1kHz, by replacing the charging re- sistor in the 555 oscillator circuit with a transistor current source. Be sure to pro- vide enough current-source compliance. What value should RB (Fig. 5.33) have? 4. Make a triangle-wave oscillator with a 555. Use a pair of current sources I. (sourcing) and 210(sinking). Use the 555's output to switch the 210 current sink on and off appropriately. The following figure shows one possibility. 0 - 555 - - U-Lr output fl A 2 + T- Figure 5.50
- 257. Ch6: Voltage Regulators and Power Circuits Nearly all electronic circuits, from simple transistor and op-amp circuits up to elab- orate digital and microprocessor systems, require one or more sources of stable dc voltage. The simple transformer-bridge- capacitor unregulated power supplies we discussed in Chapter 1 are not generally adequate because their output voltages change with load current and line voltage and because they have significant amounts of 120Hz ripple. Fortunately, it is easy to construct stable power supplies using negative feedback to compare the dc out- put voltage with a stable voltage reference. Such regulated supplies are in universal use and can be simply constructed with integrated circuit voltage regulator chips, requiring only a source of unregulated dc input (from a transformer-rectifier- capacitor combination, a battery, or some other source of dc input) and a few other components. In this chapter you will see how to con- struct voltage regulators using special-pur- pose integrated circuits. The same circuit techniques can be used to make regulators with discrete components (transistors, re- sistors, etc.), but because of the availability of inexpensive high-performance regulator chips, there is no advantage to using dis- crete components in new designs. Volt- age regulators get us into the domain of high power dissipation, so we will be talk- ing about heat sinking and techniques like "foldback limiting" to limit transistor op- erating temperatures and prevent circuit damage. These techniques can be used for all sorts of power circuits, including power amplifiers. With the knowledge of regula- tors you will have at that point, we will be able to go back and discuss the design of the unregulated supply in some detail. In this chapter we will also look at voltage ref- erences and voltage-reference ICs, devices with uses outside of power-supply design. BASIC REGULATOR CIRCUITS WITH THE CLASSIC 723 6.01 The 723 regulator The pA723 voltage regulator is a classic. Designed by Bob Widlar and first intro- duced in 1967, it is a flexible, easy-to- use regulator with excellent performance. 307
- 258. VOLTAGE REGULATORSAND POWER CIRCUITS 308 Chapter 6 frequency compensation temperature- 0 compensated COMP zener v,,, error -voltage 1reference amp1tfier v- limit CL CS sense Figure 6.1. Simplified circuit of the 723 regulator. (Courtesyof Fairchild Camera and Instrument Cow.) vz compensation current limit current sense Figure 6.2. Schematic of the 723 regulator. (Courtesyof Fairchild Camera and Instrument Corp.) Although you would not choose it for a kit, containing a temperature-compensated new design nowadays, it is worth looking voltage reference, differential amplifier, se- at in some detail, since more recent reg- ries pass transistor, and current-limiting ulators work on the same principles. Its protective circuit. As it comes, the 723 circuit is shown in Figures 6.1 and 6.2. doesn't regulate anything. You have to As you can see, it is really a power-supply hook up an external circuit to make it do
- 259. BASIC REGULATOR CIRCUITS WITH THE CLASSIC 723 6.02 Positive regulator 309 what you want. Before going on to design regulators with it, let's look briefly at its internal circuit. It is straightforward and easy to understand (the innards of many ICs aren't). The heart of the regulator is the temper- ature-compensated zener reference. Zener D2 has a positive temperature coefficient, so its voltage is added to Q6's base-emitter drop (remember, VB,~has a negative tem- perature coefficient of roughly -2mVI0C) to form a voltage reference (nominally 7.15V) of nearly zero temperature coef- ficient (typically 0.003°/o/0C). Q4 through Q6are arranged to bias D2at I = VBE/R8 via negative feedback at dc, as indicated on the block diagram. Q2 and Q3 form an unsymmetrical current mirror to bias the reference; current to the mirror is set by Dl and R2 (their junction is fixed at 6.2V below V+), which in turn is biased by Q1(the FET behaves roughly like a current source). Qll and Q12 form the differential amplifier (sometimes called the "error am- plifier," thinking of the whole thing as an exercise in negative feedback), a classic long-tailed pair with emitter current source Q13. The latter is half of a current mirror (Q9, QlO, and Q13), driven in turn from current mirror Q7 (Q3, Q7, and Q8 all mirror the current generated by the Dl ref- erence, as we mentioned in Section 2.14). Qll's collector is tied to the fixed positive voltage at Q4's emitter, and the error am- plifier's output is taken from Q12's collec- tor. Current mirror Q8 supplies the latter's collector load. Ql4 drives the pass transis- tor Q15,in a not-quite-Darlington connec- tion. Note that Q15's collector is brought out separately, to allow for separate pos- itive supplies. By turning on Qls you cut off drive to the pass transistors; this is used to limit output currents to nonde- structive levels. Unlike many of the newer regulators, the 723 does not incorporate internal shut-down circuitry to protect against excessive load current or chip dissipation. The SG3532 and LAS1000 are improved 723-type regulators, with low-voltage bandgap reference (Section 6.19, internal current limiting, and thermal-overload shutdown circuitry. 6.02 Positive regulator Figure 6.3 shows how to make a positive voltage regulator with the 723. All the components except the four resistors and the two capacitors are contained on the 723. Voltage divider RlR2 compares a fraction of the output with the voltage ref- erence, and the 723 components do the rest; this circuit is identical with the op- amp noninverting amplifier with emitter follower, with Vrefas the "input." R4 is chosen for about 0.5 volt drop at maxi- mum desired output current, since a V B ~ drop applied across the CL-CS inputs will turn on the current-limiting transistor (Qls in Fig. 6.2), shutting off base drive to the output pass transistor. The lOOpF capacitor stabilizes the loop. R3 (some- times omitted) is chosen so that the differential amplifier sees equal imped- ances at its inputs. This makes the out- put insensitive to changes in bias current (with changes in temperature, say), in the same way as we saw with op-amps (Section 4.12). With this circuit, a regulated supply with output voltage ranging from Vr,f to the maximum allowable output voltage (37V) can be made. Of course, the input voltage must stay a few volts more positive than the output at all times, including the effects of ripple on the unregulated supply. The "dropout voltage'' (the amount by which the input voltage must exceed the regulated output voltage) is specified as 3 volts (minimum) for the 723, a value typical of most regulators. R1 or R2 is usually made adjustable, or trimmable, so the output voltage can be set precisely. The production spread in Vrefis 6.8 to 7.5 volts.
- 260. VOLTAGE REGULATORS AND POWER CIRCUITS 310 Chapter 6 unreyulated I n u u t Figure 6.3. 723 regulator: Vout> Vr,f. +V,,(unregulated) I---1 0 v+ vc r----------1 I I I I - I - !V"", I I I I - I1723 L-----, 6.8R I I C O M P lOOpF 'VVL 1.5k T,OV Figure 6.4. 723 regulator: Vout< Vref. regulated OUtDUt It is usually a good idea to put a ca- impedance low even at high frequencies, pacitor of a few microfarads across the where the feedback becomes less effective. output, as shown. This keeps the output It is best to use the output capacitor value
- 261. BASIC REGULATOR CIRCUITS WITH THE CLASSIC 723 6.03 High-current regulator 311 recommended on the specification sheet, since oscillations can occur otherwise. In general, it is a good idea to bypass power- supply leads to ground liberally throughout a circuit, using a combination of ceramic types (0.01-O.1pF) and electrolytic or tantalum types (I- 10pF). For output voltages less than Vref, you just put the voltage divider on the reference (Fig. 6.4). Now the full out- put voltage is compared with a fraction of the reference. The values shown are for +5 volts 50mA max. With this circuit configuration, output voltages from +2 volts to Vr,f can be produced. The out- put cannot be adjusted down to zero volts because the differential amplifier will not operate below 2 volts input. This is given as a manufacturer's specification (see Ta- ble 6.9). With this circuit the unregulated input voltage must never drop below +9.5 volts, the voltage necessary to power the reference. A third variation of this circuit is neces- sary if you want a regulator that is continu- ously adjustable through a range of output voltages around Vref.In such cases, just compare a divided fraction of the output with a fraction of Vr,f chosen to be less than the minimum output voltage desired. EXERCISE 6.1 Design a regulator to deliver up to 50mA load current over an output voltage range of +5 to +lOvolts, using a723. Hint: Compareafraction of the output voltage with 0.5Vref. 6.03 High-current regulator The internal pass transistor in the 723 is rated at 150mA maximum; in addition, the power dissipation must not exceed 1 watt at 25OC (less at higher ambient temperatures; the 723 must be "derated" at 8.3mWI0C above 25°C in order to keep the junction temperature within safe limits). Thus, for instance, a 5 volt regulator with +15 volts input cannot deliver more than about 80mA to the load. To construct a higher-current supply, an external pass transistor must be used. It is easy to add one as a Darlington pair with the internal transistor (Fig. 6.5). Qlis the external pass transistor; it must be mounted on a heat sink, most often a finned metal plate designed to carry off heat (alternatively, the transistor can be mounted to one wall of the metal chassis housing the power supply). We will deal with thermal problems like these in the next section. A trimmer potentiometer has been used so that the output can be set accurately to +5 volts; its range of adjustment should be sufficient to allow for resistor tolerances as well as the maximum specified spread in Vref(this is an example of worst-case design), and in this case it allows about f1 volt adjustment from the nominal output voltage. Note the low-resistance high-power current-limiting resistor necessary for a 2 amp supply. Pass transistor dropout voltage One problem with this circuit is the high power dissipation in the pass transistor (at least 10W at full load current). This is unavoidable if the regulator chip is powered by the unregulated input, since it needs a few volts of "headroom" to operate (specified by the dropout voltage). With the use of a separate low-current supply for the 723 (e.g., +12V), the minimum unregulated input to the external pass transistor can be only a volt or so above the regulated output voltage (although you will always have to allow at least a few volts, since worst-case design dictates proper operation even at 105V ac line input). Overvoltage protection Also shown in this circuit is an overvoltage crowbar protection circuit consisting of
- 262. VOLTAGE REGULATORS AND POWER CIRCUITS 312 Chapter 6 V,, (unregulated) +9.5V (rn~nl I- T 1.0k "c 3A fuse "slow~blow" 2.5k 3 9k 2N3055 + heat s~nk - - lOOpF 'vv. Figure 6.5. Five volt regulator with outboard pass transistor and crowbar. Dl, Q2,and the 33 ohm resistor. Its func- tion is to short the output if some circuit fault causes the output voltage to exceed about 6.2 volts (this could happen if one of the resistors in the divider were to open up, for instance, or if some component in the 723 were to fail). Q2 is an SCR (silicon- controlled rectifier), a device that is nor- mally nonconducting but that goes into saturation when the gate-cathode junction is forward-biased. Once turned on, it will not turn off again until anode current is re- moved externally. In this case, gate current flows when the output exceeds Dl's Zener voltage plus a diode drop. When that hap- pens, the regulator will go into a current- limiting condition, with the output held near ground by the SCR. If the failure that produces the abnormally high output also disables the current-limiting circuit (e.g., a collector-to-emitter short in Q1), then the crowbar will sink a very large current. For this reason it is a good idea to include a fuse somewhere in the power supply, as shown. We will treat overvoltage crowbar circuits in more detail in Section 6.06. HEAT AND POWER DESIGN 6.04 Power transistors and heat sinking As in the preceding circuit, it is often nec- essary to use power transistors or other high-current devices like SCRs or power rectifiers that can dissipate many watts. The 2N3055, an inexpensive power tran- sistor of great popularity, can dissipate as much as 115 watts if properly mounted. All power devices are packaged in cases that permit contact between a metal sur- face and an external heat sink. In most cases the metal surface of the device is elec- trically connected to one terminal (e.g., for power transistors the case is always con- nected to the collector).
- 263. HEAT AND POWER DESIGN 6.04 Power transistors and heat sinking 313 The whole point of heat sinking is to keep the transistor junction (or the junc- tion of some other device) below some maximum specified operating temperature. For silicon transistors in metal packages the maximum junction temperature is usu- ally 200°C, whereas for transistors in plas- tic packages it is usually 150°C. Table 6.1 lists some useful power transistors, along with their thermal properties. Heat sink design is then simple: Knowing the max- imum power the device will dissipate in a given circuit, you calculate the junction temperature, allowing for the effects of heat conductivity in the transistor, heat sink, etc., and the maximum ambient tem- perature in which the circuit is expected to operate. You then choose a heat sink large enough to keep the junction temper- ature well below the maximum specified by the manufacturer. It is wise to be conservative in heat sink design, since transistor life drops rapidly at operating temperatures near or above maximum. Thermal resistance To carry out heat sink calculations, you use thermal resistance, 0, defined as heat rise (in degrees) divided by power transferred. For heat transferred entirely by conduc- tion, the thermal resistance is a constant, independent of temperature, that depends only on the mechanical properties of the joint. For a succession of thermal joints in "series," the total thermal resistance is the sum of the thermal resistances of the individual joints. Thus, for a transistor mounted on a heat sink, the total thermal resistance from transistor junction to the outside (ambient) world is the sum of the thermal resistance from junction to case OJc, the thermal resistance from case to heat sink, Ocs, and the thermal resistance from heat sink to ambient OSA. The temperature of the junction is therefore where P is the power being dissipated. Let's take an example. The preceding power-supply circuit, with external pass transistor, has a maximum transistor dis- sipation of 20 watts for an unregulated input of +15 volts (10V drop, 2A). Let's assume that the power supply is to oper- ate at ambient temperatures up to 50°C, not unreasonable for electronic equipment packaged together in close quarters. And let's try to keep the junction temperature below 150°C, well below its specified max- imum of 200°C. The thermal resistance from junction to case is 1.5"C per watt. A TO-3 power transistor package mounted with an insulating washer and heat- conducting compound has a thermal re- sistance from case to heat sink of about 0.3"C per watt. Finally, a Wakefield model 641 heat sink (Fig. 6.6) has a thermal resis- tance from sink to ambient of about 2.3"C per watt. So the total thermal resistance from junction to ambient is about 4.1°C per watt. At 20 watts dissipation the junc- tion will be 84°C above ambient, or 134°C (at maximum ambient temperature) in this example. The chosen heat sink will be adequate; in fact, a smaller one could be used if necessary to save space. Comments on heat sinks 1. Where very high power dissipation (sev- eral hundred watts, say) is involved, forced air cooling may be necessary. Large heat sinks designed to be used with a blower are available with thermal resistances (sink to ambient) as small as 0.05"C to 0.2"C per watt. 2. When the transistor must be insulated from the heat sink, as is usually neces- sary (especially if several transistors are mounted on the same sink), a thin in- sulating washer is used between the tran- sistor and sink, and insulating bushings are used around the mounting screws. Washers are available in standard
- 264. VOLTAGE REGULATORS AND POWER CIRCUITS 4 Chapter 6 TABLE 6.1. SELECTED BIPOLAR POWER TRANSISTORS "CEO IC f~ Pdiss rnax rnax h TJ I, min typ (Tc=25'C) O,, rnax npn pnp Pkga (V) (A) tg @ (A) (MHz) (pF) (W) (WW) ( T ) Comments Regular power: Vo(sat) = 0.4V (typ);VBE(on)= 0.8V (typ) 2N5191 2N5194 A 60 4 100 0.2 2 80 40 3.1 150 low cost, gen purp 2N5979 2N5976 B 80 5 50 0.5 2 60 70 1.8 150 2N3055 MJ2955 TO-3 60 15 50 2 2.5 125 115 1.5 200 metal, indus std MJE3055MJE2955 B 60 10 50 2 2.5 125 90 1.4 150 plastic, indus std 2N5886 2N5884 TO-3 80 25 50 10 4 400 200 0.9 200 2N5686 2N5684 TO-3 80 50 30 25 2 700 300 0.6 200 for real power jobs 2N6338 2N6437 TO-3 100 25 50 8 40 200 200 0.9 200 premium audio 2N6275 2N6379 TO-3 120 50 50 20 30 400 250 0.7 200 premiumaudio Darlingtonpower: VcE(sat) = 0.8V (typ); VBE(on)= 1.4V (typ) 2N6038 2N6035 A 60 4 2000 2 - 30 40 3.1 150 IOWcost 2N6044 2N6041 B 80 8 2500 4 4 80 75 1.7 150 2N6059 2N6052 TO-3 100 12 3500 5 4 100 150 1.2 200 2N6284 2N6287 TO-3 100 20 3000 10 4 150 160 1.1 200 high current 'a' A: small plasticpwr pkg (TO-126). B:large plastic pwr pkg (TO-127). (b) cCb(npn)at V~~=IOV;cCb(pnp)= 2Ccb(npn) transistor-shape cutouts made from mica, insulated aluminum, or beryllia (BeO). Used with heat-conducting grease, these add from 0.14OC per watt (beryllia) to about OS°C per watt. An attractive alternative to the classic mica-washer-plus-grease is provided by greaselesssilicone-based insulators that are loaded with a dispersion of thermally conductive compound, usually boron ni- tride or aluminum oxide. They're clean and dry, and easy to use; you don't get white slimy stuff all over your hands, your electronic device, and your clothes. You save lots of time. They have thermal resis- tances of about 0.2-0.4OC per watt, com- parable to values with the messy method. Bergquist calls its product "Sil-Pad," Chomerics calls its "Cho-Them," SPC calls it "Koolex," and Thermalloy calls its "Thermasil." We've been using these insulators, and we like them. 3. Small heat sinks are available that sim- ply clip over the small transistor packages (like the standard TO-5). In situations of relatively low power dissipation (a watt or two) this often suffices, avoiding the nui- sance of mounting the transistor remotely on a heat sink with its leads brought back to the circuit. An example is shown in Figure 6.6. In addition, there are vari- ous small heat sinks intended for use with the plastic power packages (many regula- tors, as well as power transistors, come in this package) that mount right on a printed-circuit board underneath the pack- age. These are very handy in situations of a few watts dissipation; a typical unit is illustrated in Figure 6.6. 4. Sometimes it may be convenient to mount power transistors directly to the chassis or case of the instrument. In such cases it is wise to use conservative design (keep it cool), especially since a hot case will subject the other circuit components to high temperatures and shorten compo- nent life. 5. If a transistor is mounted to a heat sink without insulating hardware, the heat sink must be insulated from the chassis.
- 265. HEAT AND POWER DESIGN 6.04 Power transistors and heat sinking 315 style part number thermal resistance "CAW @ AT (T,,",- T,,,,,,,) Figure 6.6. Power transistor heat sinks. I, IERC; T, Thermalloy; W, Wakefield. The use of insulating washers (e.g., Wake- field model 103) is recommended (unless, of course, the transistor case happens to be at ground). When the transistor is insu- lated from the sink, the heat sink may be attached directly to the chassis. But if the transistor is accessiblefrom outside the in- strument (e.g., if the heat sink is mounted externally on the rear wall of the box), it is a good idea to use an insulating cover over the transistor (e.g., Thermalloy 8903N) to prevent someone from accidentally coming in contact with it, or shorting it to ground. 6. The thermal resistance from heat sink to ambient is usually specified for the sink
- 266. VOLTAGE REGULATORS AND POWER CIRCUITS 316 Chapter 6 mounted with the fins vertical and with unobstructed flow of air. If the sink is mounted differently, or if the air flow is obstructed, the efficiency will be reduced (higher thermal resistance); usually it is best to mount it on the rear of the instru- ment with fins vertical. EXERCISE 6.2 A 2N5320, with a thermal resistance from junc- tion to case of 17.5OC per watt, is fitted with an IERCTXBF slip-on heat sink of the type shown in Figure 6.6. The maximum permissible junc- tion temperature is 200°C. How much power can you dissipate with this combinationat 25OC ambient temperature? How much must the dis- sipation be decreased per degree rise in ambi- ent temperature? 6.05 Foldback current limiting For a regulator with simple current lim- iting, transistor dissipation is maximum when the output is shorted to ground (either accidentally or through some circuit malfunction), and it usually ex- ceeds the maximum value of dissipation that would otherwise occur under normal load conditions. For instance, the pass transistor in the preceding +5 volt 2 amp regulator circuit will dissipate 30 watts with the output shorted (+15V input, cur- rent limit at 2A), whereas the worst-case dissipation under normal load condi- tions is 20 watts (IOV drop at 2A). The situation is even worse in circuits in which the voltage normally dropped by the pass transistor is a smaller fraction of the output voltage. For instance, in a +15 volt 2 amp regulated supply with +25 volt unregulated input, the transistor dissipation rises from 20 watts (full load) to 50 watts (short circuit). You get into a similar problem with push-pull power amplifiers. Under normal conditions you have maximum load cur- rent when the voltageacross the transistors is minimum (near the extremes ,of output swing), and you have maximum voltage across the transistors when the current is nearly zero (zero output voltage). With a short-circuit load, on the other hand, you have maximum load current at the worst possible time, namely, with full sup- ply voltage across the transistor. This re- sults in much higher transistor dissipation than normal. The brute-force solution to this problem is to use massive heat sinks and transis- tors of higher power rating (and safe oper- ating area, see Section 6.07) than neces- sary. Even so, it isn't a good idea to have large currents flowing into the pow- ered circuit under fault conditions, since other components in the circuit may then be damaged. The best solution is to use foldback current limiting, a circuit tech- nique that reduces the output current un- der short-circuit or overload conditions. Figure 6.7 shows the basic configuration, again illustrated with a 723 with external pass transistor. The divider at the base of the current- limiting transistor QL provides the foldback. At +15 volts output (the normal value)the circuit will limit at about 2 amps, since QL'S base is then at +15.5 volts while its emitter is at +15 (VBEis about 0.5V at the elevated temperatures at which regulator chips are normally run). But the short-circuit current is less; with the output shorted to ground, the output current is about 0.5 amp, holding Ql's dissipation down to less than in the full-load case. This is highly desirable, since excessive heat sinking is not now required, and the thermal design need only satisfy the full-load requirements. The choice of the three resistors in the current-limiting circuit sets the short-circuit current, for a given full-load current limit. Warning: Use care in choosing the short-circuit current, since it is possible to be overzealous and design a supply that will not "start up" into a normal load. The short-circuit current should not be too small; as a
- 267. HEAT AND POWER DESIGN 6.06 Overvoltage crowbars 317 input (+25 to +30V, unreg) v+ 4 1 r----1 -vc r- -------, I I I I 4 1 I QL I 1-1 ' 723L comp cs t-11 , - lOOpF 3.0, -I? lopF 120, -- output . + 1 5 v 2A rat,,, b= I+ (A)3% Figure 6.7. A. Power regulator with foldback current B ISC Rl + RZ VBE limiting. B. Output voltage versus load current. rough guide, the short-circuit current 6.06 Overvoltage crowbars limit should be set at about one-third the AS we remarked in Section 6.03, it is maximum load current at full output often a good idea to include some so* voltage. of overvoltage protection at the output of a regulated supply. Take, for instance, EXERCISE 6.3 a +5 volt supply used to power a large Designa723regulatorwith outboard passtran- digita1system (you'll see lots sistor and foldback current limjting to provide beginning in Chapter 8). The input up to 1.0 amp when the output is at its regu- the regulator is probably in the range of lated value of +5.0 volts, but only 0.4 amp into +10 to +15 volts. If the series pass a short-circuit load. transistor fails by shorting its collector
- 268. VOLTAGE REGULATORS AND POWER CIRCUITS 318 Chapter 6 to emitter (a common failure mode), the full unregulated voltage will be applied to the circuit, with devastating results. Although a fuse probably will blow, what's involved is a race between the fuse and the "silicon fuse" that is constituted by the rest of the circuit; the rest of the circuit will probably respond first! This problem is most serious with TTL logic, which operates from a +5 volt supply, but cannot tolerate more than +7 volts without damage. Another situation with considerable disaster potential arises when you operate something from a wide-range "bench" supply, where the unregulated input may be 40 volts or more, regardless of the output voltage. +5V (regulated) + 5V (regulated) - -5.6V 1N5232B 4 ... 1- Lambda 5% 2N4441 L-6-OV-5 Motorola MPC2004 Figure 6.8. Overvoltage crowbars. Zener sensing Figure 6.8 shows a popular crowbar cir- cuit and a crowbar module. You hook the circuit between the regulated output ter- minal and ground. If the voltage exceeds the zener voltage plus a diode drop (about 6.2V for the zener shown), the SCR is turned on, and it remains in a conducting state until its anode current drops below a few milliamps. An inexpensive SCR like the 2N4441 can sink 5 amps continuously and withstand 80 amp surge currents; its voltage drop in the conducting state i typ- ically 1.0 volt at 5 amps. The 68 o h 1 re- sistor is provided to generate a reasonable zener current (1OmA)at SCR turn-on, and the capacitor is added to prevent crowbar triggering on harmless short spikes. The preceding circuit, like all crowbars, puts an unrelenting 1 volt "short circuit" across the supply when triggered by an overvoltage condition, and it can be reset only by turning off the supply. Since the SCR maintains a low voltage while con- ducting, there isn't much problem with the crowbar itself failing from overheating. As a result, it is a reliable crowbar circuit. It is essential that the regulated supply have some sort of current limiting, or at least fusing, to handle the short. There may be overheating problems with the supply af- ter the crowbar fires. In particular, if the supply includes internal current limiting, the fuse won't blow, and the supply will sit in the "crowbarred"state, with the out- put at low voltage, until someone notices. Foldback current limiting of the regulated supply would be a good solution here. There are several problems with this simple crowbar circuit, mostly involving the choice of zener voltage. Zeners are available in discrete values only, with generally poor tolerances and (often) soft knees in the V I characteristic. The desired crowbar trigger voltage may involve rather tight tolerances. Consider a 5 volt supply used to power digital logic. There is typically a 5% or 10% tolerance on the supply voltage, meaning that the crowbar cannot be set less than 5.5 volts. The minimum permissible crowbar voltage is raised by the problem of transient response of a regulated supply: When the load current is changed quickly, the voltage can jump, creating a spike followed by some "ringing." This problem is exacerbated by remote sensing via long (inductive) sense leads. The resultant ringing puts glitches on the supply that we don't want to trigger the crowbar. The result is that the crowbar voltage should not be set less than about 6.0 volts, but it cannot exceed 7.0 volts without risk of damage to the logic circuits. When you fold in zener tolerance, the discrete voltages actually available, and SCR trigger voltage tolerances, you've got
- 269. HEAT AND POWER DESIGN 6.06 Overvoltage crowbars 319 a tricky problem. In the example shown earlier, the crowbar threshold could lie between 5.9 volts and 6.6 volts, even using the relatively precise 5% zener indicated. IC sensing A nice solution to the problems of pre- dictability and lack of adjustability in the simple zener1SCR crowbar circuit is to use a special crowbar trigger IC such as the MC3423-5, the TL431, or the MC34061- 2. These inexpensive chips come in con- venient packages (8-pin mini-DIP or 3-pin TO-92), they drive the SCR directly, and they're very easy to use. For example, the MC3425 has adjustable threshold and re- sponse time for its crowbar output, and in addition an undervoltage sensor to sig- nal your circuit that the supply voltage is low (very handy for circuits with micropro- cessors). It includes an internal reference and several comparators and drivers, and it requires only two external resistors, an t optional capacitor, and an SCR to form a complete crowbar. These crowbar chips belong to a class of "power-supply super- visory circuits," which includes complex chips like the MAX691 that not only sense undervoltage but even switch over to bat- tery backup when ac power fails, generate a power-on reset signal on return of normal power, and continually check for lockup conditions in microprocessor circuitry. Modular crowbars Why build it when you can buy it! From the designer's point of view the simplest crowbar of all is a 2-terminal gadget that says "crowbar" on top. You can buy just such a device from Lambda or Motorola, who offer a series of overvoltage protectiob modules in several current ranges. You just pick the voltage and current rating you need, and connect the crowbar across the regulated dc output. For example, the smallest units from Lambda are rated at 2 amps maximum, with the following set of fixed voltages (5V, 6V, 12V, 15V, 18V, 20V, and 24V). They're monolithic, come in a TO-66 package (small metal power transistor case), and cost $2.50 in small quantities. The Lambda monolithic 6 amp series comes in TO-3 packages (large metal power transistor case) and costs $5. They also make hybrid 12, 20, and 35 amp crowbars. Motorola's MPC2000 series are all monolithic (5V, 12V, and 15V only, rated at 7.5A, 15A, or 35A). The first two come in TO-220 (plastic power) packages, the last (available in 5V only) in TO-3 (metal power). The good news from Motorola is the incredibly low price: $1.96, $2.36, and $6.08 in small quantities for the three current ratings. One nice feature of these crowbars is the good accuracy; for example, the 5 volt units from Lambda have a specified trip point of 6.6 f0.2 volts. IClamps Another possible solution to overvoltage protection is to put a power zener, or its equivalent, across the supply terminals. This avoids the problems of false triggering on spikes, since the zener will stop drawing current when the overvoltage condition disappears (unlike an SCR, which has the memory of an elephant). Figure 6.9 shows Figure 6.9. Active power zener. the circuit of an "active zener." Unfortu- nately, a crowbar constructed from a power zener clamp has its own problems. If the regulator fails, the crowbar has to contend with high power dissipation (VzenerIlimit)
- 270. VOLTAGE REGULATORS AND POWER CIRCUITS 320 Chapter 6 and may itself fail. We witnessed just such a failure in a commercial 15 volt 4 amp magnetic disc supply. When the pass tran- sistor failed, the 16 volt 50 watt Zener found itself dissipating more than rated power, and it proceeded to fail too. 6.07 Further considerations in high-current power-supply design Separate high-current unregulated supply As we mentioned in Section 6.03, it is usually a good idea to use a separate supply to power the regulator in very high current supplies. In that way the dissipation in the pass transistors can be minimized, since the unregulated input to the pass transistor can then be chosen just high enough to al- low sufficient"headroom" (regulators like the 723 have separate V+ terminals for this purpose). For instance, a +5 volt 10 amp regulator might use a 10 volt unregulated input with a volt or two of ripple, with a separate low-current -I-15 volt supply for the regulator components (reference, error amplifier, etc.). As mentioned earlier, the unregulated input voltages must be cho- sen large enough to allow for worst-case ac power-line voltage (105V) as well as transformer and capacitor tolerances. Connection paths With high-current supplies, or supplies of highly precise output voltage, areful thought must be given to the connection paths, both within the regulator and be- tween the regulator and its load. If several loads are run from the same supply, they should connect to the supply at the place where the output voltage is sensed; other- wise, fluctuations in the current of one load will affect the voltage seen by the other loads (Fig. 6. lo). In fact, it is a good idea to have one common ground point (a "mecca"), as shown, to which the unregulated supply, reference, etc., are all returned. The prob- lem of unregulated voltage drops in the connecting leads from power supply to high-current load is sometimes solved by remote sensing: The connections back to the error amplifier and reference are brought out to the rear of the supply sepa- rately and may either be connected to the output terminals right there (the normal method) or brought out and connected to the load at a remote location along with the output voltage leads (this requires four wires, two of which must be able to handle unregulated Figure 6.10. A power-supplyground "mecca." the high load currents). Most commer- cially available power supplies come with jumpers at the rear that connect the sens- ing circuitry to the output and that may be removed for remote sensing. Four-wire resistors are used in an analogous manner to sense load currents accurately when constructing precision constant-current supplies. This will be discussed in greater detail in Section 6.24. Parallel pass transistors When very high output currents are needed, it may be necessary to use several pass transistors in parallel. Since there will be a spread of VBES, it is necessary to
- 271. HEAT AND POWER DESIGN 6.08 Programmable supplies 321 add a small resistance in series with each 2 5 0 ~ ~ emitter, as in Figure 6.11. The Rs en- 20 ---- sure that the current is shared approxi- 10 mately equally among the pass transistors. 3 R should be chosen for about 0.2 volt g 500ps '-.,T, =25 C 1 oms x ~ - . drop at maximum output current. Power FETs can be connected in parallel without b --- any external components, owing to their 1 o bond~ngwlre l ~ m ~ t e d negative temperature coefficient of drain -----thermally l ~ m ~ t e dB T, = 250 C (s~nglepulse) current (Fig. 3.13). .0 3 -second breakdown l ~ m ~ t e d Safe operating area V,,, collector-emitter voltage ( V ) One last point about bipolar power tran- sistors: A phenomenon known as ‘‘set- Figure 6.12. Safe operating area for 2N3055 bipolar power transistor. (Courtesy of Mo-ond breakdown" restricts the simultaneous torola , inc.) Figure 6.11. Use emitter ballasting resistors when paralleling bipolar power transistors. voltage and current that may be applied for any given transistor, and it is specified on the data sheet as the safe operating area (SOA) (it's a family of safe voltage-versus- current regions, as a function of time duration). Second breakdown involves the than the maximum allowable dissipation of 115 watts. Figure 6.13 shows the SOA for two similar high-performance power transistors: the 2N6274 npn bipolar transistor and the comparable Siliconix VNE003A n-channel MOSFET. For VCE > 10 volts, second breakdown limits the npn transistor dc collector current to values corresponding to less than the maximum allowable dissipation of 250 watts. The problem is less severe for short pulses, and it effectively disappears for pulses of lms duration or less. Note that the MOSFET has no second breakdown; its SOA is bounded by maximum current (bonding-wire limited, therefore higher for short pulses), maximum dissipation, and maximum allowable drain-source voltage. See Chapter 3 for more details on power MOSFETs. formation of "hot spots" in the transistor 6.08 Programmable supplies junctions, with consequent uneven sharing bf the total load. ~ x c e ~ tat low col1ecto~- to-emitter voltages, it sets a limit that is more restrictive than the maximum power dissipation specification. As an example, Figure 6.12 shows the SOA for the ever- popular 2N3055. For VCE > 40 volts, second breakdown limits the dc collector current to values corresponding to less There is frequently the need for power sup- plies that can be adjusted right down to zero volts, especially in bench applications where a flexible source of power is essen- tial. In addition, it is often desirable to be able to "program" the output voltage with another voltage or with a digital input (via digital thumbwheel switches, for instance).
- 272. VOLTAGE REGULATORS AND POWER CIRCUITS 322 Chapter 6 bonding wire limned dissipation limited ~ V D S .BVCE limited 2N6274 (NPN) -VNEOOJA (NMOS) 0~0.011 2 5 10 2 0 50 Figurecompared:6.13. Safebipolaroperatingnpn powerareas lootransistor versus n-channel power v,,, VDS(v) MOSFET of same ratings. Figure 6.14 shows the classic scheme for a supply that is adjustable down to zero output voltage (as our 723 circuits so far are not). A separate split supply provides current split negative Figure 6.14. Regulator adjustable down to zero volts. power for the regulator and also gener- ates an accurate negative reference voltage (more on references in Sections 6.14 and 6.15). R1 sets the output voltage (since the inverting input will be at ground), which can be adjusted all the way down to zero (at zero resistance). When the regulator circuitry (which can be an integrated cir- cuit or discrete components) is run from a split supply, no problems are encountered at low output voltages. To make the supply programmable with an external voltage, just replace Vrefwith an externally controlled voltage(Fig. 6.15). The rest of the circuit is unchanged. R1 now sets the scale of VControl. Digital programmability can be added by replacing Vrefwith a device called a DAC (digital-to-analog converter) with current-sinking output. These devices, which we will discuss later, convert a binary input code to a proportional current
- 273. HEAT AND POWER DESIGN 6.09 Power-supplycircuit example 323 (or voltage) output. A good choice here is the AD7548, a monolithic 12-bit DAC with current-sinking output and a price tag of about $9. By replacing R2 with the DAC, you get a digitally programmed supply, with step size of 114096 (2-12) of the full-scale output voltage. Since the inverting input is a virtual ground, the DAC doesn't even have to have any output compliance. In practice, R1 would be adjusted to set a convenient scale for the output, say 1mV per input digit. 1- Figure 6.15 6.09 Power-supply circuit example The "laboratory" bench supply shown in Figure 6.16 should help pull all these de- sign ideas together. It is important to be able to adjust the regulated output volt- age right down to zero volts in a general- purpose bench supply, so an additional split supply is used to power the regula- tor. IC1 is a high-voltage op-amp, which can operate with 80 volts total supply volt- age. We used paralleled power MOSFETs as the output pass transistor, both because of its easy gate drive requirements and its excellentsafe operating area (characteristic of all power MOSFETs). The combina- tion can dissipate plenty of power (60W per transistor at 100°C case temperature), which is necessary even for moderate out- put current when such a wide range of out- put voltage is provided. This is because the unregulated input voltage has to be high enough for the maximum regulated output voltage, resulting in a large voltage drop across the pass transistors when the regulated output voltage is low. Some sup- plies solve this problem by having several ranges of output voltage, switching the un- regulated input voltage accordingly. There are even supplies with the unregulated sup- ply driven from a variable-voltage trans- former ganged to the same control as the output voltage. In both cases you lose the capability of remote programmability. EXERCISE 6.4 What is the maximum power dissipation in the pass transistors for this circuit? R1 is a precision multidecade poten- tiometer for precise and linear adjustment of the output voltage. The output volt- age is referenced to the IN829 precision zener (5ppm1°C tempco at 7.5mA zener current). The current-limiting circuitry is considerably better than the simple pro- tective current limiters we have been dis- cussing, since it is sometimes desirable to be able to set a precise and stable current limit when using a bench supply. Note the unusual (but convenient) method of current limiting by sinking current from the compensation pin of IC1, which has unity gain to the output while operating at low current. By providing both precision- regulated voltage (all the way down to OV) and current, the device becomes a flex- ible laboratory power supply. With this current-limit method, the supply becomes a flexible constant-current source. Qqpro- vides a constant lOOmA load, maintaining good performance near zero output voltage (or current) by keeping the pass transistors well into the active region. This current sink also allows the load to source some current into the supply without its out- put voltage rising. This is useful with the bizarre loads you sometimes encounter, e-g., an instrument that contains some additional supplies of its own capable of sourcing some current into the power- supply output terminal.
- 274. VOLTAGE REGULATORS AND POWER CIRCUITS 324 Chapter 6 -- 40V 3A 1 15,OOOfiF 50V +45v 0.1A UPP~V I -7 01 Q2 Q~ IRF 143 120W b , total heat sink - pzEzzzq supplyI0& 1N4004 4 - A w - A- *- - .. ---2 100 4b +sense T ..- I RL u 4 ) - 15V -- I I o.ion low 1% 0.03mA 1 -sense .. 150n 3W R2 -110k 6.2k - 15V select select for 0.3V reference across current-limiting resistor potentiometer A - -6.2V 8.5mA current sink Figure 6.16. Laboratory bench supply.
- 275. HEAT AND POWER DESIGN 6.10 Other regulator ICs 325 IEC power entrv suppressor Corcorn 1R1 3 6 ~ i 2 3 ~ 0 2 5 ~ ~ 2 ~ r------------- 1 1OVrrns - FW bridge Figure 6.17. Unregulated supply with ac line connections. Note color convention of ac line cord. __-- Note the external sense leads, with default connection to the power-supply output terminals. For precise regulation of output voltage at the load, you would bring external sense leads to the load itself, eliminating (through feedback) voltage drops in the connecting leads. - I Varo VH247 I 100 I I I I I I * 6.10 Other regulator ICs V130LAlOA L------------ A , P-8380 Spraguetransient ac line filter The 723 was the original voltage regulator IC, and it is still a useful chip. There are a few improved versions that work much the same way, however, and you should consider them when you design a regulated power supply. The LAS1000 and LASl 100 from Lambda and the SG3532 from Silicon General can operate down to 4.5 volts input voltage, because they use an internal 2.5 volt "bandgap reference" (see Section 6.15) rather than the 7.15 volt zener of the 723. They also have internal circuitry that shuts off the chip if it overheats; compare the 723's solution (burnout!). Although these regulators have the same pin names, you can't just plug these regulators into a socket intended for a 723, because (among other things) they assume a lower reference voltage. Another 723-like regulator is the MC1469 (and its negative twin, the MC1463) from Motorola. If you look at modern power-supply cir- cuits, you won't see many 723s, or even the improved versions we just mentioned. Instead, you'll see mostly ICs like the 7805 or 317, with a remarkable absence of exter- nal components (the 7805 requires none!). Most of the time you can get all the per- formance you need from these highly in- tegrated and easy-to-use "three-terminal" regulators, including high output current (up to 10A) without external pass transis- tors, adjustable output voltage, excellent regulation, and internal current limiting and thermal shut-down. We'll talk about these shortly, but first an interlude on (a) the design of the unregulated supply and (b) voltage references. THE UNREGULATED SUPPLY All regulated supplies require a source of "unregulated7 ' dc, a subject we introduced in Section 1.27 in connection with recti- fiers and ripple calculations. Let's look at this subject in more detail, beginning with the circuit shown in Figure 6.17. This is an unregulated +13 volt (nominal) supply for use with a +5 volt 2 amp regulator. Let's go through it from left to right, pointing out some of the things to keep in mind when you do this sort of design.
- 276. VOLTAGE REGULATORS AND POWER CIRCUITS 326 Chapter 6 6.11 ac line components Three-wire connection Always use a 3-wire line cord with neu- tral (green) connected to the instrument case. Instruments with ungrounded cases can become lethal devices in the event of transformer insulation failure or acciden- tal connection of one side of the power line to the case. With a grounded case, such a failure simply blows a fuse. You often see instruments with the line cord attached to the chassis(permanently) using a plastic "strain relief," made by Heyco or Richco. A better way is to use an IEC three-prong male chassis-mounted connector, to mate with those popular line cords that have the three-prong IEC female molded onto the end. That way the line cord is conve- niently removable. Better yet, you can get a combined "power entry module," con- taining IEC connector, fuse holder, line filter, and switch (as described later). Note that ac wiring uses a nonintuitive color convention: black = "hot," white = neu- tral, and green = ground. Line filter and transient suppressor In this supply we have used a simple LC line filter. Although they are often omitted, such filters are a good idea, since they serve the purpose of preventing possible radiation of radiofrequency interference (RFI) from the instrument via the power line, as well as filtering out incoming inter- ference that may be present on the power line. Power-line filters with excellent performance characteristics are available from several manufacturers, e.g., Corcom, Cornell-Dubilier, and Sprague. Studies have shown that spikes as large as 1kV to 5kV are occasionally present on the power lines at most locations, and smaller spikes occur quite frequently. Line filters are reasonably effective in reducing such interference. In many situations it is desirable to use a "transient suppressor," as shown, a device that conducts when its terminal voltage ex- ceeds certain limits (it's like a bidirectional high-power zener). These are inexpensive and small and can short out hundreds of amperes of potentially harmful current in the form of spikes. Transient suppressors are made by a number of companies, e.g., GE and Siemens. Tables 6.2 and 6.3 list some useful RFI filters and transient suppressors. Fuse A fuse is essential in every piece of elec- tronic equipment. The large wall fuses or circuit breakers (typically 15-20A) in house or lab won't protect electronic equip- ment, since they are chosen to blow only when the current rating of the wiring in the wall is exceeded. For instance, a TABLE 6.2. 130 VOLT AC TRANSIENT SUPPRESSORS Diameter Energy Peak curr Capacitance Type Manuf. (in) (W-s) (A) (PF) V130LA1 GE 0.34 4 500 180 S07K130 Siemens 0.35 6 500 130 V130LAlOA GE 0.65 30 4000 1000 S14K130 Siemens 0.67 22 2000 1000 V130LA20B GE 0.89 50 6000 1900 S20K130 Siemens 0.91 44 4000 2300
- 277. THE UNREGULATED SUPPLY 6.11 ac line components 32' TABLE 6.3. 115 VOLT AC POWER FILTERS (IEC CONNECTORa ) ~ttenuation~ (line-to-gnd,50Rl50R) Current 1SOkHz 5OOkHz lMHz Manuf. Part No. Circuit (A) (dB) (dB) (dB) Comments Corcom 3EF1 n 3 15 25 30 general purpose 3EC1 x 3 20 30 37 higher attenuation 3EDSC2-2 x 3 32 37 44 with fuse 2EDLlS x 2 14 - 24 with fuse and switch Curtis F2100CA03 x 3 15 25 30 general purpose F2400CA03 x 3 22 35 40 higher attenuation F2600FA03 x 3 21 35 41 with fuse PE810103 x 3 18 24 30 with fuse and switch Delta 03GEEG3H x 3 24 30 38 general purpose 03SEEG3H dual-x 3 42 65 70 higher attenuation 04BEEG3H x 4 26 35 40 with fuse 03CK2 IT 3 35 40 40 with fuse and switch 03CR2 dual-x 3 50 60 55 same, higher attenuation Schaffner FN323-3 x 3 22 32 36 general purpose FN321-3 x 3 35 43 46 higher attenuation FN361-2 x 2 25 40 46 with fuse FN291-2.5 x 2.5 25 40 46 with fuse and switch FN1393-2.5 x 2.5 40 45 42 same, higher attenuation Sprague 3JX5421A n 3 15 25 30 general purpose 3JX5425C x 3 20 30 37 higher attenuation 200JM6-2 x 6 12 25 - with fuse (a) these unit are representative of a large selection, many of which do not include an IEC input connector. rf attenuation figures are measured in a 50Q system, and should not be relied upon to predict performance in an ac line circuit. house wired with 14 gauge wire will have 15 amp breakers. Now, if the filter capacitor in the preceding supply becomes short-circuited someday (a typical failure mode), the transformer might then draw 5 amps primary current (instead of its usual 0.25A). The house breaker won't open, but your instrument becomes an incendiary device, with its transformer dissipating over 500 watts! Some notes on fuses: (a) It is best to use a "slow-blow" type in the power-line circuit, because there is invariably a large current transient at turn-on (caused mostly by rapid chargingof the power-supplyfilter capacitors). (b) You may think you know how to calculate the fuse current rating, but you're probably wrong. A dc power supply has a high ratio of rms current to average current, because of the small conduction angle (fraction of the cycle over which the diodes are conducting). The problem is worse if overly large filter capacitors are used. The result is an rms current considerably higher than you would estimate. The best procedure is to use a "true rms" ac current meter to measure the actual rms line current, then choose a fuse of at least 50%higher current rating (to allow for high line voltage, the effects of fuse "fatigue," etc.). (c) When wiring cartridge-type fuse holders (used with the popular 3AG fuse, which is almost universal in electronic equipment), be sure
- 278. VOLTAGE REGULATORS AND POWER CIRCUITS 328 Chapter 6 to connect the leads so that anyone chang- ing the fuse cannot come in contact with the power line. This means connecting the "hot" lead to the rear terminal of the fuse holder (the authors learned this the hard way!). Commercial power-entry modules with integral fuse holders are usually ar- ranged so that the fuse cannot be reached without removing the line cord. Shock hazard Incidentally, it is a good idea to insulate all exposed 110 volt power connections inside any instrument, using Teflon heat- shrink tubing, for instance (the use of "fric- tion tape" or electrical tape inside elec- tronic instruments is strictly bush-league). Since most transistorized circuits operate on relatively low dc voltages (f15V to f30V or so), from which it is not possible to receive a shock, the power line wiring is the only place where any shock hazard exists in most electronic devices (there are exceptions, of course). The front-panel ONIOFF switch is particularly insidious in this respect, since it is close to other low-voltage wiring. Your test instruments (or, worse, your fingers) can easily come in contact with it when you go to pick up the instrument while testing it. Miscellany We favor "power-entry modules,"combin- ing a 3-prong IEC connector (use a remov- able line cord) and some combination of line filter, fuse holder, and power switch. For example, the Schaffner FN380 series (or Corcom L series) has all these features, and they are available with maximum cur- rents from 2 to 6 amps. They give you op- tions for fusing or switching either one or both sidesof the line, and they offer several filter configurations. Some other manufac- turers offering similar products are Curtis, Delta, and Power Dynamics (Table 6.3). Our circuit shows an LED pilot light (with current-limiting resistor) running from the unregulated dc voltage. It is gen- erally better practice to power the LED from the regulated dc, so that it doesn't flicker with load or power-line variations. The series combination of 100 ohms and 0.1pF capacitor across the transformer primary prevents the large inductive transient that would otherwise occur at turn-off. This is often omitted, but it is highly desirable, particularly in equipment intended for use near computers or other digital devices. Sometimes this RC "snubber" network is wired across the switch, which is equivalent. 6.12 Transformer Now for the transformer. Never build an instrument to run off the power line without a transformer! To do so is to flirt with disaster. Transformerless power supplies, which are popular in some con- sumer electronics (radios and televisions, particularly) because they're cheap, put the circuit at high voltage with respect to external ground (water pipes, etc.). This has no place in instruments intended to interconnect with any other equip- ment and should always be avoided. And use extreme caution when servicing any such equipment; just connecting your oscilloscope probe to the chassis can be a shocking experience. The choice of transformer is more involved than you might at first expect. One problem is that manufacturers have been slow to introduce transformers with voltages and currents appropriate for transistorized circuitry (the catalogs are still cluttered with transformers designed for vacuum tubes), and you wind up mak- ing compromises you'd rather avoid. We have found the Signal Transformer Company unusual, with their nice selec- tion of transformers and quick delivery. Don't overlook the possibility of having
- 279. THE UNREGULATEDSUPPLY 6.13 dc components 329 transformers custom-made if your applica- tion requires more than a few. Even assuming that you can get the transformer you want, you still have to decide what voltage and current are best. The lower the input voltage to the regula- tor, the lower the dissipation in the pass transistors. But you must be absolutely certain the input to the regulator will never drop below the minimum necessary for regulation, typically 2 to 3 volts above the regulated output voltage, or you may encounter 120Hz dips in the regulated output. The amount of ripple in the un- regulated output is involved here, since it is the minimum input to the regulator that must stay above some critical voltage, but it is the average input to the regulator that determines the transistor dissipation. As an example, for a +5 volt regulator you might use an unregulated input of +10 volts at the minimum of the ripple, which itself might be a volt or two. From the secondary voltage rating you can make a pretty good guess of the dc output from the bridge, since the peak voltage (at the top of the ripple) is approximately 1.4 times the rms secondary voltage, less two diode drops. But it is essential to make actual measurements if you are designing a power supply with near-minimum drop across the regulator, because the actual output voltage of the unregulated supply depends on poorly specified parameters of the transformer, such as winding resistance and magnetic coupling, both of which contribute to voltage drop under load. Be sure to make measurements under worst-case conditions: full load and low power-line voltage (105V).Remember that large filter capacitors typically have loose tolerances: -30% to +100°/o about the nominal value is not unusual. It is a good idea to use transformers with multiple taps on the primary, when available, for final adjustment of output voltage. The Triad F-90X series and the Stancor TP series are very flexible this way. One further note on transformers: Cur- rent ratings are sometimes given as rms secondary current, particularly for trans- formers intended for use into a resistive load (filament transformers, for instance). Since a rectifier circuit draws current only over a small part of the cycle (during the time the capacitor is actually charging),the rms current, and therefore the 1 2 ~heat- ing, is likely to exceed specifications for a load current approaching the rated rms current of the transformer. The situation gets worse as you increase capacitor size to reduce preregulator ripple; this simply re- quires a transformer of larger rating. Full- wave rectification is better in this respect, since a greater portion of the transformer waveform is used. 6.13 dc components Filter capacitor The filter capacitor is chosen large enough to provide acceptably low ripple voltage, with voltage rating sufficient to handle the worst-case combination of no load and high line voltage (125-130V rms). For the circuit shown in Figure 6.17, the ripple is about 1.5 volts pp at full load. Good design practice calls for the use of computer-type electrolytics (they come in a cylindrical package with screw terminals at one end), e.g., the Sprague 36D type. In smaller capacitance values most manufacturers provide capacitors of equivalent quality in an axial-lead package (one wire sticking out each end), e.g., the Sprague 39D type. Watch out for the loose capacitance tolerance! At this point it may be helpful to look back at Section 1.27, where we first dis- cussed the subject of ripple. With the ex- ception of switching regulators (seeSection 6.19 and following), you can always calcu- late ripple voltage by assuming a constant- current load equal to the maximum output load current. In fact, the input to a series
- 280. VOLTAGE REGULATORS AND POWER CIRCUITS 330 Chapter 6 regulator looks just like a constant-current sink. This simplifiesyour arithmetic, since the capacitor discharges with a ramp, and you don't have to worry about time con- stants or exponentials (Fig. 6.18). time -Figure 6.18 For example, suppose you want to choose a filter capacitor for the unregu- lated portion of a +5 volt 1 amp regulated supply, and suppose you have already cho- sen a transformer with a 10 volt rms sec- ondary, to give an unregulated dc output of 12 volts (at the peak of the ripple) at full load current. With a typical regulator dropout voltage of 2 volts, the input to the regulator should never dip below +7 volts (the 723 will require +9.5V, but the con- venient 3-terminal regulators discussed in Section 6.16 are more friendly). Since you have to contend with a f10% worst-case line-voltage variation, you should keep ripple to less than 2 volts pp. Therefore, 2 = T(dV/dT) = TIIC = 0.008 x l.O/C from which C=4000pE A 5000pF 25 volt electrolytic would be a minimum choice, with allowance for a 20°/0 tolerance in ca- pacitor value. When choosing filter capac- itors, don't get carried away: An oversize capacitor not only wastes space but also increases transformer heating (by reducing the conduction angle, hence increasing the ratio I,,,/I,,,). It also increases stress on the rectifiers. The LED shown across the output in Figure 6.17 acts as a "bleeder"to discharge the capacitor in a few seconds under no- load conditions. This is a good feature, because power supplies that stay charged after things have been shut off can easily lead you to damage some circuit com- ponents if you mistakenly think that no voltage is present. Rectifier The first point to be made is that the diodes used in power supplies are quite different from the small 1N914-type signal diodes used in circuitry. Signal diodes are gen- erally designed for high speed (a few nanoseconds), low leakage (a few nano- amps), and low capacitance (a few pico- farads), and they can generally handle cur- rents up to about IOOmA, with breakdown voltages rarely exceeding 100 volts. By contrast, rectifier diodes and bridges for use in power supplies are hefty objects with current ratings going from 1 amp to 25 amps or more and breakdown voltages going from 100 volts to 1000 volts. They have relatively high leakage currents (in the range of microamps to milliamps) and plenty of junction capacitance. They are not intended for high speed. Table 6.4 lists a selection of popular types. Typical of rectifiers is the popular 1N4001-1N4007 series, rated at 1 amp, with reverse-breakdown voltages ranging from 50 to 1000 volts. The IN5625 series is rated at 3 amps, which is about the high- est current available in a lead-mounted (cooled by conduction through the leads) package. The popular IN1183A series typifies high-current stud-mounted recti- fiers, with a current rating of 40 amps and breakdown voltages to 600 volts. Plastic- encapsulated bridge rectifiers are quite popular also, with lead-mounted 1 and 2 amp types and chassis-mounted packages in ratings up to 25 amps or more. For rectifier applications where high speed is important (e.g., dc-to-dc converters, see Section 6.19), fast-recovery diodes are
- 281. THE UNREGULATED SUPPLY 6.13 dc components 331 TABLE 6.4. RECTIFIERS Breakdown Forward Average voltage drop current VBR V F ~ Y P TYpe (v) (v) (A) Package Comments @ 10 General purpose 1N4001-07 50-1000 0.9 1 lead-mounted popular 1N5059-62 200-800 1.O 2 lead-mounted 1N5624-27 200-800 1.O 5 lead-mounted 1N1183A-90A 50-600 0.9 40 stud-mounted popular; -R for rev. pol. Fast recovery (t,, = 0 . 1 ~ ~typ) 1N4933-37 50-600 1.O 1 lead-mounted 1N5415-19 50-500 1.O 3 lead-mounted 1N3879-83 50-400 1.2 6 stud-mounted -R for reverse polarity 1N5832-34 50-400 1.O 20 stud-mounted -R for reverse polarity Schottky (low VF, very fast) 1N5817-19 20-40 0.6m 1 lead-mounted 1N5820-22 20-40 0.5"' 3 lead-mounted 1N5826-28 20-40 0.5"' 15 stud-mounted 1N5832-34 20-40 0.6"' 40 stud-mounted Full-wavebridge 3N246-52 50-1000 0.9 1 plastic SIP MDA100A 3N253-59 50-1000 2 plastic SIP MDA200 MDA970A1-A5 50-400 0.85 8 chassis mtd MDA3500-10 50-1000 35 chassis mtd Exotic GE A570A-A640L 100-2000 1.0"' 1500 giant button high current! Semtech SCH5000-25000 5kV-25kV 7-33"' 0.5 lead-mounted HV, curr; fast (0.2~s) Varo VF25-5 to -40 5kV-40kV 12-50"' 0.025 lead-mounted high voltage Semtech SCKV100K3- 100kV-200kV 150-300 0.1 plastic rod very high voltage 200K3 (m) maximum. available, e.g., the IN4933 series of 1 amp diodes. For low-voltage applica- tions it may be desirable to use Schottky barrier rectifiers, e.g., the lN5823 series, with forward drops of less than 0.4 volt at 5 amps. VOLTAGE REFERENCES There is frequently the need for good volt- age references within a circuit. For in- stance, you might wish to construct a pre- cision regulated supply with characteristics better than those you can obtain us- ing complete regulators like the 723 (since integrated voltage regulator chips usually dissipate considerable power be- cause of the built-in pass transistor, they tend to heat up, with consequent drift). Or you might want to construct a precision constant-current supply. Another applica- tion that requires a precision reference, but not a precision power supply, is design of an accurate voltmeter, ohmmeter, or ammeter. There are two kinds of voltage ref- erences - Zener diodes and bandgap
- 282. VOLTAGE REGULATORS AND POWER CIRCUITS 32 Chapter 6 references; each can be used alone or as an internal part of an integrated circuit voltage reference. 6.14 Zener diodes The simplest form of voltage reference is the zener diode, a device we discussed in Section 1.06. Basically, it is a diode oper- ated in the reverse-bias region, where cur- rent begins to flow at some voltage and in- creases dramatically with further increases in voltage. To use it as a reference, you simply provide a roughly constant current; this is often done with a resistor from a higher supply voltage, forming the most primitive kind of regulated supply. Zeners are available in selected voltages from 2 to 200 volts (they come in the same series of values as standard 5% resistors), with power ratings from a fraction of a watt to 50 watts and tolerances of 1% to 20%. As attractive as they might seem for use as general-purpose voltage references, zeners are actually somewhat difficult to use, for a variety of reasons. It is necessary to stock a selection of values, the voltage tolerance is poor except in high-priced precision zeners, they are noisy, and the zener voltage depends on current and temperature. As an example of the last two effects, a 27 volt zener in the popular IN5221 series of 500mW zeners has a temperature coefficient of +O. lW°C, and it will change voltage by 1% when its current varies from 10% to 50% of maximum. There is an exception to this generally poor performance of zeners. It turns out that in the neighborhood of 6 volts, zener diodes become very stiff against changes in current and simultaneously achieve a nearly zero temperature coefficient. The graphs in Figure 6.19, plotted from mea- surements on zeners with different volt- ages, illustrate the effects. This peculiar behavior comes about because "zener" diodes actually employ two different mechanisms: zener breakdown (low volt- age) and avalanche breakdown (high volt- age). If you need a zener for use as a stable voltage reference only, and you don't care what voltage it is, the best thing to use is one of the compensated zener references constructed from a 5.6 volts zener (approx- imately) in series with a forward-biased diode. The zener voltage is chosen to give a positive coefficient to cancel the diode's temperature coefficient of -2.lmV/OC. L I I I I I I I I I I 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 V,, zener voltage @ I, (V) A Vz, zener voltage @I,, ( V ) B Figure 6.19. Zener diode impedance and regulation for zener diodes of various voltages. (Courtesy of Motorola, Inc.) As you can see from the graph in Fig- ure 6.20, the temperature coefficient de- pends on operating current and also on the zener voltage. Therefore, by choosing the
- 283. VOLTAGE REFERENCES 6.14 Zener diodes 333 zener current properly, you can "tune" the temperature coefficient somewhat. Such zeners with built-in series diodes make par- ticularly good references. As an example, the 1N821 series of inexpensive 6.2 volt references offers temperature coefficients going from 100ppmI0C(1N821) down to 5ppmI0C(1N829); the IN940 and IN946 are 9 volt and 11.7 volt references with tempcos of 2ppmI0C. output! For the "wrong" polarity, the zener operates as an ordinary fonvard- biased diode. Running the op-amp from a single supply, as shown, overcomes this bizarre problem. Be sure to use an op-amp that has common-mode input range to the negative rail ("single-supply"op-amps). There are special compensated zeners available with guaranteed stability of zener voltage with time, a specification that nor- mally tends to get left out. Examples are the IN3501 and IN4890 series. Zeners of this type are available with guaranteed sta- bility of better than 5ppml1000h. They're not cheap. Table 6.5 lists the character- istics of some useful zeners and reference diodes, and Table 6.6 shows part numbers for two popular 500mW general-purpose zener families.a E -1.0 - / I l l l l l l I l l 2.03.0 4.0 5.0 6.0 7.0 8.0 9.0 10 11 12 V,, zener voltage (V) Figure 6.20. Temperature coefficient of zener diode breakdown voltage versus the voltage of the zener diode. (Courtesyof Motorola, Inc.) Providing operating current These compensated zeners can be used as stable voltage references within a circuit, but they must be provided with constant current. The IN821 series is specified as 6.2 volts f5% at 7.5mA, with an incremental resistance of about 15 ohms; thus, a change in current of ImA changes the reference voltage three times as much as a change in temperature from -55OC to +lOO°C for the lN829. Figure 6.21 shows a simple way to provide constant bias current for a precision zener. The op- amp is wired as a noninverting amplifier in order to generate an output of exactly +10.0 volts. That stable output is itself used to provide a precision 7.5mA bias current. This circuit is self-starting, but it can turn on with either polarity of Figure 6.21 IC zeners The 723 regulator uses a compensated zener reference to achieve its excellent performance (30ppmI0Cstability of V,,f). The 723, in fact, is quite respectable as a voltage reference all by itself, and you can use the other components of the IC to generate a stable reference output at any desired voltage. The 723 used as a voltage reference is an example of a Pterminalreference, mean- ing that it requires a power supply to
- 284. VOLTAGE REGULATORS AND POWER CIRCUITS U4 Chapter 6 TABLE 6.5. ZENER AND REFERENCE DIODESa Regulation Zener Test AV for voltage current Tempco *lo% IZT Pdiss vz IZ, Tolerance max max max TYPe (V) @ (mA) (to o) (ppm/.C) (mV) (W) Comments Referencezeners 1N821A- 6.2 7.5 5 *I00 7.5 0.4 5 member family, graded by 1N829A 6.2 7.5 5 +5 7.5 0.4 tempco; best and worst shown 1N4890- 6.35 7.5 5 *20 0.4 long-term stab < 100ppm/1000h 1N4895 6.35 7.5 5 +5 0.4 long-term stab < 1Oppm/lOOOh Regulatorzeners 1N5221A 2.4 20 10 -850 60 0.5 60 member family, 2.4V to 200V, 1N5231A 5.1 20 10 f300 34 0.5 in "5% resistor values," plus 1N5281A 200 0.65 10 +I100 160 0.5 some extras. -B= +_55%;popularb 1N4728A 3.3 76 10 -750 76 1.0 37 member family, 3.3V to 1OOV, 1N4735A 6.2 41 10 +500 8 1.0 in "5% resistor values." 1N4764A 100 2.5 10 +I100 88 1.0 -8= k5%; popular (a) see also Table 6.7 (IC Voltage References). (b) see Table 6.6 (500mW Zeners). operate, and includes internal circuitry to bias the zener and buffer the output volt- age. Improved 3-terminal IC zeners in- clude the excellent LM369 from National (1.5ppmI0Ctyp), and the REFlOKM from Burr-Brown ( 1ppmf°C max tempco); we've often used the inexpensive Motorola MC1404 (which is actually a bandgap reference, see below) in our circuits. We'll treat 3-terminal precision references in more detail shortly, after discussing the simpler 2-terminal types. Precision temperature-compensated ze- ner ICs are available as d-terminal refer- ences also; electrically they look just like zeners, although they actually include a number of active devices to give improved performance (most notably, constancy of "zener" voltage with applied current). An example is the inexpensive LM329, with a zener voltage of 6.9 volts. Its best version has a tem~eraturecoefficient of Some unusual IC zeners include the temperature-stabilized LM399 (0.3ppmI0C TABLE 6.6. 500mW ZENER DIODES IN5221 IN746 VZ IZT series series (V) @ (mA) 6ppmPC (typ), l ~ ~ ~ m / ~ ~(max), when ~~~~~~ i::ii ;:: 0.85 provided with a constant current of 1mA. 0.65
- 285. VOLTAGE REFERENCES 6.15 Bandgap (VBE)reference 335 typ), the micropower LM385 (which oper- ates down to 10,uA), and the astounding LTZ1000 from Linear Technology, with its O.O5ppmI0C typical tempco, 0.3ppm per square-root-month drift, and 1.2pV low- frequency noise. Zener diodes can be very noisy, and some IC zeners suffer from the same dis- ease. The noise is related to surface effects, however, and buried (or subsurface) zener diodes are considerably quieter. In fact, the LTZ1000 buried zener just mentioned is the quietest reference of any kind. The LM369 and REFIOKM also have very low noise. zener current (mA) Figure6.22. Voltage noise for a low-noisezener reference diode similar to the type used in the 723 regulator. Table 6.7 lists the characteristics of nearly all available IC references, both zener and bandgap. 6.15 Bandgap (VBE)reference More recently, a circuit known as a "band- gap" reference has become popular. It should properly be called a VBE reference, and it is easily understandable using the Ebers-Moll diode equation. Basically, it involves the generation of a voltage with a positive temperature coefficient the same as VBE9snegative coefficient; when added to a VBE, the resultant voltage has zero tempco. We start with a current mirror with two transistors operating at different emitter IP (constant) Q 1 Figure 6.23 current densities (typically a ratio of 10:1) (see Fig. 6.23). Using the Ebers-Moll equation, it is easy to show that IOuthas a positive temperature coefficient, since the difference in VBESis just (ICTIq)log, r, where r is the ratio of current densities (see the graph in Fig. 2.53). You may wonder where we get the constant programming current Ip. Don't worry; you'll see the clever method at the end. Now all you do is convert that current to a voltage with a resistor and add a normal VBE. Figure 6.24. Classic VBE bandgap voltage reference. Figure 6.24 shows the circuit. R2 sets the amount of positive-coefficient voltage you have added to VBE, and by choosing it appropriately, you get zero overall tem- perature coefficient. It turns out that zero temperature coefficient occurs when the
- 286. TABLE 6.7. IC VOLTAGE REFERENCES Regulation z Noise c 2 Min Output voltage Long-term Load .E 2.Q .- Tempco supply Supply curr 0.1-1OHz stability Line 0-lOmA E Voltage Acc'y typ voltage curr max typ tYP tYP tYP Type Mfga ,!! (V) (Oh) (ppm/"C) (V) (mA) (mA) (pV pp) (ppm/1000h) (%/V) (YO) Regulator type LMlOC NS+ B 8 0.20 5 pA723C FS+ Z 14 7.15 3 SG3532J SG+ B 10 2.50 4 Two-terminal (zener) type LM129A NS Z 2 - VR182C DA B 2 - LM313 NS B 2 - LM329C NS Z 2 - LM336-2.5 NS B 3 ' LM336B-5 NS B 3 LM385B NS B 2 - LM385BX-1.2 NS B 2 - LM385BX-2.5 NS B 2 - LM299A NS Z 4 - LM399 NS Z 4 - LM3999 NS Z 3 - TL430 TI B 3 - TL431 TI B 3 - AD589M AD B 2 - LTZ1000 LT Z 2 - LT1004C-1.2 LT B 2 - LTlOO9C LT B 3 LT1029A LT B 3 LT1034B LT B 3 - LT Z HS5010N HS B 2 - ICL8069A IL B 2 - TSC9491 TS B 2 - Three-terminaltype REF-O1A PM 6 8 10.0 0.3 REF-O2A PM B 8 5.0 0.3 REF-O3E PM B 8 2.5 0.3 REF-05 PM B 8 5.0 0.3 REF-O8G PM Z 8 ' -10.0 0.2 REF-10 PM B 8 10.0 0.3 REFlOKM BB Z 8 10.0 0.05 REF-43E PM B 8 2.5 0.05 LH0070-1 NS Z 3 - 10.0 0.1 REFlOlKM BB Z 8 10.0 0.05 LM368Y-2.5 NS B 8 2.5 0.2 LM368-5 NS B 4 5.0 0.1 LM368-10 NS B 4 10.0 0.1 LM369B NS Z 3,8 10.0 0.05 b36 AD580M AD B 3 - 2.5 1
- 287. VOLTAGE REFERENCES 6.15 Bandgap ( V B ~ )reference 337 Regulation & Noise C 2 Min Output voltage Long-term Load E 2. Tempco supply Supply curr 0.1-1OHz stability Line 0-lOmA $ 'E E Voltage Acc'y typ voltage curr max typ a P $ . r tYP tYP tYP Type Mfg m I- I- (V) ('10) (pprn/"C) (V) (mA) (mA) (PV PP) (pprn/1000h) (%IV) Three-terminal type (cont'd) AD581L AD+ B 3 - 10.0 AD584L AD B 8 2.5 AD 5.0 AD 7.5 AD 10.0 AD586L AD Z 8 5.0 AD587L AD Z 8 10.0 AD588B AD Z 14 210.0 MAX671C MA Z 14 10.0 AD689L AD Z 8 8.192 R675C-3 HS Z 14 ' klO.O LT1019A-2.5 LT B 8 2.5 LT1021B-5 LT Z 8 ' 5.0 LT1031B LT Z 3 - 10.0 MC1403A MO B 8 - 2.5 MC1404AU5 MO B 8 5.0 MC1404AUlOMO B 8 10.0 ~ ~ 2 7 0 2 ~ ~AD+ Z 14 k10.0 ~ ~ 2 7 1 2 ~ ~AD+ Z 14 k10.0 LP2950ACZ NS B 3 - 5.0 ICL8212 IL B 8 ' 1.15 TSC9495 TS B 8 5.0 TSC9496 TS B 8 10.0 5 12 10 5 5 7.5 5 10 5 12.5 5"' - 5"' - 1.5"' f14 I"' 13.5 5"' 10.8 5 k13 3 4 2 7 3 11 10 4.5 10 7.5 10 12.5 5"' 213 lm f13 20 5.4 200 1.8 20 7 20 12 (a) 0 to 1rnA. (b) rnax zener curr. (') on-chip heaterltherrnostat. (d) specified for 1OpA to 20rnA operating curr. fe) 1Hz to 10Hz. (') lOHz to lOkHz, rrns. (g) lOHz to 1kHz, rrns, (h) spec'd for 50pA to 5rnA. (') 2700,2710: +10V; 2701: -10V; 2702,2712: +10V. (1) 0 to 5rnA. (k) spec'd for 50pA to 500pA. (') spec'd for 0.5 to 20rnA. (m) rnin or rnax. (" 1 to 20mA, rnax. ('1 specified for 0.5 to 1OmA. (p) specified for 20pA to 20rnA. (4) specified for 100pA to 20rnA. (') specified forIrnA to 5rnA. total voltage equals the silicon bandgap voltage (extrapolated to absolute zero), about 1.22 volts. The circuit in the box is the reference. Its own output is used (via R3) to create the constant current we initially assumed. Figure 6.25 shows another very popular bandgap reference circuit (it replaces the components in the box in Figure 6.24). Q1 and Q2are a matched pair, forced to oper- ate at a ratio of emitter currents of 10:l by feedback from the collector voltages. The difference in VBEs is (kTlq)log,lO, making &a's emitter current proportional to T (the preceding voltage applied across R1). But since Ql's collector current is larger by a factor of 10, it also is propor- tional to T. Thus, the total emitter cur- rent is proportional to T, and therefore it generates a positive-tempco voltage across R2. That voltage can be used as a ther- mometer output, by the way, as will be discussed shortly. R2's voltage is added to Ql's VBE to generate a stable reference of zero tempco at the base. Bandgap refer- ences appear in many variations, but they
- 288. VOLTAGE REGULATORS AND POWER CIRCUITS 338 Chapter 6 all feature the summation of V B ~with a voltage generated from a pair of transis- tors operated with some ratio of current densities. tap for temperature 'I:Figure 6.25 17IC bandgap references An example of an IC bandgap reference is the inexpensive 2-terminal LM385-1.2, with a nominal operating voltage of 1.235 volts, f1°/o (the companion LM385-2.5 uses internal circuitry to generate 2.50V), usable down to 10pA. That's much less than you can run any zener at, making these references excellent for micropower equipment (see Chapter 14). The low reference voltage (1.235V) is often much more convenient than the approximately 5 volt minimum usable voltage for Zen- ers (you can get zeners rated at voltages as low as 3.3V, but they are pretty awful, with very soft knees). The best grade of LM385 guarantees 30ppmI0C maximum tempco and has a typical dynamic impedance of 1 ohm at 100pA. Compare this with the equivalent figures for a IN4370 2.4 volt zener diode: tempco 800ppmI0C (typ), dynamic impedance = 3000 ohms at 1OOpA, at which the "zener voltage"(spec- ified as 2.4V at 20mA) is about 1.1 volt! When you need a precision stable voltage reference, these excellent bandgap ICs put conventional zener diodes to shame. If you're willing to spend a bit more money, you can find bandgap references of excellent stability, for example, the 2- terminal LT1029, or the 3-terminal REF- 43 (2.50V, 3ppmJ0C max). The latter type, like the 3-terminal references based on zener technology, requires a dc supply. Table 6.7 lists most available bandgap (and zener) references, both 2-terminal and 3-terminal. One other interesting voltage reference is the TL431C. It is an inexpensive "pro- grammable zener" reference, and it is used as shown in Figure 6.26. The "zener" (made from a VBEcircuit) turns on when the control voltage reaches 2.75 volts; the device draws only a few microamps from the control terminal and gives a typical tempco of output voltage of 10ppmI0C. The circuit values shown give a zener volt- age of 10.0 volts, for example. This device comes in a mini-DIP package and can handle currents to 100mA. Figure 6.26 Bandgap temperature sensors The predictable VBEvariation with tem- perature can be exploited to make a tem- perature-measuring IC. The REF-02, for
- 289. VOLTAGE REFERENCES 6.15 Bandgap (VBE)reference 339 instance, generates an additional output voltage that varies linearly with tempera- ture (see preceding discussion). With some simple external circuitry you can gener- ate an output voltage that tells you the chip temperature, accurate to 1% over the full "military" temperature range (-55OC to +125OC). The AD590, intended for temperature measurement only, generates an accurate current of lpAI°K. It's a 2- terminal device; you just put a voltage across it (4-30V)and measure the current. The LM334 can also be used in this man- ner. Other sensors, such as the LM35 and LM335, generate accurate voltage outputs with a slope of +10mVI0C. Section 15.01 has a detailed discussion on all these temperature "transducers." Three-terminal precision references As we remarked earlier, it is possible to make voltage references of remarkable temperature stability (down to 1ppml0C or less). This is particularly impressive when you consider that the venerable Wes- ton cell, the traditional voltage reference through the ages, has a temperature coef- ficient of 40ppmI0C (see Section 15.11). There are two techniques used to make such references. 1. Temperature-stabilized references. A good approach to achieving excellent tem- perature stability in a voltage reference cir- cuit (or any other circuit, for that matter) is to hold the reference, and perhaps its associated electronics, at a constant ele- vated temperature. You will see simple techniques for doing this in Chapter 15 (one obvious method is to use a bandgap temperature sensor to control a heater). In this way the circuit can deliver equivalent performance with a greatly relaxed tem- perature coefficient, since the actual cir- cuit components are isolated from exter- nal temperature fluctuations. Of greater interest for precision circuitry is the ability to deliver significantly improved performance by putting an already well- compensated reference circuit into a constant-temperature environment. This technique of temperature-stabi- lized or "ovenized" circuits has been used for many years, particularly for ultrastable oscillator circuits. There are commercially available power supplies and precision voltage references that use ovenized ref- erence circuits. This method works well, but it has the drawbacks of bulkiness, rel- atively large heater power consumption, and sluggish warm-up (typically lOmin or more). These problems are effectively eliminated if the thermal stabilization is done at the chip level by integrating a heater circuit (with sensor) onto the inte- grated circuit itself. This approach was pi- oneered in the 1960s by Fairchild with the pA726 and pA727 temperature-stabilized differential pair and preamp, respectively. More recently, temperature-stabilized voltage references such as the National LM199 series have appeared. It offers a temperature coefficient of 0.00002°/o10C (typ), which is a mere 0.2ppmI0C. These references are packaged in standard metal transistor cans (TO-46); they consume about 0.25 watt of heater power and come up to temperature in 3 seconds. Users should be aware that the subsequent op- amp circuitry, and even precision wire- wound resistors with their f2.5ppmI0C tempco, may degrade performance consid- erably, unless extreme care is used in de- sign. In particular, low-drift precision op- amps such as the OP-07, with 0.2pVI0C (typ) input-stage drift, are essential. These aspects of precision circuit design are discussed in Sections 7.01 to 7.06. One caution when using the LM399: The chip can be damaged if the heater supply hovers below 7.5 volts for any length of time. The LT1019 bandgap reference, though normally operated unheated, has an on- chip heater and temperature sensor. So
- 290. Noise Voltage (Referredto Input' b b k & f &t t ' t < < < o ' c % % Noise Voltage (Referredto Input1 m integrated nosevoltage ( r V rms) Noise Voltage (Referredto Input) b b b & t &t t t t t t < < < O C C <
- 291. THREE-TERMIRIAL AND FOUR-TERMINAL REGULATORS 6.16 Three-terminal regulators 341 you can use it like the LM399, to get tempcos less than 2ppmI0C. However, unlike the LM399, the LT1019 requires some external circuitry to implement the thermostat (an op-amp and a half dozen components). 2. Precision unheated references. The thermostated LM399 has excellent tempco, but it does not exhibit extraordinary noise or long-term drift specs (see Table 6.7). The chip also takes a few seconds to heat up, and it uses plenty of power (4W at start-up, 250mW stabilized). Clever chip design has made possible unheated references of equivalent stabil- ity. The REF1OKM and REF101KM from Burr-Brown have tempcos of lppml°C (max), with no heater power or warm-up delays. Furthermore, they exhibit lower long-term drift and noise than the LM399- style references. Other 3-terminal refer- ences with lppml°C maximum tempco are the MAX671 from Maxim and the AD271012712 references from Analog Devices. In 2-terminal configurations the only contender is the magnificentLTZ1000 from Linear Technology, with its claimed O.O5ppmI0Ctempco. It also claims long- term drift and noise specs that are a fac- tor of 10 better than any other reference of any kind. The LTZlOOO does require a good external biasing circuit, which you can make with an op-amp and a few parts. All of these high stability references (in- cluding the heated LM399) use buried zeners, which additionally provide much lower noise than ordinary Zener or band- gap references (Figure 6.27). THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.16 Three-terminal regulators For most noncritical applications the best choice for a voltage regulator is the simple 3-terminal type. It has only three con- nections (input, output, and ground) and is factory-trimmed to provide a fixed out- put. Typical of this type is the 78xx. The voltage is specified by the last two dig- its of the part number and can be any of the following: 05, 06, 08, 10, 12, 15, 18, or 24. Figure 6.28 shows how easy it is to make a +5 volt regulator, for instance, with one of these regulators. The capac- itor across the output improves transient response and keeps the impedance low at high frequencies (an input capacitor of at least 0.33pF should be used in addition if the regulator is located a considerable distance from the filter capacitors). The 7800 series is available in plastic or metal power packages (same as power transis- tors). A low-power version, the 78Lxx, comes in the same plastic and metal pack- ages as small-signal transistors (see Table 6.8). The 7900 series of negative regula- tors works the same way (with negative input voltage, of course). The 7800 se- ries can provide up to 1 amp load cur- rent and has on-chip circuitry to prevent damage in the event of overheating or ex- cessive load current; the chip simply shuts down, rather than blowing out. In addi- tion, on-chip circuitry prevents operation outside the transistor safe operating area (see Section 6.07) by reducing available output current for large input-output volt- age differential. These regulators are in- expensive and easy to use, and they make it practical to design a system with many printed-circuit boards in which the unreg- ulated dc is brought to each board and reg- ulation is done locally on each circuit card. unregulated input 4 ,8:1 13 +f$(regulatedl +7V to +35V Figure 6.28 Three-terminal fixed regulators come in some highly useful variants. The LP2950 works just like a 7805, but draws only
- 292. VOLTAGE REGULATORS AND POWER CIRCUITS 342 Chapter 6 TABLE 6.8. FIXED VOLTAGE REGULATORS Output current ( r n a ~ ) ~ h 0 @75'C No heatsinkb Regulation (typ) =I Input voltage 0 case Vout lout loutPdiss LoadC ~ i n e ~OJc mini max TYpe Pkg (V) (%) (A) (A) (W) (mV) (mV) ( " C W (V) (V) Positive LM2950CZ-5.0 LM29312-5.0 LM78L05ACZ LM330T-5.09 TL750L05 LM2984CT LM2925T LM2935T LM309K LT1005CT LM2940T-5.0 LM7805CK LM7805CT LM7815CT LT1086-5CT LAS16A05 LM323K LT1035CK LT1085-5CT LAS14A05 LT1003CK LT1084-5CK LAS19A05 LT1083-5CK LAS3905 Negative LM79L15ACZ TO-92 -15 4 0.1 0.05 0.6 75"' 45"' 160 -17 -35 LM7915CK TO-3 -15 4 1 0.2 2.2 4 3 3.5 -16.5 -35 LM7915CT TO-220 -15 4 1 0.15 1.7 4 3 3 -16.5 -35 LM345K-5.0 TO-3 -5 4 3 0.2 2.1 10 5 2 -7.5 -20 (a) with Vi,=l .75V (b) 5O'C ambient. 0 to I,,,. (d) AV ,=I 5V. AV,,, for O'C to 100°Cjunc temp. (p:(') 1000hours. s~m~larto LM2930T-5.0,LM2931T-5.0. (hlwide TO-220. (I) at I,,,. ("'1 min or max. (') typical. All include internal thermal shutdown and current-limiting circuitry. Most are available in f5, 6, 8, 10,12, 15, 18, and 24V units; a few are available in -2, -3, -4, -5.2, -9, +2.6, +9, and +17V units.
- 293. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.16 Three-terminal regulators 34 120Hz Long- Output ripple Temp term impedance reject stabe stabf typ typ max lOHz lOkHz TYPe (dB) (mV) (%) (R) (R) Comments LM2950CZ-5.0 LM2931Z-5.0 LM78L05ACZ LM330T-5.0' TL750L05 LM2984CT LM2925T LM2935T LM309K LT1005CT LM2940T-5.0 LM7805CK LM7805CT LM7815CT LT1086-5CT LASI6A05 LM323K LT1035CK LT1085-5CT LASI4A05 LT1003CK LT1084-5CK LASI 9A05 LT1083-5CK LAS3905 micropower, 1% low dropout, low power small; LM240LAZ-5.0 low dropout; 2930 TL751 has enable dual outputs (yP);reset, onloff microprocessor; reset dual outputs (pP);reset, onloff original +5V regulator dual outputs (yP) LM340K-5 popular; LM340T-5 LM340T-15 low dropout Lambda, monolithic dual +5; 1036 is +121+5 low dropout Lambda, monolithic low dropout lambda, monolithic low dropout Lambda, monolithic small; LM320LZ-15 LM320KC-15 LM320T-15 75pA of quiescent current (compared with 7805. The LM2931 is also low-dropout, the 7805's 5mA, or the 78L05's 3mA); it but you might call it millipower (0.4mA also regulates with as little as a 0.4 volt quiescent current), compared with the drop from unregulated input to regulated "micropower"LP2950. Low-dropout regu- output (called the"dropout voltage"), com- lators also come in high-current versions - pared with 2 volts dropout for the classic for example, the LT10851413 series from
- 294. VOLTAGE REGULATORSAND POWER CIRCUITS 344 Chapter 6 LTC (3A, 5A, and 7.5A, respectively, with both +5V and +12V available in each type). Regulators like the LM2984 are ba- sically 3-terminal fixed regulators, but with extra outputs to signal a microprocessor that power has failed, or resumed. Finally, regulators like the 4195 contain a pair of 3-terminal 15 volt regulators, one positive and one negative. We'll say a bit more about these special regulators shortly. 6.17 Three-terminal adjustable regulators Sometimes you want a nonstandard regu- lated voltage (say +9V, to emulate a bat- tery) and can't use a 78xx-type fixed reg- ulator. Or perhaps you want a standard voltage, but set more accurately than the f3% accuracy typical of fixed regulators. By now you're spoiled by the simplicity of 3-terminal fixed regulators, and therefore you can't imagine using a 723-type regu- lator circuit, with all its required external components. What to do? Get an "ad- justable 3-terminal regulator"! Table 6.8 lists the characteristics of a representative selection of 3-terminal fixed regulators. These wonderful 1Cs are typified by the classic LM317 from National. This regulator has no ground terminal; instead, it adjusts Voutto maintain a constant 1.25 volts (bandgap) from the output terminal to the "adjustment" terminal. Figure 6.29 shows the easiest way to use it. The regulator puts 1.25 voltsacross R1,so 5mA flows through it. The adjustment terminal draws very little current (50-100pA), so the output voltage is just VOut= 1.25(1+R2IR1) volts In this case the output voltage is adjustable from 1.25 volts to 25 volts. For a fixed- output-voltage application, R2 will nor- mally be adjustable only over a narrow range, to improve settability (use a fixed resistor in series with a trimmer). Choose your resistive divider values low enough to allow for a 50pA change in adjustment current with temperature. Because the loop compensation for the regulator is the output capacitor, larger values must be used compared with other designs. At least a lpF tantalum is required, but we recom- mend something more like 6.8pE The 317 is available in several pack- ages, including the plastic power package (TO-220), the metal power package (TO-3), and the small transistor packages (metal, TO-5; plastic, TO-92). In the power packages it can deliver up to 1.5 amps, with proper heat sinking. Because it doesn't "see" ground, it can be used for high-voltageregulators, as long as the input-output voltage differential doesn't exceed the rated maximum of 40 volts (60V for the LM317HV high- voltage variant). v," in 317 out - -- Figure 6.29. Three-terminal adjustable regulator. EXERCISE 6.5 Designa +5 volt regulator with the 317. Provide f20% voltage adjustment range with a trimmer pot. Three-terminal adjustable regulators are available with higher current ratings, e.g., the LM350 (3A), the LM338 (5A), and the LM396 (lOA), and also with higher voltage ratings, e.g., the LM317H (60V) and the TL783 (125V). Read the data sheets carefully before using these parts, noting bypass capacitor requirements and safety diode suggestions. As with the fixed
- 295. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.18 Additional comments about 3-terminal regulators 345 3-terminal regulators, you can get low- dropout versions (e.g., the LT1085, with 1.3V dropout at 3.5A), and you can get micropower versions (e.g., the LP2951, the adjustable variant of the fixed 5V LP2950; both have IQ = 75pA). You can also get negative versions, although there's less variety: The LM337 is the negative cousin of the LM317 (1.5A), and the LM333 is a negative LM350 (3A). Four-terminal regulators Three-terminal adjustable regulators are the favorite for noncritical requirements. Historically they were preceded by four- terminal adjustable regulators, which you connect as shown in Figure 6.30. You drive the "control" terminal with a sample of the output; the regulator adjusts the out- put to keep the control terminal at a fixed voltage (+3.8V for the Lambda regulators in Table 6.9, +5V for the pA79G, and -2.2V for the negative regulators). Four- terminal regulators aren't any better than the simpler 3-terminal variety (but they aren't any worse, either), and we mention them here for completeness. unregulated input >18V Figure 6.30 6.18 Additional comments about 3-terminal regulators General characteristics of 3- and 4-terminal regulators The following specifications are typical for most 3- and Cterminal regulators, both fixed and adjustable, and they may be useful as a rough guide to the performance you can expect: Output voltage tolerance: Dropout voltage: Maximum input voltage: Ripple rejection: Spike rejection: Load regulation: dc input rejection: Temperature stability: 1-2% 0.5-2 volts 35 volts (except TL783 to +125V) 0.01-0.1% 0.1-0.3% 0.1-0.5%, full load change 0.2% 0.5%, over full temp range Improving ripple rejection The circuit of Figure 6.29 is the standard 3-terminal regulator, and it works fine. However, the addition of a 10pF bypass capacitor from the adjust (ADJ) terminal to ground (Fig. 6.31) improves the ripple (and spike) rejection by about 15dB (factor of 5 in voltage). For example, the LM317 ripple rejection factor goes from 65dB to 80dB (the latter is O.lmV output ripple when supplied with 1V input ripple, a typical value). Be sure to include the safety discharge diode; look at the specification sheet of the particular regulator for more details. Figure 6.31. The ADJ pin may be bypassed for lower noise and ripple, but a safety discharge diode must be included. Low-dropout regulators As we mentioned earlier, most series regu- lators need at least 2 volts of "headroom" to function; that's because the base of the npn pass transistor is a V B ~drop above
- 296. TABLE 6.9. ADJUSTABLEVOLTAGE REGULATORS Output Input Dropout 120Hz Long- Output 2. voltage Regulation (typ) voltage voltage ripple Temp term impedance .-E C .- @I,,, reject stabC stabd E = 5- min max I,,, Loada ~ i n e ~OJc min max max typ typ max ~ O H Z ~ O ~ H Z 5 Type 2 Pkg (V) (V) (A) (%) (%) ("CNV) (V) (V) (V) (dB) (%) (%) (R) (0) + 0 Comments Three-terminal LM317L + TO-92 LM337L - TO-92 LM317H + TO-39 LM337H - TO-39 TL783C + TO-220 LM317T + TO-220 LM317HVK + TO-3 LM337T - TO-220 LM337HVK - TO-3 LT1086CP + TO-220 LM350K + TO-3 IP3RO7T + TO-220 LM333T - TO-220 LT1085CT + TO-220 LM338K + TO-3 LT1084CP + TO-247 LT1083CP + TO-247 LM396K + TO-3 LT1038CK + TO-3 1.2 37 0.1 0.1 0.15 160h - 40e 2.5' 65 0.5 1 0.07 4 I miniature 1.2 37 0.1 0.1 0.15 160h - -40e 2.5' 65 0.5 - - - I miniature (neg 3171) 1.2 37 0.5 0.1 0.2 12 - 40e 2' 80 0.6 0.3 0.01 0.03 I 317 in TO-39 -1.2 -37 0.5 0.3 0.2 12 - -40e 2' 75 0.5 0.3 0.02 0.02 I negative 317H 1.3 125 0.7 0.2' 0.02 4 - 125e 10 50 0.3 0.2 0.05 0.3 I MOSFET, high voltage 1.2 37 1.5 0.1 0.2 4 - 40e 2.5' 80 0.6 0.3 0.01 0.03 I popular 1.2 57 1.5 0.1 0.2 2.3 - 60e 2.5' 80 0.6 0.3 0.01 0.03 I high voltage 317 -1.2 -37 1.5 0.3 0.2 4 - -40e 2.5' 75 0.5 0.3 0.02 0.02 I negative 317 -1.2 -47 1.5 0.3 0.2 2.3 - -50e 2.5' 75 0.5 0.3 0.02 0.02 I high voltage 337 1.3 30 1.5 0.1 0.02 - - 30e 1.5 75 0.5 1 - - I low dropout 1.2 32 3 0.1 0.1 2 - 35e 2.5' 80 0.6 0.3 0.005 0.02 I 3A monolithic 1.2 37 3 0.1 0.08 2.3 - 15e 0.8' 65 - - - - I two unreg inputs -1.2 -32 3 0.2 0.02 50 - -35e 2.5t 60 0.5 0.2 - - I neg 350; LTlO33 is imprvd 1.3 30 3 0.1 0.02 3 - 30e 1.5 75 0.5 1 - - I low dropout 1.2 32 5 0.1 0.1 2 - 35e 2.5' 80 0.6 0.3 - - I 5A monolithic 1.3 30 5 0.1 0.02 2.3 - 30e 1.5 75 0.5 1 - - I low dropout 1.3 30 7.5 0.1 0.02 1.6 - 30e 1.5 75 0.5 1 - - I low dropout 1.2 15 10 0.4"' 0.08 1 - 20e 2.1' 74 0.3 1 0.01 0.02 I 10A monolithic 1.2 32 10 0.1 0.08 1 - 35e 2.5' 60 1 1 0.005 0.1 I 10A monolithic, 1% acc'y
- 297. Multiterminal LM376N + DIP-8 LM304H - TO-5 ICL7663S + DIP-8 MAX664 - DIP-8 LM305AH + TO-5 LM2931CT + TO-220 LP2951CN + DIP-8 LT1020CN + DIP-14 NE550N + DIP-14 pA723PC + DIP-14 LASlOOO + TO-5 LASllOO + TO-5 SG3532J + DIP-14 MC1469R + TO-66 MC1463R - TO-66 LM2941CT + TO-220 LAS2200 + module LAS3000 + module LAS5000 + module LAS7000 + module MC1466L + DIP-14 LAS3700 + TO-5 (a)10% to 50% I,,,. (b)for AVl,=15V. (C)AV,,t for 0°Cto 100°CTj. (d) 1000hrs. - - I TO-39 pkg avail - - I TO-39 pkg avail 0.003 0.02 I Lambda 0.02 0.04 I Lambda 0.002 0.02 I Lambda 0.001 0.01 I Lambda 0.0005 0.004 I Lambda 0.002 0.01 I Lambda orig neg reg micropower;also MAX663 ppwr,impr 7664; low dropout low dropout, low power low dropout, micropower micropower classic Lambda, improved 723 high voltage LASI 000 improved 723 precision, may oscillate neg MC1469 low dropout Lambda hybrid; 2 unreg inputs Lambda hybrid; 2 unreg inputs Lambda hybrid; 2 unreg inputs lab supply; good curr lim floating reg with on-chip heater (e) max V,,-V,,,. ('1 at 5V. (h) OJA. ('1E- external; I-internal. ("') mintmax. ('1 typ.
- 298. VOLTAGE REGULATORS AND POWER CIRCUITS 348 Chapter 6 the output, and it has to be driven by a driver transistor, usually another npn whose base is pulled up with a current mir- ror. That's already two VBE drops. Fur- thermore, you need to allow another VBE drop across the current-sensing resistor for short-circuit protection; see Figure 6.32A, a simplified schematic of the 78Lxx. The three VBEsadd up to about 2 volts, below which the regulator drops out of regulation at full current. By using a pnp (or p-channel MOSFET) pass transistor, the dropout voltage can be reduced from the three VB,y drop of the conventional npn scheme, down nearly to the transistor saturation voltage. Figure 6.32B shows a simplified schematic of the LM330 low-dropout fixed +5 volt
- 299. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.18 Additionalcomments about 3-terminal regulators 349 (150mA) regulator. The output can be brought within a saturation voltage of the unregulated input voltage by the pnp pass transistor. Having thus eliminated the Darlington VBEdrops of the npn regulator circuit, the designers weren't about to waste a diode drop with the usual (series resistor) short-circuit protection scheme. So they used a clever trick, deriving a sample of the output current via a second collector: That current is a fixed fraction of the output current and is used to shut off base drive as shown. This current-limit scheme is not particularly precise (IL is specified as 150mAmin, 700mA max), but it's good enough to protect the regulator, which also has internal thermal limiting. Low-dropout regulators are available in most of the popular types, for example 3- terminal fixed voltage [LM2931, LM330, LT10831415 (5V and 12V), TL7501, 3-ter- minal adjustable (LT10831415, LM293l), and micropower (LP295011, MAX664, LT1020). Tables 6.8 and 6.9 include all low-dropout regulators available at the time of writing. Processor-oriented regulators Electronic devices that include micropro- cessors (the subject of Chapters 10 and 11) require more than a simple regulated voltage. In order to retain the contents of volatile memory (and in order to keep track of elapsed time) they need a separate source of low-current dc when the regular power source is off; this may happen be- cause the device is shut off, or because of a power failure. They also need to know when ordinary power has resumed, so they can "wake up" in a known state. Further- more, a microprocessor-based device may need to have a few milliseconds warning that normal power is about to fail, so it can put data into safe memory. Until recently you had to design ex- tra circuitry to do these things. Now life is easy - you can get "(micro)processor- oriented" regulator ICs, with various com- binations of these functions built in. These ICs sometimes go by the name of "power supply supervisory chips" or "watchdog" chips. An example is the LM2984, which has two high-current +5 volt outputs (one for the microprocessor, one for other cir- cuitry) and a low-current +5 volt output (for memory), a delayed RESET flag out- put to initialize your microprocessor when power resumes, and an ON/OFF control- ling input for the high-current outputs. It also has an input that monitors micropro- cessor activity, resetting the processor if it grinds to a halt. An example of a watch- dog chip without regulator is the MAX691 from Maxim, which monitors the regu- lated supply voltage and microprocessor activity, and provides reset (and "inter- rupt") signals to the microprocessor, just like the LM2984. However, it adds both power-fail warning and battery switchover circuitry to the other capabilities of the LM2984. Used with an ordinary +5 volt regulator, the MAX691 does everything you need to keep a microprocessor happy. We'll learn much more about the care and feeding of microprocessors in Chapters 10 and 11. Micropower regulators As we suggested earlier, most regulator chips draw a few milliamps of quiescent current to run the internal voltage refer- ence and error amplifiers. That's no prob- lem for an instrument powered from the ac mains, but it's undesirable in a battery-operated instrument, powered by a 400mA-hour 9 volt alkaline battery, and it's intolerable in a micropower instrument that must run a thousand hours, say, on a battery. The solution is a micropower regula- tor. The most miserly of these are the ICL766314, positive and negative adjust- able regulators with quiescent currents of 4pA. At that current a 9 volt battery
- 300. VOLTAGE REGULATORS AND POWER CIRCUITS 350 Chapter 6 would last 100,000 hours (more than 10 years), which exceeds the "shelf life" (self- discharge time) of all batteries except some lithium-based types. Micropower design is challenging and fun, and we'll tell you all about it in Chapter 14. Dual-polarity regulated supplies Most of our op-amp circuits in Chapter 4 you often deal with signals near ground, and the simplest way to generate symmet- rical split supplies is to use a pair of 3- terminal regulators. For example, to gen- erate regulated f15 volts, you could use a 7815 and a 7915, as in Figure 6.33A. We tend to favor the use of adjustable 3- terminal regulators, because (a) you only need to stock one type for each polarity and current range, and (b) you can trim ran from symmetrical bipolarity supplies, the voltage exactly, if needed; Figure 6.33B typically f15 volts. That's a common re- shows how the circuit looks with a 317 and quirement in analog circuit design, where 337. 15V reg 0-1A - 15V reg (unreg) 0-1.5A - - Figure 6.33. Dual-polarity regulated supplies.
- 301. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.18 Additional comments about 3-terminal regulators 351 +"," (unregulated) 0 2 MJ2955 -"I" (unregulated) Figure 6.34. Dual-tracking regulator. Dual trackingregulators. Given the need for regulated split supplies, you might wonder why there aren't "dual 3-terminal regulators." Wonder no more - they exist and are known as "dual tracking regulators." To understand why they have such a complicated name, take a look at Figure 6.34, which shows the classic dual tracking regulator circuit. Q1 is the pass transistor for a conventional positive regulated supply. The positive regulated output is then simply used as the reference for a negative supply. The lower error amplifier controls the negative output by comparing the average of the two output voltages with ground, thus giving equal 15 volt positive and negative regulated outputs. The positive supply can be any of the configurations we have already talked about; if it is an adjustable regulator, the negative output follows any changes in the positive regulated output. In practice, it is wise to include current-limiting circuitry, not shown in Figure 6.34 for simplicity. As with single-polarity regulators, dual- tracking regulators are available as com- plete integrated circuits in both fixed and adjustable versions, though in consider- ably less variety. Table 6.10 lists the char- acteristics of most types now available. Typical are the 4194 and 4195 regula- tors from Raytheon, which are used as shown in Figure 6.35. The 4195 is factory- trimmed for f15 volt outputs, whereas the 4194's symmetrical outputs are adjustable via the single resistor R1.Both regulators are available in power packages as well as the small DIP packages, and both have in- ternal thermal shutdown and current lim- iting. For higher output currents you can add outboard pass transistors (see below). Many of the preceding regulators (e.g., the 4-terminal adjustable regulators) can be connected as dual-tracking regulators. The manufacturers' data sheets often give suggested circuit configurations. It is worth keeping in mind that the idea of referencing one supply's output to another supply can be used even if the two supplies are not of equal and opposite voltages. For instance, once you have a stable +15 volt supply, you can use it to generate a regulated +5 volt output, or even a regulated -12 volt output. EXERCISE 6.6 Design a *I2 volt regulator using the 4194. Reverse-polarityprotection. An addition- al caution with dual supplies: Almost any electronic circuit will be damaged extensively if the supply voltages are reversed. The only way that can hap- pen with a single supply is if you connect the wires backward; sometimes you see a high-current rectifier connected across the circuit in the reverse direction to protect against this error. With circuits that use several supply voltages (a split supply, for instance), extensive damage can result if there is a component failure that shorts the two supplies together; a common
- 302. TABLE 6.10. DUAL-TRACKINGREGULATORS Maximum output currenta (each supply) = = = - Regulation 120Hz - Max @75'C No sinkb tYP ripple Temp a p 2 1 v+-v case reject stabe "out % 3 g g Input lout IOU, Pdiss LoadC ~ i n e ~OJc typ typ ~oise' Type Pkg (V) 4 a I- (V) (mA) (rnA) (W) (rnV) (mV) ('CIW) (dB) (rnV) (pV rrns) Motorola MC1468L DIP f15 0 - 0 - 60 55 30 0.5 10"' 10"' 50 75 45 100 MCl468R TO-66 f15 ' ' ' - 60 100 65 1.2 10"' 10"' 17 75 45 100 National LM325Hg TO-5 f15 - - 60 100 50 0.5 6 2 12 75 45 150 LM325Ng DIP f15 - - 60 - 50 0.5 6 2 9oh 75 45 150 LM326Hg TO-5 adj - - 60 100 70 0.5 6 2 12 75 35 100 LM326Ng DIP adj - - . . 60 - 70 0.5 6 2 9oh 75 35 100 Raytheon RC4194DB DIP adj - 70 30' 25' 0.5 0.1% 0.2% 160h 70 0.2% 2501 RC4194TK TO-66 adj - 70 250' 90' 1.8 0.2% 0.2O/0 7 70 0.2% 2501 RC4195NB rniniDlP +15 - . - . 60 - 20 0.35 2 2 210h 75 75 60 RC4195TK TO-66 f15 - - 60 150 70 1.2 3 2 11 75 75 60 SiliconGeneral SG3501AN DIP f15 - 0 - 0 60 60 30 0.6 30 20 1 2 5 ~ 75 150 50 SG3502N DIP adj 50 50' 30 0.6 0.3% 0.2O/0 1 2 5 ~ 75 1O/O 50 (a) Vin=l.6VOu,(each supply). (b) for 50°Cambient. (') 10% to 50% I,,,. (d) for AVln=15V. (e)AVoutfor 0°Cto 1OOmCTj. ('1 1OOHz to 10kHz. (g) intended for use with a pair of external pass transistors. (h) OdA. (') 10V drop (each supply). (1) lOHz to 100kHz. ("'1 rnax.
- 303. THREE-TERMINAL AND FOUR-TERMINALREGULATORS 6.18 Additional comments about 3-terminal regulators 353 +18 to t 3 0 1OOmA - 15V @ (unregulated) 1OOmA -- A B Figure 6.35 situation is a collector-to-emitter short in solution is the use of external pass tran- one transistor of a push-pull pair operating sistors, which can be added to the 3- and between the supplies. In that case the two 4-terminal regulators (and dual-tracking supplies find themselves tied together, and regulators) just as with the classic 723. one of the regulators will win out. The Figure 6.36 shows the basic circuit. opposite supply voltage is then reversed in polarity, and the circuit starts to smoke. For this reason it is wise to connect a power rectifier (e.g., a 1N4004) in the reverse direction from each regulated output to ground, as we drew in Figure 6.33. V,, ~ ~ ~ $ v o uground 6 n Outboard pass transistors -- Three-terminal fixed regulators are avail- able with 5 amps or more of output cur- rent, for example the adjustable 10 amp LM396. However, such high current oper- ation may be undesirable, since the maxi- mum chip operating temperature for these regulators is lower than for power tran- sistors, mandating oversize heat sinks. Also, they are expensive. An alternative Figure 6.36. Three-terminal regulator with current-boosting outboard transistor. The circuit works normally for load currents less than 100mA.For greater load currents, the drop across R1 turns on QI, limiting the actual current through the 3-terminal regulator to about 100mA. The 3-terminal regulator maintains the
- 304. VOLTAGE REGULATORS AND POWER CIRCUITS 354 Chapter 6 output at the correct voltage, as usual, by reducing input current and hence drive to Q1 if the output voltage rises, and vice versa. It never even realizes the load is drawing more than 100mA! With this circuit the input voltage must exceed the output voltage by the dropout voltage of the 78xx (2V) plus a V B , ~drop. In practice, the circuit must be modified to provide current limiting for Q1, which could otherwise supply an output current equal to h~~ times the regulator's internal current limit, i.e., 20 amps or more! That's enough to destroy Q1, as well as the unfortunate load that happens to be connected at the time. Figure 6.37 shows two methods of current limiting. -746R ground unregulated - regulated in - out & regulated- OUt Figure 6.37. Current-limit circuits for outboard transistor booster. In both circuits, Q2 is the high-current pass transistor, and its emitter-to-base re- sistor has been chosen to turn it on at lOOmA load current. In the first circuit, Q1 senses the load current via the drop across Rsc, cutting off Q2's drive when the drop exceeds a diode drop. There are a couple of drawbacks to this circuit: The input voltage must now exceed the regu- lated output voltage by the dropout voltage of the 3-terminal regulator plus two diode drops, for load currents near the current limit. Also, Q1 must be capable of han- dling high currents (equal to the current limit of the regulator), and it is difficult to add foldback limiting because of the small resistor values required in Ql's base. The second circuit helps solve these problems, at the expense of some addi- tional complexity. With high-current reg- ulators, a low dropout voltage is often important to reduce power dissipation to acceptable levels. To add foldback limit- ing to the latter circuit, just tie Q17sbase to a divider from Q2's collector to ground, rather than directly to Q2's collector. External pass transistors can be added to the adjustable 3- and 4-terminal regu- lators in exactly the same way. See the manufacturers' data sheets for further details. Current source A 3-terminal adjustable regulator makes a handy high-power constant-current source. Figure 6.38 shows one to source 1 amp. The addition of an op-amp follower, as in the second circuit, is necessary if the circuit is used to source small currents, since the "ADJ" (adjust) input contributes a current error of about 50pA. As with the previous regulators, there is on-chip current limit, thermal-overload protection, and safe operating area protection. EXERCISE 6.7 Design an adjustable current source for output currentsfrom1OpAto 1mAusinga317. If V,, = +15V, what is the output compliance? Assume a dropout voltage of 2 volts. Note that the current source in Figure 6.38A is a 2-terminal device. Thus, the load can be connected on either side. The figure shows how you might connect things
- 305. THREE-TERMINAL AND FOUR-TERMINALREGULATORS 6.19 Switching regulators and dc-dc converters 355 in 317 out ad; - 1.2R 4I,,, = 1 . 2 5 1 ~ Figure 6.38. One amp current sources. to sink current from a load returned to ground (of course, you could always use the negative-polarity 337, in the configu- ration analogous to Fig. 6.38A). National makes a special 3-terminal device, the LM334, optimized for use as a low-power current source. It comes in the small plastic transistor package (TO-92), as well as the standard DIP IC package. You can use it all the way down to lpA, becausethe"adj"current is a small fraction of the total current. It has one peculiarity,however: The output current is temperature-dependent, in fact, precisely proportional to absolute temperature. So although it is not the world's most stable current source, you can use it (Section 15.01) as a temperature sensor! 6.19 Switching regulators and dc-dc converters All the voltage regulator circuits we have discussed so far work the same way: A linear control element (the "pass transis- tor") in series with the unregulated dc is used, with feedback, to maintain constant output voltage (or perhaps constant cur- rent). The output voltage is always lower in voltage than the unregulated input volt- age, and some power is dissipated in the control element [the average value of I o u t ( K n - Vout),to be precise]. A minor variation on this theme is the shunt regu- lator, in which the control element is tied from the output to ground, rather than in series with the load; the simple resistor- plus-zener is an example. There is another way to generate a reg- ulated dc voltage, fundamentally different from what we've seen so far; look at Figure 6.39. In such a switching regulator a tran- sistor operated as a saturated switch peri- odically applies the full unregulated volt- age across an inductor for short intervals. The inductor's current builds up during each pulse, storing ~ L I ~of energy in its magnetic field; the stored energy is trans- ferred to a filter capacitor at the output,
- 306. VOLTAGE REGULATORS AND POWER CIRCUITS 356 Chapter 6 -...IIcII - -0- 0- 0- 0- unregi ndc -t-reg dc unreginputdc IV,,,< V,,lmax) -- Figure 6.39. Two kinds of regulators. A. Linear (series). B. Step-up switcher. which alsosmooths the output (tocarry the output load between charging pulses). As with a linear regulator, feedback compares the output with a voltage reference - but in a switching regulator it controls the output by changing the oscillator's pulse width or switching frequency, rather than by linearly controlling the base or gate drive. Switchingregulators have unusual prop- erties that have made them very popular: Since the control element is either off or saturated, there is very little power dissipa- tion; switching supplies are thus very effi- cient, even if there is a large drop from in- put to output. Switchers(slangfor"switch- ing power supplies") can generate output voltages higher than the unregulated in- put, as in Figure 6.39B; they can just as easily generate outputs opposite in polar- ity to the input! Finally, switchers can be designed with no dc path from input to output; that means they can run directly from the rectified power line, with no ac power transformer! The result is a very small, lightweight, and efficient dc supply. For these reasons, switching supplies are used almost universally in computers. Switching supplies have their problems, too. The dc output has some switching "noise," and they can put hash back onto the power line. They used to have a bad reputation for reliability, with occasional spectacular pyrotechnic displays during episodes of catastrophic failure. Most of these problems have been solved, however, and the switching supply is now firmly entrenched in electronic instruments and computers. In this section we'll tell you all about switching supplies, in two steps: First, we'll describe the basic switching regulator, operating from a conventional unregulated dc supply. There are three circuits, used for (a) step-down (output voltage less than input), (b) step-up (output voltage greater than input), and (c) inverting (output polarity opposite to input). Then we'll take a radical step, describing the heretical (and most widely used!) designs that run straight from the rectified ac power line, without an isolation transformer. Both kinds of power supplies are in wide use, so our treatment is practical (not just pedagogically pleasing). Finally, we'll give you plenty of advice on the subject: When to use switchers, when to avoid them; when to design your own, when to buy them. With characteristic overstatement, we won't leave you in any doubt! Step-down regulator Figure 6.40 shows the basic step-down (or "bucking")switching circuit, with feedback omitted for simplicity. When the MOS
- 307. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.19 Switching regulators and dc-dc converters 357 x repetition rate (with constant pulse width)- 141 from an error amplifier that compares the I ?‘ output voltage with a reference. w I Figure 6.42 shows a low-current +5 volt -- -- regulator using the MAX638 from Maxim. This nice chip gives you a choice of Figure 6.40. Step-down switcher. switch is closed, VOut-v, is applied across the inductor, causing a linearly increas- ing current (recall dI/dt = V/L)to flow through the inductor. (This current flows to the load and capacitor, of course.) When the switch opens, inductor current con- tinues to flow in the same direction (re- member that inductors don't like to change their current suddenly, according to the last equation), with the "catch diode" now fixed +5 volt output (no external divider needed) or adjustable positive output, with external resistive divider. It includes near- ly all components in a convenient mini- DIP package. In the MAX638 the oscil- lator runs at a constant 65kHz, with the error amplifier either permitting or cut- ting off gate drive pulses, according to the output voltage. The circuit shown gives about 85% efficiency, pretty much indepen- dent of the input voltage. Compare that with a linear regulator by doing the next problem: gate voltage EXERCISE 6.8 What is the maximum theoretical efficiency of a linear (series pass) regulator, when used to input curr o n generate regulated +5 volt from a +12 volt unregulatedinput? induc curr 0- Vdlode EXERCISE 6.9 What does a step-down regulator's high effi- point "x" ciency imply about the ratio of output current to input current? What is the corresponding ratio of currents, for a linear regulator? output voltage 0- Figure 6.41 Step-up regulator; inverting regulator conducting to complete the circuit. The output capacitor acts as an energy "fly- wheel,"smoothing the inevitable sawtooth ripple (the larger the capacitor, the less the ripple). The inductor current now finds fixed voltage VOut-0.6V across it, causing its current to decrease linearly. Figure 6.41 shows the corresponding voltage and cur- rent waveforms. To complete the circuit as a regulator, you would of course add feed- back, controlling either the pulse width (at constant pulse repetition rate) or the Apart from its high efficiency, the step- down switching regulator of the previous paragraph has no significant advantage (and some significantdisadvantages - com- ponent count, switching noise) over a lin- ear regulator. However, when there is a need for an output voltage greater than the unregulated input, or for an output volt- age of opposite polarity to the unregulated input, switching supplies become very at- tractive indeed. Figure 6.43 shows the ba- sic step-up (or "boosting") and inverting (sometimes called "flyback") circuits.
- 308. VOLTAGE REGULATORS AND POWER CIRCUITS 358 Chapter 6 + 10V to + 1 5 V in (from car battery) volt switching We showed the step-up circuit of Figure 6.39A earlier, in comparison with the linear regulator. The inductor current ramps up during switch conduction (point X near ground); when the switch is turned off, the voltage at point X rises rapidly as the inductor attempts to maintain constant current. The diode turns on, and the inductor dumps current into the capacitor. The output voltage can be much larger than the input voltage. EXERCISE 6.10 Drawwaveformsfor thestep-upswitcher, show- ing voltage at point X,inductor current, and output voltage. EXERCISE 6.11 Why can'tthe step-up circuit be used as a step- down regulator? The inverting circuit is shown in Figure 6.43B. During switch conduction, a lin- early increasing current flows from point X to ground. To maintain the current when the switch is open, the inductor pulls point X negative, as much as needed to maintain current flow. Now, however, the current is flowing into the inductor from the filter capacitor. The output is thus neg- ative, and its average value can be larger or smaller in magnitude than the input (as determined by feedback); in other words, the inverting regulator can be either step- up or step-down. Figure 6.43. Two switching-element configurations. A. Step-up ("boost"). B. Inverting. EXERCISE 6.12 Draw waveforms for the inverting switcher, showing voltage at point X , inductor current, and output voltage. Figure 6.44 shows how you might use low-power switching regulators to gener- ate f15 volt op-amp supply voltages from a single +12 volt automotive battery, a trick that is impossible with linear regu- lators. Here we've again used low-power
- 309. THREE-TERMINAL AND FOUR-TERMINALREGULATORS 6.19 Switching regulators and dc-dc converters 359 + 12v input ------------------+ v,--1 I 16 'I I IN914 I a a I 0 1 5 v I I - l a - reg I -Vout I 4 1 I OSC I III 1I I II I L---------- MAX637 Figure 6.44. Dual-polarity - power supply.- - switching fixed-output ICs from Maxim, in this case the step-up MAX633 and the invert- ing MAX637. The external components shown were chosen according to the manu- facturer's data sheets. They're not crit- ical, but, as always in electronic design, there are trade-offs. For example, a lar- ger value of inductor lowers the peak currents and increases the efficiency, at the expense of maximum available out- put current. This circuit is rather in- sensitive to input voltage, as long as it doesn't exceed the output voltage, and will work all the way down to +2 volts input, with greatly reduced maximum out- put current. Before leaving the subject of invert- ing and step-up regulators, we should mention that there is one other way to accomplish the same goal, namely with "flying capacitors." The basic idea is to use MOS switches to (a) charge a capacitor from the dc input, and then (b) change the switches to connect the now-charged capacitor in series with another (step-up), or with reversed polar- ity across the output (inverting). Flying- capacitor voltage converters (e.g., the pop- ular 7662) have some advantages (no inductors) and some disadvantages (low power, poor regulation, limited voltage). We'll discuss them later in the chapter.
- 310. VOLTAGE REGULATORS AND POWER CIRCUITS 360 Chapter 6 General comments on switching regulators As we've seen, the ability of switchers to generate stepped-up or inverted outputs makes them quite handy for making, say, low-current f12 volt supplies on an other- wise all-digital +5 volt circuit board. You'll often need such bipolarity supplies to power "serial ports" (more in Chapters 10 and 11) or linear circuitry using op- amps or AID (analog-to-digital) and DIA (digital-to-analog) converters. Another good use for step-up switchers is to power displays that require relatively high volt- age, for example using fluorescent or plas- ma technology. In these applications, where the dc input (typically +5V) is al- ready regulated, you often use the phrase "dc-to-dc converter," rather than "switch- ing regulator,"although it's really the same circuit. Finally, in battery-operated equip- ment you often want high efficiency over a wide range of battery voltage; for example, a 9 volt alkaline "transistor" battery begins life at about 9.5 volts, dropping steadily to about 6 volts at the end of its useful life. A +5 volt low-powes step-down reg- ulator maintains high efficiency, with cur- rent step-up over most of the battery's life. Note that the inductor and capacitor in a switching regulator are not functioning as an LC filter. In the simple step-down regulator, that might seem to be true, but obviously a circuit that inverts a dc level is hardly a filter! The inductor is a loss- less energy-storage device (stored energy = LL12),2 able to transform impedance in order to conserve energy. This is an accu- rate statement from a physicist's point of view, in which the magnetic field contains stored energy. We're more used to think- ing of capacitors as energy storage devices (stored energy = iCV2), which is their role in switching supplies, as in conven- tional series regulators. A bit of nomenclature: You sometimes see the phrases "PWM switch-mode regulator" and "current-mode regulator." They refer to the particular way in which the switching waveform is modified ac- cording to the feedback (error) signal. In particular, PWM means pulse-width mod- ulation, in which the error signal is used to control the conduction pulse width (at fixed frequency), whereas in current-mode control the error voltage is used to control the peak inductor current (as sensed by a resistor) via width on a pulse-by-pulse ba- sis. Current-mode regulators have some significant advantages and are becoming more popular now that good current-mode controller ICs have become available. Keep in mind, when considering any switching supply, the noise generated by the switching process. This takes three forms, namely (a) output ripple, at the switching frequency, typically of order 10mV- 100mV peak-to-peak, (b) ripple, again at the switching frequency, impressed onto the input supply, and (c) radiated noise, at the switching frequency and its harmonics, from switching currents in the inductor and leads. You can get into plenty of trouble with switching supplies in a cir- cuit that has low-level signals (say 100pV or less). Although an aggressive job of shielding and filteringmay solve such prob- lems, you're probably better off with linear regulators from the outset. Line-powered switching supplies As we have seen, switching supplies have high efficiency even when the output volt- age is nowhere near the input voltage. It may help our understanding to think of the inductor as an "impedance converter," since the average dc output current can be larger (step-down) or smaller (step-up) than the average dc input current. This is in stark contrast to linear series regulators, where the average values of input and out- put currents are always equal (ignoring the quiescent current of the regulator circuitry, of course).
- 311. THREE-TERMINAL AND FOUR-TERMINALREGULATORS 6.19 Switching regulators and dc-dc converters 361 This leads to a radical idea: We could It might seem as if the advantage of a eliminatethe heavy 60Hz step-down trans- transformerless unregulated supply is more former if we ran the regulator directly than overcome by the need for at least two from rectified (unregulated) and filtered ac other transformers! Not so. The size of a power. Two immediate comments: (a)The transformer is determined by the core size, dc input voltage will be approximately 160 which decreases dramatically at high fre- volts(for 115Vac power)- this is a danger- quencies. As a result, line-powered switch- ous circuit to tinker with! (b) The absence ing supplies are much smaller and lighter of a transformer means that the dc input is than the equivalent linear supply; they also not isolated from the power line. Thus, the run cooler, owing to higher efficiency. For switchingcircuit itself must be modified to example, Power-One manufactures both provide isolation. kinds of supplies. Comparing their model The usual way to isolate the switching F5-25 (5V, 25A) linear supply with their circuit is to wind a secondary onto the comparably priced SPL130-1005 (5V,26A) energy-storage inductor and use an isola- switcher, we find that the switcher weighs tion device (either transformer or opto- 2.5 pounds, compared with 19 pounds for isolator) to couple the feedback to the the linear, and occupies just one-fourth the switching oscillator; see the simplified volume. Furthermore, the switcher will block diagram in Figure 6.45. Note that run cool, while the 19-pound linear will the oscillator circuitry is powered from the run hot, dissipating up to 75 watts at full high-voltage unregulated dc, whereas the load. feedback control circuitry (error amplifier, reference) is powered from the regulated dc output. Sometimes an auxiliary low- Real-world switcher example current unregulated supply (with its own 60Hz low-voltage transformer) is used to In order to give you a feel for the real com- power the control elements. The box la- plexity of line-powered switching supplies, beled "isolation" is often a small pulse we've reproduced in Figure 6.46 the com- transformer, although optical isolation can plete schematic of a commercial switcher, also be used (more on this later). in fact the power supply used by Tandy Figure 6.45. Direct ac-line-powered switching supply.
- 312. VOLTAGE REGULATORS AND POWER CIRCUITS 362 Chapter 6 CRll L J l - 3 0 Y W I 8 1J 7 - I a L J 4 - 3 a u J 4 - I 0 J 3 - 4 0 Y IJ3 3 a r J I - 2 0 J 3 - I CR9 R 2 4 4 7 m A 112WATT 30Y 3 5 v ZENER SXA A . - b C29 3 COUP 5 6 w 330°F -- ~~ 4 7K 8 2 7 14 t 13 U3 MC34060 110 1 'd REF D T C T R T GW& -----.I PR'UWI ca*DN +-- l3K-- R 2 6 - 100 R a 6 0 1 C25 I I R 4 3 LyU 100 Figure 6.46. Switching power supply used in the Tandy model 2000 personal computer. Feedback from the +5 volt output is provided via opto-isolator U2.4-U2E%.(Courtesy of Tandy Corporation. Copyright 1984.)
- 313. THREE-TERMINAL AND FOUR-TERMINALREGULATORS 6.19 Switching regulatorsand dc-dc converters 363 YWUS6 RI IN4934 (2W455I 27 T 1 NOTE ALL RESISTORS' VALUES I N OHMS UNLESS OTHERWISED SPECIFIED
- 314. VOLTAGE REGULATORS AND POWER CIRC 364 Chapter 6 IUITS (Radio Shack) to power their model 2000 personal computer. (We tried to get power- supply schematics from both IBM and Ap- ple, but were ignored or haughtily rebuffed. Tandy, by comparison, publishes excellent documentation, with complete schematics and extensive circuit description.) It pro- vides regulated outputs of +5 volts at 13 amps, +12 volts at 2.5 amps, and -12 volts at 0.2 amp (95W total), which are used to power the logic circuits and floppy- disk drives in the computer. Let's take a walk through Figure 6.46 to see howa line-poweredswitchercopes with real-world problems. The circuit topol- ogy chosen by Tandy's designers is pre- cisely that shown in Figure 6.45, though there are a few more components! Be- gin by comparing the figures: The line- powered bridge rectifier (BR1) charges fil- ter capacitors C30, C31, C32, and C40 (T2 is not a transformer - note the connec- tions - but rather an interference filter). The charged capacitors are switched across the transformer primary (pins 1 and 3) by power transistor Q15, whose switching waveform (a fixed-frequency square wave of variable pulse width) is provided by IC U3 (a "PWM switch-mode regulator"). The secondary winding (there are actually three windings, one for each output volt- age) is half-wave-rectified to generate the dc output: The +12 volts are produced by CR2 from the 7-turn winding of pins 11 and 18, the -12 volts by CR4 from the 5-turn winding of pins 13 and 20, and the +5 volts by the paralleled combination of CR13 and CR14,each powered from its own (2-turn!) winding. With multioutput switchers, only one output can be used for voltage-regulating feedback. It is conventional to use the +5 volts logic supply for this purpose, as Tandy has done here: Rlo selectsa fraction (nominally 50%) of the +5 volt output to compare with U4's internal +2.5 volt reference, turning on photodiode U2a if the output is too high. This photodiode couples optically to phototransistor UZb, which varies the pulse width of U3 to maintain +5 volts output. Thus the block labeled "isolation" in Figure 6.45 is an opto-coupler (see Section 9.10). At this point we have accounted for per- haps 25% of the components in Figure 6.46. The rest are needed to cope with problems such as (a) short-circuit protec- tion, (b) overvoltage and undervoltage shut-down, (c) auxiliary power for the reg- ulating circuitry, (d) ac power filtering,and (e) linear post-regulation of the (tracking) f12 volt supplies. Let's explore the circuit in some more detail. Beginning at the ac line input, we find four capacitors and a series inductor pair, together forming an RFI filter. It's always a good idea, of course, to clean up the ac power entering an instrument (see Section 6.11); here, however, the careful filtering is additionally needed to keep radiofre- quency hash generated inside the machine (mostly from the switching action in the power supply) from radiating out through the power line. Note next the optional jumper at E8ES,which converts the in- put from full-wave bridge (jumper open) to full-wave doubler (jumper shorted); manufacturers who wish to export their electronic wares must provide 1101220 volt compatibility, which is remarkably simple in the case of switching supplies. Thermistors RTl and RT2 are used to limit the high inrush current when the sup- ply is first switched on, at which point the power line sees a few hundred micro- farads of uncharged capacitor. Without the thermistors (or some other trick) the inrush current can easily exceed 100 am- peres! The thermistors provide an ohm or two of series resistance, dropping to near zero when they warm up. Even with ther- mistors, the inrush current is impressive: The power supply has a specified "Input Surge Current" of 70 amps, maximum. The 100pH series inductors L5 and L7 in the unregulated supply further clean
- 315. THREE-TERMIP(AL AND FOUR-TERMINAL REGULATORS 6.19 Switching regulators and dc-dc converters 365 up transmitted switching hash, and the 82k shunt resistors (R35 and R46) are "bleeders," to make sure the power-supply filter capacitors discharge fully after power is turned off. Some additional passive "snubber" components (C3& C39, and R45)are used to damp the large voltage spikes that otherwise might destroy the switching transistor Q15. CRIl7sfunction is more subtle - it cleverly returns unused transformer energy to filter capacitors C30 and C40. Moving down the page, we encounter some real trickery, namely the "auxiliary supply." The circuits need some low- voltage, low-current dc to run the PWM controller chip and associated circuits. One possibility is to use a separate little linear supply, with its own line-powered transformer, etc. However, the temptation is overwhelming to hang another small winding (with half-wave rectifier) on TI, thus saving a separate transformer. That's what the designer has done here, with a 4-turn winding (pins 9 and lo), rectified and filtered by CRgand C37. This simple supply generates a nominal 15volt output. Sharp-eyed readers will have noticed a flaw in this scheme: The circuit cannot start itself, since the auxiliary power is only present if the supply is already running! This turns out to be an old problem: Designers of television sets love to play the same trick, deriving all their low- voltage supplies from auxiliary windings on the high-frequency horizontal drive transformer. The solution is the so-called kick-start circuit, in which some of the unregulated dc is brought over to start the circuit; once going, the supply keeps itself going from its transformer-derived dc power. In this circuit the kick-start comes via R42, which begins charging up C3, at power-on. Nothing happens until the capacitor reaches a diode drop above CRlo's Zener voltage, at which point the SCR-like combination of Qlo and Qll is switched into conduction (figure out how that works), dumping C37's charge across Cz8,thus momentarily powering the control circuitry (U3and all components to its left). Once the oscillation starts, CRg provides 15 volts with enough current to power the control circuitry continuously (which Rq2cannot do). Most of the components surrounding U3 pander to its needs (C27 and RS7,for example, set the pulse repetition rate at 25kHz). At the input side, U2b provides overall feedback to maintain the output at +5 volts, as described earlier. Q8 and Q9 are another SCR-like latch, this time triggered to shut down the oscillator (and the series latching switch QIOQll) if driver Q15's emitter current (sensed by R44) is excessive, for example if the power supply sees a short-circuit load. The series combination R43CZ5provides a lps time constant so that the circuit is not triggered by switching spikes. The shut- down circuitry also derives an input from divider R26R24,quenching oscillation if the ac input drops below 90 volts ac. At the output side of the controller U3,QI2- Q14 provide high-current push-pull drive to QI5's base from the single-ended on- chip npn driver transistor (figureout how). Note the "Ic loop," an accessible length of wire in Q15's collector, which lets you observe the current waveform on a 'scope by using a clip-on current probe (see, for example, the Tektronix catalog). Things are considerably simpler on the output side of Tl. The +5 volt supply uses paralleled power Schottky diodes (CR13 and CR14) for fast recovery and low for- ward drop (the MBR3035PT is rated at 30A average current with 20kHz drive, 35V reverse breakdown, and 0.5V typical forward drop at lOA), with "snubber net- works" (1ORl0.01pF) to protect the diodes from high-voltage spikes. The section'^ filter consists of 8800pF of input capa- citance, a 3.5pH series inductor, and a 2200pF output capacitor. (The lower- current f12V outputs also use half-wave
- 316. VOLTAGE REGULATORS AND POWER CIRCUITS 566 Chapter 6 Schottky rectifiers and T-section filters, with smaller-valued components.) This degree of filtering might seem extreme by linear regulator standards, but remem- ber that there is no post-regulation - what comes out of the filter is the "regulated dc"- therefore lots of filtering is needed to reduce ripple, predominantly at the switch- ing frequency, to the requisite z50mV or so at the output. The +5 volt output is sensed via di- vider R3R10R11, driving TI'S TL431 "3- terminal zener" (U4),which, in combina- tion with a few resistors and capacitors for feedback compensation, provides iso- lated feedback via opto-coupler U2ab.The +5 volt output is also sensed, via R18R19, to trigger the overvoltage-sensor IC (Ul: Khresh= +2.5V); the latter drives the gate of SCR Q6,which crowbars the +12 volt supply, shutting things down via current limiting in the primary side, as described earlier. Ul is also wired to sense an un- dervoltagecondition, via its dedicated aux- iliary power from CR5and C19;the under- voltage signal (a saturated npn transistor to ground) is sent to the microprocessor, alerting the system to imminent power fail- ure so that the program can be brought to an orderly shut-down during the few re- maining milliseconds without loss of data. The power-supply designers used a bit of trickery to improve regulation in the f12 volt supplies, which otherwise ride virtually open-loop on what is basically a +5 volt supply. For the +12 volt supply they used the +5 volt output as a refer- ence for error amplifier Q2,which controls a "magnetic amplifier." The latter consists of series saturable reactor L3, provided with an opposing "reset current" via Q1. The reset current determines how many volt-secondsthe inductor will block before reaching the state of magnetic saturation, in which it acts as a good conductor. A magnetic amplifier deserves its name, because a small control current modifies a large output current. Mag-amp controllers are available as complete integrated cir- cuits, for example the UC3838 from Unitrode. For the lower-current -12 volt supply the designers opted for the simpler solution of a linear 7912-type post- regulator, complete with diodes for protec- tion against reverse polarity. Throughout, the designers have used bypass capacitors and bleeders on the dc outputs. This power-supply circuit illustrates most of the details that seldom get men- tioned in textbooks, but are essential in the real world. The extra component count in this circuit pays handsomely in ensuring a power supply that is robust under field conditions. Although this extra care in de- sign might appear to be a display of unnec- essary compulsiveness, in fact it is hard- nosed cost-effectiveness - each field failure under warranty costs the manufacturer at least a hundred dollars in real shipping and repair costs, not to mention the tarnished reputation produced by persistent failure. General comments on line-powered switching power supplies 1. Line-poweredswitchers(also called "off- line" switchers, though we don't like the term) make excellent high-power supplies. Their high efficiency keeps them cool, and the absence of a low-frequency transformer makes them considerably lighter and smaller than the equivalent linear supply. As a result, they are used almost exclu- sively to power computers, even desktop personal computers. They are finding their way into other portable instruments, too, even such noise-sensitive applications as oscilloscopes. 2. Switchers are noisy! Their outputs have tens of millivolts of switching ripple at their outputs, they put garbage onto the power line, and they can even scream audibly! One cure for output ripple, if that's a problem, is to add an external high- current L C low-pass filter; alternatively,
- 317. THREE-TERMINAL AND FOUR-TERMINAL REGULATORS 6.19 Switching regulators and dc-dc converters 367 you can add a low-dropout linear post- regulator. Some dc-dc converters include this feature, as well as complete shielding and extensive input filtering. 3. Switchers with multiple outputs are available and are popular in computer sys- tems. However, the separate outputs are generated from additional windings on a common transformer. Typically, feedback is taken from the highest current output (usually the +5V output), which means that the other outputs are not particularly well regulated. There is usually a "cross- regulation" specification, which tells, for example, how much the +12 volt output, say, changes when you vary the load on the +5 volt output from 75% of full load to either 50% or 100% of full load; a typical cross-regulation specification is 5%. Some multiple-output switchersachieve excellent regulation by using linear post-regulators on the auxiliary outputs, but this is the exception. Check the specs! 4. Line-powered switchers may have a minimum load current requirement. If your load-current may drop below the minimum, you'll have to add some re- sistive loading; otherwise the output may soar or oscillate. For example, the +5 volt, 26 amp switching supply above has a minimum load current of 1.3 amps. 5. When working on a line-powered switcher, watch out! Many components are at line potential and can be lethal. You can't clip the ground of your scope probe to the circuit without catastrophic conse- quences. 6. When you first turn on the power, the ac line sees a large discharged electrolytic filter capacitor across it (through a diode bridge, of course). The resulting "inrush" current can be enormous; for our Power One switcher it's specified as 17 amps, maximum (compared with a full-load in- put current of 1.6A). Commercial switch- ers use various "soft-start" tricks to keep the inrush current within civilized bounds. One method is to put a negative-tempco resistor (a low-resistance thermistor) in series with the input; another method is to actively switch out a small (l0Cl) series resistor a fraction of a second after the supply is turned on. 7. Switchers usually include overvoltage "shut-down" circuitry, analogous to our SCR crowbar circuits, in case something goes wrong. However, this circuit often is simply a Zener sensing circuit at the output that shuts off the oscillator if the dc output exceeds the trip point. There are imaginable failure modes in which such a "crowbar" wouldn't crowbar anything. For maximum safety you may want to add an autonomous outboard SCR-type crowbar. 8. Switchers used to have a bad reputation for reliability, but recent designs seem much better. However, when they decide to blow out, they sometimes do it with great panache! We had one blow its guts out in a "catastrophic deconstruction," spewing black crud all over its innards and innocent electronic bystanders as well. 9. Line-powered switchers are definitely complex and tricky to design reliably. You need special inductors and transformers (and lots of them; Fig. 6.46). Our advice is to avoid the design phase entirely, by buying what you need! After all, why build what you can buy? 10. A switching supply presents a peculiar load to the power line that drives it. In par- ticular, an increase in line voltage results in a decrease in average current, because the switcher operates at roughly constant effi- ciency: That's a negative resistance load (averaged over the 60Hz wave), and it can cause some crazy effects. If there's a lot of inductance in the power line, the system may oscillate. Advice Luckily for you, we're not bashful about giving advice! Here it is: 1. For digital systems, you usually need +5 volts, often at high current (10A or more).
- 318. VOLTAGE REGULATORS AND POWER CIRCUITS 368 Chapter 6 Advice: (a) Use a line-powered switcher. (b) Buy it (perhaps adding filtering, if needed). 2. For analog circuits with low-level signals (small-signal amplifiers, signals less than 100pV, etc.). Advice: Use a linear regula- tor; switchers are too noisy - they will ruin your life. Exception: For some battery- operated circuits it may be better to use a low-power dc-dc switching converter. 3. For high-power anything. Advice: Use a line-powered switcher. It's smaller, lighter, and cooler. 4. For high-voltage, low-power applica- tions (photomultiplier tubes, flash tubes, image intensifiers, plasma displays). Ad- vice: Use a low-power step-up converter. In general, low-power dc-dc converters are easy to design and require few com- ponents, thanks to handy chips like the Maxim series we saw earlier. Don't hesitate to build your own. By contrast, high-power switchers (generally line- powered) are complex and tricky and ex- tremely trouble-prone. If you must design your own, be careful, and test your design very thoroughly. Better yet, swallow your pride and buy the best switcher you can find. SPECIAL-PURPOSE POWER-SUPPLY CIRCUITS 6.20 High-voltage regulators Some special problems arise when you de- sign linear regulators to deliver high volt- ages. Since ordinary transistors typically have breakdown voltages of less than 100 volts, supplies to deliver voltages higher than that require some clever circuit trick- ery. This section will present a collection of such techniques. Brute force: high-voltage components voltages to 1000 volts and higher, and they're not even very expensive. Moto- rola's MJ12005, for example, is an 8 amp npn power transistor with conventional (VCEO) collector-to-emitter breakdown of 750 volts, and base back-biased break- down (VCEX)of 1500 volts; it costs less than 5 dollars in single quantities. Their MTP1N100 (similar to the European BUZ- 50) is a 1 amp n-channel power MOSFET with 1000 volt breakdown and a price tag of a few dollars. Power MOSFETs in particular are often excellent choices for high-voltage regulators, owing to their excellent safe operating area (absence of thermally induced second breakdown). By running the error amplifier near ground (the output-voltage-sensing divider gives a low-voltage sample of the output), you can build a high-voltageregulator with only the pass transistor and its driver see- ing high voltage. Figure 6.47 shows the idea, in this case a +lo0 to +500 volt reg- ulated supply using NMOS pass transistor and driver. Q2 is the series pass transistor, driven by inverting amplifier Q1. The op- amp serves as error amplifier, comparing an adjustable fraction of the output with a precision +5 volt reference. Qg provides current limiting by shutting off drive to Q2 when the drop across the 33 ohm resistor equals a VBE drop. The remaining com- ponents serve more subtle, but necessary, functions: The diode protects Q2 from reverse gate breakdown if Ql decides to pull its drain down rapidly (while the out- put capacitor holds up Qz7ssource). The various small capacitors in the circuit provide compensation, which is needed because Q1 is operated as an inverting amplifier with voltage gain, thus making the op-amp loop unstable (especially con- sidering the circuit's capacitive load). This circuit is an exception to the general rule that transistor circuits do not present a shock hazard! Power transistors, both bipolar and We can't resist an aside here: In slightly MOSFET, are available with breakdown modified form (reference replaced by
- 319. SPECIAL-PURPOSEPOWER-SUPPLYCIRCUITS 6.20 High-voltage regulators Figure 6.47. High-voltage regulated supply. signal input) this circuit makes a very nice high-voltage amplifier, useful for driving crazy loads such as piezoelectric transduc- ers. For that particular application the cir- cuit must be able both to sink and to source current into the capacitive load. Oddly enough, the circuit acts like a "pseudo- push-pull" output, with Q2 sourcing cur- rent and Q1sinking current (via the diode), as needed; see Section 3.14. If a high-voltage regulator is designed to provide a fixed output only, the pass tran- sistor may have a breakdown voltage less than the output voltage. In the preceding circuit, replacing the voltage-adjustment resistors with a fixed 12.4k resistor results in a fixed +500 volt regulator. A 300 volt pass transistor will then be fine, pro- vided that the circuit ensures that the volt- age across it never exceeds 300 volts, even during turn-on, turn-off, and output short- circuit conditions. The latter condition presents a challenge, but bridging Q2with a 300 volt zener may solve the problem. If the zener can handle high current, it can also protect the pass transistor against short-circuit loads, if suitable fusing is pro- vided ahead of the regulator. The active zener circuit mentioned in Section 6.06 would be a good choice here. Regulating the ground return Figure 6.48 shows another way to regu- late high voltages with low-voltage com- ponents. Q1 is a series pass transistor, but it is connected in the low side of the supply; its "output" goes to ground. It has only a fraction of the output voltage across it, and it sits near ground, simplify- ing the driver circuitry. As before, pro- tection must be provided during onloff transients and overloads. The simple zener protection shown is adequate, but remember that the zener must be able to handle the full short-circuit current.
- 320. VOLTAGE REGULATORS AND POWER CIRCUITS 370 Chapter 6 Optically coupled transistor Figure 6.48. Regulating the ground return. Lifting the regulator above ground Another method sometimes used to extend the voltage range of regulators, including the simple 3-terminal type, is to raise the common terminal off ground with a Zener (Fig. ,6.49). In this circuit Dl adds Figure 6.49 its voltage to the normal output of the regulator. D2 sets the drop across the regulator via follower Q1and provides protection during short circuit because of D3. There is another way to handle the prob- lem of transistor breakdown ratings in high-voltage supplies, especially if the pass transistor can be a relatively low voltage unit because of fixed (known) output volt- age. In such cases only the driver transistor has to withstand high voltage, and even that can be avoided by using optically cou- pled transistors. These devices, which we will talk about further in connection with digital interfacing in Chapter 9, actually consist of two units electrically isolated from each other: a light-emitting diode (LED), which lights up when current flows through it in the forward direction, and a phototransistor (or photo-Darlington) mounted in close proximity in an opaque package. Running current through the diode causes the transistor to conduct, just as if there were base current. As with an ordinary transistor, you apply collector voltage to put the phototransistor in the active region. In many cases no separate base lead is actually brought out. Optically coupled devices are typically insulated to withstand several thousand volts between input and output. Figure 6.50 shows a couple of ways to use an optically coupled transistor in a high-voltage supply. In the first circuit, phototransistor Q2shuts off pass transistor Q3 when the output rises too high. In the second version, for which only the pass- transistor circuitry is shown, phototransis- tor QI increases the output voltage when driven, so the error-amplifier inputsshould be reversed. Both circuits generate some output current through the pass-transistor biasing circuit, so some load from output to ground is needed to keep the output voltage from rising under no-load condi- tions. The output-sensing voltage divider can do the job, or a separate "bleeder" resistor can be connected across the out- put, which is always a good idea anyway in a high-voltage supply.
- 321. SPECIAL-PURPOSE POWER-SUPPLY CIRCUITS 6.20 High-voltage regulators 371 +HV (unregulated) In +HV out to provide dc (20-30V)for the chip itself. The output voltage is limited only by the pass transistors and the isolation (trans- former insulation breakdown voltage) of the auxiliary supply. The MC1466 features very good regulation and precise current- limiting circuitry and is well suited for accurate "laboratory" power supplies. A warning, however: The MC1466, unlike more recent regulator designs, does not include on-chip thermal protection. An elegant way to rig up a floating regu- lator is provided by the LM10op-amp plus voltage-reference combination, a remark- able breakthrough in chip technology from the legendary Widlar (see Section 4.13) that will operate from a single 1.2 volt sup- ply. Such a chip can be powered from the base-emitter drop of a Darlington pass transistor! Figure 6.51 shows an example. If you like analogies, think of a giraffe who measures his height by looking at the dis- tance to the ground, then stabilizes it by craning his neck accordingly. The TL783 from Texas Instruments is a 125 volt IC regulator that works this way; for lower- current applications it replaces the discrete circuitry of Figure 6.51. Transistors in series Figure 6.50. Opto-isolated high-voltage regulator. Floating regulator Another way to avoid applying large volt- ages to the control components of a high- voltage power supply is to "float" the control circuitry at the pass-transistor potential, comparing the drop across its own voltage reference with the drop down to ground. The excellent MC1466 reg- ulator chip is intended for this kind of application, which normally requires an auxiliary low-current floating powersupply Figure 6.52 shows a trick for connecting transistors in series to increase the break- down voltage. Driver Q1 drives series- connected transistors Q2- Qq,which share the large voltage from Qz7scollector to the output. The equal base resistors are chosen small enough to drive the transistors to full output current. The same circuit works with MOSFETs as well, but be sure to provide reverse-gate-protection diodes, as shown (you don't have to worry about forward gate breakdown, because the MOSFETs should turn on vigorously long beforegate-channel breakdown). Note that the bias resistors produce some output cur- rent even when the transistors are cut off,
- 322. VOLTAGE REGULATORSAND POWER CIRCUITS 372 Chapter 6 +V,, choose a capacitor value large enough to ,,,,,, swamp differences in transistor input ca- IDarl~ngtonl pacitance, which otherwise cause unequal division, reducing overall breakdown voltage. Series-connected transistors can, of course, be used in circuits other than power supplies. You'll sometimes see them in high-voltageamplifiers, although the avail- ability of high-voltage MOSFETs often makes it unnecessary to resort to the series v,,, connection at all. -50" In high voltagecircuits like this, it's easy to overlook the fact that you may need to use 1 watt (or larger) resistors, rather - than the standard watt type. A more - subtle trap awaits the unwary, namely the Figure 6.5 1. High-voltagefloating regulator. maximum voltage rating of 250 volts for standard watt composition ("carbon") +HV ~n resistors, regardless of power dissipation. Carbon resistors run at higher voltages show astounding voltage coefficients, not to mention permanent changes of resis- tance. For example, in an actual measure- ment (Fig. 6.53) a 1000:1 divider (1OMeg, 1Ok) produced a division ratio of 775:l (29% error!) when driven with 1kV; note that the powerwas well within ratings. This non-ohmic effect is particularly important in the output-voltage-sensing divider of high-voltage supplies and amplifiers - beware! Companies like Victoreen make resistors in many styles designed for high- voltage applications like this. - MOSFET Regulating the input alternat~ve Another technique sometimes used in Figure 6.52. Connecting transistorsin series to high-voltage supplies, particularly those raise breakdown voltage. intended for low currents, is to regulate the input rather than the output. This is usually done with high-frequency dc-to-dc so there must be a minimum load to ground switchingsupplies, since attempting to reg- to prevent the output from rising above its ulate the 60Hz ac input will result in poor regulated voltage. It's often a good idea regulation and plenty of residual ripple. to parallel the divider resistors with small Figure 6.54 shows the general idea. TIand capacitors, as indicated, in order to main- associated circuitry generate unregulated tain the divider action at high frequencies; dc at some manageable voltage, say 24
- 323. SPECIALPURPOSE POWER-SUPPLY CIRCUITS 6.20 High-voltage regulators 373 v,, rv) Figure 6.53. Carbon composition resistors exhibit a reduction in resistance above 250 volts. volts; alternatively,batteries might provide the dc input. This powers a high-frequency square-wave power oscillator, with its out- put full-wave-rectified and filtered. This unregulated dc 20kHz driver filtered dc is the output, a sample of which is fed back to control the oscillator's duty cycle or amplitude in response to the output voltage. Since the oscillator runs at high frequency, the response is rapid, and its rectified waveform is easy to filter, especially since it is a full-wave-rectified square wave. T2 must be designed for high-frequency operation, since ordinary laminated-core power transformers will have excessive core losses. Suitable trans- formers are built with iron powder, fer- rite, or "tape-wound" toroidal cores and are much smaller and lighter than con- ventional power transformers of the same power rating. No high-voltage components are used, except, of course, for the output bridge rectifier and capacitor. The astute reader may experience a sense of ddja vu while reading the last paragraph. In fact, it describes switching regulators (Section 6.19) in nearly all respects. The one significant difference is that switching supplies usually use induc- tors as energy-storage devices, whereas the input-regulated high-voltage supply uses Tz as a "normal" (albeit high-frequency) transformer. In common with switching supplies, these high-voltage supplies dis- play high-frequency ripple and noise. square wave -2OkHz regulated dc output Figure 6.54. High-voltageswitching supply.
- 324. VOLTAGE REGULATORS AND POWER CIRCUITS 374 Chapter 6 Video flyback supplies A variation on the conventional fly- back switching regulator (Fig. 6.43A) is commonly used to generate the high dc voltages (10kV or more) needed in tele- vision and cathode-ray-tube (CRT) video displays. As we'll see, this circuit is especially clever, because it also generates the horizontal sweep signal used to drive the deflection coils. winding, rectifies the output, typically 10kV-20kV at a few microamps. The cir- cuit is operated at frequencies of 15kHz or more, which means that filter capaci- tor C1 can be as small as a few hundred picofarads (check this for yourself, by calculating the ripple). Note that the collector-current wave- form is a linearly rising ramp, which is often used to drive the magnetic deflection coils (called the "yoke") of the CRT, thus producing the linear horizontal raster scan. In such cases the oscillator frequency sets the horizontal scan rate. A related circuit is the so-called blocking oscillator, which generates its own excitation pulses. 6.21 Low-noise, low-drift supplies Figure 6.55. Video flyback high-voltagesupply. The basic idea is to use a transformer with a large turns ratio, driving the pri- mary with a saturated transistor, just like a conventional flyback circuit. The output is taken from the secondary, rectified to gen- erate high-voltage dc; see Figure 6.55. Q1 is driven by wide pulses, pulling the pri- mary to ground. It may be self-excited or driven by an oscillator. Dl is a "damper" diode that prevents Ql's collector from rising too high during the flyback. Dz, connected to the high-voltage secondary The regulated supplies we have described thus far are pretty good - they typically have ripple and noise below a millivolt, and drift with temperature of 100ppml°C or so. This is more than adequate for just about everything you will ever need to power. However, there are times when you may need better performance, and you can't get it with any available regulator ICs. The solution is to design your own regulator circuit, using the best available IC references (in terms of stability and noise; see, e.g., the REFlOlKM in Table 6.7). This kind of stability (<lppmIoC) is far better than the tempco of ordinary metal-film resistors (5OppmI0C),for exam- ple; so you must use great care to select op-amps and passive components whose errors and drifts do not degrade overall performance. Figure 6.56 shows a complete design of an exceptional low-noise, low-drift dc reg- ulated supply. It begins with the excellent REFlOKM from Burr-Brown, which guar- antees better than 1ppml0Ctempco, along with very low noise (6pV pp, 0.l- 1OHz). Furthermore, it achieves this without thermostatic control, which helps keep the subsurface Zener noise low. The reference
- 325. + 30V reg I + 2 7 V , 0.5A Figure 6.56. Ultrastable low-noise power supply.
- 326. VOLTAGE REGULATORS AND POWER CIRCUITS 376 Chapter 6 is followed by a low-pass filter, to reduce the noise further. The large capacitor value is needed to suppress current noise from the op-amp: the value shown converts the current noise ( 1 . 5 p ~ I mat 10Hz) to a voltage noise of 2 . 4 n v a , comparable with the op-amp's en. A polypropylene capacitor is used because the capacitor leakage (more precisely, changes in leak- age over time and temperature) must be less than O.lnA in order to avoid micro- volt drifts in output voltage. The reference is boosted to +25 volts by the op-amp, whose feedback resistors have ultra-low tempco (0.2ppmI0C, max); note the +30 volt supply voltage. The resultant +25.0 volt reference drives a voltage divider to produce the desired output voltage, which is then low-pass-filtered a second time, again using a low-leakage capacitor. Be- cause a potentiometer is used to divide the reference voltage, resistor tempco isn't as critical here - it's a ratiometric measurement. The rest of the circuit is simply a fol- lower, using a precision low-noise error amplifier to compare the output voltage from a power MOSFET series pass tran- sistor. A decompensated op-amp has been used, since the large output capacitor pro- vides the dominant pole for compensa- tion. Note the unusual current-limit cir- cuit and the liberal use of constant-current "diodes" (really JFETs) to provide operat- ing bias. Note also the use of "sense" wires to sample the voltage across the load. In a precision circuit like this it is important to pay careful attention to ground paths, since, for example, a lOOmA load current flowing through 1 inch of #20 wire pro- duces a voltage drop of 100pV- which is a lOOppm error for a 1 volt output! The cir- cuit shown has excellent performance and surpasses the typical noise and drift figures given earlier by at least a factor of 100. According to EVI, Inc. (Columbia, MD), which kindly provided the circuit, it pro- duces noise and hum below IpV, tempco below 1ppml0C,output impedance below lpfl, and drift below lppmlworking day. We will talk more about such precision and low-noise design in the next chapter. 6.22 Micropower regulators As we've hinted earlier, it's possible to design battery operated circuits that use very low quiescent current, often as little as tens of microamps. That's what's needed, of course, to make the circuit run for months or years on a small battery, as it must if it is a wristwatch or calculator. For example, an alkaline 9 volt transistor battery is exhausted after supplying about 400mA-hours; thus you can run a 50pA circuit with it for about a year (8800 hours). If such micropower circuits need regulated voltages, you clearly can't afford to squander the 3mA quiescent current of a 78L05, since that would degrade battery life to less than a week! The solution is either to design a micro- power regulator from discrete components or use one of the ICs intended for micro- power applications. Luckily, some good ICs have come along in recent years. One of the best is the LP2950 series from Na- tional, available as a TO-92 (small transis- tor package)3-terminal fixed 5 volt regula- tor (LP2950ACZ-5.0)or as a multiterminal adjustable 1.2-30 volt regulator (LP2951). Both versions have a quiescent current of 75pA. For even lower quiescent currents there are the ICL766314 (or MAX663/4), adjustable regulators of both polarities with 4pA quiescent current. We will discuss micropower regulators, along with all aspects of battery-powered circuit design, in Chapter 14. As an example of what you can do with discrete design, we show in Figure 6.57 a micropower circuit, designed for possible use in a lithium-battery-powered heart pacemaker, that converts an input voltage in the range +5 volts down to +3 volts (as
- 327. SPECIAL-PURPOSE POWER-SUPPLY CIRCUITS 6.23 Flying-capacitor (charge pump) voltage converters 377 Figure 6.57. Micropower switching regulator. the battery ages) to a regulated +5.5 volt supply. The power supply has a quiescent current of 1pA and provides line and load regulation of about 5%, with 85% conver- sion efficiency under full load for all bat- tery voltages. As we remarked when dis- cussing switching supplies, a conventional linear supply using an oscillator, doubler, and series pass regulator would be far less efficient because of regulator losses follow- ing the higher unregulated dc voltage. The flyback technique is effectively like a variable-ratio voltage multiplier, which yields extremely high efficiency, making it an attractive technique for micropower applications. The 2N6028 programmable unijunction multivibrator" (see Section 8.20), which generates positive pulses of constant width at its output terminal labeled Q. In this circuit, Qg senses the output voltage and robs charging current from C1, reducing the energy-transfer pulsing rate of the inductor as necessary to maintain the desired output voltage. Note the large resistor values throughout the circuit. Temperature compensation is not an issue here because the circuit operates in a stable 98.6"F mobile oven. (Warning: We remind the reader to look again at the "Legal notice" in the Preface.) transistor (PUJT) is a versatile relaxation oscillator component. ~ t ssense terminal 6.23 F'ying-capacitOr(charge pump) (the anode) draws no current until its volt- voltage converters age exceeds the gate programming voltage by a diode drop, at which point it goes In Section 6.19 we discussed switching into heavy conduction from anode to cath- supplies, with their bizarre ability to pro- ode, discharging the capacitor. The re- duce a dc output voltage larger than the sulting positive pulse at Qz's base pulls dc input, or even of opposite polarity. We Q2's collector to ground, triggering the mentioned there that flying-capacitor volt- 4098, a device known as a "monostable age converters let you do some of the same
- 328. VOLTAGE REGULATORS AND POWER CIRCUITS 378 Chapter 6 Figure 6.58. Flying-capacitor voltage inverter. C1 and Cz are external 10pF tantalum capaci- tors. things. What is this strange "flying capac- itor"? Figure 6.58 shows a simplified circuit of the 7662 CMOS IC introduced by Intersil, and widely second-sourced. It has an internal oscillator and some CMOS switches, and it requires a pair of external capacitors to do its job. When the input pair of switches are closed (conducting), C1 charges to V,,; then, during the second half cycle, C1 is disconnected from the input and connected, upside-down, across the output. It thus transfers its charge to C2 (and the load), producing an output of approximately -x,. Alternatively, to use the 7662 to create an output of 2V,, you can arrange things so that C1 charges as before, but then gets hooked in series with V,, during the second (transfer) half cycle. This flying-capacitor technique is sim- ple and efficient and requires few parts and no inductors. However, the output is not regulated, and it drops significantly under load currents greater than a few milliamps (Fig. 6.59). Also, like most CMOS devices, it has a limited supply voltage range; for the 7662, V, can only range from 4.5 to 20 volts (1.5V to 1OV for its predecessor, the 7660). Finally, unlike the inductive step-up or inverter circuits, which can generate any output voltage at all, the fly- ing capacitor voltage converter can only generate discrete multiples of the input voltage. In spite of these drawbacks, flying- capacitor voltage converters can be very useful in some circumstances, for example to power a bipolarity op-amp or serial port (see Chapters 10and I 1)on a circuit board that has only +5 volts available. load current ImA) Figure 6.59. The output voltage of a flying-capacitor inverter drops significantly under load.
- 329. SPECIAL-PURPOSE POWER-SUPPLYCIRCUITS 6.24 Constant-currentsupplies 379 There are some other interesting flying- capacitor chips. The MAX680 from Max- im is a dual supply that generates f10 volts (up to 1OmA) from +5 volts (Fig. 6.60). The similar LT1026 from LTC op- erates to f20 volts output (up to 20mA) and uses smaller capacitors (lpF instead of 20pF). The LT1054 from LTC combines a flying-capacitor converter with a linear reg- ulator to provide a stiff regulated output up to lOOmA (at lower efficiency, of course). The MAX232 series and the LT1080 com- bine a f10 volt switched-capacitor supply with an RS-232C digital serial port (see Chapter 1l), eliminating the need for bipo- larity supplies in many computer boards; some chips in the MAX232 series even have built-in capacitors. And the LTC1043 is an uncommitted flying-capacitor build- ing block, which you can use to do all kinds of magic. For example, you can use a flying capacitor to transfer a voltage drop mea- sured at an inconvenient potential (e.g., a current-sensing resistor at the positive sup- ply voltage) down to ground, where you can easily use it. The LTC1043 data sheet has 8 pages of similar clever applications. 6.24 Constant-current supplies In Sections 2.06 and 2.14 we described some methods for generating constant cur- rents within a circuit, including voltage- programmed currents with floating or grounded loads and various forms of cur- rent mirrors. In Section 3.06 we showed how to use FETs to construct some simple current-source circuits, including "current- regulator diodes" (a JFET with gate tied to source) such as the IN5283 series. In Sec- tion 4.07 we showed how to get improved performance (at low frequencies, anyway) by using op-amps to construct current sources. And in Section 6.15 we men- tioned the convenient LM334 3-terminal current source IC. There is often a need, however, for a flexible constant-current supply, which can supply substantial voltage and current, as a complete instru- ment. In this section we will look at some of the more successful circuit techniques. -- 1pF capacitors; R,,, = 100R Figure 6.60. Flying-capacitor dual supply. The LT1026 is similar, but has Rout = 100 ohms and requires only 1,uFcapacitors. Three-terminal regulator In Section 6.18 we showed how you can use a 3-terminal adjustable regulator to make a delightfully simple current source. The 317-type regulator, for example, maintains a constant 1.25 volts (bandgap) between its output and its "ADJ" pin; by putting a resistor across these pins, you form a 2-terminal constant-current device (Fig. 6.38), which can be used as a sink or source. Performance degrades with less than about 3 volts across the circuit, since the regulator itself has a dropout voltage near 2 volts. This type of current source is suitable for moderate to high currents: The LM317 has a maximum current of 1.5 amps and can operate with up to 37 volts drop. Its high-voltage cousin, the LM317HVK, can withstand 57 volts drop. Higher- current versions are available, e.g., the LM338 (5A) and LM396 (lOA), although these have lower voltage ratings. Three- terminal regulators won't work as current sources below about 1OmA, the worst-case quiescent current. However, note that the
- 330. VOLTAGE REGULATORS AND POWER CIRCUITS 380 Chapter 6 latter is not a source of current error, since it flows from input pin to output pin; the much smaller current that flows out of the ADJ pin (50pA, nominal) varies about 20% over the operating temperature range and is negligible by comparison. In ancient times, before 3-terminal ad- justable regulators were available, people sometimes used 5 voltfrxedregulators (e.g., the 7805) as current sources in a simi- lar arrangement (substituting "GND" for "ADJ"). This is an inferior circuit, because at low output currents the regulator's qui- escent current (8mA max) contributes a large error, and at high currents the 5 volt drop across the current-setting resistor results in unnecessary power dissipation. Supply-line sensing A simple technique that yields good per- formance involves constructing a conven- tional series pass regulator, with current sensing at the input to the pass transis- tor (Fig. 6.61). R2 is the current-sensing to the current-carrying leads, which for clarity are drawn with heavy lines in this schematic. For this circuit you must use an op-amp that has an input common-mode range all the way to the positive supply (the 307, 355, and 441 have this virtue), unless, of course, you power the op-amp with a more positive auxiliary supply. The MOSFET in this circuit could be replaced by a pnp pass transistor; however, since the output current would then include the base cur- rent, you should use a Darlington connec- tion to minimize that error. Note that an n-channel output transistor (connected as a follower) can be used instead of the p- channel shown, if the input connections to the op-amp are reversed. However, the current source will then have an undesir- ably low output impedance at frequencies approaching fT of the op-amp loop, since the output is actually a source follower. This is a common error in current-source design, since the dc analysis shows correct performance. R 2 Return-line current sensing i.on A good way to make a precise current source is to sense the voltage across a precision resistor directly in series with the load, since this makes it easier to meet the simple criterion for eliminating current- source errors due to base drive currents; the base drive current must either pass- through both the load and sense amplifier, -- or pass through neither. However, to meet this criterion it is necessary to "float" Figure 6.61. Input-rail current sensing. either the load or the power supply by at least the voltage drop across the current- resistor, preferably a low-temperature- sensing resistor. Figure 6.62 shows a coefficient type. For very high current or couple of circuits that use floating loads. high-precisionapplications, you should use The first circuit is a conventional series a 4-wire resistor, intended for current- pass circuit, with the error signal derived sensing applications, in which the sens- from the drop across the small resistor in ing leads are connected internally. The the load's return path to ground. The high- sensing voltage does not then depend current path is again drawn with bold lines. on the connection resistance of the joints The Darlington connection is used here
- 331. SPECIAL-PURPOSE POWER-SUPPLY CIRCUITS 6.24 Constant-currentsupplies 381 V,,' Grounded load collector is at ground, so you don't have to worry about insulating the transistor case from the heat sink. Figure 6.62. Return-line current sensing. 6 + SUPPIY - not to avoid base-current error, since the actual current through the load is sensed, but rather to keep the drive current down to a few milliamps so that ordinary op- amps can be used for the error amplifier. The sensing resistor should be a precision power resistor of low temperature coeffi- cient, preferably a 4-wire resistor. In the second circuit the regulating transistor Q2 is in the ground return of the high-current supply. The advantage here is that its In both circuits, Rsensewill normally be chosen to drop a volt or so at typical If it is important for the load to be re- turned to circuit ground, a circuit with floating supply can be used. Figure 6.63 shows two examples. In the first circuit, the funny-looking op-amp represents an error amplifier with a high-current buffer output, run from a single split supply; it could be something as simple as a 723 (for currents up to 150mA)or one of the high- current op-amps listed in Table 4.4. The high-current supply has a common termi- nal that floats relative to circuit ground, and it is important that the error amplifier (or at least its buffer output) be powered from the floating supply so that base drive currents return through Rsense.An addi- tional low-current supply with grounded common would be needed if other op- amps, etc., were in the same instrument. A negative reference (relative to circuit ground) programs the output current. Note the polarity at the error-amplifier inputs. The second circuit illustrates the use of a second low-power supply when an ordinary low-current op-amp is used as error amplifier. Q1 is the outboard pass transistor, which must be a Darlington (or MOSFET), since the base current returns through the load, but not through the sense resistor. The error amplifier is now operating currents; its value is a com- promise between op-amp input offset errors, at one extreme, and a combina- tion of reduced current-source complianceload and increased dissipation at the other. If the circuit is meant to operate over large ranges of output current, RSenseshould probably be a set of precision power resis- tors, with the appropriate resistor selected by a range switch.
- 332. VOLTAGE REGULATORS AND POWER CIRCUITS 882 Chapter 6 - high-current ~ U P P ~ V +I high-current B Figure 6.63. Current sources for grounded loads, employing floating high-currentsupplies. powered from the same split supply with grounded common that powers the rest of the instrument. This circuit is well suited as a simple bench-instrument cur- rent source, with the low-current split sup- ply built in and the high-current supply connected externally. You would choose the latter's voltage and current capability to fit each application. 6.25 Commercial power-supply modules Throughout the chapter we have described how to design your own regulated power supply, implicitly assuming that is the best thing to do. Only in the discussion of line- operated switching power supplies did we suggest that the better part of valor is to swallow your pride and buy a commercial power supply. As the economic realities of life would have it, however, the best approach is often to use one of the many commercial power supplies sold by companies such as ACDC, Acopian, Computer Products Inc., Lambda, Power-One, and literally hundreds more. They offer both switching and linear supplies, and they come in four basic packages (Figure 6.64): 1. Modular "potted" supplies: These are low-power supplies, often dual (f15) or triple (+5, f19, packaged in "potted" modules that are usually 2.5"x3.5", and about I " thick. The most common pack- age has stiff wire leads on the bottom, so you can mount it directly on a circuit board; you can also screw it to a panel, or plug it into a socket. They are also available with terminal-strip screw connec- tions along one side, for chassis mounting. A typical linear triple supply provides +5 volts at 0.5 amp and f15 volts at 0.1 amp and costs about $100 in small quantity. Linear modular supplies fall in the 1-10 watt range, switchers in the 15-25 watt range. 2. "Open-frame" supplies: These consist of a sheet-metal chassis, with circuit board, transformer, and power transistors mounted in full view. They're meant to go
- 333. SPECIAL-PURPOSE POWER-SUPPLY CIRCUITS 6.25 Commercial power-supply modules 383 Figure 6.64. Commercial power supplies come in a variety of shapes and sizes, including potted modules, open-frame units, and fully enclosed boxes. (Courtesy of Computer Products, Inc.) inside a larger instrument. They come in a wide range of voltages and currents and include dual and triple units as well as single-output supplies. For example, a popular triple open-frame linear provides +5 volts at 3 amps and f15 volts at 0.8 amp and costs $75 in small quantity. Open-frame supplies are larger than potted modules, and you alwaysscrew them to the chassis. Open-frame linears fall in the 10- 200 watt range, switchers in the 20-400 watt range. Open-frame supplies at the low end of the power range may have all components mounted directly on a circuit board, with no metal frame at all. As with the potted supplies, you are expected to provide switches, filters, and fuses for the ac line voltage circuits. 3. Fully enclosed supplies: These supplies have a full metal enclosure, usually perfo- rated for cooling, and usually free of the protruding power transistors, etc., that you find on an open-frame supply. They can be mounted externally, because their full
- 334. VOLTAGE REGULATORS AND POWER CIRCUITS 384 Chapter 6 enclosure keeps fingers out; you can also mount them inside an instrument, if you want. They come with single and multiple outputs, in both linear and switchers. Fully enclosed linears fall in the 15-750 watt range, switchers in the 25-1500 watt range. 4. wa.phg-inpowex suppl~es.T b e ate the familiar black plastic boxes that come with small consumer electronic gadgets and plug directly into the wall. They actually come in three varieties, namely (a) step-down ac transformer only, (b) unregulated dc supply, and (c) complete regulated supply; the latter can be either linear or switcher. For example, Ault has a nice series of dual ( f12V or f15V) and triple (+5V and f 12V or f 15V) linear regulated wall-plug-insupplies. These save you the trouble of bringing the ac line power into your instrument, and keep it light and small. Some of us think that these convenient supplies are getting a bit too popular, though, as measured by the cluster of wall plug-ins found feeding at the outlets in our house! Some "desktop" models have two cords, one each for the ac input and dc output. Some of the switching units allow a full 95 to 252 volts ac input range, useful for traveling instruments. We'll have more to say about wall plug-ins in Section 14.03, when we deal with low-power design. SELF-EXPLANATORYCIRCUITS 6.26 Circuit ideas Figure 6.65 presents a variety of current ideas, mostly taken from manufacturers' data sheets. 6.27 Bad circuits Figure 6.66 presents some circuits that are guaranteed not to work. Figure them out, and you will avoid these pitfalls. ADDITIONAL EXERCISES (I) Design a regulated supply to deliver exactly +10.0 volts at currents up to I OmA using a 723. You have available a 15 volt (rms) lOOmA transformer, diodes by the bucketful, various capacitors, a 723, resistors, and a Ik trimmer pot. Choose your resistors so that they are standard (5%) values and so that the range of adjustment of the trimmer will be sufh- cient to accommodate the production spread of internal reference voltages (6.80V to 7.50V). (2) Design +5 volt 50mA voltage regu- lators, assuming +10 volt unregulated in- put, using the following: (a) zener diode plus emitter follower; (b) 7805 3-terminal regulator; (c) 723 regulator; (d) 723 plus outboard npn pass transistor; use foldback current limiting with lOOmA onset (full- voltage current limit) and 25mA short- circuit current limit; (e) a 317 3-terminal adjustable positive regulator; (f) discrete components, with zener reference and feedback. Be sure to show component values; provide 1OOmA current limiting for (a), (c), and (0. (3) Design a complete +5 volt 500mA power supply for use with digital logic. Begin at the beginning (the 115V ac wall socket), specifying such things as trans- former voltage and current ratings, capac- itor values, etc. To make your job easy, use a 7805 3-terminal regulator. Don't squander excess capacitance, but make your design conservative by allowing for f10% variation in all parameters (power- line voltage, transformer and capacitor tolerances, etc.). When you're finished, calculate worst-case dissipation in the regulator. Next, modify the circuit for 2 amp load capability by incorporating an outboard pass transistor. Include a 3 amp current limit.
- 335. Gircuit ideas 0.2R 499k 1% + 2 0 - ~ n 317 out adj - I Ve,, - 1 0 o t o t100 -- -- B adjustable stable bipolar voltage reference A 12V b e e r y charger tn 317 out C tracking preregulexor * % -10 +9n > a, i k i f. D. automf~ticIwandeeoent h l b l i t fe@~lattcH E. precidonpower vbftapa source : figure 6.65 r:
- 340. Ch7: Precision Circuits and Low-Noise Techniques In the preceding chapters we have dealt with many aspects of analog circuit design, including the circuit properties of passive devices, transistors, FETs, and op-amps, the subject of feedback, and numerous applications of these davices and circuit methods. In all our discussions, however, we have not yet addressed the question of the best that can be done, for example, in minimizing amplifier errors (non- linearities, drifts, etc.) and in am- plifying weak signals with minimum degradation by amplifier "noise." In many applications these are the most important issues, and they form an important part of the art of electronics. In this chapter, therefore, we will look at methods of precision circuit design and the issue of noise in amplifiers. With the exception of the introduction to noise in Section 7.1 1, this chapter can be skipped over in a first reading. This material is not essential for an understanding of later chapters. PRECISION OP-AMP DESIGN TECHNIQUES In the field of measurement and control there is often a need for circuits of high precision. Control circuits should be ac- curate, stable with time and temperature, and predictable. The usefulness of measur- ing instruments likewise depends on their accuracy and stability. In almost all elec- tronic subspecialties we always have the desire to do things more accurately - you might call it the joy of perfection. Even if you don't always actually nc~rdthe highest precision, you can still delight in the joy of fully understanding what's going on. 7.01 Precision versus dynamic range It is easy to get confused between the concepts of precisl'on and dynamic. range, especially since some of the same tech- niques are used to achieve both. Perhaps the difference can best be clarified by some examples: A 5-digit multimeter has high
- 341. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 392 Chapter 7 precision; voltage measurements are ac- curate to 0.01% or better. Such a de- vice also has wide dynamic range; it can measure millivolts and volts on the same scale. A precision decade amplifier (one with selectable gains of 1, 10, and 100, say) and a precision voltage reference may have plenty of precision, but not necessar- ily much dynamic range. An example of a device with wide dynamic range but only moderate accuracy might be a 6-decade logarithmic amplifier (log amp) built with carefully trimmed op-amps but with com- ponents of only 5% accuracy; even with accurate components a log amp might have limited accuracy because of lack of log conformity (at the extremes of current) of the transistor junction used for the conver- sion. Another example of a wide-dynamic- range instrument (greater than 10,000:l range of input currents) with only mod- erate accuracy (1%) is the coulomb meter described in Section 9.26. It was origi- nally designed to keep track of the total charge put through an electrochemical cell, a quantity that needs to be known only to approximately 5% but that may be the cumulative result of a current that varies over a wide range. It is a general charac- teristic of wide-dynamic-range design that input offsets must be carefully trimmed in order to maintain good proportionality for signal levels near zero; this is also neces- sary in precision design, but, in addition, precise components, stable references, and careful attention to every possible source of error must be used to keep the sum total of all errors within the so-called error budget. 7.02 Error budget A few words on error budgets. There is a tendency for the beginner to fall into the trap of thinking that a few strategically placed precision components will result in a device with precision performance. On rare occasions this will be true. But even a circuit peppered with 0.01% resistors and expensive op-amps won't perform to expectations if somewhere in the circuit there is an input offset current multiplied by a source resistance that gives a voltage error of IOmV, say. With almost any circuit there will be errors arising all over the place, and it is essential to tally them up, if for no other reason than to locate problem areas where better devices or a circuit change might be needed. Such an error budget results in rational design, in many cases revealing where an inexpensive component will suffice, and eventually permitting a careful estimate of performance. 7.03 Example circuit: precision amplifier with automatic null offset In order to motivate the discussion of precision circuits, we have designed an ex- tremely precise decade amplifier with auto- matic offset. This gadget lets you "freeze" the value of the input signal, amplifying any subsequent changes from that level by gains of exactly 10, 100, or 1000. This might come in particularly handy in an ex- periment in which you wish to measure a small change in some quantity (e.g., light transmission or radiofrequency absorp- tion) as some condition of the experiment is varied. It is ordinarily difficult to get ac- curate measurements of small changes in a large dc signal, owing to drifts and insta- bilities in the amplifier. In such a situation a circuit of extreme precision and stability is required. We will describe the design choices and errors of this particular circuit in the framework of precision design in general, thus rendering painless what could otherwise become a tedious exercise. A note at the outset: Digital techniques offer an attractive alternative to the purely analog circuitry used here. Look forward to exciting revelations in chapters to come! Figure 7.1 shows the circuit.
- 342. PRECISION OP-AMP DESIGN TECHNIQUES 7.03 Example circuit: precision amplifier with automatic null offset 393 R , R8 100 Ok 10 Ok 0 01% 0 01% 500M - cornpensatlon- - 'Plastic Capac~tors Inc , PD05-106 [orAmperex C280MCH/A6M8 16 8fiF). TRW 8 6 3 11 OFF), or ECC E42A105 K ( 1 OFF)] Figure 7.1. Autonulling dc laboratory amplifier. Circuit description if desired. For now, just think of it as a simple SPST switch. The basic circuit is a follower (U1) driving When the logic input is HIGH ("auto- an inverting amplifier of selectable gain zero"), the switch is closed, and U3charges (U2), the latter offsettable by a signal the analog "memory" capacitor (GI) as applied to its noninverting input. Q1 and necessary to maintain zero output. No Q2 are FETs, used in this application as attempt is made to follow rapidly changing simple analog switches; Q3-Q5 generate signals, since in the sort of application suitable levels, from a logic-level input, for which this was designed the signals to activate the switches. Q1 through Q5 are essentially dc, and some averaging and their associated circuitry could all is a desirable feature. When the switch be replaced by a relay, or even a switch, is opened, the voltage on the capacitor
- 343. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 394 Chapter 7 remains stable, resulting in an output signal proportional to the wanderings of the input thereafter. There are a few additional features that should be described before going on to ex- plain in detail the principles of precision design as applied here: (a) U4 participates in a first-order leakage-current compensa- tion scheme, whereby the tendency of C1 to discharge slowly through its own leak- age (100,00OM, minimum, corresponding to a time constant of 2 weeks!) is compen- sated by a small charging current through R15proportional to the voltage across C1. (b) Instead of a single FET switch, two are used in series in a "guarded leakage-cancellation7 ' arrangement. The small leakage current through Q2, when switched OFF, flows to ground through R23, keeping all terminals of Q1 within millivolts of ground. Without any appreciable voltage drops, Q1 hasn't any appreciable leakage! (See Section 4.15 and Fig. 4.50 for similar circuit tricks.) (c) The offsetting voltage generated at the output of U3 is attenuated by Rll-R14, according to the gain setting. This is done to avoid problems with dynamic range and accuracy in U3, since drifts or errors in the offset holding circuitry are not amplified by U2 (more on this later). 7.04 A precision-design error budget For each category of circuit error and de- sign strategy we will devote a few para- graphs to a general discussion, followed by illustrations from the preceding circuit. Circuit errors can be divided into the categories of (a) errors in the external network components, (b) op-amp (or amplifier) errors associated with the input circuitry, and (c) op-amp errors associated with the output circuitry. Examples of the three are resistor toler- ances, input offset voltage, and errors due to finite slew rate, respectively. Let's start by setting out our error bud- get. It is based on a desire to keep input errors down to the 10pVlevel, output drift (from capacitor "droop") below 1mV in 10 minutes, and gain accuracy in the neigh- borhood of O.OlO/o. As with any budget, the individual items are arrived at by a process of trade-offs, based on what can be done with available technology. In a sense the budget represents the end result of the design, rather than the starting point. However, it will aid our discussion to have it now. Error budget (worst-case values) 1. Buffer amplifier (U1) Voltage errors referred to input: Temperature 1.2pv/4OC Time 1.OpVlmonth Power supply 0.3pV1100mV change Bias current x Rs 2.OpVIlk of Rs Load-current heating 0.3pV @ full scale (10V) 2. Gain amplifier (U2) Voltage errors referred to input: Temperature 1.2pv/4Oc Time 1.OpVlmonth Power supply 0.3pV/ 100mV change Bias offset current drift 1. 6 p ~ / 4 ~ ~ / 1k Load-current heating 0.3pV @ full scale (RL2 10k) 3. Hold amplifier (U3) Voltage errors referred to output: U3 offset tempco 6 0 p V 1 4 ~ ~ Power supply 10pVI100mV change Capacitor droop 100pVImin (see current error budget) Charge transfer 1OpV Current errors applied to C1 (needed for preceding voltage error budget): Capacitor leakage Maximum (uncompensated) (100pA) Typical (compensated) 1OpA U3 input current 0.2pA U3 & U4 offset voltage across R15 I .OpA FET switch OFF leakage 0.5pA Printed-circuit-board leakage 5.0pA The various items in the budget will make sense as we discuss the choices faced in
- 344. PRECISION OP-AMP DESIGN TECHNIQUES 7.05 Component errors 395 this particular design. We will organize by the categories of circuit errors listed earlier: network components, amplifier input errors, and amplifier output errors. 7.05 Component errors The degrees of precision of reference volt- ages, current sources, amplifier gains, etc., all depend on the accuracy and stability of the resistors used in the external networks. Even where precision is not involved directly, component accuracy can have significant effects, e.g., in the common- mode rejection of a differential amplifier made from an op-amp (see Section 4.09), where the ratios of two pairs of resistors must be accurately matched. The accu- racy and linearity of integrators and ramp generators depend on the properties of the capacitors used, as do the performances of filters, tuned circuits, etc. As you will see shortly, there are places where component accuracy is crucia1,and there are other places where the particular component value hardly matters at all. Components are generally specified with an initial accuracy, as well as the changes in value with time (stability) and temper- ature. In addition, there are specifications of voltage coefficient (nonlinearity) and bizarre effects such as "memory" and dielectric absorption (for capacitors). Complete specifications will also include the effects of temperature cycling and soldering, shock and vibration, short- term overloads, and moisture, with well- defined conditions of measurement. In general, components of greater initial ac- curacy will have their other specifications correspondingly better, in order to pro- vide an overall stability comparable with the initial accuracy. However, the overall error due to all other effects combined can exceed the initial accuracy specification. Beware! As an example, RN55C 1% tolerance metal-film resistors have the following specifications: temperature coefficient (tempco), 50ppmI0Cover the range -55°C to +175OC; soldering, temperature, and load cycling, 0.25%; shock and vibration, 0.1%; moisture, 0.5%. By way of com- parison, ordinary 5% carbon-composition resistors (Allen-Bradley type CB) have these specifications: tempco, 3.3% over the range 25°C to 85°C; soldering and load cycling, +4%, -6%; shock and vibration, f2%; moisture, +6%. From these specs it should be obvious why you can't just se- lect (using an accurate digital ohmmeter) carbon resistors that happen to be within 1% of their marked value for use in a precise circuit, but are obliged to use 1% resistors (or better) designed for long-term stability as well as initial accuracy. For the utmost in precision it is necessary to use an ultra-precise metal-film resistor, such as Mepco 50232 (5ppmI0C and 0.025%), or wire-wound resistors, available with tolerances of 0.01%. See Appendix D for more information on precision resistors. Nulling amplifier: component errors In the preceding circuit (Fig 7.l), 0.01% re- sistors are used in the gain-setting network, R3-R9, giving highly predictable gain. As you will see shortly, the value of R3 is a compromise, with small values reducing offset current error in U2 but increasing heating and thermal offsets in Ul. Given the value of R3, the feedback network is forced to take on its complicated form to keep the resistor values below 301k, the maximum value generally available in 1% precision resistors. This trick is discussed in Section 4.19. Note that 1% resistors are used in the offset attenuator network, Rll-RI4; here accuracy is irrelevant, and metal-film resistors are used only for their good stability. The largest error term in this circuit, as the error budget shows, is capacitor leak- age in the holding capacitor, C1. Capaci- tors intended for low-leakage applications
- 345. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 396 Chapter 7 give a leakage specification, sometimes as a leakage resistance, sometimes as a time constant (megohm-microfarads). In this circuit C1 must have a value of at least a few microfarads in order to keep the charging rate from other current error terms small (see budget). In that range of capacitance, polystyrene, polycarbonate, and polysulfone capac- itors have the lowest leakage. The unit chosen has a leakage specified as 1,000,000 megohm-microfarads maxi- mum, i.e., a parallel leakage resistance of at least 100,000M. Even so, that's equivalent to a leakage current of lOOpA at full output (lOV), corresponding to a droop rate of nearly ImVlmin at the output, the largest error term by far. For that reason we have added the leakage- cancellation scheme described earlier. It is fair to assume that the effective leakage can be reduced to 0.1 of the capacitor's worst- case leakage specification (in practice, we can probably do much better). No great stability is required in the cancel- lation circuit, given the modest demands made of it. As you will see later when we discuss voltage offsets, R15 is kept intentionally large so that input voltage offsets in U3 aren't converted to a signif- icant current error. While on the subject of errors produced by components external to the amplifiers themselves, it should be pointed out that leakage in FET switches is normally in the range of lnA, a value completely unac- ceptable in this circuit. The trick of us- ing a pair of series-connected FETs, with Q2's leakage resulting in only 1mV across Q1 (with negligible leakage into Us's summing junction), is elegant and power- ful; it is sometimes used in integrator circuits, as discussed in Section 4.19. We have also used it in a novel peak- detector circuit in Section 4.15. As you will see shortly, U3 is chosen carefully to keep currents through C1 down in the picoampere range. The philosophy is the same everywhere: Choose circuit configurations and component types as necessary to meet the error budget. At times this involves hard work and circuit trickery, but at other times it falls easily within standard practice. One subtle source of error in any circuit using FET switches is charge transfer from the controlling gate to the signal-carrying channel: The full-swing transitions at the gate couple capacitively to the drain and source. As we remarked in Chapter 3, the total charge transferred is independent of the transition time and depends only on the gate swing and gate-channel capaci- tance: AQ = CGcAVG. In this circuit, charge transfer results in a simple voltage error of the auto-zero, because the charge is converted to a voltage in the holding capacitor C1. It's easy to estimate the error. The 3N156 specifies a C,,, (drain- gate capacitance) of 1.3pF maximum, and a Cis, (gate-channel capacitance, mostly to the source) of 5pF maximum. The 15 volt gate swing therefore produces a maximum charge transfer of 75pC, cor- responding to a voltage step of AVc = AQ/Cl = 7.5pV across the 10pF capac- itor C1. This is within our error budget; in fact, we may have overestimated the effect, since we included the capacitance to source as well as drain, whereas during a portion of the gate step the channel is cut off, decoupling the source from the drain. 7.06 Amplifier input errors The deviations of op-amp input charac- teristics from the ideal that we discussed in Chapter 4 (finite values of input impedance and input current, voltage offset, common-mode rejection ratio, and power-supply rejection ratio, and their drifts with time and temperature) gen- erally constitute serious obstacles to precision circuit design and force trade- offs in circuit configuration, component selection, and the choice of a particular
- 346. PRECISION OP-AMP DESIGN TECHNIQUES 7.06 Amplifier input errors 397 op-amp. The point is best made with ex- amples, as we will do shortly. Note that these errors, or their analogs, exist for amplifiers of discrete design as well. Input impedance Let's discuss briefly the error terms just listed. The effect of finite input impedance is to form voltage dividers in combination with the source imped- ance driving the amplifier, reducing the gain from the calculated value. Most often this isn't a problem, because the input impedance is bootstrapped by feedback, raising its value enormously. As an example, the OP-77E precision op-amp (with transistor, not FET, input stage) has a typical "differential- mode input impedance," of 45M. In a circuit with plenty of loop gain, feed- back raises the input impedance to the "common-mode input impedance" 200,000M. In any case, some FET-input op-amps have astronomical values of Ri,, if there's still a problem. Input bias current More serious is the input bias current. Here we're talking about currents mea- sured in nanoamps, and this already produces voltage errors of microvolts for source impedances as small as lk. Again, FET op-amps come to the rescue, but with generally increased voltage off- sets as part of the bargain. Bipolar super- beta op-amps such as the LT1012, 312, and LMll can also have surprisingly low input currents. As an example, compare the OP-77 precision bipolar op-amp with the LT1012 (bipolar, opti- mized for low bias current), the OPAl 11 (JFET, precision and low bias), the AD549 (ultra-low-bias JFET), and the ICH8500 (MOSFET, lowest-bias op-amp); these are the best you can get at the time of writing, and we've chosen the best grade of each one: Bias Offset current voltage Tempco @ 2 5 ' ~ @ 2 5 ' ~ of Vos IB max Vosmax AVO,max OP-77E 2000pA 25pV 0 . 3 p ~ l ' ~ (bipolar) LTlOl2C 150pA 50pV 1. 5 p v l 0 ~ (superbeta) OPAll lB IpA 250pV I ~ V I O C (JFET) AD549L 0.06pA 500pV IO~V/OC (JFET) 1CH8500A 0.OlpA 50,000pV 2000pV1°C (MOSFET) Well-designed FET amplifiers have ex- tremely low bias current, but with much larger offset voltage, as compared with the precision OP-77. Since the offset voltage can always be trimmed, what matters more is the drift with temperature. In this case the FET amplifiers are 3 to 6000 times worse. The op-amp with the lowest in- put current uses MOSFETs for the input stage. MOSFET op-amps are becoming popular because of the availability of in- expensive units like the 3440, 3160, the TLC270 series, and the ICL7610 series, as well as the ultra-low-bias-current devices like the 8500A listed earlier. However, unlike JFETs or bipolar transistors, MOS- FETs can have very large drifts of offset voltage with time, an effect that will be discussed shortly. So the improvement in current errors you buy with a FET op-amp can be wiped out by the larger voltage error terms. With any circuit in which bias current can contribute significant error, it is always wise to ensure that both op-amp input terminals see the same dc source re- sistance, as we discussed in Section 4.12; then the op-amp's ofset current becomes the relevant specification. A note on bias- current compensation: A number of pre- cision op-amps use a "bias compensation" scheme tocancel(approximately) the input current, in order to make that error
- 347. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 398 Chapter 7 Figure 7.2. Opamp input current versus tem- perature. A. Logarithmicscale B. Linear scale term smaller; look back at Additional Exercise 8 at the end of Chapter 2 to see how it's done. With op-amps of this type you generally don't gain anything by matching the dc resistances seen by the two inputs, since for a bias-compensated op-amp the residual bias current and the offset current are comparable. One additional point to keep in mind when using FET-input op-amps is that the input 'bias" current is actually gate leak- age current, and it rises dramatically with increasing temperature (it roughly doubles for every 10°C increase in chip tempera- ture; see Fig. 3.30). Since FET op-amps often run warm (the popular 356 dissipates 150mWquiescent power), the actual input current may be considerably higher than the 25°C figures you see on the data sheet. The input current of a bipolar-transistor- input op-amp, by comparison, is actual base current, and it drops with rising tem- perature (Fig. 7.2). So a FET-input op- amp with impressive input-current specs on paper may not give such an improve- ment over a good superbeta bipolar unit. As an example, the OPAl 11 with its 1pA input current (at 25OC) will have an in- put current of about lOpA at 65OC chip temperature, which is higher than the in- put current of the superbeta LT1012 at the same temperature. The popular 355 se- ries of FET op-amps has an input current that is comparable to that of the LT1012 or LMl1 at 25OC and is many times higher at elevated temperatures. Finally, when com- paring op-amp input currents, watch out for some FET types whose IB depends on the input voltage. The spec sheet usually lists IB only at 0 volts (mid-supply), but a good data sheet will show curves as well. See Figure 7.3 for some typical IB-Vn be- havior. Note the excellent performance of the OPAl11, due in part to its cascode input stage. common-mode voltage (VI Figure 7.3. FET op-amp input current versus common-mode voltage.
- 348. PRECISION OP-AMP DESIGN TECHNIQUES 7.06 Amplifier input errors 399 Voltage offset Voltage offsets at the amplifier input are obvious sources of error. Op-amps dif- fer widely in this parameter, ranging from "precision" op-amps offering worst-case Vo, values generally in the tens of micro- volts to ordinary jellybean op-amps like the LF411 with V,, values of 2 to 5mV. At the time of writing, the champion in the (non-chopper, see below) world of low off- sets is the MAX400M (Vos= 10pV, max). We expect to see further incremental improvements in this area. Although most good singleop-amps (but not duals or quads) have offset-adjustment terminals, it is still wise to choose an am- plifier with inherently low initial offset V,, max, for several reasons. First, op-amps designed for low initial offset tend to have correspondingly low offset drift with tem- perature and time. Second, a sufficiently precise op-amp eliminates the need for ex- ternal trimming components (a trimmer takes up space, needs to be adjusted ini- tially, and may change with time). Third, offset voltage drift and common-mode rejection are degraded by the unbalance caused by an offset-adjustment trimmer. pot turns ---., -5 4 -3 -2 -1 Figure 7.4. Typical op-amp offset versus offset- adjustment potentiometer rotation for several temperatures. Figure 7.4 illustrates how a trimmed off- set has larger drifts with temperature. We have also shown how the offset adjustment is spread over the trimmer pot rotation, with best resolution near the center, especially for large values of trimmer re- sistance. Finally, you'll generally find that the recommended external trimming net- work provides far too much range, mak- ing it nearly impossible to trim Vo, down to a few microvolts; even if you succeed, the adjustment is so critical it won't stay trimmed for long. Another way to think about it is to realize that the manufacturer of a precision op-amp has already trimmed the offset voltage, in a custom test jig us- ing "laser-zapping" techniques; you may be unable to do any better yourself. Our advice is (a) to use precision op-amps for precision circuits, and (b) if you must trim them further, arrange a narrow-range trim circuit like the ones shown in Figure 7.5, which have a full-scale range of f50pV, linear in trimmer rotation. Because voltage offsets can be trimmed to zero, what ultimately matters is the drift of offset voltage with time, temperature, and power-supply voltage. Designers of precision op-amps work hard to minimize these errors. You get the best performance from bipolar (as opposed to FET) op-amps in this regard, but input current effects may then dominate the error budget. The best op-amps keep drifts below lpV/"C; at the time of writing, the AD707 claims the smallest drift (for a non-chopper op- amp) - AVOS= 0.IpVI0C, max. Another factor to keep in mind is the drift caused by self-heating of the op-amp when it drives a low-impedance load. It is often necessary to keep the load im- pedance above 1Ok to prevent large errors from this effect. As usual, that may com- promise the next stage's error budget from the effects of bias current! You will see just such a problem in this design example. For applications where drifts of a few mi- crovolts are important, the related effects of thermal gradients (from nearby heat- producing components) and thermal emfs
- 349. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 400 Chapter 7 -15-+15 1OOk A 1OOk 1OOk B Figure 7.5. External trimming networks for precision op-amps. A. Inverting. B. Noninverting. (from junctions of dissimilar metals) be- come important. This will come up again when we discuss the ultraprecise chopper- stabilized amplifier in Section 7.08. Table 7.1 compares the important speci- ficationsfor seven of our favorite precision op-amps. Spend some time with it - it will give you a good feeling for the trade-offs you face in high-performance design with op-amps. Note particularly the trade-offs of offset voltage (and drift) versus input current for the best bipolar and JFET op- amps. You also get the lowest noise volt- age from bipolar op-amps, dropping with increasing bias current; we'll see why that happens later in the chapter, when we dis- cuss noise. The awards for low-noise cur- rent, however, always go to the FET op- amps, again for reasons that will become clear later. In general, choose FET op- amps for low input current and current noise; choose bipolar op-amps for low in- put voltage offset, drift, and voltage noise. Among FET-input op-amps, those us- ing JFETs dominate the scene, particularly where precision is needed. MOSFETs, in particular, are subject to a unique debili- tating effect that neither FETs nor bipolar transistors have. It turns out that sodium- ion impurities in the gate insulating layer migrate slowly under the influence of the gate's VGS(ON)electric field, resulting in a drift of the offset voltage under closed- loop conditions of as much as 0.5mV over a period of years. The effect is increased for elevated temperatures and for a large applied differential input signal. For example, the data sheet for the CA3420 MOSFET-input op-amp shows a typical 5mV change of Vos over 3000 hours of op- eration at 125OCwith 2 volts across the in- put. This sodium-ion disease can be cured by introducing phosphorus into the gate re- gion. Texas Instruments, for example, uses a phosphorus-doped polysilicon gate in its "LinCMOS" series of op-amps (TLC270 series) and comparators (TLC339 and TLC370 series). These popular inexpen- sive parts come in a variety of packages and speedlpower selections and maintain respectable offset voltages with time (50pV eventual offset drift per volt of differential input). There is an important exception to the generalization that FET op-amps, particularly MOSFET types, suffer from larger initial offsets and much larger drifts of Vos with temperature and time than do bipolar-transistor op-amps. That exception is the so-called auto-zero (or "chopper-stabilized")amplifier,which uses MOSFET analog switches and amplifiers
- 350. A 0 chopper MAX430C typ rninlmax 1 5 0.1 - 0.02 0.2 0.01 0.1 lo6 - lo3 - 1.1 - - - - - 0.01 - - 30 1 140 120 140 120 0.5 - 0.5 - 1.3 2 0 to +70 - 0.02 0.05 0.05 - 0.04 - TABLE 7.1. SEVEN PRECISION OP-AMPS low-noise OP-27E typ minimax 10 25 0.2 1 10 40 7 35 6 1.3 3 0.1 0.2 3.5 5.5 3 4 1.7 4 0.4 0.6 1.8 1 126 114 120 100 2.8 1.7 8 5 3 4.7 -25 to +85 20 50 0.2 0.6 14 60 10 50 units CIV pV/month nA nA Ma GQ yV,pp n V l d ~ z nV/dHz pA/dHz p ~ / d ~ z V/pV dB dB V/ps MHz rnA "C PV pV/'C nA nA Parameter (V, = k15V; TA= 25'C) Offset voltage Offset voltage drift Bias current Offset current Input resistance-diff'l Input resistance-commonmode Input noise voltage (0.1-1OHz) Input noise voltage density (10Hz) Input noise voltage density (1kHz) lnput noise current density (10Hz) Input noise current density (IkHz) Large signal voltage gain Common-moderejectionratio Power supply rejection ratio Slew rate Gain-bandwidthproduct Supply current (Over temperature range) Offset voltage Offset voltage tempco Bias current Offset current low-bias LTl012C typ minlmax 10 50 0.3 - 0.03 0.15 0.02 0.15 - - - 0.5 - 17 30 14 22 0.02 - 0.006 - 0.2 2 132 110 132 110 0.2 0.1 1 - 0.4 0.6 0 to +70 20 120 0.2 1.5 0.035 0.23 0.02 0.23 Symbol V,, A 1, I,, Rin RlnCM enpp en en in in Avo CMRR PSRR SR GBW 1, T V~~ TCV,, lb I,, bipolar OP-77E typ minimax 10 25 0.2 - 1.2 2 0.1 1.5 45 25 200 - 0.4 0.6 10 18 10 11 0.3 0.8 0.1 0.2 12 5 140 120 120 110 0.3 0.1 0.6 0.2 1.7 2 -25 to +85 10 45 0.1 0.3 2.4 4 0.1 2.2 micropower OP-90E typ minlmax 50 150 0.3 2 4 15 0.4 3 30 - 20 - 3 - 60 - 60 - 1.5 - 0.7 - 1.2 0.7 130 100 120 105 0.01 0.005 0.02 - 0.014 0.02 -25 to +85 70 270 0.3 2 4 15 0.8 3 fast JFET LT1055A typ minlmax 50 150 0.01 0.05 0.002 0.01 lo6 - lo3 - 1.8 - 28 50 14 20 0.002 0.004 0.002 0.004 0.4 0.015 100 86 106 90 13 10 5 2.8 4 0 to +70 100 330 1.2 4 0.03 0.15 0.01 0.05 Low-biasJFET OPA111B typ minlmax 50 250 - 0.00050.001 0.0003 0.0008 lo7 - lo5 - 1.2 2.5 30 60 7 12 0.0004 - 0.0004 - 2 1 110 100 110 100 2 1 2 - 2.5 3.5 -25 to +85 100 500 0.5 1 0.03 0.13 0.02 0.1
- 351. PRECISION CIRCUITS AND LOW-NOISE 'I 402 Chapter 7 'ECHNIQUES to sense, and correct, the residual offset error of an ordinary op-amp (which itself is often built with MOSFETs, on the same chip). Chopper-stabilized op-amps deliver lower voltage offsets and drifts than even the best precision bipolar op-amps - 5pV (max), 0.05pVI0C (max) - but not with- out cost. They have some unpleasant characteristics that make them unsuited for many applications. We will discuss them in detail in Section 7.08. Common-mode rejection Insufficient common-mode rejection ratio (CMRR) degrades circuit precision by effectively introducing a voltage offset as a function of dc level at the input. This effect is usually negligible, since it is equiv- alent to a small gain change, and in any case it can be overcome by choice of con- figuration: An inverting amplifier is in- sensitive to op-amp CMRR, in contrast with a noninverting amplifier. However, in "instrumentation amplifier" applications you are looking at a small differential sig- nal riding on a large dc offset, and a high CMRR is essential. In such cases you have to be careful about circuit configurations and, in addition, choose an op-amp with a high CMRR specification. Once again, a superior op-amp like the OP-77 can solve your problems, with a CMRR (min) of 120dB, compared with the 411's meager specification of 70dB. We will discuss high-gain differential and instrumentation amplifiers shortly. Power-supply rejection Changes in power-supply voltage cause small op-amperrors. As with most op-amp specifications, the power-supply rejection ration (PSRR) is referred to a signal at the input. For example, the OP-77 has a specified PSRR of I lOdB at dc, meaning that a 0.3 volt change in one of the power-supply voltages causes a change at the output equivalent to a change in differential input signal of 1pV. The PSRR drops drastically with in- creasing frequency, and a graph document- ing this scurrilous behavior is often given on the data sheet. For example, the PSRR of our favorite OP-77 begins dropping at 0.3Hz and is down to 83dB at 60Hz and 42dB at 10kHz. This actually doesn't present much of a problem, since power- supply noise is also decreasing at higher frequencies if you have used good bypass- ing. However, 120Hz ripple could present a problem if an unregulated supply is used. It is worth noting that the PSRR will not, in general, be the same for the positive and negative supplies. Thus, the use of dual-tracking regulators (Section 6.19) doesn't necessarily bring any benefits. Nulling amplifier: input errors The amplifier circuit in Figure 7.1 begins with a follower, to keep a high input im- pedance. It is tempting to consider a FET type, but the poor V,, specification more than offsets the advantage of low input current, except with sources of very high impedance. The OP-77's 2nA bias cur- rent gives an error of 2pVIlk source im- pedance; a JFET LT1055A, although giving negligible current error, would give voltage offset drifts of 16pV14"C (4°C is considered a typical laboratory ambient temperature range). The input follower is provided with offset trimming, since the initial 25pV spec is too large. As mentioned earlier, feedback bootstraps the input impedance to 200,000M and eliminates any errors from finite source impedance, up to 20M (for gain error less than 0.01%). Dl and D2 are included for input overvoltage protection and are low- leakage types (less than I nA). Ul drives an inverting amplifier (U2), with Rjbeing a compromise between heat- produced thermal offsets in Ul and bias- current offset errors in U2. The value
- 352. 'RECISION OP-AMP DESIGN TECHNIQUES 7.07 Amplifier output errors 403 chosen keeps heating down to 5.6mW (at 7.5V output, the worst case), which works out to a temperature rise of 0.8OC (the op- amp has a thermal resistance of about 0.14°C/mW, see Section 6.04), with a con- sequent voltage offset of 0.3pV. The re- sultant 10k source impedance seen by U2 results in an error due to bias-current off- set, but since U2 is inside a feedback loop with U3trimming the overall offset to zero, all that matters is the drift in the current error term. The OP-77 has a specifica- tion for bias offset drift with temperature (not often specified by manufacturers, in- cidentally), from which the error result of 1.6pV/4OC in the error budget is calcu- lated. Reducing the value of R3 would improve this term, at the expense of the heating term in Ul. As explained in the overall circuit de- scription earlier, the value of R3 forces the bizarre feedback T network in order to keep the feedback resistor values in the range where precision wire-wound resis- tors can be manufactured. Using the ordi- nary inverting amplifier configuration, for example, you would need resistors of 100.0k, l.OM, and 10.OM for gains of 10, 100, and 1000, respectively. The dc input impedance of U2 comes closer to presenting a problem. At a gain of 1000 its differential input imped- ance of 25M is bootstrapped by a factor of A,,l/lOOO to 125,000M. Fortunately this exceeds the 9.4k impedance of the gain- setting network by a factor of more than a million, contributing much less than O.OlO/oerror. This is one of the toughest examples we could think of, and even so the op-amp input impedance presents no problem, thus demonstrating that, in general, you can ignore the effects of op- amp input impedances. Drifts in offset voltage in both Ul and U2 over time, temperature, and power- supply variations affect the final error equally and are tabulated in the budget. It is worth pointing out that they are all automatically cancelled at each "zeroing" cycle, and only short-term drifts matter anyway. These errors are all in the microvolt range, thanks to a good op- amp. U3 has larger drifts, but it must be a FET type to keep capacitor current small, as already explained. Since Us's output is attenuated according to the gain selected, its error, referred to the input, is reduced at high gain. This is an important point, since high gains are used with small input signal levels where high accuracy is needed. U3's errors are always the same at the output, and they are therefore specified as output errors in the error budget. Note the general philosophy of design that emerges from this example: You work at the problem areas, choosing configu- rations and components as necessary to reduce errors to acceptable values. Trade- offs and compromises are involved, with some choices depending on external fac- tors (e.g., the use of a FET-input follower for Ul would be preferable for source impedances greater than about 50k). Table 7.2 compares the specifications of op-amps you might choose for precision circuit design. 7.07 Amplifier output errors As we discussed in Chapter 4, op-amps have some serious limitations associated with the output stage. Limited slew rate, output crossover distortion (see Sec- tion 2.15), and finite open-loop output impedance can all cause trouble, and they can cause precision circuits to display astoundingly large errors if not taken into account. Slew rate: general considerations As we mentioned in Section 4.11, an op- amp can swing its output voltage only at some maximum rate. This effect originates in the frequency-compensation circuitry of the op-amp, as we will explain in a bit more detail shortly. One consequence
- 353. TABLE 7.2. PRECISIONOP-AMPS Voltage Current Settling time, Offset Drift Bias Offset en, tYP in,tYP Slew tYP PSRR Gain rate fT typ max typ max typ typ max typ rnax @lOHz@lkHz@lOHz@lkHz rnin min typ typ 0.1% O.OloA Type Mfga (yV) (yV) (pV/"C) (pV1mo) (nA) (nA) (nA) (nA) ( n ~ l d ~ z ) ( f ~ l d ~ z )(dB) (~1000)(Vlps) (MHz) (ps) (ps) Comments BIPOLAR OP-07A PM+ 10 OP-08E PM 70 LMll NS+ 100 OP-12E PM+ 70 OP-20B PM 60 OP-21A PM 40 OP-27E PM+ 10 OP-37E PM+ 10 OP-50E PM 10 OP-62E PM - OP-77E PM 10 OP-90E PM 50 OP-97E PM 10 MAX400MMA 4 LM607A NS 15 AD707C AD 5 LT1001A LT 10 LT1006A LT 20 LT1007A LT 10 LT1012C LT+ 10 LT1013A LT 40 LT1028A LT 10 LT1037A LT 10 RC4077A RA 4 HA5134 HA 25 HA5135 HA 10 HA5147A HA 10 classic prec op-amp improved 308 lowest bias bipolar improved 312 micropower low power low noise low noise, decomp OP-27 (G>5) hi curr, low noise, decomp (G>5) improved OP-07 micropower low power OP-77 lowest non-chopper V,, improved OP-07; dual=708 single supply; optional I, = 90pA low noise, -0P-27 low bias, impwd 312; ~ ~ 1 0 1 2 ' improved 3581324; sing supply g ultra low noise decomp 1007 (G>5), -0P-37 lowest non-chopper V,, quad, low noise low notse. fast. uncomp (G>10).. -
- 354. JFET OPAlOlB BB 50 250 3 5 - OPAlllB BB 50 250 0.5 1 - LFnnn NS 1000 - - - - LF455A NS 75 180 3 4 - AD547L AD - 250 - 1 - AD548C AD 100 250 - 2 15 AD711C AD 100 250 2 3 15 LT1055A LT 50 150 1.2 4 5 HA5170 HA 100 300 2 5 - JFET, HIGH-SPEED OP-44E PM 30 LF401A NS - OPA404B BB 260 OPA602C BB 100 OPA605K BB 250 OPA606L BB 100 AD744C AD 100 AD845K AD 100 LT1022A LT 80 CHOPPER STABILIZEDe MAX420E MA 1 5 MAX422E MA 1 5 LMC668A NS 1 5 TSC9OOA TS - 5 TSC901 TS 7 15 TSC911A TS 5 15 TSC915 TS 10 TSC918 TS - 50 LTC1050 LT 0.5 5 LTC1052 LT 0.5 5 ICL765OS IL+ 0.7 5 ICL7652S IL+ 0.7 5 TSC76HV52TS - 10 (a) see footnotes to Table 4.1. ib)at G=50. pV pp, 0.1-1OHz. pV per square root month. (e)total supply=18V unless noted. low noise; decomp = OPA102 low noise, low bias lowest noise JFET, no popcorn 456 and 457 faster dual = AD642,647 improved LF441; dual = AD648 improved LF411I2 LT1056is 20°' faster low noise decomp (G>3) fast settle quad low bias, fast settle uncomp (G>50) improved LF356 low dist (3ppm);decornp (G>2) fast settle k15V V,; 430 has Cint +15V V,; 432 has C,,, low power k15V supply; int caps int caps, noisy *15v supply inexpensive int caps improved 7652 improved 7650 improved 7652 k15V 7652
- 355. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 406 Chapter 7 frequency Figure 7.6. Maximum output swing versus frequency. output slew rate Figure 7.7. A substantial differential input voltage is required to produce full op-amp slew rate. of finite slew rate is to limit the output demands a substantial slew rate operates swing at high frequencies, as we showed in with a substantial voltage error across the Section 4.12 and illustrated in Figure 7.6: op-amp's input terminals. This can be disastrous for a circuit that pretends to be vpp = S/rf highly precise. A second consequence is best explained Let's look at the innards of an op-amp in with the help of a graph of slew rate versus order to get some understanding of the ori- differential input signal (Fig. 7.7). The gin of slew rate. The vast majority of op- point to be made here is that a circuit that amps can be summarized with the circuit Figure 7.8. Typical op-amp internal compensation scheme.
- 356. PRECISION OP-AMP DESIGN TECHNIQUES 7.07 Amplifier output errors 407 shown in Figure 7.8. A differential input stage, loaded with a current mirror, drives a stage of large voltagegain with a compen- sation capacitor from output to input.The output stage is a unity-gain push-pull fol- lower. The compensation capacitor C is chosen to bring the open-loop gain of the amplifier to unity before the phase shifts caused by the other amplifier stages have become significant. That is, C is chosen to put fT,the unity-gain bandwidth, near the frequency of the next amplifier rolloff pole, as described in Section 4.34. The in- put stage has very high output impedance, and it looks like a current source to the next stage. The op-amp is slew-rate-limited when the input signal drives one of the differen- tial-stage transistors nearly to cutoff, driv- ing the second stage with the total emitter current IE of the differential pair. This occurs for a differential input voltage of about 60mV, at which point the ratio of currents in the differential stage is 10:l. At this point Q5is slewing its collector as rapidly as possible, with all of IE going into charging C. Q5and C thus form an integrator, with a slew-rate-limited ramp as output. Read the accompanying section "Slew rate: a detailed look" to see how to derive an expression for the slew rate, knowing how bipolar transistors work. CISLEW RATE: A DETAILED LOOK First, let us write an expression for the open-loop small-signalac voltage gain, ignoring phase shifts: from which the unity-gain bandwidth product (the frequency at which Av = 1)is Now, the slew rate is determinedby a current IE charging a capacitanceC: For the usual case of a differential amplifier with no emitter resistors, gm is related to IE by By substituting this into the slew-rate formula, we find i.e., the slew rate is proportional to g m / C , just the same as the unity-gain bandwidth! In fact, s = 4rVTfT =0.3fT with fT in MHz and S in VIps. This is independent of the particular values of C,gm,IE,etc., and it gives a good estimate of slew rate (e.g., the classic 741, with fT z 1.5MHz, has a slew rate of 0.5VIps). It shows that an op-amp with greater gain-bandwidth product fT will have a higher slew rate. You can't improve matters in a slow op-amp by merely increasing input-stage current IE, because the increased gain (from increased gm)then requires a correspondingly increased value of C for compensation. Adding gain anywhereelse in the op-amp doesn't help either. The preceding result shows that increasing fT (by raising collector currents, using faster transistors, etc.) will increase the slew rate. A high fT is, of course, always desirable, a fact not lost on the ICdesigner, who has alreadydone the best he can with what's on the chip. However,
- 357. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 408 Chapter 7 there is a way to get around the restriction that S = 0.3fT.That result depended on the fact that the transconductance was determined by IE(through gm = IE/2VT). YOU can use simple tricks to raise IE (and therefore the slew rate) while keeping fT (and therefore compensation) fixed. The easiest is to add some emitter resistance to the input differential amplifier. Let's imagine we do somethinglike that, causing IEto increaseby a factor m while holding gm constant. Then, by going through the preceding derivation, you would find EXERCISE 7.1 Prove that such a trick does what we claim. Increasing slew rate Here,then,aresomewaystoobtainahighslewrate: (a)Useanop-amp withhigh fT.(b)IncreasefT by using a smaller compensationcapacitor; of course, this is possible only in applications wherethe closed-loop gain is greater than unity. (c) Reduce the input-stage transconductance gm by adding emitter resistors; then reduce C or raise IEproportionately. (d)Use a different input-stage circuit. The third technique (reduced gm)is used in many op-amps. As an example, the HA2605 and HA2505 op-amps are nearly identical,except for the inclusion of emitter resistors in the input stage of the HA2505. The emitter resistors increase the slew rate, at the expense of open-loop gain. The following data demonstrate this trade-off. FET op-amps, with their lower input-stage gm, tend to have higher slew rates for the same reason. HA2605 HA2505 fT 12MHz 12MHz Slew rate 7VIps 30Vlps Open-loop gain 150,000 25,000 The fourthtechniquegenerallyuses the methodof "cross-coupled transconductancereduction," which involves having a second set of transistors available at the input stage, biding their time during small signal swings, but ready to help out with some extra current when needed. This has the advantage of improved noise and offset performance, at the expense of some complexity, as compared with the simpleemitter resistor scheme. This techniqueis used in the Harris HA5141 and HA5151, Raytheon4531, and Signetics535 and 538 to boost the slew rate for large differential input signals. The resultant graph of slew rate versus input error signal is shown in Figure 7.9. booster 4 A7 rate I / """ ----------,'* conventional ___------ Figure 7.9
- 358. PRECISION OP-AMP DESIGN TECHNIQUES 7.07 Amplifier output errors 405 Bandwidth and settling time Slew rate measures how rapidly the out- put voltage can change. The op-amp slew- rate specification usually assumes a large differential input voltage (60mV or more), which is realistic, since an op-amp whose output isn't where it's supposed to be will have its input driven hard by feedback, as- suming a reasonable amount of loop gain. Of perhaps equal importance in high-speed precision applications is the time required for the output to get where it's going fol- the settling times shown. This is actually an important result, since you often limit bandwidth with a filter to reduce noise (more on that later in the chapter). To extend this simple result to an op-amp, just remember that a compensated op-amp has a 6dBloctave rolloff, just like a low-pass filter. When connected for closed-loop gain GCL,its "bandwidth" (the frequency at which the loop gain drops to unity) is approximately given by lowing an input change. This settling-time specification(the time required to get with- As a general result, a system of bandwidth in the specified accuracy of the final value B has response time r =1/27rB; thus, the and stay there, Fig. 7.10) is always given equivalent "time constant" of the op-amp for devices such as digital-to-analog con- is verters, where precision is the name of the game, but it is not normally specified for 7 G C L / ~ T ~ T op-amps. The settling time is then roughly 57- 107 1 Settle t o 1 % ~n = 5RC I input "Sornetlrnes def~nedto V,,, = logic threshold, or VO", = 0.5 Vf,",l Figure 7.10. Settling time defined. We can estimate op-amp settling time by considering first a different problem, namely what would happen to a perfect voltage step somewhere in a circuit if it were followed by a simple RC low-pass filter (Fig. 7.11). It is a simple exercise to show that the filtered waveform has Figure 7.11. Settling time of an RC low-pass filter. Let's try our prediction on a real case. The OP-44 from PMI is a precision fast- settling decompensated (GCL 2 3) OP- amp, with an f~ of 23MHz (typ). Our simple formula then estimates the response time to be 21ns, which implies a settling time of 0.15~s(77) to 0.1%. This is in pretty good agreement with the actual value, which the data sheet gives as 0 . 2 ~ s (typ) to 0.1%. There are several points worth making: (a)Our simple model only gives us a lower bound for the actual settling time in a real
- 359. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 410 Chapter 7 circuit; you should always check the slew- rate-limited rise time, which may domi- nate. (b) Even if slew rate is not a problem, the settling time may be much longer than our idealized "single-pole"model, depend- ing on the op-amp's compensation and phase margin. (c) The op-amp will settle more quickly if the frequency compensa- tion scheme used gives a plot of open-loop phase shift versus frequency that is a nice straight line on a log-log graph (e.g., the OP-42, Fig. 7.12); op-amps with wiggles in the phase-shift graph are more likely to exhibit overshoot and ringing, as in the upper waveform shown in Figure 7.10. (d) A fast settling time to 1%, say, doesn't necessarily guarantee a fast settling time to O.OlO/o,since there may be a long tail (Fig. 7.13). (e) There's no substitute for an actual settling-time specification from the manufacturer. Table 7.3 lists a selection of high-speed op-amps suitable for applications that de- mand high fT,high slew rate, fast settling time, and reasonably low offset voltage. 10 100 l k 10k look 1M 10M lOOM frequency Figure 7.12. OP-42 gain and phase versus frequency. Gain error There's one more error that arises from finite open-loop gain, namely an error in closed-loop gain owing to finite loop gain. AV,, = 60mV time -B Figure 7.13. A. Slew rate decreases when input error approaches 60mV. B. Settling to high precision can be surprisingly lengthy. We calculated in Chapter 3 the expression for closed-loop gain in a feedback ampli- fier, G = A/(1 +AB), where A is the open-loop gain and B is the "gain" of the feedback network. You might think that the A 2 lOOdB of op-amp open-loop gain is plenty, but when you try to construct extremely precise circuits you are in for a surprise. From the preceding gain equa- tion it is easy to show that the "gain error," defined as bG = gain error E Gideal - Gactual Gideal is just equal to 1/(1 +AB) and ranges from 0 for A = oo to 1 (100%) for A = 0. EXERCISE 7.2 Derive the foregoing expressionfor gain error. The resulting frequency-dependent gain error is far from negligible. For instance, a 411, with 106dBof low-frequency open- loop gain will have a gain error of 0.5% when configured for a closed-loop gain of 1000. Worse yet, the open-loop gain drops 6dBloctave above 20Hz, so our amplifier would have a gain error of 10% at
- 360. PRECISION OP-AMP DESIGN TECHNIQUES 7.07 Amplifier output errors 411 500Hz! Figure 7.14 plots gain error versus frequency, for closed-loopgains of 100 and 1000, for the OP-77, with its extraordinary 140dBof low-frequency gain. It should be obvious that you need plenty of gain and a high fT to maintain accuracy at even moderate frequencies. frequency (Hz) Figure 7.14. OP-77 gain error. We plotted these curves using the graph of open-loop gain versus frequency given in the data sheet. Even if your op-amp data sheet provides a curve, it's best to work backward from the specified fT and dc open-loop gain, figuring the open-loop gain at the frequency of interest, hence the gain error (as above) as a function of frequency. This procedure yields where B is, as usual, the gain of the feedback network. Of course, in some applications, such as filters, B may also depend on frequency. EXERCISE 7.3 Derive the foregoing result for SG(f). Crossover distortion and output impedance Some op-amps use a simple push-pull output stage, without biasing the bases two Figure 7.15. Crossover distortion in class B push-pull output stage. diode drops apart, as we discussed in Sec- tion 2.15. This leads to class B distortion near zero output, since the driver stage has to slew the bases through ~ V B Eas the output current passes through zero (Fig. 7.15). This crossover distortion can be substantial, particularly at higher frequen- cies where the loop gain is reduced. It is greatly reduced in op-amp designs that bias the output push-pull pair into slight conduction (class AB). The popular 741 is an example of the latter, whereas its pre- decessor, the 709, uses the simple class B output-stage biasing. The otherwise ad- mirable 324 can exhibit large crossover distortion for this reason. The right choice of op-amp can have enormous impact on the performance of low-distortion audio amplifiers. Perhaps this problem has con- tributed to what the audiophiles refer to
- 361. TABLE 7.3. HIGH-SPEED PRECISION OP-AMPS Over- P E .e en Slew Settle, typ shoot Phase 8 g Vos A V ~ , I,, lb @IkHz Input rate fT Rout @Gmin margin I- E- c mar rnax max rnax typ cap typ typ O.lO/~O.O1%typ typ @Gmin Type Mfga k!zfi (rnV) (pVIoC) (nA) (nA) ( n ~ l d ~ z )(pF) (Vlps) (MHz) (ns) (ns) (R) (%) (deg) Swing Diff'l into load Max input output rnax fVo RL curr (V) (kV) (R) (mA) Comments low-noise (decornp OP-27) stable into 300pF decornp OP-42 +5v supply hybrid monolithic; transresistance monolithic; transresistance low-bias inexpensive ultra low dist 1 3 ~ ~ r n ) ' decornp 841 verl PNP, decornp avail decornp 841 low-noise verl PNP, decornp avail vert PNP ultra low noise LTI056 is faster hybrid no current limit low-noise (decornp OP-27) cur fdbk; no protec; hybrid (a)see notes to Table 4.1. (b) current-sensinginv input;bias current shown is for "on-inv input only. (') to 0.02%. (d) at 10kHz. ( e )5MHz to 280MHz. (') stable into I nF. (') tvpical.
- 362. PRECISION OP-AMP DESIGN TECHNIQUES 7.07 Amplifier output errors 413 as "transistor sound." Some modern op- amps, particularly those intended for au- dio applications, are designed to produce extremely low crossover distortion. Exam- ples are the LT1028, the LT1037, and the LM833. The LM833, for example, has less than 0.002% distortion over the full audio band of 20Hz-20kHz. (That's the claim, anyway; we may be overly gullible!) These amplifiers all have very low noise voltage, as well; in fact, the LT1028 is currently the world noise-voltage champion, with en = 1 . 7 n ~ I m(max) at 10Hz. The open-loop output impedance of an op-amp is highest near zero output volt- age, because the output transistors are op- erating at their lowest current. The output impedance also rises at high frequency as the transistor gain drops off, and it may rise slightly at very low frequencies due to thermal feedback on the chip. It is easy to neglect the effects of finite open-loopoutput impedance, thinking that feedback will cure everything. But when you consider that some op-amps have open-loopoutput impedances of a few hun- dred ohms, it becomesclear that the effects may not be negligible, especially at low to moderate loop gains. Figure 7.16 shows some typical graphs of op-amp output im- pedance, both with and without feedback. Driving capacitive loads The finite open-loop output impedance of op-amps leads to serious difficulties when you attempt to drive a capacitive load, owing to lagging phase shifts produced by the output impedance in combination with the load capacitance to ground. These can lead to feedback instabilities if the 3dB frequency is low enough, since it adds to the 90" phase shift already present with frequency compensation. As an example, imagine driving a hundred feet of coaxial cable from an op-amp with 200 ohms output impedance. The unterminated coax line acts like a 3000pF capacitor, lkH2 lOkH2 lOOkHz l M H z lOMHz frequency A -C: '" r lOHz lOOHz lkHz lOkHz lookHz lMHz lOMHz frequency B Figure 7.16. A. Measured open-loop output impedance for some popular op-amps. B. Closed-loop output impedance for the 411 and OP-27 op-amps. generating a low-pass RC with a 3dB point of 270kHz. This is well below the unity- gain frequency of a typical op-amp, so oscillations are likely at high loop gain (a follower, for example). There are a couple of solutions to this problem. One is to add a series resistor, taking feedback at high frequencies from the op-amp output and feedback at low fre- quencies and dc from the cable (Fig. 7.17).
- 363. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 414 Chapter 7 Figure 7.17 - The parts values shown in the second cir- cuit are specific for that op-amp and cir- cuit configuration, and they give an idea of how large a capacitance can be driven. Of course, this technique degrades the high- frequency performance, since feedback isn't operative at high frequencies on the signal at the cable. Unity-gain power buffers --- slews at 0.05VIps5.0k voltage gain near unity and low output im- pedance, and they can supply up to 250mA output current. They have no significant phase shifts up to the unity-gain frequency (fT)of most op-amps, and they can be included in the feedback loop without any additional frequency compensation. Table 7.4 presents a brief listing of buffer amplifiers. These "power boosters"can, of vv'" *- w with 0.5pF load I I 1 I 5.0k course, be used for loads that require high current, regardless of whether or not there. - If this technique of split feedback paths is are problems with capacitance. Unfortu- unacceptable, the best thing to do is add nately, most buffer amplifiers do not con- a unity-gain high-current buffer inside the tain either internal current limiting or ther- loop (Fig. 7.18). The devices listed have mal shutdown circuits and must therefore &- 1438,3553, LH0063.or LTlOlO Figure 7.18
- 364. PRECISION OP-AMP DESIGN TECHNIQUES 7.08 Auto-zeroing (chopper-stabilized)amplifiers 415 main amp input output null amp b B c 2 / / // null / -L ,-----------2 oscillator ' T'- Figure 7.19. 7650-type chopper-stabilized - op-amps. be used carefully. The exceptional devices that include on-chip protection are noted in Table 7.4, for example the LT1010. Note also that the preceding example would be changed if the cable were ter- minated in its characteristic impedance. In that case it would look like a pure resistance, somewhere in the range of 50 to 100 ohms, depending on the type of cable. In such a case a buffer would be mandatory, with f200mA drive capability in order to drive f10 volt signals into the 50 ohm load impedance. This subject is discussed in greater detail in Section 13.09. The preceding circuit example does not suffer from any op-amp output-related errors, since it operates essentially at dc. 7.08 Auto-zeroing (chopper-stabilized) amplifiers Even the best of precision low-offset op- amps cannot match the stunning V,, performance of the so-called "chopper- stabilized" or "auto-zero 7 ' op-amps. Iron- ically, these interesting amplifiers are built with CMOS, otherwise famous for its medi- ocrity when it comes to offset voltage or drift. The trick here is to put a second nulling op-amp on the chip, along with some MOS analog switchesand offset-error storage capacitors (Fig. 7.19). The main op-amp functions as a conventional imperfect amplifier. The nulling op-amp's job is to monitor the input offset of the main amplifier, adjusting a slow correction signal as needed in an attempt to bring the input offset exactly to zero. Since the nulling amplifier has an offset error of its own, there is an alternating cycle of opera- tion in which the nulling amplifier corrects its own offset voltage. Thus, the auto-zeroing cycle goes like this: (a) Disconnect nulling amplifier from input, short its inputs together, and couple its output back to C1, the holding capac- itor for its correction signal; the nulling amplifier now has zero offset. (b) Now connect nulling amplifier across input, and couple its output to Cz, the holding capacitor for the main amplifier's correc- tion signal; the main amplifier now has zero offset. The MOS analog switches are controlled by an on-board oscillator, typ- ically at a rate of a few hundred hertz. The error-voltage holding capacitors are typically 0.1pF and in most cases must be supplied externally; LTC, Maxim, and Teledyne make some convenient auto- zero amplifiers with discrete capacitors encapsulated right into the IC package. Auto-zero op-amps do best what they are optimized for, namely delivering Vo, values (and tempcos) five times better than the best precision bipolar op-amp (see Table 7.2). What's more, they do this while
- 365. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 416 Chapter 7 0.1Hz NOISE 1Hz NOISE Figure 7.20. At very low frequencies a chopper-stabilizedop-amp has lower noise than a conventional low-noiseop-amp. A. dc to O.1Hz B. dc to 1Hz (Courtesy of Maxim Integrated Products, Inc.) delivering full op-amp speed and band- width, unlike earlier synchronous ampli- fiers that were also called "chopper ampli- fiers," but which had bandwidth limited to a fraction of the chopping clock frequency (see below). That's the good news. The bad news is that auto-zero amplifiers have a num- ber of diseases that you must watch out for. First of all, being CMOS devices, most of them have a severely limited supply voltage (typically 15V total supply) and thus cannot run from conventional f15 volt supplies. The Maxim MAX43012 and Teledyne TSC915 and TSC76HV52 "high-voltage" auto-zero op-amps are ex- ceptions and will operate from f15 volt supplies. Second, most auto-zero op-amps require external capacitors (exceptions: LTC1050, Maxim MAX43012, Tele- dyne TSC911113114). A third problem with many auto-zero amplifiers(particular- ly those with limited supply voltage) is the rather restricted common-mode input range; for example, the popular ICL7650 has a guaranteed common-mode input range of -5 to +1.5 volts, when running from its usual f5 volt supplies (for the improved ICL7652 the range is -4.3V to +3.5V; that's a wider range, but it doesn't include the negative rail, so you can't use it as a "single-supply"op-amp). The high- voltage amplifiers are much better - for example, the MAX432 has a guaranteed common-mode range of -15 to +12 volts, when running from f15 volt supplies. The op-amp table (Table 4.1) shows which chopper amps have common-mode range to the negative rail; although the popular ICL7652 doesn't, improved versions from LTC (LTC1052) and Maxim (ICL7652B) do, permitting convenient single-supply operation. A fourth drawback is the tendency of these CMOS op-amps to have poor out- put sourcing capability, sometimes as little as 1-2mA in the sourcing (positive- output) direction. The otherwise admir- able MAX432 can only source 0.5mA! Fifth on the list of drawbacks, but often
- 366. PRECISION OP-AMP DESIGN TECHNIQUES 7.08 Auto-zeroing (chopper-stabilized)amplifiers 417 first in importance, is the problem of clock- to prevent it. Most auto-zeroing op-amps induced noise. This is caused by charge provide a "clamp"output for this purpose, coupling from the MOS switches (see Sec- which you tie back to the inverting input tion 3.12) and can cause wicked spikes at to prevent saturation. You can prevent the output. The specifications are often saturation in chopper amplifiers without misleading here, because it is conventional a "clamp" pin (and in ordinary op-amps, to quote input-referred noise with Rs = as well) by bridging the feedback network 100 ohms and also to give the specification with a bidirectional zener (two zeners in only for very low frequencies; for exam- series), which clamps the output at the ple, a typical input-referred noise voltage zener voltage, rather than letting it limit is 0.2pV (dc to lHz, with Rs = 100fl). at the supply rail; this works best in the However, with zero input signal the out- inverting configuration. put waveform might consist of a train of 5ps-wide 15mV spikes of alternating po- Chopper miscellany larity! In low-frequency applications you ,,ac-coup,ed ..chopperamp... When con- can (and the Output a sidering auto-zeroing chopper amplifiers, bandwidth of a few hundred hertz, which be sure you confuse this technique will make these spikes disappear. This with another 6Gchopper9,technique, namely spiky noise is also of no importance in inte- the traditional low-bandwidth chopper am- grating applications (e.g., integrating AID plifier in which a small dc signal is con- converters, see Section 9.21) or in applica- verted to ac (66chopped9,)at a known fie- tions where the output is intrinsically slow quency,amplified in ac-coupled amplifiers, (e.g., a circuit with a meter then finally demodulated by multiplying at the In if you want the same waveform used to chop the very slow Output and therefore Signal initially (Fig. 7-21). This scheme low-~ass-filterthe Output to low is quite different from the full-bandwidth frequencies a am- auto-zeroing technique we've been consid- plifier will actually have less noise than a ering, in that it rolls offat signal frequen- conventional low-noise op-amp; see Fig- cies approaching the clock frequency, ure 7.20. typically just a few hundred hertz. You A final problem with auto-zero ampli- sometimes see it used in chart recorders fiers is their disastrous saturation charac- and other low-frequency instrumentation. teristic. What happens is this: The auto- zeroing circuit, in attempting to bring the Thermal offsets. When you build dc am- input difference voltage to zero, implicitly plifiers with submicrovolt offset voltages, assumes there is overall feedback operat- you should be aware of thermal ofsets, ing. If the amplifier's output saturates (or which are little thermally driven batter- if there is no external circuit to provide ies produced by the junction of dissimi- feedback), there will be a large differential lar metals (see Section 15.01). You get input voltage, which the nulling amplifier a Seebeck-effect "thermal emf' when you sees as an input offset error; it therefore have a pair of such junctions at different blindly generates a large correction volt- temperatures. In practice you usually have age that charges up the correction capac- joints between wires with different plating; itors to a large voltage before the nulling a thermal gradient, or even a little draft, amplifier itself finally saturates. Recovery can easily produce thermal voltages of a is incredibly slow - up to a second! The few microvolts. Even similar wires from "cure" is to sense when the output is ap- different manufacturers can produce ther- proaching saturation, and clamp the input mal emfs of 0.2pVI0C,four times the drift
- 367. TABLE 7.4. FAST BUFFERS Small signal Rolloff frea Type Mfga LTlOlO LT LH0002 NS LH4001 NS LM6321 NS AH0010 OE BUFO3 PM EL2001 EL LH0033 NS+ 1490 TP HA5002 HA HOSlOO AD MAX460 MA LH4004 NS EL2005 EL EL2002 EL LH0063 NS+ MSK330 KE LH4002 NS 9911 OE 9963 OE 1359 TP LH4003 NS HA5033 HA OPA633 BB 3553 BB MP2004 MP LH4006 NS EL2031 EL CLCllO CL Supply voltages min max (+V) (+V) 2.5 20 6 22 5 22 5 16 6 18 6 18 5 15 5 20 12 18 20 5 20 5 20 4 15 5 15 5 15 5 20 18 4 6 11 18 6 18 1 2 ~ 18 5 8 5 20 5 16 5 20 5 20 4 8 5? 7 Large signal Maximum Output swing Slew output rate current V,,, Rload (Vlps) (+mA) (+V) (R) 200 150 12 80 200 100 10 50 125 200 10 50 800 300 10 50 1500 100 10 100 250 70 10 150 500 100 1400 100 10 50 500 100 1300 200 11 100 1500 100 10 100 1500 100 10 100 1500 10 50 1500 100 10 100 1000 100 4000 250 10 50 3000 200 13 100 1250 60 2.2 50 1000 500 10 20 3000 200 10 50 1300 100 10 100 1200 100 3 50 1300 100 10 100 2500 100 11 50 2000 200 10 50 2500 100 10 100 1200 100 3 50 5000 100 800 70 4 100 "0s max Comments thermal limit; monolithic 10-pin DIP mini-DIP; therrn lim;monolithic mini-DIP; alias 9910 monolithic mini-DIP; monolithic also EL2033,and others FET input monolithic monolithic FET input; ext feedback FET input, precision mini-DIP; monolithic "damn fast" buffer video FET input video; ext feedback mini-DIP; monolithic; also AH001 monolithic insulated metal case FET input; also EL2004 video; ext feedback FET input monolithic (a)see footnotes to Table 4.1. (b) nominal. typical.
- 368. PRECISION OP-AMP DESIGN TECHNIQUES 7.08 Auto-zeroing (chopper-stabilized)amplifiers 419 ac ampl~f~er dc-coupled / / /' I / / 0 / loon signal output dc-1Hz G = 6OdB -- Figure 7.21. An ac-coupled chopper amplifier. spec of a MAX432! The best approach components at both input and output of is to strive for symmetrical wiring and the auto-zero: These are necessary to sup- component layouts, and then avoid drafts press chopper noise in the (slow) correc- and gradients. tion loop, when this technique is used with small signals and low-noise parts like the External auto-zero. National makes a LM6364 ( 8 n V l m ) . nice "auto-zero" chip (the LMC669) that can be used as an outboard nulling ampli- Instrumentation amplifier. Another fier to make any op-amp of your choosing "chopper"technique in use is the so-called into an auto-zeroing amplifier (Fig. 7.22). "commutating auto-zeroing" (or CAZ) It works most naturally with the inverting amplifier, originated by Intersil. In this configuration, as shown, generating an er- technique, typified by the ICL7605 flying- ror voltage to the noninverting input to capacitor instrumentation amplifier, maintain zero input offset. It doesn't do MOSFET switches enable you to store the as well as the dedicated auto-zero ampli- differential input signal across a capaci- fiers we've been considering: The V,, tor, then amplify it with a single-ended specification is 5pV (typ), 25pV (max). chopper-stabilized amplifier (Fig. 7.23). However, it does let you use the auto-zero You get charge-coupled spikes at the clock technique with any op-amp. You might, rate, just as with the standard auto-zeroing for instance, use it to zero an imprecise amplifier, which puts the same sort of lim- but high-power or high-speed op-amp. itations on the CAZ technique as we saw The circuits shown are good examples. earlier. Although we raved about CAZ am- The LM675 is a nice high-power op- plifiers in our first edition ("...stands a amp (3A output current, with sophisti- good chance of revolutionizing precision cated on-chip safe-operating-area and op-amp and instrumentation amplifier thermal protection), but with a maximum technology"), they've been finessed by offset voltage of 10mV. The auto-zero the better auto-zeroing technique in which reduces that by nearly a factor of 1000. the signal always passes through a single Likewise, the LM6364 is a fast op-amp amplifier. (fT= 175MHz,SR = 350VIps)with max- However, in fairness to the CAZ-amp, imum offset voltage of 9mV, here reduced we should point out that the flying- by a factor of 400. Note the RC filter capacitor technique used in the 7605 has
- 369. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 420 Chapter 7 I I 2k 20011 output dc-15MHz I V,, <9mV. 10k 10k f,= 175MHzJ Figure 7.22. External auto-zeroing chopper output /- differential input 1- Figure 7.23. ICL7605 flying-capacitor differential amplifier with high CMRR. some unique advantages, including input common-mode operation 0.3 volt beyond both supply rails, lOOdB CMRR (min), even at unity gain, and the lowest offset voltage of any monolithic amplifier. If you use these amplifiers, however, don't forget the required output noise filter, the limited supply voltage (f8V max), and the requirement of a high-impedance load, since the output impedance rises periodically at the clock rate. The LTC1043 flying-capacitor building block lets you make your own high-CMRR differential amplifier. Instrumentation amplifiers are discussed in detail in the next section. The precision op-amp table (Table 7.2) includes most of the currently available auto-zeroing op-amps.
- 370. DIFFERENTIAL AND INSTRUMENTATION AMPLIFIERS 7.09 Differencing amplifier 421 DIFFERENTIAL AND INSTRUMENTATION AMPLIFIERS The term instrumentation amplljier is used to denote a high-gain dc-coupled differ- ential amplifier with single-ended output, high input impedance, and high CMRR. They are used to amplify small differential signals coming from transducers in which there may be a large common-mode signal or level. Figure 7.24. Strain gauge with amplifier. An example of such a transducer is a strain gauge, a bridge arrangement of re- sistors that converts strain (elongation ) of the material to which it is attached into resistance changes (see Section 15.03); the net result is a small change in differen- tial output voltage when driven by a fixed dc bias voltage (Fig. 7.24). The resistors all have roughly the same resistance, typi- cally 350 ohms, but they are subjected to differing strains. The full-scale sensitiv- ity is typically 2mV per volt, so that the full-scale output is 20mV for 10 volts dc excitation. This small differential output voltage proportional to strain rides on a 5 volt dc level. The differential amplifier must have extremely good CMRR in order to amplify the millivolt differential signals while rejecting variations in the -5 volt common-mode signal. For example, sup- pose that a maximum error of 0.1% is de- sired. Since 0.1% of full scale is 0.02mV, riding on 5000mV, the CMRR would have to exceed 250,000 to 1, i.e., about 108dB. The tricks involved in making good in- strumentation amplifiers and, more gen- erally, high-gain differential amplifiers are similar to the techniques just discussed. Bias current, offsets,and CMRR errors are all important. Let's begin by discussing the design of differential amplifiers for noncritical applications first, working up to the most demanding instrumentation requirements and their circuit solutions. 7.09 Differencing amplifier Figure 7.25 shows a typical circuit situa- tion requiring only modest common-mode rejection. This is a current-sensing circuit used as part of a constant-current power supply to generate a constant current in the load. The drop across the precision 4-wire 0.01 ohm power resistor is propor- tional to load current. Even though one side of R5is connected to ground, it would be unwise to use a single-ended amplifier, since connection resistances of a milliohrn would contribute 10%error! A differential amplifier is obviously required, but it need not have particularly good CMRR, since only very small common-mode signals are expected. The op-amp is connected in the stan- dard differencing amplifier configuration, as discussed in Section 4.09. R1, R2, and R5 are precision wire-wound types for ex- treme stability of gain, whereas R3and R4, which set CMRR, can be mere 1% metal- film types. The overall circuit thus has a gain accuracy approaching that of the current-sensing resistor and a CMRR of about 40dB. Precision differential amplifier For applications such as strain gauges, ther- mocouples, and the like, 40dB of common- mode rejection is totally inadequate, and figures more like lOOdB to 120dBare often needed. In the preceding example of the strain gauge, for instance, you might have a full-scale differential (unbalance) signal
- 371. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 422 Chapter 7 Figure 7.25. Current regulator. + CMRR - - - Figure 7.26 of 2mV per volt. If you want accuracy of 0.05%, you need a common-mode rejec- tion of 114dB, minimum. (Note that this requirement can be relaxed considerably in the special case that the amplifier is zeroed with the common-mode voltage present, as might be done in a laboratory situation.) - The obvious first approach to improved CMRR is to beef up the resistor precision in the differencing circuit (Fig. 7.26). The resistor values are chosen to keep the large feedback resistors within the range of available precision wire-wound resistors. With 0.01% resistors, the common-mode rejection is in the range of 80dB (68dB worst case), assuming the op-amp has high CMRR. It takes only one trimmer to null the common-mode sensitivity, as shown. With the values shown, you can trim out an accumulated error up to 0.05%, i.e., a bit more than the worst-case resistor error. The fancy network shown is used because small-value trimmer resistors tend to be somewhat unstable with time and are best avoided. A point about ac common-mode rejec- tion: With good op-amps and careful trim- ming, you can achieve lOOdB or better CMRR at dc. However, the wire-wound resistors you need for the best stability have some inductance, causing degrada- tion of CMRR with frequency. Noninduc- tive wire-wound resistors (Aryton-Perry type) are available to reduce this effect, which is common to all the circuits we - I- R2 - look 0.01% power SUPP~V + regulator b load
- 372. DIFFERENTIAL AND INSTRUMENTATION AMPLIFIERS 7.09 Differencing amplifier 423 C) WA4 - WV"- 7 83- 10k R, 0.01% 10k I t - Rs ( C , I k 1- R6 10k '78 + 0.01% 10k n 6 m - - w R, 200k R, 200k 0.01% -- 1 (i=R.=1.05=R3=- motor R, R6 20 RI Figure 7.27. High-common-mode- voltage differential amplifier made -- from low-voltage op-amps. will be talking about. Note also that it is necessary to balance the circuit capaci- tances to achieve good CMRR at high fre- quencies. This may require careful mirror- image placement of components. Burr-Brown offers a series of precision differential amplifiers, complete with matched resistors, in a nice mini-DIP (8- pin) package. The INAlO5 is unity-gain (f0.01% maximum gain error), with in- put impedance of 25kR, and the INA106 has a gain of 10, with the same accuracy and an input impedance of 10kR. The lat- ter has a minimum CMRR of 94dB and maximum V,, of 100pVand is stable into lOOOpF. Burr-Brown also offers a version with high-input common-mode voltage range (f200V), as described later. High-voltage differential amplifier Figure 7.27 shows a clever method for in- creasing the common-mode input voltage range of the differencing amplifier circuit beyond the supply voltages without a cor- responding reduction in differential gain. Uz looks at the common-mode input sig- nal at Ul's input and removes it via R5 and R6. Since there is no common-mode signal left at either Ul or Uz, the CMRR of the op-amps is unimportant. The ulti- mate CMRR of this circuit is thus set by the matching of resistor ratios R1/R5= R ~ I R G ,with no great demands made on the accuracy of R2 and R4. The circuit shown has a common-mode input range of f200 volts, a CMRR of 80dB, and a dif- ferential gain of 1.O. Burr-Brown's unity-gain INA117 uses a different trick to achieve large common- mode voltage range, namely a 200:l resis- tive voltage divider to bring the f200 volt signal within the op-amp's common-mode range off 10 volt (Fig. 7.28). This scheme is simpler than Figure 7.27, but suffers from degraded offset and noise specs: V,, is 1000pV(versus 250pV for the INA105), and output noise voltageis 25pV pp (0.01- 10Hz) versus 2.4pV for the INAlO5. Raising input impedance The differencing circuit with carefully trimmed resistor valueswould seem to give the performance you want, until you look at the restrictions it puts on allowable source resistances. To get a gain accuracy of O.lO/owith the circuit of Figure 7.26, you have to keep the source impedance below
- 373. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 424 Chapter 7 Figure 7.28. INA117 differential amplifierwith f200 volts common-mode input range. Figure 7.29 0.25 ohm! Furthermore, the source im- pedance seen at the two terminals has to be matched to 0.0025 ohm in order to at- tain a CMRR of 100dB. This last result follows from a look at the equivalent cir- cuit (Fig. 7.29). The triangles represent the whole differential amplifier circuit or, in general, any differential or instrumenta- tion amplifier, and Rsl and Rs2represent the Thevenin source resistances in each leg. For common-mode signals, the over- all amplifier circuit includes the two source impedances in series with the input resis- tors R1 and Rg,and so the CMRR now depends on the matching of Rsl+R1with RS2+ R3. Obviously the demands this circuit makes on the source impedances as calculated earlier are unreasonable. Some improvement can be had by in- creasing the resistor values, using the trick of a T network for the feedback resistors, as in Figure 7.30. This is the differen- tial amplifier version of the T network dis- cussed in Sections 7.06 and 4.19. With the values shown, you get a differential voltage gain of 1000 (60dB). For a gain accuracy of O.lO/o, the source impedance must be less than 25 ohms and must be matched to 0.25 ohm for lOOdB CMRR. This is still an unacceptable demand on the source Figure 7.30. Differential amplifiers with T networks allow higher input impedances with smaller feedback resistors.
- 374. DIFFERENTIAL AND INSTRUMENTATION AMPLIFIERS 7.10 Standard three-op-ampinstrumentationamplifier 425 in most applications. A strain gauge, for instance, typically has a source impedance of about 350 ohms. The general solution to this problem in- volves followers, or noninverting ampli- fiers, to attain high input impedance. The simplest method would be to add followers to the conventional differential amplifier (Fig. 7.31). With the enormous input im- pedances you get, there is no longer any problem with any reasonable source im- pedance, at least at dc. At higher frequen- cies it again becomes important to have matched source impedances relative to the common-mode signal, because the input capacitance of the circuit forms a volt- age divider in combination with the source resistance. By "high frequencies" we of- ten mean 60Hz, since common-mode ac power-line pickup is a common nuisance; at that frequency the effect of a few pi- cofarads of input capacitance isn't se- rious. Figure 7.31. Differential amplifier with high zin. 7.10 Standard three-op-amp instrumentation amplifier One disadvantage of the previous follower circuit (Fig. 7.31) is that it requires high CMRR both in the followers and in the final op-amp. Since the input buffers operate at unity gain, all the common- offset Itr'm Figure 7.32. Classic instrumentation amplifier. mode rejection must come in the output amplifier, requiring precise resistor match- ing, as we discussed. The circuit in Fig- ure 7.32 is a significant improvement in this respect. It constitutes the standard in- strumentation amplifier configuration. The input stage is a clever configuration of two op-amps that provides high differ- ential gain and unity common-mode gain without any close resistor matching. Its differential output represents a signal with substantial reduction in the comparative common-mode signal, and it is used to drive a conventional differential amplifier circuit. The latter is often arranged for unity gain and is used to generate a single- ended output and polish off any remaining common-mode signal. As a result, the out- put op-amp, U3, needn't have exceptional CMRR itself, and resistor matching in U3's circuit is not terribly critical. Offset trim- ming for the whole circuit can be done at one of the input op-amps, as shown. The input op-amps must still have high CMRR, and they should be chosen carefully.
- 375. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 426 Chapter 7 sense, Complete instrumentation amplifier ICs containing this standard configuration are available from several manufacturers. All components except R1are internal, with gain set by the single external resistor R1. Typical examples are the micropower INA102, high-speed INA110,and the high- accuracy AD624. All of these amplifiers offer a gain range of 1 to 1000, CMRR in the neighborhood of 100dB, and input impedances greater than 100M. The mi- cropower hybrid LH0036 can run from supply voltages as low as f1 volt. The AD624 offers gain linearity of 0.001%, ini- tial offset voltage of 25pV, and offset drift of 0.25pVIoC, with provision for external trimming of offset voltage. Some instru- mentation amplifiers (e.g., the high- accuracy INA104) have provision for CMRR trimming. Don't confuse these with the 725 "instrumentation operational amplifier," which is nothing more than a good op-amp intended as a building block for instrumentation amplifiers. Figure 7.33 shows the complete instrumentation am- plifier circuit that is usually used. A few comments about these instrumen- tation amplifier circuits (Fig. 7.33): (a) The buffered common-mode signal at U4's out- put can be used as a "guard" voltage to reduce the effects of cable capacitance and leakage. When used this way, the guard output will be tied to the shield of the in- put cables. If the gain-setting resistor (R1) is not immediately adjacent to the ampli- fier (e.g., if it is a panel adjustment, a con- figuration that should usually be avoided), its connections should be shielded and guarded also. (b) The SENSE and REF terminals allow sensing of output voltage at the load so that feedback can operate to eliminate losses in the wiring or external circuit. In addition, the REF terminal also allows you to offset the output signal by a dc level (or by another signal); however, the impedance from the ref terminal to ground must be kept small, or the CMRR will be degraded. (c) With any of these
- 376. DIFFERENTIAL AND INSTRUMENTATION AMPLIFIERS 7.10 Standard three-op-ampinstrumentationamplifier 427 instrumentation amplifiers there must be Bootstrapped power supply a bias path for input current; for exam- ple, you can't just connect a thermocouple The CMRR of the input op-amps may across the input. Figure 7.34 shows the be the limiting factor in the ultimate simple application of an IC instrumenta- common-mode rejection of this circuit. tion amplifier with guard, sense, and refer- If CMRRs greater than about 120dB are ence terminals. needed, the trick shown in Figure 7.35 can be used. U4 buffers the common-mode signal level, driving the common terminalAD522 of a small floating split supply for Ul and input U2. This bootstrapping scheme effectively outputTqc# eliminates the input common-mode signal data guard reference from U1and U2,because they see no swing (due to common-mode signals) at their G = 1+- ( a:) -- inputs relative to their power supplies. U3 and U4 are powered by the system Figure 7.34. IC instrumentation amplifier. power supply, as usual. This scheme 1k (-1 - 10k 10k - w 50k 100 1 4 I 1 50k (+) w 1k P A- +15 - 15 common oguard 10k precision resistors Figure 7.35. Instrumentation amplifier with bootstrapped Iinput power supply for high CMRR.
- 377. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 428 Chapter 7 can do wonders for the CMRR, at least at dc. At increasing frequencies you have the usual problems of presenting matched impedances to the input capaci- tances. Two-op-ampconfiguration Figure 7.36 shows another configuration that offers high input impedance with only two op-amps. Since it doesn't accomplish the common-mode rejection in two stages, as in the three-op-amp circuit, it requires precise resistor matching for good CMRR, in a manner similar to that of the standard differencingamplifier circuit. + -QT output Figure 7.36. Instrumentation amplifier circuit with two opamps. Special IC instrumentation amplifiers There are several interesting instrumenta- tion amplifier configurations available as monolithic (and therefore inexpensive) ICs, some with extremely good performance. They use methods unrelated to the preced- ing circuits. El Current-feedback amplifier technique. This technique, typified by the LM363, AD521, and JFET AMP-05, achieves high CMRR without the need for matched external resistors. In fact, the gain is set by the ratio of a pair of external resistors. Figure 7.37 shows a block diagram of the AMP-01. The circuit employs two differential transconductance amplifier pairs, with a single external resistor setting the gain in each case. One pair is driven by the input signal, and the other is driven by the output signal, relative to the ref terminal. The AMP-05 uses FETs to keep input currents low, whereas the AMP-01 uses bipolar technology to achieve low offset voltage and drift (Table 7.5). Computer-aided design methods can be extremely useful in precision circuit design; see Section 13.24. AMPLIFIER NOISE In almost every area of measurement the ultimate limit of detectability of weak sig- nals is set by noise - unwanted signals that obscure the desired signal. Even if the quantity being measured is not weak, the presence of noise degrades the accu- racy of the measurement. Some forms of noise are unavoidable (e.g., real fluctua- tions in the quantity being measured), and they can be overcome only with the tech- niques of signal averaging and bandwidth narrowing, which we will discuss in Chap- ter 15. Other forms of noise (e.g., radiofre- quency interference and "ground loops") can be reduced or eliminated by a variety of tricks, including filtering and careful at- tention to wiring configuration and parts location. Finally, there is noise that arises in the amplification process itself, and it can be reduced through the techniques of low-noise amplifier design. Although the techniques of signal averaging can often be used to rescue a signal buried in noise, it always pays to begin with a system that is free of preventable interference and that possesses the lowest amplifier noise practicable. We will begin by talking about the origins and characteristics of the different
- 378. - - - - - - TABLE 7.5. INSTRUMENTATION AMPLIFIERS Noise Total supply Maximum input errorsb Voltage CMRR -3dB Bandwidth Settling time Voltage Offset voltage Current 0.1-1OHz 10Hz-lOkHz Current (@dc,min) bandwidth for 1% error to 1% P- Curr 1OHz- Slew 5 minmax max RTla RTOa Bias Offset RTla RTOa RTla RTOa lOkHz G=l G=lk rate G=l G=lk G=l G=lk G=l G=lk Type 0 (V) (V) (mA) (mV) (pVIoC)(mV) (pVIoC) (nA) (nA) (PV, pp) (pV, rms) (PA, rms) (dB) (dB) (V/PS) (kHz) (kHz) (kHz) (kHz) (PS) (ps) 570 26 12 50 3000 120 - - 5 5 350 0.35 - - 8 600 - 1.6 - - - 8od 300 2.5 20 0.2 30 500 300 0.3 30 0.03 50 3300 300 2.5 20 0.2 30 350 2500 100' - - 4 11' 200s 30 309 5 209 70 2000 40 75 6 7 35 300 0.3 - - 500d 20000~ 1000 25 10 50 1000 25 - - 10 50 650 25 - - 1 5 ~ 751~ 0.01 0.01 slow slow (a) RTI: referred to the input; RTO: referred to the output. Noise and errors can be separated into components generated at both the input and output. The total input-referrednoise (or error) is thus given by RTI+RTO/G. (b) diff'l input impedance > IGR except LH0038 (5MR),AMP-05 (ITR),and INA11OB (5TR). ('1 gain range 10-2000. (d)to 0.01%. (e) CAZ type (see section 7.10); 7606 is uncomp. (') G = 500. (g) G = 10. (h) 0.01Hz to 10Hz. ('Itypical.
- 379. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 430 Chapter 7 Figure 7.37. Block diagram of the AMP-01 instrumentation amplifier IC. kinds of noise that afflict electronic cir- the term to describe "random" noise of cuits. Then we will launch into a dis- a physical (often thermal) origin. Noise cussion of transistor and FET noise, can be characterized by its frequency spec- including methods for low-noise design trum, its amplitude distribution, and the with a given signal source, and will present physical mechanism responsible for its gen- some design examples. After a short dis- eration. Let's next look at the chief offend- cussion of noise in differential and feed- ers. back amplifiers, we will conclude with a section on proper grounding and shield- Johnson noise ing and the elimination of interference and pickup. See also Section 13.24 (Analog Any old resistor just sitting on the table modeling tools). generates a noise voltage across its termi- nals known as Johnson noise. It has a flat frequency spectrum, meaning that there 7.11 Origins and kinds of noise is the same noise power in each hertz of frequency (up to some limit, of course). Since the term noise can be applied to Noise with a flat spectrum is also called anything that obscures a desired signal, "white noise." The actual open-circuit noise can itself be another signal ("inter- noise voltage generated by a resistance R ference"); most often, however, we use at temperature T is given by
- 380. AMPLIFIER NOISE 7.11 Origins and kinds of noise 43 where Ic is Boltzmann's constant, T is the absolute temperature in degrees Kelvin (OK = OC + 273.16), and B is the bandwidth in hertz. Thus, VnOise(rms)is what you would measure at the output if you drove a perfect noiseless bandpass filter (of bandwidth B) with the voltage generated by a resistor at temperature T. At room temperature (68OF = 20°C = 293OK), For example, a 1Ok resistor at room tem- perature has an open-circuit rms voltage of 1.3pV, measured with a bandwidth of 1OkHz (e.g., by placing it across the input of a high-fidelity amplifier and measuring the output with a voltmeter). The source resistance of this noise voltage is just R. Figure 7.38 plots the simple relationship between Johnson-noise volt- age density (rms voltage per square root bandwidth) and source resistance. 100 1k 10k look 1M resistance (521 Figure 7.38. Thermal noise voltage versus resistance. The amplitude of the Johnson-noise voltage at any instant is, in general, unpredictable, but it obeys a Gaus- sian amplitude distribution (Fig. 7.39), -(' v 2 p(V, V + d v ) =--I - e'2vf12/ dV where V,, IS rms nolse V" J2n area = probabrlity of an instantaneous voltage v V + A V Figure 7.39 where p(V)dV is the probability that the instantaneous voltage lies between V and V +dV, and V, is the rms noise voltage, given earlier. The significance of Johnson noise is that it sets a lower limit on the noise voltage in any detector, signal source, or amplifier having resistance. The resistive part of a source impedance generates Johnson noise, as do the bias and load resistors of an amplifier. You will see how it all works out shortly. It is interesting to note that the physical analog of resistance (any mechanism of energy loss in a physical system, e.g., viscousfriction acting on small particles in a liquid) has associated with it fluctuations in the associated physical quantity (in this case, the particles' velocity, manifest as the chaotic Brownian motion). Johnson noise is just a special case of this fluctuation- dissipation phenomenon. Johnson noise should not be confused with the additional noise voltage created by the effect of resistance fluctuations when an externally applied current flows through a resistor. This "excess noise" has a llf spectrum (approximately) and is heavily dependent on the actual construction of the resistor. We will talk about it later. Shot noise An electric current is the flow of discrete electric charges, not a smooth fluidlike
- 381. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 432 Chapter 7 flow. The finiteness of the charge quan- tum results in statistical fluctuations of the current. If the charges act independent of each other, the fluctuating current is given by where q is the electron charge (1.60 x lo-'' coulomb) and B is the measurement bandwidth. For example, a "steady" cur- rent of l amp actually has an rms fluc- tuation of 57nA, measured in a lOkHz bandwidth; i.e., it fluctuates by about 0.000006°/o. The relative fluctuations are larger for smaller currents: A"steady" cur- rent of 1pA actually has an rms current noise fluctuation, measured over a lOkHz bandwidth, of 0.006O/o, i.e., -85dB. At 1pA dc, the rms current fluctuation (same band- width) is 56fA, i.e., a 5.6% variation! Shot noise is "rain on a tin roof." This noise, like resistor Johnson noise, is Gaussian and white. The shot-noise formula given earlier assumes that the charge carriers making up the current act independently. That is indeed the case for charges crossing a barrier, as for example the current in a junction diode, where the charges move by diffusion; but it is not true for the important case of metallic conductors, where there are long-range correlations between charge carriers. Thus, the current in a simple resistive circuit has far less noise than is predicted by the shot-noise formula. Another important exception to the shot-noise formula is provided by our standard transistor current-source circuit (Fig. 2.2l), in which negativefeedback acts to quiet the shot noise. EXERCISE 7.4 A resistor is used as the collector load in a low-noise amplifier; the collector current IC is accompanied by shot noise. Show that the output noise voltage is dominated by shot noise (rather than Johnson noise in the re- sistor) as long as the quiescent voltage drop across the load resistor is greater than 2kT/q (50mV, at room temperature). l / fnoise (flicker noise) Shot noise and Johnson noise are irredu- cible forms of noise generated according to physical principles. The most expensive and most carefully made resistor has ex- actly the same Johnson noise as the cheap- est carbon resistor (of the same resistance). Real devices have, in addition, various sources of "excess noise." Real resistors suffer from fluctuations in resistance, gen- erating an additional noise voltage (which adds to the ever-present Johnson noise) proportional to the dc current flowing through them. This noise depends on many factors having to do with the construction of the particular resistor, including the re- sistive material and especially the end-cap connections. Here is a listing of typical ex- cess noise for various resistor types, given as rms microvolts per volt applied across the resistor, measured over one decade of frequency: This noise has approximately a 11f spec- trum (equal power per decade of frequency) and is sometimes called "pink noise." Other noise-generating mechanisms often produce 11f noise, examples being base current noise in transistors and cathode current noise in vacuum tubes. Curiously enough, llf noise is present in nature in unexpected places, e.g., the speed of ocean currents, the flow of sand in an hourglass, the flow of trafficon Japanese expressways, and the yearly flow of the Nile measured over the last 2000 years. If you plot the loudness of a piece of classical music ver- sus time, you get a llf spectrum! No uni- fying principle has been found for all the 11f noise that seems to be swirling around
- 382. AMPLIFIER NOISE 7.12 Signal-to-noise ratio and noise figure 433 us, although particular sources can often be identified in each instance. Interference As we mentioned earlier, an interfering signal or stray pickup constitutes a form of noise. Here the spectrum and ampli- tude characteristics depend on the interfer- ing signal. For example, 6OHz pickup has a sharp spectrum and relatively constant amplitude, whereas car ignition noise, lightning, and other impulsive interfer- ences are broad in spectrum and spiky in amplitude. Other sources of interference are radio and television stations (a partic- ularly serious problem near large cities), nearby electrical equipment, motors and elevators, subways, switching regulators, and television sets. In a slightly different guise you have the same sort of problem generated by anything that puts a signal into the parameter you are measuring. For example, an optical interferometer is sus- ceptible to vibration, and a sensitive radio- frequency measurement (e.g., NMR) can be affected by ambient radiofrequency sig- nals. Many circuits, as well as detectors and even cables, are sensitive to vibration and sound; they are microphonic, in the terminology of the trade. Many of these noise sources can be con- trolled by careful shielding and filtering, as we will discuss later in the chapter. At other times you are forced to take dra- conian measures, involving massive stone tables (for vibration isolation), constant- temperature rooms, anechoic chambers, and electrically shielded rooms. 7.12 Signal-to-noise ratio and noise figure Before getting into the details of amplifier noise and low-noise design, we need to define a few terms that are often used to describe amplifier performance. These involve ratios of noise voltages, measured at the same place in the circuit. It is conventional to refer noise voltages to the input of an amplifier (although the measurements are usually made at the output), i.e., to describe source noise and amplifier noise in terms of microvolts at the input that would generate the observed output noise. This makes sense when you want to think of the relative noise added by the amplifier to a given signal, independent of amplifier gain; it's also realistic, because most of the amplifier noise is usually contributed by the input stage. Unless we state otherwise, noise voltages are referred to the input. Noise power density and bandwidth In the preceding examples of Johnson noise and shot noise, the noise voltage you measure depends both on the rneasure- ment bandwidth B (i.e., how much noise you see depends on how fast you look) and on the variables (R and I) of the noise source itself. So it's convenient to talk about an rms noise-voltage "density" v,: where V, is the rms noise voltage you would measure in a bandwidth B. White- noise sources have a v, that doesn't de- pend on frequency, whereas pink noise, for instance, has a v, that drops off at 3dBloctave. You'll often see v;, too, the mean squared noise density. Since v, al- ways refers to rms, and v: always refers to mean square, you can just square v, to get v;! Sounds simple (and it is), but we want to make sure you don't get confused. Note that B and the square root of B keep popping up. Thus, for example, for Johnson noise from a resistor R v,~(rms)= ( 4 l c ~ ~ ) i V/HZ$ v : ~= 4kTR V ~ / H Z
- 383. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 434 Chapter 7 On data sheets you may see graphs of of the output of the real amplifier to the v, or v:, with units like "nanovolts per output of a "perfect" (noiseless) amplifier root Hz" or "volts squared per Hz." The of the same gain, with a resistor of value quantities en and in that will soon appear R, connected across the amplifier's input work just the same way. terminals in each case. That is, the When you add two signals that are Johnson noise of R, is the "input signal." uncorrelated (two noise signals, or noise plus a real signal), the squared amplitudes 4kTR, +v i add: NF = 10loglo 2 2 l v = (us +v,) where v is the rms signal obtained by adding together a signal of rms amplitude v, and a noise signal of rms amplitude v,. The rms amplitudes don't add. Signal-to-noise ratio Signal-to-noise ratio (SNR) is simply de- fined as SNR = 10loglo (5)dB where the voltages are rms values, and some bandwidth and center frequency are specified; i.e., it is the ratio, in decibels, of the rms voltage of the desired signal to the rms voltage of the noise that is also present. The "signal" itself may be sinusoidal or a modulated information- carrying waveform or even a noiselike signal itself. It is particularly important to specify the bandwidth if the signal has some sort of narrowband spectrum, since the SNR will drop as the bandwidth is increased beyond that of the signal: The amplifier keeps adding noise power, while the signal power remains constant. Noise figure Any real signal source or measuring device generates noise because of Johnson noise in its source resistance (the real part of its complex source impedance). There may be additional noise, of course, from other causes. The noisehre (NF) of an amplifier is simply the ratio, in decibels, = 10log,, (1+ -4 2 R s ) dB where vz is the mean squared noise voltage per hertz contributed by the amplifier, with a noiseless (cold) resistor of value R, con- nected across its input. This latter restric- tion is important, as you will see shortly, because the noise voltage contributed by an amplifier depends very much on the source impedance (Fig. 7.40). O.lk l k 10k 1OOk 1M R, (a) Figure 7.40. Effective noise voltage versus noise figure and source resistance. (National Semiconductor Corp.) Noise figure is handy as a figure of merit for an amplifier when you have a signal source of a given source impedance and want to compare amplifiers (or transistors, for which NF is often specified). NF va- ries with frequency and source impedance, and it is often given as a set of contours of
- 384. AMPLIFIER NOISE 7.12 Signal-to-noiseratio and noise figure 435 constant NF versus frequency and R,. It may also be given as a set of graphs of NF versus frequency, one curve for each col- lector current, or a similar set of graphs of NF versus R,, one for each collector cur- rent. Note: The foregoing expressions for NF assume that the amplifier's input im- pedance is much larger than the source im- pedance, i.e., Zi, >> R,. However, in the special case of radiofrequency amplifiers, you usually have R, = Zi, =50 ohms, with NF defined accordingly. For this spe- cial case of matched impedances, simply remove the factors "4" from the foregoing equations. Big fallacy: Don't try to improve things by adding a resistor in series with a signal source to reach a region of minimum NE All you're doing is making the source noisier to make the amplifier look better! Noise figure can be very deceptive for this reason. To add to the deception, the NF specification (e.g., NF = 2dB) for a transistor or FET will always be for the optimum combination of Rs and lc. It doesn't tell you much about actual performance, except that the manufacturer thinks the noise figure is worth bragging about. In general, when evaluating the perfor- mance of some amplifier, you're probably least likely to get confused if you stick with SNR calculated for that source voltage and impedance. Here's how to convert from NF to SNR: - NF(dB) (at R,) dB where v, is the rms signal amplitude, R, is the source impedance, and NF is the noise figure of the amplifier for source impedance R,. Noise temperature Rather than noise figure, you sometimes see noise temperature used to express the noise performance of an amplifier. Both methods give the same information, namely the excess noise contribution of the amplifier when driven by a signal source of impedance R,; they are equivalent ways of expressing the same thing. real (noisy) amplifier noiseless chosen to give same v,, (out1 as in A Figure 7.41 Look at Figure 7.41 to see how noise temperature works: We first imagine the actual (noisy) amplifier connected to a noiseless source of impedance Rs (Fig. 7.41A). If you have trouble imagin- ing a noiseless source, think of a resistor of value R, cooled to absolute zero. There will be some noise at the output, even though the source is noiseless, because the amplifier has noise. Now imagine con- structing Figure 7.41B, where we magically make the amplifier noiseless, and bring the source R, up to some temperature Tnsuch that the output noise voltage is the same as in Figure 7.41A. Tnis called the noise
- 385. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 436 Chapter 7 temperature of the amplifier, for source impedance R, . As we remarked earlier, noise figure and noise temperature are simply different ways of conveying the same information. In fact, you can show that they are related by the following expressions: where T is the ambient temperature, usu- ally taken as 290°K. Generally speaking, good low-noise am- plifiers have noise temperatures far below room temperature (or, equivalently, they have noise figures far less than 3dB). Later in the chapter we will explain how you go about measuring the noise figure (or tem- perature) of an amplifier. First, however, we need to understand noise in transis- tors and the techniques of low-noise de- sign. We hope the discussion that follows will clarify what is often a murky sub- ject! After reading the next two sections, we trust you won't ever be confused about noise figure again! 7.13 Transistor amplifier voltage and current noise The noise generated by an amplifier is easily described by a simple noise model that is accurate enough for most purposes.- - - In Figure 7.42, en represents a noise voltage source in series with the input, and in represents an input noise current. The transistor (or amplifier, in general) is assumed noiseless, and it simply amplifies the input noise voltage it sees. That is, the amplifier contributes a total noise voltage e,, referred to the input, of ea(rms)= [ef + (~.i,)~]: VIHZ: generated by the amplifier's input noise current passing through the source resis- tance. Since the two noise terms are usu- ally uncorrelated, their squared amplitudes add to produce the effective noise voltage seen by the amplifier. For low source re- sistances the noise voltage en dominates, whereas for high source impedances the noise current in generally dominates. Figure 7.42. Noise model of a transistor. Just to give an idea of what these look like, Figure 7.43 shows a graph of en and in versus Ic and f , for a 2N5087. We'll go into some detail now, describing these and showing how to design for minimum noise. It is worth noting that voltage noise and current noise for a transistor are in the range of nanovolts and picoamps per root hertz (HZ*). Voltage noise, en The equivalent voltage noise looking in series with the base of a transistor arises from Johnson noise in the base spreading resistance, rbb, and collector current shot noise generating a noise voltage across the intrinsic emitter resistance re. These two terms look like this: The two terms are simply the amplifier 2(w)2 v2/Hz = 4kTrbb+- input noise voltage and the noise voltage QIC
- 386. AMPLIFIER NOISE 7.13 Transistor amplifier voltage and current noise 4% I V,, = -5.OV Figure 7.43. Equivalent rms input noise voltage (en)and noise current (in) versus collector current for a 2N5087 npn transistor. (Courtesyof Fairchild Camera and Instrument Corp.) Both of these are Gaussian white noise. In addition, there is some flicker noise generated by base current flowing through ~ b b . This last term is significant only at high base current, i.e., at high collector current. The result is that en is constant over a wide range of collector currents, rising at low currents (shot noise through an increasing re)and at sufficiently high currents (flicker noise from IB through T ~ ~ ) .This latter rise is present only at low frequencies, because of its llf character. As an example, at frequencies above lOkHz the 2N5087 has an en of 5 n ~ l H z iat Ic =10pA and 2 n ~ l H z )at Ic = 100pA. Figure 7.44 shows graphs of en versus frequency and current for the low-noise LM394 npn differential pair, and the low-noise 2SD786 from Toyo-Rohm. The latter uses special geometry to achieve an unusually low r b b of 4 ohms, which is needed to realize the lowest values of en. 1kt,, Figure 7.44. Input noise voltage (en) versus collector current for two low-noise bipolar transistors. Current noise, in Noise current is important, because it gen- erates an additional noise voltage across the input signal source impedance. The main source of current noise is shot-noise fluctuation in the steady base current, added to the fluctuations caused by flicker
- 387. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 438 Chapter 7 10 Figure 7.45 shows graphs of in versus frequency and current, again for the low- noise LM394. lOOkHz 1Ok Hz lOOkHz 7.14 Low-noise design with transistors 0 1 lOkHz The fact that en drops and in rises with 1OOOHZ increasing Ic provides a simple way to 0 0 1 1 optimize transistor operating current to give lowest noise with a given source. 1 -1 I Look at the model again (Fig. 7.46). The 1 10 100 1000 noiselesssignalsource v, has added to it an I, (PA) irreducible noise voltage from the Johnson A noise of its source resistance. frequency B Figure 7.45. Input noise current for the LM394 bipolar transistor. A. Noise current (2,) versus collector current. B. Noise current (in) versus frequency. The amplifier adds noise of its own, namely, ez(amp1ifier) = ei.+ ( i , ~ , ) ~ V ~ / H Z Thus the amplifier's noise voltage is added to the input signal, and in addition, its noise current generates a noise voltage across the source impedance. These two are uncorrelated (except at very high fre- quencies), so you add their squares. The idea is to reduce the amplifier's total noise contribution as much as possible. That's easy, once you know Rs, because you just look at a graph of en and in versus Ic, in the region of the signal frequency, pick- ing Ic to minimize e i + (i,R,)2. Alter- natively, if you are lucky and have a plot of noise-figure contours versus Icand R,, you can quickly locate the optimum value noise in rbb. The shot-noise contribu- of Ic. tion is a noise current that increases pro- portional to the square root of IB(or IC) and is flat with frequency, whereas the flicker-noise component rises more rap- idly with Ic and shows the usual llf fre- ++-$-quency dependence. Taking the example -- -- -- of the 2N5087 again, above lOkHz in is about O.~PAIHZ''~at IC= lOpA and Figure 7.46. Amplifiernoise model. o . ~ ~ A / H z ' / ~at Ic = 1OOpA. The noise current increases, and the noise voltage drops, as Ic is increased. In the next sec- figure tion you will see how this dictates As an example, suppose we have a small operating current in low-noise design. signal in the region of lkHz with source
- 388. AMPLIFIER NOISE 7.14 Low-noise design with transistors 435 I c , collector current (mA) Figure 7.47. Contours of constant narrowband noise figure for the 2N5087 transistor. (Cour- tesy of Fairchild Cameraand Instrument Corp.) resistance of 10k, and we wish to make an amplifier with a 2N5087. From the en-in graph (Fig. 7.47) we see that the sum of voltage and current terms (with 1Ok source) is minimized for a collector cur- rent of about 10-20pA. Since the current noise is dropping faster than the voltage noise is rising as Ic is reduced, it might be a good idea to use slightly less collector current, especially if operation at a lower frequency is anticipated (in rises rapidly with decreasing frequency). We can esti- mate the noise figure using in and en at 1kHz: actual noise figure can be estimated only approximately from that plot as being less than 2dB. frequency (Hz) Figure 7.48. Noisefigure (NF)versusfrequency, for three choicesof Zc and Rs, for the 2N5087. (Courtesyof Fairchild Camera and Instrument Gorp.) EXERCISE 7.5 Find the optimum Zc and corresponding noise figure for Rs = lOOk and f = 1kHz, using the graph in Figure 7.43 of en and in. Check your answer from the noise-figure contours (Fig. 7.47). For the other amplifier configurations (follower, grounded base) the noise figure is essentially the same, for given R3 and Ic, since en and in are unchanged. Of course, a stage with unity voltage gain (a follower) may just pass the problem along to the next stage, since the signal level hasn't been increased to the point that low- noise design can be ignored in subsequent stages. - 3.8nVlHz1/2, Charting amplifier noise with en and inFor Ic = lOpA, en - in = 0 . 2 9 ~ ~ / H z ~ / ~ ,and 41cTRs = 1.65 x The noise calculations just presented, al- I O - ~ ~ V ~ I H Zfor the IOk source resistance. though straightforward, make the whole The calculated noise figure is therefore subject of amplifier design appear some- 0.6dB. This is consistent with the graph what formidable. If you misplace a factor (Fig. 7.48) showing NF versus frequency, of Boltzmann's constant, you suddenly get in which they have chosen Ic = 20pA an amplifier with 10,000dB noise figure! for R, = 1Ok. This choice of collector In this section we will present a simplified current is also roughly what you would noise-estimation technique of great utility. get from the graph in Figure 7.47 of The method consists of first choosing noise-figure contours at 1kHz, although the some frequency of interest in order to get
- 389. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 440 Chapter 7 loooO r noise for LM394 input I stage a t IkHz, I, = 50uA 77f--7- e,, = 2 . 5 n V l H ~ ' ~ 5'5 /' ) 3dB in = 0.16pA/Hzx Figure 7.49. Total amplifier input voltage noise (ea)plotted from the en and in parameters. values for en and in versus Ic from the and 500k, the points at which the 3dB transistor data sheets. Then, for a given NF contour intersects the amplifier noise collector current, you can plot the total curve. noise contributions from en and in as a The next step is to draw a few of these graph of e, versus source resistance R,. noise curves on the same graph, using Figure 7.49 shows what that looks like at different collector currents or frequencies, lkHz for a differential input stage using or maybe a selection of transistor types, an LM394 matched superbeta transistor in order to evaluate amplifier performance. running 50pA of collector current. The Before we go on to do that, let's show how en noise voltage is constant, and the inR, we can talk about this same amplifier using voltage increases proportional to R,, i.e., a different pair of noise parameters, the with a 45' slope. The amplifier noise noise resistance R, and the noise figure curve is drawn as shown, with care being NF(RN), both of which pop right out of taken to ensure that it passes through a the graph. point 3dB (voltage ratio of 1.4) above the crossing point of individual voltage and current noise contributions. Also plotted Noise resistance is the noise voltageof the source resistance, which also happens to be the 3dB NF The lowest noise figure in this example contour. The other lines of constant noise occurs for a source resistance R, = 15k, figure are simply straight lines parallel to which equals the ratio of en to in. That this line, as you will see in the examples defines the noise resistance that follow. The best noise figure (0.2dB) at this Q, = % collector current and frequency occurs for 2n a source resistance of 15k, and the noise You can find the noise figurefor a source of figure is easily seen to be less than 3dB for that resistance from our earlier expression all source resistances between 300 ohms for noise figure. It is
- 390. AMPLIFIER NOISE 7.14 Low-noise design with transistors 441 l o r o o 0 r monolithic matched npn bipolar transistor pair , 1 LM394 at 1000Hz 1 for IC from 1pA to lOmA 0.2dB 0.1 I I 1 I I I 10 100 1000 10k look 1M 1OM 1OOM Figure 7.50. Total amplifier input voltage noise (e,) for the LM394 bipolar transistor under various conditions, compared with the 2N6483 JFET. NF (at h)= Noise resistance isn't actually a real re- sistance in the transistor, or anything like that. It is a tool to help you quickly find the valueof source resistance for minimum noise figure, ideally so that you can vary the collector current to shift Rn close to the value of source resistance you're actu- ally using. R, corresponds to the point where the en and in lines cross. The noise figure for a source resistance equal to R,then follows simply from the preceding equation. Charting the bipolarlFET shootout Let's have some fun with this technique. A perennial bone of contention among en- gineers is whether FETs or bipolar tran- sistors are "better." We will dispose of this issue with characteristic humility by matching two of the best contenders and letting them deliver their best punches. In the interest of fairness, we'll let National Semiconductor intramural teams compete, choosing two game fighters. In the bipolar corner we have the magnificent LM394 superbeta monolithic matched pair, already warmed up, as described earlier. We'll run it at IkHz, with collector currents from lpA to 1mA (Fig. 7.50). The FET entry is the 2N6483 mono- lithic n-channel JFET matched pair, known far and wide for its stunning low-noise per- formance, reputed to exceed that of bipo- lar transistors. According to its data sheet, it was trained only for 100pA and 400pA drain currents (Fig. 7.51). And the winner? Well, it's a split decision. The FET won points on lowest minimum noise figure, NF(R,), reaching a phenomenal 0.05dB noise figure, and dipping well below 0.2dB from lOOk to IOOM source impedance. For high source
- 391. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 442 Chapter 7 for ID from 100pA to 400pA V,, from 2V to 25V 10 100 1000 10k 1OOk 1M 1OM 1OOM Rs Figure 7.51. Total amplifier input voltage noise (e,) for the 2N6483 JFET compared with the LM394 bipolar transistor. impedances, FETs remain unbeaten. The bipolar transistor is best at low source impedances, particularly below 5k, and it can reach a 0.3dB noise figure at R, = lk, with suitable choice of collector current. By comparison, the FET cannot do better than 2dB with a lk source resistance, owing to larger voltage noise en. Just as in boxing, where the best fight- ers haven't yet had a chance to compete in a world championship, there are some younger contenders for the best low-noise transistor. For example, the 2SJ72 and 2SK147 complementary JFETs from Toshiba use a meshed-gate geometry to achieve a phenomenal en of 0.7n~/@ at ID = 1OmA (equivalent to Johnson noise from a 30S2 resistor!). But these are JFETs, with their low input current (hence low in), and thus the noise resistance is about 1Ok. When used as an amplifier with a source impedance equal to their noise resistance (i.e., R, = IOk), their performance is unbeatable - the noise temperature is just 2"K! Before you go out and buy a bushel of these remarkable JFETs, consider the re- marks of the critics, who claim they are muscle-bound - they have high input and feedback capacitance (85pF and 15pE re- spectively), which limits their usefulness at high frequencies. Their relative, the 2SK117, is better in this regard, at the expense of higher en. These same critics argue that the Toyo-Rohm bipolar com- plementary pair, the 2SD786 and 2SB737, with en as low as 0.55nVI@, can of- fer even better performance at moderate source impedances and frequencies. Low source impedances Bipolar transistor amplifiers can provide very good noise performance over the range of source impedances from about 200 ohms to 1M; corresponding optimum collector currents are generally in the range of several milliamps down to a microamp. That is, collector currents used for the in- put stage of low-noise amplifiers generally
- 392. AMPLIFIER NOISE 7.15 FET noise 44: tend to be lower than in amplifier stages not optimized for low-noise performance. For very low source impedances (say 50fl), transistor voltage noise will always dominate, and noise figures will be poor. The best approach in such cases is to use a transformer to raise the signal level (and impedance), treating the signal on the sec- ondary as before. High-quality signal transformers are available from companies such as James and Princeton Applied Re- search. As an example, the latter's model 116 FET preamp has voltage and current noise such that the lowest noise figure oc- curs for signals of source impedance around 1M. A signal around lkHz with source impedance of 100 ohms would be a poor match for this amplifier,since the am- plifier's voltage noise is much larger than the signal source's Johnson noise; the re- sultant noise figure for that signal con- nected directly to the amplifier would be 1IdB. By using the optional internal step- up transformer, the signal level is raised (along with its source impedance), thus overriding amplifier noise voltage and giv- ing a noise figure of about l.OdB. At radiofrequencies (e.g., beginning around 100kHz) it is extremely easy to make good transformers, both for tuned (narrowband) and broadband signals. At these frequencies it is possible to make broadband "transmission-line transform- ers" of very good performance. We will treat some of these methods in Chapter 13. It is at the very low frequencies (audio and below) that transformers become problem- atic. Three comments: (a) The voltage rises proportional to the turns ratio of the trans- former, whereas the impedance rises pro- portional to the square of the ratio. Thus a 2:l voltage step-up transformer has an output impedance four times the input im- pedance (this is mandated by conservation of energy). (b)Transformers aren't perfect. They have trouble at low frequencies (mag- netic saturation) and at high frequencies (winding inductance and capacitance), as well as losses from the magnetic proper- ties of the core and from winding resis- tance. The latter is a source of Johnson noise, as well. Nevertheless, when deal- ing with a signal of very low source im- pedance, you may have no choice, and transformer coupling can be very bene- ficial, as the preceding example demon- strates. Exotic techniques such as cooled transformers, superconducting transform- ers, and SQUIDs (superconducting quan- tum interference devices)can provide good noise performance at low impedance and voltagelevels. With SQUIDs you can mea- sure voltages of l ~ - ~ ~volt! (c) Again, a warning: Don't attempt to improve perfor- mance by adding a resistor in series with a low source impedance. If you do that, you're just another victim of the noise- figure fallacy. High source impedances If the source impedance is high, say greater than lOOk or so, transistor current noise dominates, and the best device for low-noise amplification is a FET. Although their voltage noise is usually greater than that of bipolar transistors, the gate current (and its noise) can be exceedingly small, making them ideally suited for low-noise high-impedance amplifiers. Incidentally, it is sometimes useful to think of Johnson noise as a current noise 2, = v,/R,. This lets you compare source noise contributions with amplifier current noise (Fig. 7.52). 7.15 FET noise We can use the same amplifier noise model for FETs, namely a series noise voltage source and a parallel noise current source. You can analyze the noise performance with exactly the same methods used for bipolar transistors. For example, see the graphs in the section on bipolar/FET shootout.
- 393. PRECISION CIRCUITS AND LOW-NOISETECHNIQUES 444 Chapter 7 resistance (a) Figure 7.52. Thermal noise voltage density versus resistance at 25" C.The equivalentshort- circuit current noise density is also shown. Voltage noise of JFETs For JFETs the voltage noise en is essen- tially the Johnson noise of the channel resistance, given approximately by where the inverse transconductance takes the place of resistance in the Johnson-noise formula. Since the transconductance rises with increasing drain current (as fi),it is generally best to operate FETs at high drain current for lowest voltage noise. However, since the en is Johnson noise, which goes only as I/&, and that in turn goes as 6,en is finally propor- tional to I ; ' / ~ . With such a mild depen- dence of en on IDit doesn't pay to run at a drain current so high that other prop- erties of the amplifier are degraded. In particular, a FET running at high current gets hot, which (a) decreases g,, (b) in- creasesoffset voltagedrift and CMRR, and (c) raises gate leakage dramatically; the latter effect can actually increase voltage noise, since there is some contribution to en from flicker noise associated with the gate leakage current. There is another way to increase g,, and therefore decrease JFET voltage noise: By parallelinga pair of JFETs you get twice the g,, but of course this is at twice the ID. But now if you run the combination at the previous ID,you still improve g, by a factor of fiover the single-JFET value, without increasing total drain current. In practice you can simply parallel a number of matched JFETs, or look for a large- geometry JFET like the 2SJ72and 2SK147 mentioned earlier. There is a price to pay, however. All the capacitances scale with the number of par- alleled JFETs. As a result, high-frequency performance (including noise figure) is de- graded. In practice you should stop paral- leling additional transistors when the cir- cuit's input capacitance roughly matches the source's capacitance. If you care about performance at high frequencies, choose JFETs with high g, and low CTss; you might consider the ratio gm/CTs, a high- frequency figureof merit. Note that circuit configurations can also play an important role; e.g., the cascode circuit can be used to eliminate the Miller effect (gain multi- plication) on C,,, . MOSFETs tend to have much higher voltage noise than JFETs, with llf noise predominating, since the l l f knee is as high as lOkHz to 100kHz. For this reason you wouldn't normally choose a MOSFET for low-noise amplifiers below IMHz. Currentnoise of JFETs At low frequencies the current noise in is extremely small, arising from the shot noise in the gate leakage current (Fig. 7.53): In addition, there is a flicker-noise com- ponent in some FETs. The noise cur- rent rises with increasing temperature, as the gate leakage current rises. Watch out for the rapidly increasing gate leakage in n-channel JFETs that occurs for operation at high VDG(see Section 3.09).
- 394. AMPLIFIER NOISE 7.17 Noise in differential and feedback amplifiers 44! corresponds to a noise voltage of 4 n ~ / H z * / and a noise current of 0.013 p ~ / ~ z * . / 7.16 Selecting low-noise transistors 2' K As we mentioned earlier, bipolar transis- I 10 tors offer the best noise performance with low source impedances, owing to their DI lower input voltage noise. Voltage noise, f < 5 0 k ~ z en,is reduced by choosinga transistor with 10 1 low base spreading resistance, ~ b b ,and 1 10 100 1k 10k operating at high collector current (as gate leakage (PA) long as hFE remains high). For higher Figure 7.53. Input noise current versus gate source impedances the current noise can leakage current for JFETs. (Courtesy of Na- be minimized instead by operating at lower tional Semiconductor Corp.) collector current. At moderate to high frequencies there is an additional noise term, namely the real part of the input impedance seen looking into the gate. This comes from the effect of feedback capacitance (Miller effect) when there is a phase shift at the output due to load capacitance; i.e., the part of the output signal that is shifted 90" couples through the feedback capacitance CT,,to produce an effective resistance at the input, given by At high values of source impedance, FETs are the best choices. Their volt- age noise can be reduced by operating at higher drain currents, where the transcon- ductance is highest. FETs intended for low-noise applications have high k values (see Section 3.04), which usually means high input capacitance. For example, the low-noise 2N6483 has Cis,= 20pF, whereas the 2N5902 low-current FET has Ciss= 2pF. Figures 7.54 and 7.55 show compar- isons of the noise characteristics of a num- ber of popular and useful transistors. As an example, the 2N5266 p-channel JFET has a noise current of O.OO~~A/HZ*7-17 Noisein differentialand and a noise voltage en of I ~ ~ V I H Z ; , feedback amplifiers both at IDss and 1OkHz. The noise current begins climbing at about 5OkHz. Low-noise amplifiers are often differential, These figures are roughly 100 times better to obtain the usual benefits of low drift in in and 5 times worse in en than the and good common-mode rejection. When corresponding figures for the 2N5087 you calculate the noise performance of a used earlier. differential amplifier,there are three points With FETs you can achieve good noise to keep in mind: (a) Be sure to use performance for input impedances in the the individual collector currents, not the range of 10kto IOOM.The PAR model 116 sum, to get en and in from data sheets. preamp has a noise figure of 1dBor better (b) The in seen at each input terminal is for source impedances from 5k to 10M in the same as for a single-ended amplifier the frequency range from lkHz to 10kHz. configuration. (c) The en seen at one input, Its performance at moderate frequencies with the other input grounded, say, is 3dB
- 395. 0.001L-. i I _ I 1 l l00mA 1pA 10pA 1OOpA 1mA 1OmA collector current B LM394 I, = 1mA I 0.1 0.001 L-.. . i - . - i . 1 1Hz lOHz . 100Hz lkHz lOkHz lOOkHz I 2 ~ ~ 7 8 6 ! u frequency 0 . 1 p A l p A 10pA 100pA 1mA lOmA collector current L Figure 7.54. Input noise for some popular transistors. A. Input noise voltage (en) versus collector current. B. Input noise current (in) versus collector current. C. Input noise current(in) versus frequency. I I i 1OpA 1OOpA 1rnA 1OmA LM394 1, = 1pA (bipolar transistor) 0.1 .,c 2N3954-8, 2N5452-4, 2N5515-24 10-'6 lOHz looHz lkHz lOkHz lOOkHz frequency C LM394 I, = ' 2N5432-34 1mA 1 1mA (b~polar) ' 2SK147, 2N6483-5.2N5515-24 l m A 2SJ72 3mA - I I I J Figure 7.55. Input noise for some popular FETs. lOHz lOOHz lkHz lOkHz lOOkHz frequency B A. Input noise voltage (en)versusdrain current (ID). B. Input noise voltage (en)versus frequency. C. Input noise current (in) versus frequency.
- 396. AMPLIFIER NOISE 7.17 Noise in differential and feedback amplifiers 44' larger than the single-transistor case, i.e., For a follower, R2 is zero, and the it is multiplied by fi. effective noise sources are just those of the In amplifiers with feedback, you want differential amplifier alone. to take the equivalent noise sources en and in out of the feedback loop, so you Inverting can use them as previously described when F~~the inverting amplifier ( ~ i ~ .7.57) the calculating noise perf0ITnance with a given input noise sources become signal source. Let's call the noise terms 1 brought out of the feedback loop eA and i i = i: + 4kT- iA, for amplijier noise terms. Thus the amplifier's noise contribution to a signal with source resistance R, is Let's take the two feedback configurations separately. Noninverting For the noninverting amplifier (Fig. 7.56) the input noise sources become where en is the "adjusted" noise voltage for the differential configuration, i.e., 3dB larger than for a single-transistor stage. The additional noise voltage terms arise from Johnson noise and input-stage noise current in the feedback resistors. Note that the effective noise voltage and current are now not completely uncorrelated, so calculations in which their squares are added can be in error by a maximum factor of 1.4. IR1 R1 R2R,,= - R l + '72 I; Figure 7.56 Figure 7.57 Op-amp selection curves You now have all the tools necessary to analyze op-amp input circuits. Their noise is specified in terms of en and in, just as with transistors and FETs. You don't get to adjust anything, though; you only get to use them. The data sheets may need to be taken with a grain of salt. For example, "popcorn noise" is typified by jumps in offset at random times and duration. It is rarely mentioned in polite company. Figure 7.58 summarizes the noise performance of some popular op- amps. Widebandnoise Op-amp circuits are generally dc-coupled and extend to some upper frequency limit fcUtoff. Therefore it is of interest to know the total noise voltage over this band, not merely the noise power density. Figure 7.59 presents some graphs showing the rms noise voltage in a band extending
- 397. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 448 Chapter 7 frequency (Hz) A frequency (Hz) 6 Figure 7.58. Input noise for some popular op- amps. A. Input noise voltage (en)versus frequency. B. Input noise current (in) versus frequency. from dc to the indicated frequency; they were calculated by integrating the noise power curves for the various op-amps. Choosing a low-noise op-amp It is simple to choose an op-amp to mini- mize noise in some frequency range, given upper frequency Figure 7.59. Wideband noise voltage for some popular op-amps. the signal impedance seen from the op- amp, Rsig(which includes the effects of feedback components, as given in the fore- going expressions). Generally speaking, you want op-amps with low infor high sig- nal impedances, and op-amps with low en for low signal impedances. Assuming the signal source is at room temperature, the total input-referred squared noise voltage density is just where the first term is due to Johnson noise, and the last two terms are due to op- amp noise voltage and current. Obviously the Johnson noise sets a lower bound to the input-referred noise. In Figure 7.60 we've plotted the quantity e~ (at 10Hz) as a function of Rsigfor the quietest op- amps we could find. For comparison we included our jellybean JFET LF411 and the micropower bipolar OP-90. The latter, although an excellent micropower op-amp, has high noise voltage (because the front end operates at low collector current, hence high re and therefore high Johnson noise) and also high noise current (because the bipolar input has substan- tial base current); it shows just how good
- 398. NOISE MEASUREMENTS AND NOISE SOURCES 7.18 Measurement without a noise source 44! 1000- current of an amplifier, and from these the noise figure and signal-to-noise ratio for any given signal source. That's all you ever need to know about the noise performance 100- of an amplifier. Basically the process con- sists of putting known noise signals across -rn the input, then measuring the output noise MAX400 signal amplitudes within a certain band- width. In some cases (e.g., a matched input impedance device such as a radio- frequency amplifier) an oscillator of accu- rately known and controllable amplitude is substituted as the input signal source. Later we will discuss the techniques you lo l & ldOk 1L need to do the output voltage measure- source resistance. R. 1121 ment and bandwidth limiting. For now, let's assume you can make rms measure- Figure 7.60. Total noise (source resistor plus ments ofthe output signal, with a measure- amplifier, at 10Hz)for high-performance op- amps. ment bandwidth of your choice. the premium low-noise op-amps really 7.18 Measurement without a noise are. source Low-noise preamps In addition to the low-noiseop-amps, there are some nice low-noise IC preamplifiers. Unlike op-amps, these generally have fixed voltage gain, though in some models you can attach an external gain-setting resistor. People sometimes call these "video ampli- fiers" because they often have bandwidths into the tens of megahertz, though they can be used for low-frequency applications as well. Examples are the Plessey SL561B and several models from Analog Systems. These amplifiers typically have en less than l n ~ / a ,achieved (at the expense of high input noise current, in)by running the input transistor at relatively high collector current. For an amplifier stage made from a FET or transistor and intended for use at low to moderate frequencies, the input imped- ance is likely to be very high. You want to know en and in so that you can predict the SNR with a signal source of arbitrary source impedance and signal level, as we discussed earlier. The procedure is sim- ple: First, determine the amplifier's voltage gain Gv by actual measurement with a signal in the frequency range of interest. The amplitude should be large enough to override amplifier noise, but not so large as to cause amplifier saturation. Second, short the input and measure the rms noise output voltage, es. From this you get the input noise voltage per root hertz from es en = - V / H Z ~ NOISE MEASUREMENTS AND NOISE G ~ B + SOURCES where B is the bandwidth of the measure- ment (see Section 7.21). It is a relatively straightforward process to Third, put a resistor R across the input, determine the equivalent noise voltage and and measure the new rms noise output
- 399. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 450 Chapter 7 voltage, e,. The resistor value should be large enough to add significant amounts of current noise, but not so large that the input impedance of the amplifier begins to dominate. (If this is impractical, you can leave the input open and use the amplifier's input impedance as R.) The output you measure is just from which you can determine in to be With some luck, only the first term in the square root will matter (i.e., if current noise dominates both amplifier voltage noise and source resistor Johnson noise). Now you can determine the SNR for a signal V, of source impedance R,, namely where the numerator is the signal voltage (presumed to lie within the bandwidth B) and the terms in the denominator are the amplifier noise voltage, amplifier noise current applied to R,, and Johnson noise in R,. Note that increasing the amplifier bandwidth beyond what is necessary to pass the signal Vsonly decreases the final SNR. However, if V, is broadband (e.g., a noise signal itself), the final SNR is independent of amplifier bandwidth. In many cases the noise will be dominated by one of the terms in the preceding equation. 7.19 Measurement with noise source The preceding technique of measuring the noise performance of an amplifier has the advantage that you don't need an accurate and adjustable noise source, but it requires an accurate voltmeter and filter, and it assumes that you know the gain versus frequency of the amplifier, with the actual source resistance applied. An alternative method of noise measurement involves applying broadband noise signals of known amplitude to the amplifier's input and observing the relative increase of output noise voltage. Although this technique requires an accurately calibrated noise source, it makes no assumptions about the properties of the amplifier, since it measures the noise properties right at the point of interest, at the input. Again, it is relatively straightforward to make the requisite measurements. You connect the noise generator to the ampli- fier's input, making sure that its source impedance Rg equals the source imped- ance of the signal you ultimately plan to use with the amplifier. You first note the amplifier's output rms noise voltage, with the noise source attenuated to zero output signal. Then you increase the noise source rms amplitude Vg until the amplifier's out- put rises 3dB (a factor of 1.414 in rms out- put voltage). The amplifier's input noise voltage in the measurement bandwidth, for this source impedance, equals this value of added signal. The amplifier therefore has a noise figure From this you can figure out the SNR for a signal of any amplitude with this same source impedance, using the formula from Section 7.12 SNR = 10 log,, - - NF(R,) dB (42;,) There are nice calibrated noise sources available, most of which provide means for attenuation to precise levels in the microvolt range. Note: Once again, the preceding formulas assume Rin >> R3. If, on the other hand, the noise-figure measurement is made with a matched signal source, i.e., if R, = Zi,,then
- 400. NOISE MEASUREMENTS AND NOISE SOURCES 7.19 Measurement with noise source 45 omit the factors "4" in the preceding EXERCISE 7.6 expressions. Derive the foregoing expression for noise tem- Note that this technique does not tell perature. Hint: Begin by noting that PH = you en and in directly, just the appropri- a(Tn + T H ) and PC = a(Tn + Tc), where a is a constant that will shortly disap- ate for a source of imped- pear. Then note that the noise contribution of the driving impedance you the amplifier, stated as a noise temperature, used in the measurement. Of course, adds to the noise temperature of the source by making several such measurements resistor. Take it from there, with different noise source impedances, you could infer the values of en and EXERCISE 7.7 Zn.. Amplifier noise temperature (or noise figure) A nice variation on this technique is to use resistor Johnson noise as the "noise source." This is a favorite technique used by designers of very low noise radiofre- quency amplifiers (in which, incidentally, the signal source impedance is usually 50R and matches the amplifier's input imped- ance). It is usually done the following way: A dewar of liquid nitrogen holds a 50 ohm "termination" (a fancy name for a well-designed resistor that has negli- gible inductance or capacitance) at the temperature of boiling nitrogen, 77OK; a second 50 ohm termination is kept at room temperature. The amplifier's input is connected alternately to the two resistors (usually with a high-quality coax relay), while the output noise power (at some cen- ter frequency, with some measurement bandwidth) is measured with an RF power meter. Call the results of the two measure- ments PC and PH,the output noise power corresponding to cold and hot source re- sistors, respectively. It is then easy to show that the amplifier's noise tempera- ture, at the frequency of the measurement, is just where Y = PH/Pc, the ratio of noise powers. Noise figure is then given by the formula of Section 7.12, namely depends on the value of signal source im- pedance, Rs. Show that an amplifier char- acterized by en and in (as in Fig. 7.46) has minimum noise temperature for a source impedance Rs= en/&. Then show that the noise temperature, for that value of Rs,is given by T, = enin/2k. Amplifiers with matched input impedance This last technique is ideal for noise measurements of amplifiers designed for a matched signal source impedance. The most common examples are in radiofre- quency amplifiers or receivers, usually meant to be driven with a signal source im- pedance of 50 ohms, and which themselves have an input impedance of 50 ohms. We will discuss in Chapter 13 the reasons for this departure from our usual criterion that a signal source should have a small source impedance compared with the load it drives. In this situation en and inare irrel- evant as separate quantities; what matters is the overall noise figure (with matched source) or some specification of SNR with a matched signal source of specified ampli- tude. Sometimes the noise performance is ex- plicitly stated in terms of the narrowband input signal amplitude required to obtain a certain output SNR. A typical radiofre- quency receiver might specify a 1OdBSNR with a 0.25pV rms input signal and 2kHz receiver bandwidth. In this case the pro- cedure consists of measuring the rms re- ceiver output with the input driven by a
- 401. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 452 Chapter 7 Figure 7.61. Pink noise source (-3dB/octave, f0.25dB from lOHz to 4OkHz). matched sine-wave source initially atten- uated to zero, then increasing the (sine- wave) input signal until the rms output rises IOdB, in both cases with the receiver bandwidth set to 2kHz. It is important to use a meter that reads true rms voltages for a measurement where noise and sig- nal are combined (more about this later). Note that radiofrequency noise measure- ments often involve output signals that are in the audiofrequency range. 7.20 Noise and signal sources Broadband noise can be generated from the effects we discussed earlier, namely Johnson noise and shot noise. The shot noise in a vacuum diode is a classic source of broadband noise that is especially use- ful because the noise voltage can be pre- dicted exactly. More recently, zener diode noise has been used in noise sources. Both of these extend from dc to very high fre- quencies, making them useful in audiofre- quency and radiofrequency measurements. An interesting noise source can be made using digital techniques, in particular by connecting long shift registers with their input derived from a modulo-2 addition of several of the later bits (see Section 9.33). The resultant output is a pseudorandom sequence of 1's and 0's that after low- pass filtering generates an analog signal of white spectrum up to the low-pass filter's break-point, which must be well below the frequency at which the register is shifted. These things can be run at very high frequencies, generating noise up to lOOkHz or more. The "noise" has the interesting property that it repeats itself exactly after a time interval that depends on the register length (an n-bit maximal- length register goes through 2n- 1 states before repeating). Without much difficulty that time can be made to be very long (months or years), although most often a period of a second is long enough. For example, a 50-bit register shifted at lOMHz will generate white noise up to lOOkHz or so, with a repeat time of 3.6 years. A design for a pseudorandom noise source based on this technique is shown in Section 9.36. Some noise sources can generate pink noise as well as white noise. Pink noise has equal noise power per octave, rather than equal power per hertz. Its power density (power per hertz) drops off at 3dBloctave. Since an RC filter drops off at 6dB/octave, a more complicated filter is necessary to generate a pink spectrum from a white noise input. The circuit shown in Figure 7.61 uses a 23-bit pseudorandom white noise generator chip to generate pink noise, accurate to f0.25dB from lOHz to 40kHz. Versatile signal sources are available with precisely controlled output amplitude
- 402. NOISE MEASUREMENTS AND NOISE SOURCES 7.21 Bandwidth limiting and rms voltage measurement 453 (down to the microvolt range and below) over frequencies from a fraction of a hertz to gigahertz. Some can even be pro- grammed via a digital "bus." An example is the Hewlett-Packard model 8660 syn- thesized signal generator, with output fre- quencies from 0.01 to 11OMHz, calibrated amplitudes from 1OnV to 1 volt rms, hand- some digital display and bus interface, and nifty accessories that extend the frequency range to 2.6GHz and provide modulation and frequency sweeping. This is a bit more than you usually need to do the job. 7.21 Bandwidth limiting and rms voltage measurement Limiting the bandwidth All the measurements we have been talking about assume that you are looking at the noise output only in a limited frequency band. In a few cases the amplifier may have provision for this, making your job easier. If not, you have to hang some sort of filter on the amplifier output before measuring the output noise voltage. RC (20dBldecade) -20 gain (dB) -30 -40 1 1 1 I II noise bandwidth / frequency- B = 1.57f3,, Figure 7.62. Equivalent "brick-wall" noise bandwidth for RC low-pass filter. The easiest thing to use is a simple RC low-pass filter, with 3dB point set at roughly the bandwidth you want. For accurate noise measurements, you need to know the equivalent "noise bandwidth," i.e., the width of a perfect"brick-wall"low- pass filter that lets through the same noise voltage (Fig. 7.62). This noise bandwidth is what should be used for B in all the preceding formulas. It is not terribly diffi- cult to do the mathematics, and you find IT B = -f3dB =1.57f 3 d ~ 2 For a pair of cascaded RCs (buffered so they don't load each other), the magic for- mula becomes B = 1.22f3dB. For the But- terworth filters discussed in Section 5.05, the noise bandwidth is B=1.57f3dB (lpole) B =1.11 f3dB (2 poles) B =1.05 f3dB (3 poles) B =1.025 f3dB (4 poles) If you want to make band-limited measure- ments up at some center frequency, you can just use a pair of RC filters (Fig. 7.63), in which case the noise bandwidth is as in- dicated. If you have had experience with contour integration, you may wish to try the following exercise. Igain (dB) h ~ g hpass low pass L frequency - Figure 7.63. Equivalent "brick-wall" noise bandwidth for RC bandpass filter. EXERCISE 7.8 Optional exercise: Derive the preceding result, beginning with the response functions of RC filters. Assume unit power per hertz input signal, and integrate the output power from zero to infinity. A contour integral then gets you the answer. Another way to make a bandpass filter for noise measurements is to use an RLC circuit. This is better than a pair of cascaded high-pass and low-pass RCfilters if you want your measurement over a bandpass that is narrow compared with the center frequency (i.e., high Q). Figure 7.64 shows both parallel and series RLCcircuits and their exact noise bandwidths. In both
- 403. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 454 Chapter 7 cases the resonant frequency is given by fo = 1 / 2 7 r a . You might arrange the bandpass filter circuit as a parallel RLC collector (or drain) load, in which case you use the expression as given. Alternatively, you might interpose the filter as shown in Figure 7.65; for noise bandwidth purposes the circuit is exactly equivalent to the parallel RLC, with R = RIIIRz. Figure 7.64. Eqivalent "brick-wall" noise bandwidth for RLC bandpass filter. Figure 7.65 Measuring the noise voltage The most accurate way to make output noise measurements is to use a true rms voltmeter. These operate either by mea- suring the heating produced by the signal waveform (suitably amplified) or by using an analog squaring circuit followed by av- eraging. If you use a true rms meter, make sure it has response at the frequencies you are measuring; some of them only go up to a few kilohertz. True rms meters also specify a "crest factor," the ratio of peak voltage to rms that they can handle with- out great loss of accuracy. For Gaussian noise, a crest factor of 3 to 5 is adequate. You can use a simple averaging-type ac voltmeter instead, if a true rms meter is unavailable. In that case, the values read off the scale must be corrected. As it turns out, all averaging meters (VOMs, DMMs, etc.) already have their scales adjusted, so what you read isn't actually the average, but rather the rms voltage assuming a sine- wave signal. For example, if you measure the power-line voltagein the United States, your meter will read something close to 117 volts. That's fine, but if the signal you're reading is Gaussian noise, you have to apply an additional correction. The rule is as follows: To get the rms voltage of Gaussian noise, multiply the "rms" value you read on an averaging ac voltmeter by 1.13 (or add 1dB). Warning: This works fine if the signal you are measuring is pure noise (e.g., the output of an amplifier with a resistor or noise source as input), but it won't give accurate results if the signal consists of a sine wave added to noise. A third method, not exactly world- famous for its accuracy, consists of looking at the noise waveform on an oscilloscope: The rms voltage is 116 to 118 of the peak-to-peak value (depending on your subjective reading of the pp amplitude). It isn't very accurate, but at least there's no problem getting enough measurement bandwidth. 7.22 Noise potpourri Herewith a collection of interesting, and possibly useful, facts. I. The averaging time required in an indi- cating device to reduce the fluctuations of
- 404. INTERFERENCE: SHIELDING AND GROUNDING 7.23 Interference 455 a rectified noise signal to a desired level for a given noise bandwidth is 1600 T M - seconds Ba2 where T is the required time constant of the indicating device to produce fluctua- tions of standard deviation a percent at the output of a linear detector whose input is noise of bandwidth B. 2. For band-limited white noise the expected number of maxima per second is where fi and fi are the lower and upper band limits. For fl = 0,N = 0.77f2; for narrowband noise (fi M f2), N M (fl+f2>/2. 3. rms-to-average(i.e., average magnitude) ratios: (rms value) absolute amplitude level (V) Figure 7.66. Relativeoccurrence of amplitudes in Gaussian noise. Gaussian noise: rmslavg= @= 1.25 = 1.96dB 3 Sine wave: rmslavg = 7~122= 1.11 = 0.91dB Square wave: rmslavg = 1 = OdB 4. Relative occurrence of amplitudes in Gaussian noise. Figure 7.66 gives the fractional time that a given amplitude level is exceeded by a Gaussian noise waveform of amplitude 1 volt rms. INTERFERENCE: SHIELDING AND GROUNDING "Noise" in the form of interfering signals, 60Hz pickup, and signal coupling via power supplies and ground paths can turn out to be of far greater practical impor- tance than the intrinsic noise sources we've just discussed. These interfering signals can all be reduced to an insignificant level (unlike thermal noise) with proper layout and construction. In stubborn cases the cure may involve a combination of fil- tration of input and output lines, careful layout and grounding, and extensive elec- trostatic and magnetic shielding. In these sections we would like to offer some sug- gestions that may help illuminate this dark area of the electronic art. 7.23 Interference Interfering signals can enter an electronic instrument through the power-line inputs or through signal input and output lines. In addition, signals can be capacitively coupled (electrostatic coupling) onto wires in the circuit (the effect is more serious for high-impedance points within the cir- cuit), magnetically coupled to closed loops in the circuit (independent of impedance level), or electromagnetically coupled to wires acting as small antennas for electro- magnetic radiation. Any of these can be- come a mechanism for coupling of signals from one part of a circuit to another. Fi- nally, signal currents from one part of the circuit can couple to other parts through voltage drops on ground lines or power- supply lines.
- 405. PRECISION CIRCUITS AND LOW-NOISE TE 456 Chapter 7 Eliminating interference Numerous effective tricks have been evolved to handle most of these commonly occurring interference problems. Keep in mind the fact that these techniques are all aimed at reducing the interfering signal or signals to an acceptable level; they rarely eliminate them altogether. Consequently, it often pays to raise signal levels, just to improve the signal-to-interference ratio. Also, it is important to realize that some environments are much worse than others; an instrument that works just dandy on the bench may perform miserably on lo- cation. Some environments worth avoid- ing are those (a) near a radio or televi- sion station (RF interference), (b) near a subway (impulsive interference and power- line garbage), (c) near high-voltage lines (radio interference, frying sounds), (d) near motors and elevators (power-line spikes), (e) in a building with triac lamp and heater controllers (power-line spikes), (f) near equipment with large transformers (mag- netic pickup), and (g) near arc welders (un- believable pickup of all sorts). Herewith a gathering of advice, techniques, and black magic: Signals coupled through inputs, outputs, and power line The best bet for power-line noise is to use a combination of RF line filters and transient suppressors on the ac power line. You can achieve 60dB or better attenuation of interference above a few hundred kilohertz this way, as well as effective elimination of damaging spikes. Inputs and outputs are more difficult, because of impedance levels and the need to couple desired signals that may lie in the frequency range of interference. In devices like audio amplifiers you can use low-pass filters on inputs and outputs (much inter- ference from nearby radio stations enters via the speaker wires, acting as antennas). In other situations shielded lines are often necessary. Low-level signals, particularly at high impedance levels, should always be shielded. So should the instrument cabi- net. Capacitive coupling Signals within an instrument can get around handsomely via electrostatic cou- pling: Some point within the instrument has a 10 volt signal jumping around; a high-Z input nearby does some sympa- thetic jumping, too. The best things to do are to reduce the capacitance between the offending points (move them apart), add shielding (a complete metal enclosure, or even close-knit metal screening, eliminates this form of coupling altogether), move the wires close to a ground plane (which"swal- lows" the electrostatic fringing fields, re- ducing coupling enormously), and lower the impedance levels at susceptible points, if possible. Op-amp outputs don't pick up interference easily, whereas inputs do. More on this later. Magnetic coupling Unfortunately, low-frequency magnetic fieldsare not significantly reduced by metal enclosures. A turntable, microphone, tape recorder, or other sensitive circuit placed in close proximity to an instrument with a large power transformer will display as- tounding amounts of 60Hz pickup. The best therapy here is to avoid large enclosed areas within circuit paths and try to keep the circuit from closing around in a loop. Twisted pairs of wires are quite effective in reducing magnetic pickup, because the enclosed area is small, and the signals in- duced in successive twists cancel. When dealing with very low level sig- nals, or devices particularly susceptible to magnetic pickup (tape heads, inductors, wire-wound resistors), it may be desirable to use magnetic shielding. "Mu-metal shielding" is available in preformed pieces
- 406. INTERFERENCE: SHIELDING AND GROUNDING 7.25 Grounding between instruments 4 and flexible sheets. If the ambient mag- netic field is large, it is best to use shield- ing of high permeability (high mu) on the inside, surrounded by an outer shield of lower permeability (which can be ordinary iron, or low-mu shielding material), to prevent magnetic saturation in the inner shield. Of course, moving the offending source of magnetic field is often a sim- pler solution. It may be necessary to ex- ile large power transformers to the hinter- lands, so to speak. Toroidal transformers have smaller fringing fields than the stan- dard frame types. Radiofrequency coupling RF pickup can be particularly insidious, because innocent-looking parts of the cir- cuit can act as resonant circuits, display- ing enormous effective cross section for pickup. Aside from overall shielding, it is best to keep leads short and avoid loops that can resonate. Ferrite beads may help, if the problem involves very high frequen- cies. A classic situation is the use of a pair of bypass capacitors (one tantalum, one disc ceramic), often recommended to improve bypassing. The pair can form a lovely parasitic tuned circuit somewhere in the HF to VHF region (tens to hundreds of megahertz), with self-oscillations! 7.24 Signal grounds Common grounding blunders Figure 7.67 shows a common situation. Here a low-level amplifier and a high- current driver are in the same instrument. The first circuit is done correctly: Both amplifiers tie to the supply voltages at the regulator (right at the sensing leads), so IR drops along the leads to the power stage don't appear on the low-level amplifier's supply voltages. In addition, the load cur- rent returning to ground does not appear at the low-level input; no current flows from the ground side of the low-level amplifier's input to the circuit mecca (which might be the connection to the case near the BNC input connector). In the second circuit there are two blun- ders. Supply voltage fluctuations caused by load currents at the high-level stage are impressed on the low-level supply voltages. Unless the input stage has very good sup- ply rejection, this can lead to oscillations. Even worse, the load current returning to the supply makes the case "ground" fluc- tuate with respect to power-supplyground. The input stage ties to this fluctuating ground, a very bad idea. The general idea is to look at where the large signal cur- rents are flowing and make sure their ZR drops don't wind up at the input. In some cases it may be a good idea to decouple the supply voltages to the low-level stages with a small RC network (Fig. 7.68). In stubborn cases of supply coupling it may pay to put a Zener or 3-terminal regulator- . Ground leads and shields can cause plenty 0" the low-level-stagesupply for add:ltional of trouble, and there is a lot of misunder- decou~ling. standing on this subject. The problem, in a nutshell, is that currents you forgot about flowingthrough a ground line can generate 7.25 Grounding between instruments a signal seen by another part of the circuit sharing the same ground. The technique of The idea of a controlled ground point a ground "mecca" (a common point in the within one instrument is fine, but what circuit to which all ground connections are do you do when a signal has to go from tied) is often seen, but it's a crutch; with one instrument to another, each with its a little understanding of the problem you own idea of "ground"? Some suggestions can handle most situations intelligently. follow.
- 407. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 458 Chapter 7 OUt -in sense + reg sense - case ground Figure 7.67. Ground paths for low-level signals. A. Right B. Wrong - v, ion 4 1 room or (worse)in different rooms or build- ings. It consists of some 60Hz volt- - age, harmonics of the line frequency, some radiofrequency signals (the power line high makes a good antenna), and assorted spikes- level and other garbage. If your signals are large enough, you can live with this. s~gnal Figure 7.68 High-level signals out in +S reg S ground If the signalsare several volts, or large logic swings, just tie things together and forget Figure 7.69 about it (Fig. 7.69). The voltage source shown between the two grounds represents Small signals and long wires the variations in local grounds you'll find For small signals this situation is intolera- on different power-line outlets in the same ble, and you will have to go to some effort I 41 m B
- 408. INTERFERENCE:SHIELDING AND GROUNDING 7.25 Grounding between instruments 455 - c~rcuit ground or use differential outputs Figure 7.70. Ground connections for low-level signals through shielded cables. to remedy the situation. Figure 7.70 shows (use a Bendix 4890-1 or Amphenol 31-010 some ideas. In the first circuit, a coaxial insulated BNC connector). A differential shielded cable is tied to the case and circuit amplifier is used to buffer the input signal, ground at the driving end, but it is kept thus ignoring the small amount of "ground isolated from the case at the receiving end signal" appearing on the shield. A small
- 409. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 460 Chapter 7 resistor and bypass capacitor to ground is a good idea to limit ground swing and pre- vent damage to the input stage. The alter- nate receiver circuit in Figure 7.70 shows the use of a "pseudodifferential"input con- nection for a single-ended amplifier stage (which might, for example, be a standard non-inverting op-amp connection, as in- dicated). The 10 ohm resistor between amplifier common and circuit ground is large enough to let the signal source's refer- ence ground set the potential at that point, since it is much larger than the imped- ance of the source's ground. Any noise present at that node, of course, appears also at the output. However, this becomes unimportant if the stage has sufficiently high voltage gain, Gv, since the ratio of desired signal to ground noise is reduced by Gv.Thus, although this circuit isn't truly differential (with infinite CMRR), it works well enough (with effective CMRR = Gv). This pseudo-differential ground- sensing trick can be used also for low-level signals within an instrument, when ground noise is a problem. In the second circuit, a shielded twisted pair is used, with the shield connected to the case at both ends. Since no sig- nal travels on the shield, this is harm- less. A differential amplifier is used as before on the receiving end. If logic sig- nals are being transmitted, it is a good idea to send a differential signal (the signal and its inverted form), as indicated. Ordinary differential amplifiers can be used as in- put stages, or if the ground interference is severe, special "isolated amplifiers" are available from manufacturers like Analog Devices and Burr-Brown. The latter per- mit kilovolts of common-mode signals. So do opto-isolator modules, a handy solution for digital signals in some situations. At radiofrequencies, transformer cou- pling offers a convenient way of removing common-mode signal at the receiving end; this also makes it easy to generate a differ- ential bipolarity signal at the driving end. Transformers are popular in audio appli- cations as well, although they tend to be bulky and lead to some signal degradation. For very long cable runs (measured in miles) it is useful to prevent large ground currents flowing in the shield at radiofre- quencies. Figure 7.71 suggests a method. As before, a differential amplifier looks at the twisted pair, ignoring the voltage on the shield. By tying the shield to the case through a small inductor, the dc voltage is kept small while preventing large radiofre- quency currents. This circuit also shows protection circuitry to prevent common- mode excursions beyond f10 volts. small reslstor Figure 7.71. Input-protection circuits for use with very long lines. Figure 7.72 shows a nice scheme to save wires in a multiwire cable in which the common-mode pickup has to be elimina- ted. Since all the signals suffer the same common-mode pickup, a single wire tied to ground at the sending end serves to cancel the common-mode signals on each of the n signal lines. Just buffer its signal
- 410. INTERFERENCE:SHIELDING AND GROUNDING 7.25 Grounding between instruments 461 mult~pletwisted wires, rllff.3.8 one common ,., .,.ential amplifiers Figure 7.72. Common-mode interference rejection with long multiwire cables. (with respect to ground at the receiving end), and use it as the comparison input for each of n differential amplifiers looking at the other signal lines. The preceding schemes work well to eliminate common-mode interference at low to moderate frequencies, but they can be ineffective against radiofrequency in- terference, owing to poor common-mode rejection in the receiving differential am- plifier. One possibility here is to wrap the whole cable around a ferrite toroid (Fig. 7.73). ferrite toroid -- -- transformer Figure 7.73 That increases the series inductance of the whole cable, raising the impedance to Floating signal sources common-mode signals of high frequency and making it easy to bypass them at the far end with a pair of small bypass ca- pacitors to ground. The equivalent circuit shows why this works without attenuating the differential signal: You have a series inductance inserted into both signal lines and the shield, but since they form a tightly coupled transformer of unit turns ratio, the differential signal is unaffected. This is actually a "1:1 transmission-line trans- former," as discussed in Section 13.10. The same sort of disagreement about the voltage of "ground" at separated locations enters in an even more serious way at low-level inputs, just because the signals are so small. An example is a magnetic tape head or other signal transducer that requires a shielded signal line. If you ground the shield at both ends, differences in ground potential will appear as signal at the amplifier input. The best approach is to lift the shield off ground at the transducer (Fig. 7.74).
- 411. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 462 Chapter7 mV stgnals tape head don't ground! Figure 7.74 Isolation ampliffers Another solution to serious ground- contention problems is the use of an "isolation amplifier." Isolation amplifiers (iso-amps) are commercial devices in- tended for coupling an analog signal (with bandwidth clear down to dc) from a cir- cuit with one ground reference to another circuit with a completely different ground (Fig. 7.75). In fact, in some bizarre situations the "grounds7 ' can differ by many kilovolts! Isolation amplifiers are mandatory for medical electronics in which electrodes are applied to human subjects, in order to isolate completely those connections from any instrument circuits powered directly from the ac power lines. Currently available isolation amplifiers use one of three methods: 1. Transformer isolation of a high- note frequency carrier signal, which is either frequency-modulated or pulse-width- modulated with the relatively low bandwidth signal (dc to lOkHz or so) to be isolated (Fig. 7.76). This method is used in all of the isolation amplifiers from Analog Devices, as well as some units from Burr-Brown. Transformer-isolated iso-amps have the convenient feature of requiring dc power only on one side; they all include a transformer-coupled dc-to-dc converter in the package. Trans- former-coupled iso-amps can isolate up to 3.5kV and have typical bandwidths of 2kH2, though some units go to 20kHz. 2. Optically coupled signal transmission via an LED at the sending end and photodiode at the receiving end. This technique is typified by the IS0100 from Burr-Brown. No high-frequency carrier is needed, since signals all the way to dc can be transmitted optically. However, to achieve good linearity, Burr-Brown uses a cute trick: A second matched photodiode at the transmitting side receives light from the LED, in a feedback arrangement that cancels nonlinearities in both LED and photodiode; see Figure 7.77. The IS0100 requires power supplies at both ends, isolates to 750 volts, and has 60kHz band- width. grounds output common "grounds" can differ by kilovolts Figure 7.75. Isolation amplifier concept.
- 412. INTERFERENCE:SHIELDING AND GROUNDING 7.25 Grounding between instruments +input - input input feedback input common iso power common +15V -15V Figure 7.76. AD295 transformer-coupled isolation amplifier. (Courtesy of Analog Devices.) ~solatlon barrier I I I ? 15V (driver) I 2 15V (rece~ver) I I I 0 = I I 0 1 I I I I I 4b I I -- I input II output grid I grid I I Figure 7.77. Opto-coupled analog I isolation amplifier.
- 413. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 464 Chapter 7 frequency-to- analog i I I I Figure 7.78. Capacitively coupled isolation amplifier. Figure 7.79. Burr-Brown IS0106 isolation amplifier. (Courtesy of Burr-Brown Corporation.) 3. Capacitively coupled isolation of a high- frequency carrier signal, which is frequency-modulated with the signal to be isolated (Fig. 7.78). This technique is typ- ified by the IS0102, IS0106, and IS0122 from Burr-Brown (Fig. 7.79). There is no feedback, as with transformer isola- tion, but for most models you need power supplies at both ends. This usually isn't a problem, since you are likely to have elec- tronics at both ends, generating and using the signal. If not, you can get an isolated dc-dc converter to use with the iso-amp. The IS0106 isolates to 3.5kV and has 7OkHz bandwidth. These isolation amplifiers are all in- tended for analog signals, of modest band- width; they cost from $25 to $100 each. The same sorts of ground problems can arise in digital electronics, where the solution is simple and effective: Optic- ally coupled isolators ("opto-isolators") are available, with plenty of bandwidth (10MHz or more), isolation of several
- 414. INTERFERENCE: SHIELDING AND GROUNDING 7.25 Grounding between instruments 465 low c,,. I," low zo Figure 7.80. Using a guard to raise input impedance. kilovolts, and low cost (a dollar or two). remote amplifier. We will discuss signal We'll see them in Chapter 9. guards in Section 15.08 in connection with high-impedance microelectrodes. Signal guarding A closely related issue is signal guarding, an elegant technique to reduce the effects of input capacitance and leakage for small signals at high impedance levels. You may be dealing with signals from a micro- electrode or a capacitive transducer, with source impedances of hundreds of meg- ohms. Just a few picofarads input ca- pacitance can form a low-pass filter, with rolloffs beginning at a few hertz! In ad- dition, the effects of insulation resistance in the connecting cables can easily degrade the performance of an ultra-low input current amplifier (bias currents less than a picoamp) by orders of magnitude. The solution to both these problems is a guard electrode (Fig. 7.80). A follower bootstraps the inner shield, effectively eliminating leakage current and capacitive attenuation by keeping zero voltage difference between the signal and its surrounding. An outer grounded shield is a good idea, to keep interference off the guard electrode; the follower has no trou- bledriving that capacitance and leakage,of course, since it has low output impedance. You shouldn't use these tricks more than you need to; it would be a good idea to put the follower as close to the signal source as possible, guarding only the short section of cable connecting them. Ordinary shielded cable can then carry the low-impedance output signal out to the Coupling to outputs Ordinarily the output impedance of an op- amp is low enough that you don't have to worry about capacitive signal coupling. In the case of high-frequencyor fast-switching interference, however, you have just cause for alarm, particularly if the desired out- put signal involves some degree of preci- sion. Consider the example in Figure 7.81. A precision signal is buffered by an op- amp and passes through a region contain- ing digital logic signals jumping around with slew rates of O.SV/ns. The op-amp's closed-loop output impedance rises with frequency, typically reaching values of 10 to 100 ohms or more at lMHz (see Section 7.07). How large a coupling ca- pacitance is permissible, keeping coupled interference less than the analog signal's resolution of O.lmV? The surprising answer is 0.02pE There are some solutions. The best thing is to keep your small analog waveformsout of the reach of fast-switching signals. A moderate,bypass capacitor across the op- amp's output (with perhaps a small series resistor, to maintain op-amp stability) will help, although it degrades the slew rate. You can think of the action of this capac- itor as lowering the frequency of the cou- pled charge bundles to the point where the op-amp's feedback can swallow them. A
- 415. PRECISION CIRCUITS AND LOW-NOISE TECHNIQUES 466 Chapter 7 logic signal O.lmV resolut~on D/A signal wire interference at lMHz PI- Figure 7.81. Digital cross-coupling interference with linear signals. few hundred picofarads to ground wili adequately stiffen the analog signal at high frequencies (think of it as a capacitive voltage divider). Another possibility is to use a low-impedance buffer, such as the LT1010, or a power op-amp such as the LM675. Don't neglect the opportunity to use shielding, twisted pairs, and proximity to ground planes to reduce coupling. input signal of 50nV (rrns) and an amplifier bandwidth of 10Hz. (4) Measurements are made on a commer- cial amplifier (with Zi, = 1M) in order to determine its equivalent input noise en and in at 1kHz. The amplifier's output is passed through a sharp-skirted filter of bandwidth 100Hz: A 10pVinput signal re- sults in a 0.1 volt output. At this level the amplifier's noise contribution is negligible. SELF-EXPLANATORY CIRCUITS With the input shorted, the noise output is 0.4mV rms. With the input open, the noise 7.26 Circuit ideas output rises to 50mV rms. (a) Find en and in for this amplifier at 1kHz. (b) Find the Figure 7.82 presents some circuit ideas noise figure of this amplifier at lkHz for relevant to the subjects of this chapter. source resistances of 100 ohms, 10k, and ADDITIONAL EXERCISES (I) Prove that SNR = 10log,,(v~/ 4kTR,)- NF(dB) (at R,). (2) A 10pV(rrns) sine wave at lOOHz is in series with a 1M resistor at room tempera- ture. What is the SNR of the resultant sig- nal (a) in a lOHz band centered at lOOHz and (b) in a lMHz band going from dc to 1MHz? (3) A transistor amplifier using a 2N5087 is operated at 100pAcollector current and is driven by a signal source of impedance 2000 ohms. (a) Find the noise figure at 100Hz, 1kHz, and 10kHz. (b) Find the SNR (at each of listed frequencies) for an 100k. (5) Noise measurements are made on an amplifier using a calibrated noise source whose output impedance is 50 ohms. The generator output must be raised to ~ ~ v / H z ' / ~in order to double the output noise power of the amplifier. What is the amplifier's noise figure for a source impedance of 50 ohms? (6) The output noise voltage of a white noise generator is measured with the cir- cuit shown in Figure 7.83. At a particular setting of the noise generator output level, the ac voltmeter reads 1.5 volts "rrns." What is the noise generator's output noise density (i.e., rrns volts per root hertz)?
- 419. Ch8: Digital Electronics BASIC LOGIC CONCEPTS 8.01 Digital versus analog Thus far we have been dealing mainly with circuits in which the input and output voltages have varied over a range of values: R C circuits, amplifiers, inte- grators, rectifiers, op-amps, etc. This is natural when dealing with signals that are continuous (e.g., audio signals) or continuously varying voltages from measuring instruments (e.g., temperature- reading or light-detecting devices, or biological or chemical probes). However, there are instances in which the input signal is naturally discrete in form, e.g., pulses from a particle detector, or "bits" of data from a switch, keyboard, or computer. In such cases the use of digi- tal electronics (circuits that deal with data made of 1's and 0's) is natural and conve- nient. Furthermore, it is often desirable to convert continuous (analog) data to digital form, and vice versa (using D/A and A/D converters), in order to perform calcula- tions on the data with a calculator or com- puter or to store large quantities of data as numbers. In a typical situation a mi- croprocessor or computer might monitor signals from an experiment or industrial process, control the experimental parame- ters on the basis of the data obtained, and store for future use the results collected or computed while the experimcnt is running. Another interesting example of the power of digital techniques is the transmis- sion of analog signals without degradation by noise: An audio or video signal, for instance, picks up "noise" while being transmitted by cable or radio that can- not be removed. If, instead, the signal is converted to a series of numbers rcpresent- ing its amplitude at successive instants of time, and these numbers are transmitted as digital signals, the analog signal reconstruction at the receiving end (done with D/A converters) will be without error, providing the noise level on the transmis- sion channel isn't high enough to prevent accurate recognition of 1's and 0's. This technique, known as PCM (pulse-code modulation), is particularly attractive where a signal must pass through a series of "repeaters," as in the case of a transcontinental telephone call, since 471
- 420. DIGITAL ELECTRONICS 472 Chapter 8 digital regeneration at each stage guaran- tees noiseless transmission. The informa- tion and pictures sent back by recent deep space probes were done with PCM. Digital audio is now commonplace in the home, in the form of 12cm optical "compact discs" (CDs); these store a piece of music in the form of a stereo pair of 16-bit numbers every 23 microseconds, 6 billion bits of information in all. In fact, digital hardware has become so powerful that tasks that seem well suited to analog techniques are often better solved with digital methods. As an example, an analog temperature meter might incorpo- rate a microprocessor and memory in order to improve accuracy by compen- sating the instrument's departure from perfect linearity. Because of the wide availability of microprocessors, such ap- plications are becoming commonplace. Rather than attempt to enumerate what can be done with digital electronics, let's just start learning about it. Applications will emerge naturally as we go along. HIGH and LOW The HIGH and LOW states represent the TRUE and FALSE states of Boolean logic, in some predefined way. If at some point HIGH represents TRUE, that signal line is called "positive true," and vice versa. This can be confusing at first. Figure 8.1 shows an example. SWITCH CLOSED is true when the output is LOW; that's a negative-true signal ("LOW-true" might be a better label, since no negative voltages are involved), and you might label the lead as shown (a bar over a symbol means NOT; that line is HIGH when the switch is not closed). Just remember that the presence or absence of the negation bar over the label tells whether the wire is LOW or HIGH when the stated condition (SWITCH CLOSED) is true. 8.02 Logic states By "digital electronics" we mean circuits in which there are only two (usually) states possible at any point, e.g., a transistor that can either be in saturation or be nonconducting. We usually choose to talk about voltages rather than currents, calling a level HIGH or LOW. The two states can represent any of a variety of "bits" (binary digits) of information, such as the following: one bit of a number whether a switch is opened or closed whether a signal is present or absent whether some analog level is above or below some preset limit whether or not some event has happened Yet whether or not some action should be taken etc. Figure 8.1 A digital circuit "knows" what a signal represents by where it comes from, just as an analog circuit might "know" what the output of some op-amp represents. However, added flexibility is possible in digital circuits; sometimes the same signal lines are used to carry different kinds of information, or even to send it in different directions, at different times. In order to do this "multiplexing," additional information must also be sent (address bits, or status bits). You will see many examples of this very useful ability later. For now, imagine that any given circuit is wired up to perform a predetermined function and that it knows what that
- 421. BASIC LOGIC CONCEPTS 8.03 Number codes 473 function is, where its inputs are coming from, and where the outputs are going. To lend a bit of confusion to a basically simple situation, we introduce 1 and 0. These symbols are used in Boolean logic to mean TRUE and FALSE, respectively, and are sometimes used in electronics in exactly that way. Unfortunately, they are also used in another way, in which 1 = HIGH and 0 = LOW! In this book we will try to avoid any ambiguity by using the word HIGH (or the symbol H) and the word LOW (or the symbol L) to represent logic states, a method that is in wide use in the electronics industry. We will use 1 and 0 only in situations where there can be no ambiguity. Voltage range of HIGH and LOW In digital circuitry, the voltage levels corresponding to HIGH and LOW are allowed to fall in some range. For example, with high-speed CMOS ("HC") logic, input voltages within about 1.5 volts of ground are interpreted as LOW, while voltages within 1.5 volts of the +5 volt supply are interpreted as HIGH. In fact, typical LOW- and HIGH-state output voltages are usually within a tenth of a volt of 0 and +5 volts, respectively (the out- put is a saturated MOS transistor to one of the rails; see Fig. 8.17). This allows for manufacturingspread, variations of the circuits with temperature, loading, supply voltage, etc., and the presence of "noise," the miscellaneous garbage that gets added to the signal in its journey through the cir- cuit (from capacitive coupling, external in- terference, etc.). The circuit receiving the signal decides if it is HIGH or LOW and acts accordingly. As long as noise does not change 1's to O's, or vice versa, all is well, and any noise is eliminated at each stage, since "clean" 0's and 1's are regenerated. In that sense digital electronics is noiseless and pkifect. The term noise immunity is used to describe the maximum noise level that can be added to logic levels (in the worst case) while still maintaining error-free operation. For instance, TTL has 0.4 volt noise immunity, since a TTL input is guaranteed to interpret anything less than +0.8 volt as LOW and anything greater than +2.0 volts as HIGH, whereas the worst-case output levels are +0.4 volt and +2.4 volts, respectively (see the accompanying box on logic levels). In practice, noise immunity is considerably better than this figure, with typical LOW and HIGH voltagesof +0.2 and +3.4 volts and an input decision threshold near +1.3 volts. But always remember that if you are doing good circuit design, you use worst-case values. It is worth keeping in mind that different logic families have dif- ferent amounts of noise immunity. CMOS has greater voltage noise immunity than TTL, whereas the speedy ECL family has less. Of course, susceptibility to noise in a digital system depends also on the am- plitude of noise that is present, which in turn depends on factors such as output- stage stiffness, inductance in the ground leads, the existence of long "bus" lines, and output slew rates during logic transi- tions (which produces transient currents, and therefore voltage spikes on the ground line, due to capacitive loading). We will worry about some of these problems in Sections 9.11-9.13. 8.03 Number codes Most of the conditions we listed earlier that can be represented by a digital level are self-explanatory. How a digital level can represent part of a number is a more involved, and very interesting, question. A decimal (base-10) number is simply a string of integers that are understood to multiply successive powers of 10, the indi- vidual products then being added together.
- 422. DIGITAL ELECTRONICS 474 Chapter 8 For instance, Ten symbols (0 through 9) are needed, and the power of 10 each multiplies is determined by its position relative to the decimal point. If we want to represent a number using two symbols only (0 and l), we use the binary, or base-2, number system. Each 1 or 0 then multiplies a successive power of 2. For instance, =13i0 The individual 1's and 0's are called "bits" (binary digits). The subscript (always given in base 10) tells what number system we are using, and often it is essential in order to avoid confusion, since the symbols all look the same. We convert a number from binary to decimal by the method just described. To convert the other way, we keep dividing the number by 2, and write down the remainders. To convert 1 to binary, 1312= 6 remainder I 612 = 3 remainder 0 3/2 = 1 remainder 1 112= 0 remainder 1 from which 1310= 11012. Note that the answer comes out in the order LSB (least significant bit) to MSB (most significant bit). Hexadecimal("hex") representation The binary number representation is the natural choice for two-state systems (although it is not the only way; you'll see some others soon). Since the numbers tend to get rather long, it is common to write them in hexadecimal (base-16) rep- resentation: Each position represents suc- cessive powers of 16, with each hex symbol having a value from 0 to 15. Since you want a singlesymbol for each hex position, the symbols A-F are assigned to the values 10-15. To write a binary number in hex- adecimal, just group it in 4-bit groups, beginning with the LSB, and write the hexadecimal equivalent of each group: Hexadecimal representation is well suited to the popular "byte" (8-bit) organization of computers, which are most often orga- nized as 16-bit or 32-bit computer "words"; a word is then 2 or 4 bytes. An alphanu- meric character (letter, number, or symbol) is one byte. So in hexadecimal, each byte is 2 hex digits, a 16-bit word is 4 hex digits, etc. For example, in the widely used ASCII representation (more on 'that in Sec- tion 10.19),lower-case "a" is ASCII value 01100001 (61 hex, which we will write as 61H), "b" is 62H, etc. Thus the word "nerd" could be stored in a pair of 16- bit words, whose hex values are 6E65H and 7264~.As another example, the mem- ory locations in a computer with 65,536 ("64K) bytes of memory can be identified by a 2-byte address, since 216 = 65,536; the lowest address is OOOOH,the highest ad- dress is FFFFH,the second half of memory begins at 8000H,and the fourth quarter of memory begins at COOOH. You occasionally see "octal" (base-8) notation, a relic of an earlier era when computers used 12-bit and 36-bit words, with 6-bit alphanumeric representation. Although octal has the comfortable feature of using only familiar symbols (0-7), it is extremely awkward when applied to byte- organized words. Exercise 8.1 shows you why. EXERCISE 8.1 Begin by writing down the octal representation for ASCII "a" and "b" using the hex values
- 423. BASIC LOGIC CONCEPTS 8.03 Number codes 475 LOGIC LEVELS Thediagramshows therangesof voltagesthatcorrespond tothetwologic states(HIGHand L0W)for the most popular familiesof digital logic. For each logic family it is necessary to specify legal values of bothoutput andinput voltagescorresponding to the two statesHlGH andLOW. The shadedareas above the line show the specified range of output voltages that a logic LOW or HlGH is guaranteed to fall within, with the pair of arrows indicating typical output values (LOW, HIGH) encountered in practice. The shaded areas below the line show the range of input voltages guaranteed to be interpreted as LOW or HIGH, with the arrow indicating the typical logic threshold voltage, i.e., the dividing line between LOW and HIGH.In all cases a logic HlGH is more positive than a logic LOW. CMOS (4000.74C) v,,= + 5 HC fi,,, ~ v,,= + 5 I . , , , , , ECL 10,000 VEE= - 5.2 +5% A The meanings of "minimum," "typical,"and "maximum," in electronic specifications are worth a few words of explanation. Most simply, the manufacturer guarantees that the components will fall in the range minimum-maximum, with many close to "typical." What this means is that typical specificationsare what you use whendesigningcircuits; however, those circuits must work properly over the whole range of specifications from minimumto maximum(the extremes of manufacturing variability). In particular, a well-designedcircuit must function under the worst possible combination of minimum and maximum values. This is known as worst-case design, and it is essential for any instrument produced from off-the-shelf (i.e., not specially selected) components. 0 1 2 3 4 5
- 424. DIGITAL ELECTRONICS 476 Chapter 8 given earlier. Then write down the octal EXERCISE 8.2 representation of the 16-bit word formed by Convert to decimal: (a) 1110101.01102, puttingthetwobytesfor"ab"together. Why are (b) 11.01010101.. .2, (c) 2AH. Convert to the individual identities of the characters lost? binary: (a)102310, (b)1023H. Convert to hex- What is "ba" in octal? Now do the same things, adecimal: (a) 102310, (b) 1011101011012, but using hexadecimal notation. (c)61453i0. BCD Signed numbers noth her way to represent a umber is to Sign magnitude representation. Sooner encode each decimal digit into binary. 0, later it becomes necessary to represent This is called BCD (binary-coded decimal), negative numbers in binary, particularly in and it requires a 4-bit group for each digit. devices where some computation is done. For instance, The simplest method is to devote one bit 13Yl0 = 000100110111 (BCD) Note that BCD representation is not the same as binary representation, which in this case would be 13710 = 100010012. You can think of the bit positions (starting from the right) as representing 1, 2, 4, 8, 10, 20, 40, 80, 100, 200, 400, 800, etc. It is clear that BCD is wasteful of bits, since each 4-bit group could represent numbers 0 through 15, but in BCD never represents numbers greater than 9. However, BCD is ideal if you want to display a number in decimal, since all you do is convert each BCD character to the appropriate decimal number and display it. (There are many devices that do exactly this, e.g., a "BCD decoder, driver, and display," which is a little IC with a transparent top. You apply logic levels for your BCD character, and it lights up with the digit.) For this rea- son, BCD is commonly used for input and output of numeric information. Unfortu- nately, the conversion between pure binary and BCD is complicated, since each deci- mal digit depends on the state of almost every binary bit, and vice versa. Nev- ertheless, binary arithmetic is so efficient that most computers convert all input data to binary, converting back only when data need to be output. Think how much ef- (the MSB, say) to the sign, with the remain- ing bits representing the magnitude of the number. This is called "sign magnitude representation," and it corresponds to the way signed numbers are ordinarily written (see Table 8.1). It is used when numbers are displayed, as well as in some AID con- version schemes. In general, it is not the best method for representing signed num- bers, particularly where some computation is done, for several reasons: Computa- tion is awkward; subtraction is different from addition (i.e., addition doesn't "work" for signed numbers). Also, there can be two zeros (+0 and -0), so you have to be careful to use only one of them. Offset binary representation. A second method for representing signed numbers is "offset binary," in which you subtract half the largest possible number to get the value represented (Table8.1). This has the advantage that the number sequence from the most negative to the most positive is a simple binary progression, which makes it a natural for binary "counters." The MSB still carries the sign information, and zero appears only once. Offset binary is popular in AID and D/A conversions, but it is still awkward for computation. fort and bothe; would have been saved if 2's complement representation. The Homo sapiens had evolved with 8 (or 16) method most widely used for integer fingers! computation is called "2's complement."
- 425. BASIC LOGIC CONCEPTS 8.03 Number codes 477 TABLE 8.1. 4-BIT SIGNED INTEGERS IN THREE SYSTEMS OF REPRESENTATION Sign- Offset Integer magnitude binary +7 0111 1111 +6 0110 1110 +5 0101 1101 +4 0100 1100 +3 0011 1011 +2 0010 1010 +1 0001 1001 0 0000 1000 -1 1001 0111 -2 1010 0110 -3 1011 0101 4 1100 0100 -5 1101 0011 -6 1110 0010 -7 1111 0001 -8 - 0000 (-0) 1000 - 2's comp 0111 0110 0101 0100 0011 0010 0001 0000 1111 1110 1101 1100 1011 1010 1001 1000 - In this system, positive numbers are rep- resented as simple unsigned binary. The system is rigged up so that a negative num- ber is then simply represented as the binary number you add to a positive number of the same magnitude to get zero. To form a negative number, first complement each of the bits of the posi- tive number (i.e., write 1 for 0, and vice versa; this is called the "1's complement"), then add 1 (that's the "2's complement"). As you can see from Table 8.1, 2's complement numbers are related to offset binary numbers by having the MSB complemented. As with the other signed number representations, the MSB carries the sign information. There's only one zero, conveniently represented by all bits 0("clearing"a counter or register sets its value to zero). Arithmetic in 2's complement Arithmetic is simple in 2's complement. Toadd two numbers, just add bitwise (with carry), like this: To subtract B from A, take the 2's comple- ment of B and add (i.e., add the negative): 1011 (-5) (+5 = 0101: 1's comp = 1010, so 2's comp= 1011) - 1101 (-3) , Multiplication also "works right" in 2's complement representation. Try the fol- lowing exercise. EXERCISE 8.3 Multiply +2 by -3in3-bit 2'scomplementbinary arithmetic. Hint: The answer is -6. EXERCISE 8.4 Show that the 2's complement of -5 is +5. Because the 2's complement system is natural for computation, it is universally used for integer arithmetic in computers (note, however, that "floating point" num- bers are usually represented in a form of "sign magnitude," namely sign-exponent- mantissa). Gray code The following code is used for mechanical shaft-angle encoders, among other things. It is called a Gray code, and it has the property that only one bit changes in going from one state to the next. This prevents errors, since there is no way of guaranteeing that all bits will change simultaneously at the boundary between two encoded values. If straight binary were used, it would be possible to generate an output of 15 in going from 7 to 8, for instance. Here is a simple rule for
- 426. DIGITAL ELECTRONICS 478 Chapter 8 generating Gray-code states: Begin with a state of all zeros. To get to the next state, always change the single least significant bit that brings you to a new state. 0000 0001 0011 0010 0110 0111 0101 0100 1100 1101 1111 1110 1010 1011 1001 1000 Gray codes can be generated with any number of bits. They find use also in "par- allel encoding," a technique of high-speed AID conversion that you will see later. We will talk about translation between Gray- code and binary-code representations in the next section. 8.04 Gates and truth tables Combinational versus sequential logic In digital electronics the name of the game is generating digital outputs from digital inputs. For instance, an adder might take two 16-bit numbers as inputs and generate a 16-bit (plus carry) sum. Or you might build a circuit to multiply two numbers. These are the kinds of operations a computer's processing unit should be able to do. Another task might be to compare two numbers to see which is larger or to compare a set of inputs with the desired input to make sure that "all systems are go." Or you might want to attach a "parity bit" to a number to make the total number of 1's even, say, before transmission over a data link; then the parity could be checked on receipt as a simple check of correct transmission. Another typical task is to take some numbers expressed in binary and display, print, or punch them as decimal characters. All of these are tasks in which the output or outputs are predetermined functions of the input or inputs. As a class, they are known as "combinational" tasks. They can all be performed with devices called gates, which perform the operations of Boolean algebra applied to two-state (binary) systems. There is a second class of problems that cannot be solved by forming ,a combina- tional function of the inputs alone, but require knowledge of past inputs as well. Their solution requires the use of "sequen- tial" networks. Typical tasks of this type might be converting a string of bits in serial form (one after another) into a parallel set of bits, or keeping count of the number of 1's in a sequence, or recognizing a certain pattern in a sequence, or giving one output pulse for each four input pulses. All these tasks require digital memory of some sort. The basic device here is the "flip-flop"(the fancy name is "bistable multivibrator"). We will begin with gates and combina- tional logic, since they're basic to every- thing. Digital life will become more inter- esting when we get to sequential devices, but there will be no lack of fun and games with gates alone. OR gate The output of an OR gate is HIGH if either input (or both) is HIGH. This can be expressed in a "truth table," as shown in Figure 8.2. The gate illustrated is a 2-input OR gate. In general, gates can have any number of inputs, but the stan- dard packages usually contain four 2-input gates, three 3-input gates, or two 4-input gates. For instance, a Cinput OR gate will have a HIGH output if any one input (or more) is HIGH.
- 427. BASIC LOGIC CONCEPTS 8.04 Gates and truth tables 479 The Boolean symbol for OR is +. an inverter, a "gate" with only one input "A OR B" is written A +B. (Fig. 8.4). inputs output A g i o Figure 8.2 AND gate The output of an AND gate is HIGH only if both inputs are HIGH. The logic symbol and truth table are as shown in Figure 8.3. As with OR gates, AND gates are available with 3 or 4 (sometimes more) inputs. For instance, an 8-input AND gate will have a HIGH output only if all inputs are HIGH. B"=DoAND Inputs output I Figure 8.3 The Boolean symbol for AND is a dot (.); this can be omitted, and usually is. "A AND B" is written A B, or simply AB. INVERT Figure 8.4 The Boolean symbol for NOT is a bar over the symbol, or sometimes a prime symbol. "NOT A" is written 2,or A'. For the convenience of typesetters, the symbols 1, *, -, and ' are often used, in place of the overbar, to indicate NOT; thus, "NOT A" might be written as any of the following: A', -A,*A,/A, A*,A/. A given document will usually pick one of these alternatives and stick with it throughout. We have chosen the form A' for this book. NAND and NOR The INVERT function can be combined with gates, forming NAND and NOR (Fig. 8.5). These are actually more popular than AND and OR, as you will see shortly. BI QB NAND ANOR Figure 8.5 Inverter (the NOT function) Exclusive-OR Frequently we need the complement of Exclusive-OR is an interesting function, a logic level. That is the function of although less fundamental than AND and
- 428. DIGITAL ELECTRONICS 480 Chapter 8 OR (Fig. 8.6). The output of an exclusive- OR gate is HIGH if one or the other (but not both) input is HIGH (it never has more than two inputs). Another way to say it is that the output is HIGH if the inputs are different. The exclusive-OR gate is identical with modulo-2 addition of two bits. XOR A B l Q Figure 8.6 EXERCISE 8.5 Show how to use the exclusive-OR gate as an "optional inverter," i.e., it inverts an input signal or buffers it without inversion, dependingon the level at a control input. EXERCISE 8.6 Verify that the circuits in Figure 8.7 convert binary code to Gray code, and vice versa. 8.05 Discrete circuits for gates Before going on to discuss gate applica- tions, let's see how to make gates from discrete components. Figure 8.8 shows a diode AND gate. If either input is held LOW, the output is LOW. The output can go HIGH only when both inputs go HIGH. This circuit has many disadvantages. In particular: (a) Its LOW output is a diode drop above the signal holding the input LOW. Obviously you couldn't use very many of these in a row! (b) There is no "fanout" (the ability of one output to b~nary Gray Gray binary Figure 8.7. Parallel code converters: binary to Gray and Gray to binary. + "cc Figure 8.8 drive several inputs), since any load at the output is seen by the signal at the input. (c) It is slow, because of resistive pull- up. As a general rule, you cannot do as well with logic constructed from dis- crete components as with IC logic. Part of the superiority of IC logic lies in the use of special techniques (e.g., ion
- 429. BASIC LOGIC CONCEPTS 8.06 Gate circuit example 481 implantation) to achieve excellent per- formance. Figure 8.9 shows the simplest form of transistor NOR gate. This circuit was used in the family of logic known as RTL (resistor-transistor logic), which was popular in the 1960s because of its low price, but is now obsolete. A HIGH at either input (or both) turns on at least one transistor, pulling the output LOW. Since this gate is intrinsically inverting, you would have to add an inverter, as shown, to make an OR gate. Although the discrete gate circuits just illustrated are simple to understand, you wouldn't use them in practice because of their disadvantages. In fact, except in rare circumstances you would never construct gates (or any other logic) from discrete components, since a full range of excel- lent logic is available as inexpensive and compact integrated circuits, as we will see shortly. Currently the most popular IC logic circuits are built with complemen- tary MOSFETs ("CMOS"). Look back at Figure 3.59 to remind yourself how you would make a CMOS NAND gate. 8.06 Gate circuit example Let's work out a circuit to perform the logic we gave as an example in Chapters 1 and 2: the task to sound a buzzer if either car door is open and the driver is seated. The answer is obvious if you restate the problem as "output HIGH if either the left door OR the right door is open, AND driver is seated," i.e., Q = (L + R)S. Figure 8.10 shows it with gates. The output of the OR gate is HIGH if one OR the other door (or both) is open. If that is so, AND the driver is seated, Q goes HIGH. With an additional transistor, this could be made to sound a buzzer or close a relay. In practice, the switches generating the inputs will probably close a circuit to ground, to save extra wiring (there are additional reasons, particularly in the case of the popular TTL logic, and we will get to them shortly). This means that the inputs will go LOW when a door is opened, for example. In other words, we have "negative-true" inputs. Let's rework the example with this in mind, calling the inputs L', R', and S'. First, we need to know if either door input (L', R') is LOW; i.e., we must distin- guish the state "both inputs HIGH" from all others. That's an AND gate. So we make L' and R' the inputs to an AND gate. The output will be LOW if either input is LOW; call that EITHER'. Now we need to know when EITHER' is LOW and S' + "cc I Add inverter t o make OR gate Figure 8.9
- 430. DIGITAL ELECTRONICS 482 Chapter 8 Figure 8.10 is LOW; i.e., we must distinguish the state "both inputs LOW"from all others. That's an OR gate. Figure 8.11 shows the circuit. We have used a NOR gate, instead of an OR gate, to get the same output as ear- lier: Q HIGH when the desired condition is present. Something strange seems to be going on here, though. We have used AND instead of OR (and vice versa), as com- pared with the earlier circuit. Section 8.07 should clarify the matter. First, consider the following exercise. EITHER :=D==-. -Figure 8.11 EXERCISE 8.7 What do the circuits shown in Figure 8.12 do? Gate interchangeability When designing digital circuits, keep in mind that it is possible to form one kind of gate from another. For example, if you need an AND gate, and you have half of a 7400 available (quad 2-input NAND), you can substitute as shown in Figure 8.13. The second NAND functions as an inverter, making AND. The following exercises should help you explore this idea. EXERCISE 8.8 Using Binput gates, show how to make (a) INVERT from NOR, (b)OR from NORs, and (c) OR from NANDs. E & F Figure 8.12 1 Figure 8.13 EXERCISE 8.9 Show how to make (a) a 3-input AND from 2-input ANDs, (b) a 3-input OR from 2-input ORs, (c) 3-input NOR from Pinput NORs, and (d) a 3-input AND from 2-input NANDs. In general, multiple use of one kind of inverting gate (e.g., NAND) is enough to make any combinational function. How- ever, this isn't true for a noninverting gate, since there's no way to make INVERT. This probably accounts for the greater pop- ularity of NAND and NOR in logic de- sign. 8.07 Assertion-levellogic notation An AND gate has a HIGH output if both inputs are HIGH. So, if HIGH means "true," you get a true output only if all inputs are true. In other words, with positive-true logic, an AND gate performs the AND function. The same holds for OR.
- 431. BASIC LOGIC CONCEPTS 8.07 Assertion-level logic notation 483 What happens if LOW means "true," as in the last example? An AND gate gives a LOW if either input is true (LOW): It's an OR function! Similarly an OR gate gives a LOW only if both inputs are true (LOW). It's an AND function! Very con- fusing. There are two ways to handle this problem. The first way is to think through any digital design problem as we did earlier, choosing the kind of gate that gives the needed output. For instance, if you need to know if any of three inputs is LOW, use a 3-input NAND gate. This method is still used by some misguided designers. When designing this way, you would draw a NAND gate, even though the gate is performing a NOR function on the (negative-true) inputs. You would probably label the inputs as in Figure 8.14. In this example, CLEAR', MR' (master reset), and RESET' might be negative-true levels coming from various places in a circuit. The output, CLR, is positive-true and will go to the devices that are to be cleared if any of the reset signalsgoes LOW (true). - RESET n C L E A R Figure 8.14 The second way to handle the problem of negative-true signals is to use"assertion- level logic." If a gate performs an OR function on negative-true inputs, draw it that way, as in Figure 8.15. The 3- input OR gate with negated inputs is functionally identical with the preceding 3-input NAND. That equivalence turns out to be an important logical identity, as stated in DeMorgan's theorem, and we will spell out a number of such useful identities shortly. For now, it is enough to know that you can change AND to OR (and - n C L E A R Figure 8.15 vice versa) if you negate the output and all inputs (see Table 8.2). Assertion-level logic looks forbidding at first, because of the proliferation of funny-looking gates. It is better, though, because the logical functions of the gates in the circuit stand out clearly. You'll find it "friendly" after you've used it for a while, and you won't want to use anything else. Let's rework the car door example again with assertion- level logic (Fig. 8.16). The gate on the left determines if L or R is true, i.e., LOW, giving a negative-true output. The second gate gives a HIGH output if both (L + R) and S are true, i.e., LOW. From DeMorgan's theorem (after a while you won't even need that, you'll recognize these gates as equivalent) the first gate is AND, the second is NOR, just as in the circuit drawn earlier. Two important points: 1. Negative-true doesn't mean that the logic levels are negative polarity. It means that the lower of the two states (LOW) stands for TRUE. 2. The symbol used to draw the gate itself assumes positive-true logic. A NAND gate used as an OR for negative-true signals can be drawn as a NAND or, using assertion-level logic, as an OR with negation symbols (little circles) at the inputs. In the latter case you think of the circles as indicating inversion of the input signals, followed by an OR gate operating on positive-true logic as originally defined. Figure 8.16
- 432. DIGITAL ELECTRONICS 484 Chapter 8 TABLE 8.2 COMMON GATES IN THE Tn AND CMOS FAMILIES INegatlve No Pari number true Name Express~on Symbd symbol Type ,"; :tz: 74xx - ALS AS F LS C AClTl HCm IAND 4-input - NAND A6 Cinput 8-~nput 13-input 4-input - NOR A t B c- 3 3 ;:;:;::4-input 5-Input 8-input J J J J J J i J J J J J 4 J J J J J J J J J J 9 J J J J J r J J J J J d 4 J J J J J J J J r J J J J J J r J J J J J J i J J J i 4 i J J INVERT A 6 406914049 7404 J J J J J J 8 74240 J J J . :IBUFFER A -I> -D- XOR A @ B 4 4070 74861386 J J J J J i D D 2-input - (-1351 XNOR A @ B 2-lnput 4 4077 74266 J J (- 135) AOI 2-2-lnput 2 4085 7450151 i J i 2-2-2-2-~nput 1 4086 7453154 J Postscript: Logical AND and OR shouldn't be confused with the legal equiv- alents. The weighty legal tome known as Words and Phrases has over 40 pages of situations in which AND can be construed as OR. For example: "OR will be construed AND, and AND will be construed OR, as the necessities of the case may require... ." This isn't the same as DeMorgan's theo- rem! circuits offering an enormous variety of Ifunctions in both families. These fami- ' lies should satisfy your needs for all dig- ! ital design, with the exceptions of some large-scale integration (LSI), which uses ei- ther CMOS or NMOS logic, and ultra- high-speed logic, where GaAs devices and [ emitter-coupled logic (ECL) reign supreme. Throughout the rest of the book we will rely heavily on these families. TTL AND CMOS 8.08 Catalog of common gates TTL (transistor-transistor logic) and Table 8.2 shows the common gates you CMOS (complementary MOS) are the two can get in the TTL and CMOS families most popular logic families in current use, of digital logic. Each gate is drawn in . with at least 10 manufacturers of integrated its normal (positive-true) incarnation, and
- 433. TTL AND CMOS 8.09 IC gate circuits 485 also the way it looks for negative-true logic. The last entry in the table is an AND- OR-INVERT gate, sometimes abbreviated AOI. A word of explanation: Digital logic is available in 10 popular subfamilies (CMOS: 4000B, 74C, 74HC, 74HCT, 74AC, 74ACT; and TTL: 74LS, 74ALS, 74AS, 74F), all offering the same functions and with a pretty good degree of compati- bility between them. The differences have to do with speed, power dissipation, out- put drive capability, and logic levels (see Sections 8.09 and 9.02). The best type for most applications is currently "high- speed CMOS," specified by adding the let- ters HC after the digits 74, e.g., 74HC00. Where compatibility with existing bipolar TTL is required, however, you should use the HCT (or possibly LS) subfamily. For simplicity we will routinely omit such let- ters (and the 74- prefix) in this book, indi- cating digital IC types with an apostrophe, e.g., '00 for a 2-input NAND. Note that the original TTL ("7400 family" - no letters after the "74") is obsolete. We'll describe the interesting history of these families in Section 9.01. 8.09 IC gate circuits Although a NAND gate, for instance, performs identical logic operations in the variousTTL and CMOS versions, the logic levels and other characteristics (speed, power, input current, etc.) are quite different. In general, you have to be careful when mixing logic family types. To understand the differences, look at the schematicsof a NAND gate in Figure 8.17. The CMOS gate is constructed from enhancement-mode MOSFETs of both polarities, connected as switches rather than followers. An ON FET looks like a low resistance to whichever supply rail it is connected. Both inputs must be HIGH to turn on the series pair Q3Q4and to turn off both of the pull-up transistors Q1Q2. That produces a LOW at the output, i.e., it NAND I Inverter B Figure 8.17. A. LS TTL NAND gate. B. CMOS AND gate. is a NAND gate. Q5 and Q6constitute the standard CMOS inverter, to generate an AND gate. From this example it should be evident how to generalize to AND, NAND, OR, and NOR with any number of inputs. EXERCISE 8.10 Draw the circuit of a 3-input CMOS OR gate. The bipolar LS (low-power Schottky) TTL NAND basicallyconsists of the diode- resistor logic of Figure 8.8 driving a transistor inverter followed by a push-pull
- 434. DIGITAL ELECTRONICS 486 Chapter 8 output. If both inputs are HIGH, the 20k resistor holds Q1 on, thus producing a LOW output by saturating Q4and shutting off Darlington QzQ3. If at least one input is LOW, Q1 is held off, thus producing a HIGH output by follower action of Q2Q3 combined with Q4being held off. Schottky diodes and Schottky-clamped transistors are used throughout for enhanced speed. Note that both CMOS and bipolar TTL gates have an output circuit with "active pullup" to the positive supply rail, unlike our discrete gate examples. 8.10 TTL and CMOS characteristics Let's compare family characteristics: Supply voltage. The bipolar TTL fami- lies require +5 volts, f5%, whereas the CMOS families have a wider range: +2 to +6 volts for HC and AC, +3 to +15 volts for 4000B and 74C. The HCT and ACT CMOS families, designed for compatibil- ity with bipolar TTL (see below), require +5 volts. Input. A TTL input held in the LOW state sources current into whatever drives it (0.25mA typ for LS), so to pull it LOW you must sink current. Since the TTL output circuit (a saturated npn transition) is good at sinking current, this presents no problem when TTL logic is wired together, but you must keep it in mind when driving TTL with other circuitry. By contrast, CMOS has no input current. The TTL input logic threshold is about two diode drops above ground (about 1.3V), whereas most CMOS families have their threshold nominally at half the sup- ply voltage (though with considerable spread, typically 113 to 213 the supply voltage). The HCT and ACT CMOS fami- lies are designed with a low threshold sim- ilar to bipolar TTL for compatibility, since a bipolar TTL output does not swing all the way to +5 volts (see below). CMOS inputs are susceptible to damage from static electricity during handling. In both families, unused inputs should be tied HIGH or LOW, as necessary (more on this later). Output. The TTL output stage is a sat- urated transistor to ground in the LOW state, and a (Darlington) follower in the HIGH state (two diode drops below V+). For all CMOS families (including HCT and ACT) the output is a turned-on MOSFET, either to ground or to V+; i.e., rail-to-rail output swings. In general, the faster families (F, AS; AC, ACT) have greater output drive capability than the slower families (LS; 4000B, 74C, HC, HCT). Speed and power. The bipolar TTL families consume considerable quiescent current, more for the faster families (AS and F); the corresponding speeds go from about 25MHz (for LS) to about 1OOMHz (for AS and F). All CMOS families consume zero quiescent current. However, their power consumption rises linearly with increasing frequency (switching capacitive loads re- quires current), and CMOS operated near its upper frequency limit often dissipates as much power as the equivalent bipo- lar TTL family (Fig. 8.18). The speed range of CMOS goes from about 2MHz (for 4000B174C at 5V)to about lOOMHz (for ACIACT). In general, the nice characteristics of CMOS (zero quiescent current, rail-to-rail output swings, good noise immunity) make it the logic of choice, and we recommend the HC family for most new designs. However, for greater speed, use AC; for wide supply range where high speed is not needed, use 74C or 4000B; use HCT (or perhaps LS) for compatibility with bipolar TTL outputs, unless you need the speed of ACT (or AS or F). In some
- 435. TTL AND CMOS 8.11 Three-state and open-collector devices 487 frequency (Hz) Figure 8.18. Gate power dissipation versus frequency. high-density applications (memory, micro- processor), NMOS devices are preferred, in spite of their relatively high power dis- sipation. And for the highest-speed appli- cations (above 100MHz) you are forced to use either ECL, which goes up to about SOOMHz, or logic based on GaAs, which is usable to about 4GHz. See Section 14.15 and Table 9.1 for further discussion of CMOS logic families. Within any one logic family, outputs are designed to drive other inputs easily, so you don't often have to worry about thresholds, input current, etc. For instance, with TTL or CMOS, any output can drive at least 10 other inputs (the official term for this isfanout: TTL has a fanout of lo), so you don't have to do anything special to ensure compatibility. In the next chap- ter we will go into the issue of interfacing between logic families and between logic circuits and the outside world. 8.11 Three-state and open-collector devices The TTL and CMOS gates we have just discussed have push-pull output circuits: The output is held either HIGH or LOW by an ON transistor or MOSFET. Nearly all digital logic uses this sort of circuit (called active pullup; in TTL it's also called a totem-pole output) because it provides low output impedance in both states, giving faster switching time and better noise immunity, as compared with an alternative such as a single transistor with passive collector pullup resistor. In the case of CMOS, it also results in lower power dissipation. However, there are a few situations for which active pullup output is unsuitable. As an example, imagine a computer system in which several functional units have to exchange data. The central processor (CPU), memory, and various peripherals all need to be able to send and receive 16- bit words. It would be awkward (to put it mildly) to have separate 16-wire cables connecting each device to all others. The solution is the so-called data bus, a single set of 16 wires accessible to all devices. It's like a telephone party line: Only one device at a time may "talk" (assert data), but all may "listen" (receive data). With a bus system there must be agreement as to who may talk, and words like "bus arbitrator," "bus master," and "control bus" pop up. You can't use gates (or any other de- vices) with active pullup outputs to drive a bus, since you couldn't disconnect your output from the shared data lines (you're holding it either HIGH or LOW at all times). What's needed is a gate whose output can be "open." Such devices are available, and they come in two varieties, "three-state devices" and "open-collector devices." Three-statelogic Three-state logic, also called TRI-STATE logic (a trademark of National Semicon- ductor Corporation, who invented it), provides an elegant solution. The name is misleading; it is not digital logic with three voltagelevels. It's just ordinary logic,
- 436. DIGITAL ELECTRONICS 488 Chapter 8 with a third output state: open circuit (Fig. 8.19). A separate enable input de- termines whether the output behaves like an ordinary active pullup output or goes into the "third" (open) state, regardless of the logic levels present at the other inputs. Three-state outputs are available on many digital chips, including counters, latches, registers, etc., as well as on gates and in- verters. A device with three-state output behaves exactly like ordinary active pullup logic when enabled, always driving its out- put either HIGH or LOW; when disabled, it effectively disconnects its output, so an- other logic device can drive the same line. Let's look at an example. A look ahead: data buses Three-state drivers are widely used to drive computer data buses. Every device (memory, peripherals, etc.) that needs to put data on the (shared) bus ties onto it with three-state gates (or more complex functions such as "registers"). Things are cleverly arranged so that at most one device has its drivers enabled at any instant, all other devices being disabled into the open (third) state. In a typical situation the selected device "knows" to assert data onto the bus by recognizing its particular address on a set of address and control lines (Fig. 8.20). In this simplified -JJy"output{?:OPEN DISABLE A case the device is wired as port 6: It looks at address lines Ao-A2 and asserts data onto data bus Do through D3 when it sees its particular address (i.e., 6) on the address lines and it sees a READ pulse. Such a bus protocol is adequate for many simple systems. Something like this is used in most microcomputers, as you will see in Chapters 10 and 11. Note that there must be some external logic to make sure that three-state devices sharing the same output lines don't try to talk at the same time (that undesirable con- dition is officially called "bus contention"). In this case all is well as long as each device responds to a unique address. Open-collector logic The predecessor to three-state logic was "open-collector" logic, which allows you to share a single line among the outputs of several drivers. An open-collector (or open-drain) output simply omits the active pullup transistor of the output stage (Fig. 8.2 1). The name "open-collector"is a good one. When you use such gates, you must supply an external pullup resistor somewhere. Its value isn't critical; a small- value resistor gives increased speed and improved noise immunity, at the expense of increased power dissipation and loading DISABLE ( = ENABLE) 8 Figure 8.19. Three-state CMOS NAND gate. A. Conceptual diagram. B. Realization with internal CMOS gates.
- 437. TTL AND CMOS 8.11 Three-stateand open-collectordevices 489 Dl D2D3 ]data A , 1a.r A 2 read u control (read) data 3 data2 data 1 data 0 Figure 8.20. Data bus. data to be sent onto bus 2-input open-collector NANDs for the three-state drivers of Figure 8.20, bringing one input of each gate HIGH to enable the gates onto the bus; note that the data then asserted onto the bus are inverted. Each bus line would need a resistive pullup to A Q +5 volts. symbol The disadvantage of open-collector logic is that speed and noise immunity are degraded, when compared with logic constructed with active pullup devices, because of the resistive pullup circuit. That's why three-state drivers are nearly universally favored for computer bus - applications. However, there are three situations in which you would choose open-collector (or open-drain) devices: driving external loads, "wired-OR," and external buses. Let's look at them briefly. Figure 8.21. LS TTL open-collector NAND. Driving external loads of the driver. Values of a few hundred to a few thousand ohms are typical. If Open-collector logic is good for driving you wanted to drive a bus with open- external loads that are returned to a collector gates, you would substitute higher-voltage positive supply. You might
- 438. DIGITAL ELECTRONICS 490 Chapter 8 want to drive a low-current lamp that requires 12 volts, or perhaps just generate a 15 volt logic swing by running a resistor from a gate's output to +15 volts, as in Figure 8.22. For example, the '06 is an open-collector hex inverter with 30 volt breakdown rating, and the CMOS 40107 is a dual-NAND open-drain buffer with up to 120mA sink capability. The 75450 series of "dual peripheral drivers" can sink up to 300mA from loads returned to +30 volts, and the UHPJUDN series from Sprague extends this to more than 1 amp and 80 volts. More on these subjects in the next chapter. Figure 8.22 If you wire together some open-collector gates as shown in Figure 8.23, you get what's called "wired-OR" - the combina- tion behaves in this case like a larger NOR gate, with the output going LOW if any in- put is HIGH. You can't do this with active pullup outputs, because there would be a contest of wills, if all the gates didn't agree on what the output should be. You can combine NORs, NANDs, etc., with this kind of connection, and the output will be LOW if any gate asserts a LOW out- put. This connection is sometimes called "wired-AND," since the output is HIGH only if all gates have HIGH (open)outputs. Both names are describing the same thing: It's wired-AND for positive-true logic and wired-OR for negative-true logic. This will make more sense to you after you've seen DeMorgan7stheorem, in the next section. Figure 8.23. Wired-OR. Wired-OR enjoyed some brief popular- ity in the early days of digital electronics, but it is not much used today, with two ex- ceptions: (a) In the family of logic known as ECL (emitter-coupled logic) the outputs are what you might call "open-emitter," and can be wired-OR'ed painlessly, and (b) there are some shared lines in computer buses (most notably the line called inter- rupt) whose function is not to transfer data bits, but merely to indicate if at least one device is requesting attention; in that case you use wired-OR, since it does what you want and doesn't require external logic to prevent contention. External buses Where speed is not too important, you sometimes see open-collector drivers used to drive buses. This is often the case for buses that carry data out of computers; common examples are the buses used to connect to computer disk drives, and the IEEE-488 (also called "HPIB" or "GPIB") instrument bus. More on this in Chapters 10 and 11. COMBINATIONAL LOGIC As we discussed earlier in Section 8.04, digital logic can be divided into combina- tional and sequential. Combinational cir- cuits are those in which the output state
- 439. COMBINATIONAL LOGIC 8.12 Logic identities 491 depends only on the present input states in some predetermined fashion, whereas in sequential circuits the output state de- pends both on the input states and on the previous history. Combinational cir- cuits can be constructed with gates alone, whereas sequential circuits require some form of memory (flip-flops). In these sec- tions we will explore the possibilities of combinational logic before entering the turbulent world of sequential circuits. 8.12 Logic identities No discussion of combinational logic is complete without the identities shown in Table 8.3. Most of these are obvious. The last two compose DeMorgan's theorem, the most important for circuit design. OR function from ordinary gates. Fig- ure 8.24 shows the XOR truth table. From studying this, and by realizing that the out- put is 1only when (A,B ) = (0,l)or (1,O), we can write ACBB=ZB+AB from which we have the realization shown in Figure 8.25. However, this realization is not unique. Applying the identities, we find A @ B = A 2 + A B + B X + B B (AX = BB= 0) = A@+ B)+B(X+ B) = A ( A ) +B(A) = (A + B ) ( A ) TABLE 8.3. LOGIC IDENTITIES ABC = (AB)C = A(BC) AB = BA AA = A A1 = A A0 = 0 A(B+C) = A6 + AC A + A B = A A + BC = (A + B)(A + C) A + B + C = ( A + B ) + C = A + ( B + C ) A + B = B + A A + A = A A + l = l A + O = A 1' = 0 0' = 1 A + A ' = 1 AA'=O (A')'= A A + A ' B = A + B (A + 6)' = A '6' (AB)' = A' + B' Example: exclusive-OR gate We will illustrate the use of the identities with an example: making the exclusive- Figure 8.24. XOR. Figure 8.25. XOR realization. (In the first step we used the trick of adding two quantities that equal zero; in the third step we used DeMorgan's theorem.) This has the realization shown in Figure 8.26. There are still other ways to construct XOR. Consider the following exercise.
- 440. DIGITAL ELECTRONICS 492 Chapter 8 Figure 8.26. XOR realization. EXERCISE 8.11 Show that A@B=AB+XB A ~ B =( A + B ) ( Z + B ) by logic manipulation. You should be able to convince yourself that these are true by inspection of the truth table, combined with suitable hand-waving. EXERCISE 8.12 What are the following: (a) 0 . 1, (b) 0 + 1, (c) 1 . 1, (d) 1 + 1, (e) A(A + B ) , (f) A(A1+B),(g)A XOR A,(h) A XOR A' ? 8.13 Minimization and Karnaugh maps Since a realization of a logic function (even one as simple as exclusive-OR) isn't unique, it is often desirable to find the simplest, or perhaps most conveniently constructed, circuit for a given function. Many good minds have worked on this problem, and there are several methods available, including algebraic techniques that can be coded to run on a computer. For problems with four or fewer inputs, a Karnaugh map provides one of the nicest methods; it also enables you to find a logic expression (if you don't know it) once you can write down the truth table. We will illustrate the method with an example. Suppose you want to generate a logic circuit to count votes. Imagine that you have three positive-true inputs (each either 1 or 0) and an output (0 or 1). The output is to be 1 if at least two of the inputs are 1. Step 1. Make a truth table: All possible permutations must be repre- sented, with corresponding output(s). Write an X (= "don't care") if either out- put state is OK. Step 2. Make a Karnaugh map. This is somewhat akin to a truth table, but the variables are represented along two axes. Furthermore, they are arranged in such a way that only one input bit changes in going from one square to an adjacent square (Fig. 8.27). Figure 8.27. Karnaugh map. Step 3. Identify on the map groups of 1's (alternatively, you could use groups of 0's): The three blobs enclose the logic expressions AB, AC, and BC. Finally, read off the required function, in this case with the realization shown in Figure 8.28. The result seems obvious, in retrospect. We could have read off the pattern of 0's to get instead
- 441. COMBINATIONAL LOGIC 8.14 Combinational functions available as ICs 493 which might be useful if the complements A', B', and C' already exist somewhere in the circuit. Figure 8.28 Some comments on Karnaugh maps I. Look for groups of 2, 4, 8, etc., squares; they have the simple logic expressions. 2. The larger the block you describe, the simpler the logic. 3. The edges of the Karnaugh map connect up. For instance, the map in Figure 8.29 is described by Q = B'C. Figure 8.29 4. A block of 1's with only one or two 0's may be best described by the grouping illustrated in Figure 8.30, which corresponds to the logic expression Q = A(BCD)' 5. Xs (don't care) are "wild cards." Use them as 1's or 0's to generate the simplest logic. Figure 8.30 6. A Karnaugh map may not lead directly to the best solution: A more complicated logic expression may sometimes have a simpler realization in gates, e.g., if some of its terms already exist as logic in your circuit, and you can exploit intermediate outputs (from other terms) as inputs. Furthermore, exclusive-OR realizations are not always obvious from Karnaugh maps. Finally, package constraints (e.g., the fact that four 2-input gates come in a single IC) also figure into the choice of logic used in the final circuit realization. When programmable logic devices such as PALS(Section 8.15) are used to construct logic functions, the internal structure (pro- grammable AND; fixed OR) constrainsthe realization that can be used. EXERCISE 8.13 Draw a Karnaugh map for logic to determine if a 3-bit integer (0to 7) is prime (assume that 0,1, and 2 are not primes). Show a realization with 2-input gates. EXERCISE 8.14 Find logic to perform multiplication of two 2-bit unsigned numbers (i.e., each 0 to 3), producing a 4-bit result. Hint: Use a separate Karnaugh map for each output bit. 8.14 Combinational functions available as ICs Using Karnaugh maps, you can construct logic to perform rather complicated func- tions such as binary addition or magnitude comparison, parity checking, multiplexing
- 442. DIGITAL ELECTRONICS 494 Chapter 8 (selecting one of several inputs, as deter- mined by a binary address), etc. In the real world the most frequently used com- plex functions are available as single MSI functions (medium-scale integration, up- ward of 100 gates on one chip). Although many of the MSI functions involve flip-flops, which we will get to shortly, lots of them are combinational functions involving only gates. Let's see what animals live in the MSI combinational zoo. Figure 8.31. Quad 2-input select. Quad 2-input select The quad 2-input select is a very useful chip. It is basically a 4-pole 2-position switch for logic signals. Figure 8.31 shows the basic idea. When SELECT is LOW, the A inputs are passed through to their respective Q outputs. For SELECT HIGH, the B inputs appear at the output. ENABLE' HIGH disables the device by forcing all outputs LOW. This is an im- portant concept you will see more of later. Here's the truth table, which illustrates the X (don't care) entry: L L H X H L H X L L H X H 1 Inputs Outputs Figure 8.31 and the preceding table correspond to the '1 57 quad 2-input select chip. The same function is also available with inverted output ('158) and with 3- state outputs (true: '257; inverted: '258). E' SEL An Bn EXERCISE 8.15 Show how to make a 2-input select from an AND-OR-INVERT gate. n Although the function of a select gate can be performed by a mechanical switch in some cases, the gate is a far better solu- tion, for several reasons: (a) it is cheaper; (b) all channels are switched simultane- ously and rapidly; (c) it can be switched, nearly instantaneously, by a logic level gen- erated elsewhere in the circuit; (d) even if the select function is to be controlled by a front-panel switch, it is better not to run logic signals around through cablesand switches, to avoid capacitive signal degra- dation and noise pickup. With a select gate actuated by a dc level, you keep logic sig- nals on the circuit board and get the bonus of simpler off-board wiring (a single line with pullup switched to ground by an SPST switch). Controlling circuit functions with externally generated dc levels in this man- ner is known as "cold switching," and it is a much better approach than control- ling the signals themselves with switches, potentiometers, etc. Besides its other ad- vantages, cold switching lets you bypass control lines with capacitors to eliminate interference, whereas signal lines cannot generally be bypassed. You will see some examples of cold switching later. Transmission gates As we discussed in Sections 3.11 and 3.12, with CMOS it is possible to make "transmission gates," simply a pair of
- 443. COMBINATIONAL LOGIC 8.14 Combinational functions available as ICs 495 complementary MOSFET switches in parallel, so that an input (analog) signal between ground and VDD is either con- nected through to the output through a low resistance (a few hundred ohms) or open- circuited (essentially infinite resistance). As you may remember, such a device is bi- directional and doesn't know (or care) which end is input and which end is out- put. Transmission gates work perfectly well with digital CMOS levels and are used extensively in CMOS design. Figure 8.32 shows the layout of the popular 4066 CMOS"quad bilateral switch." Each switch has a separate "control" input; in- put HIGH closes the switch, and LOW opens it. Note that transmission gates are merely switches, and therefore have no fanout; i.e., they simply pass input logic levels through to the output, without pro- viding additional drive capability. Multiplexers The 2-input select gate is also known as a 2-input multiplexer. Multiplexers are also available with 4, 8, and 16 inputs (the 4- input variety comes as a dual unit, 2 in one package). A binary address is used to select which of the input signals appears at the output. For instance, an 8-input multiplexer has a 3-bit address input to address the selected data input (Fig. 8.33). The digital multiplexer illustrated is a '151. It has a STROBE (another name for ENABLE) input (negative-true), and it provides true and complemented outputs. When the chip is disabled (STROBE held HIGH), Q is LOW and Q' is HIGH, independent of the states of the address and data inputs. Figure 8.32. Quad transmission gate. address outputs With transmission gates you can make 2-input (or more) select functions, usable with CMOS digital levelsor analog signals. To select among a number of inputs, you can use a bunch of transmission gates (generating the control signals with a "decoder,"as will be explained later). This is such a useful logic function that it has been institutionalized as the"multiplexer," which we will discuss next. EXERCISE 8.16 Show how to make a 2-input select with trans- mission gates. You will need an inverter. Figure 8.33. 8-input multiplexer. In CMOS, two varieties of multiplex- ers are available. One type is for dig- ital levels only, with an input threshold and "clean" regeneration of output levels according to the input state; that's also the way all TTL functions work. An ex- ample is the '153 TTL multiplexer. The other kind of CMOS multiplexer is ana- log and bidirectional; it's really just an array of transmission gates. The 4051- 4053 CMOS multiplexers work this way (remember that logic made from trans- mission gates has no fanout). Since
- 444. DIGITAL ELECTRONICS 496 Chapter 8 transmission gates are bidirectional, these it to one of several possible outputs, ac- multiplexers can be used as "demultiplex- cording to an input binary address. ers," or decoders. We will discuss them The other outputs are either held in the next. inactive state or open-circuited, depending EXERCISE 8.17 Show how to make a 4-input multiplexer using (a)ordinarygates,(b)gateswith3-stateoutputs, and (c) transmissiongates. Under what circum- stances would(c) be preferable? You might wonder what to do if you want to select among more inputs than are provided in a multiplexer. This question comes under the general category of chip "expansion" (using several chips that have small individual capabilities to generate a larger capability), and it applies to decoders, memories, shift registers, arithmetic logic, and many other functions as well. In this case the job is easy (Fig. 8.34). Here we have expanded two 74LS151 8-input multiplexers into a 16- input multiplexer. There's an additional address bit, of course, and you use it to enable one chip or the other. The disabled chip holds its Q LOW, so an OR gate at the output completes the expansion. With three-state outputs the job is even simpler, since you can connect the outputs directly together. Demultiplexers and decoders A demultiplexer takes an input and routes on the type of demultiplexer. A decoder is similar, except that the address is the only input, and it is "decoded" to assert one of n possible outputs. Figure 8.35 shows an example. This is the '138 "1-of-8 decoder." The output corresponding to (addressed by)the 3-bit input data is LOW; all others are HIGH. This particular decoder has three ENABLE inputs, all of which must be as- serted (two LOW, one HIGH); otherwise all outputs are HIGH. A favorite use of the decoder is to cause different things to hap- pen, depending on the state of a "counter" chip that drives it (more on this, soon). Decoders are commonly used when inter- facing to microprocessor, to trigger differ- ent actions depending on the address; we'll treat this subject in detail in Chapter 10. Another common use of a decoder is to en- able a sequence of actions in turn, accord- ing to an advancing address given by the output of a binary counter (Section 8.25). A close cousin of the '138 is the '139, a dual 1-of-4 decoder with a single LOW-true enable per section. Figure 8.36 shows how to use a pair of '138 1-of-8 decoders to generate a 1-of-16 de- coder. No external gates are necessary, Figure 8.34. Multiplexerexpansion.
- 445. COMBINATIONAL LOGIC 8.14 Combinational functions available as ICs 497 + / 1-of-8 decoded output Figure 8.35. 1-of-8 decoder. Figure 8.36. Decoder expansion. since the '138 has enable inputs of both polarities. EXERCISE 8.18 More expansion: Make a 1-of-64 decoder from nine '138s. Hint: Useoneof themas anenabling switchyard for the others. In CMOS logic, the multiplexers that use transmission gates are also demulti- plexers, since transmission gates are bidirectional. When they are used that way, it is important to realize that the out- puts that aren't selected are open- circuited. A pullup resistor, or equivalent, must be used to assert a well-defined logic level on those outputs (the same requirement as with TTL open-collector gates). There is another kind of decoder gen- erally available in all logic families. An example is the '47 "BCD-to-7-segment de- coderldriver." It takes a BCD input and generates outputs on 7 lines correspond- ing to the segments of a "7-segment dis- play" that have to be lit to display the decimal character. This type of decoder is really an example of a "code converter," but in common usage it is called a decoder. Table 8.6 at the end of the chapter lists most available decoders. EXERCISE 8.19 Design a BCD-to-decimal (1-of-10) decoder using gates. Priority encoder The priority encoder generates a binary code giving the address of the highest- numbered input that is asserted. It is particularly useful in "parallel-conversion" AID converters (see next chapter) and in microprocessor system design. An example is the '148 8-input (3 output bits) priority encoder. The '147 encodes 10 inputs. EXERCISE 8.20 Design a "simple" encoder: a circuit that outputs the (2-bit) address telling which of 4 inputsis HIGH(allother inputs mustbe LOW). Adders and other arithmetic chips Figure 8.37 shows a "4-bit full adder." It adds the 4-bit number Ai to the 4-bit number Bi,generating a 4-bit sum Si plus carry bit C,.Adders can be "expanded" to add larger numbers: The "carry-in" input Ciis provided to accept the carry out of the next lower adder. Figure 8.38 shows how you would add two 8-bit numbers.
- 446. DIGITAL ELECTRONICS 498 Chapter 8 L +S output Figure 8.37. 4-bit full adder. digital signal processing is the so-called MAC (multiplier-accumulator), which accumulates a sum of products; these, too, :arry out are available in sizes up to 32x32, with 64-bit product plus a few additional bits to keep the sum from overflowing. CMOS MACs and multipliers are available with typical speeds of 25-5011s; ECL multipli- ers are much faster - 5ns (typ) for 16x16 multiply. A device known as an arithmetic logic unit (ALU) is often used as an adder. It actually has the capability of performing a number of different functions. For in- stance, the '1 81 4-bit ALU (expandable to larger word lengths) can do addition, sub- traction, bit shifts, magnitude comparison, and a few other functions. Adders and ALUs do their arithmetic in times mea- sured in nanoseconds to tens of nanosec- onds, depending on logic family. Dedicated integer multiplier chips are available in configurations such as 8 bits times 8 bits, or 16 bits times 16 bits. A variation that is particularly suited to Another arithmetic chip that's handy in digital signal processing is the correlator, which compares the corresponding bits of a pair of bit strings, calculating the number of bits that agree. A typical correlator chip compares a pair of 64-bit words, which can be shifted in internal shift registers. Any pattern of bits can be ignored ("masked") in the correlation. Typical speeds are 30ns, i.e., a bit stream can be clocked through at 35MHz, with a 7-bit correlation available at each clock tick. A variation (known as an FIR digital filter) calculates instead the true sum (with carry) of the true pairwise product of a pair of integer strings; typical A (8bits) (inputs) 8 (8bits) I 1 9-bit sum Figure 8.38. Adder expan- (output) sion.
- 447. COMBINATIONALLOGIC 8.14 Combinational functions available as ICs 499 sizes are 4- to 10-bit integers, with string lengths of 3 to 8 words (expandable to greater length, of course). The most complex arithmetic chips are the floating-point processors, which per- form compares, sums, and products, as well as trigonometric functions, exponen- tial~,and square roots. These are usually designed to work closely with particular microprocessors, and they generally con- form to a nice standard known as IEEE P754, which specifies word size (up to 80 bits), format, etc. Examples (plus matching microprocessors) are the 8087 (8086/8), 80387 (80386), and 68881 (68020). These are truly stunning per- formers, with speeds of lOMflops (million floating-point operations per second) or more. Magnitude comparators Figure 8.39 shows a 4-bit magnitude com- parator. It determines the relative sizes of the 4-bit input numbers A and B and tells you via outputs whether A < B, A = B, or A > B. Inputs are provided for expan- sion to numbers larger than 4 bits. A lnput B input Parity generatorlchecker This chip is used to generate a parity bit to be attached to a "word" when transmitting (or recording) data and to check the received parity when such data are recovered. Parity can be even or odd (e.g., with odd parity the number of 1 bits in each character is odd). The '280 parity generator, for instance, accepts a 9- , bit input word, giving an even and an odd parity bit output. The basic construction is an array of exclusive-OR gates. EXERCISE 8.22 Figureout how to make aparity generator using XOR gates. Programmable logic devices You can build your own custom combi- national (and even sequential) logic on a chip, using ICs that contain an array of gates with programmable interconnections. There are several varieties, of which the most popular are PALs (programmable ar- ray logic) and PLAs (programmable logic arrays). PALs, in particular, have become extremely inexpensive and flexible and should form a part of every designer's tool- box of tricks. We will describe combina- tional PALs in the next section. L Some other strange functions Figure 8.39. Magnitude comparator. There are many other interesting MSI combinational chips worth knowing about. For example, in CMOS you can get a EXERCISE 8.21 "majority logic" IC that tells you whether Construct a magnitude comparator, using XOR gates, that tells whether or not or not a majority of n inputs are asserted. A = B,where A and B are 4-bit numbers. Also available is a BCD "9's complemen- ter," whose function is obvious. A "barrel- shifter" IC shifts an input word over by n Table 8.7 at the end of the chapter lists (selectable) bits and can be expanded to most available magnitude comparators. any width.
- 448. DIGITAL ELECTRONICS 500 Chapter 8 8.15 Implementing arbitrary truth tables Luckily, most of digital circuit design does not consist of cooking up crazy arrange- ments of gates to implement some complex logic function. However, there are times when you do need to wire up some compli- cated truth table, and the number of gates can become awfully large. You may be- gin to ask yourself if there isn't some other way. Fortunately, there are several. In this section we will look briefly at the use of multiplexers and demultiplexers to implement arbitrary truth tables. Then we will discuss the generally more powerful methods using programmable logic chips, particularly ROMs and PALS. Multiplexers as generalized truth tables It should be obvious that an n-input multi- plexer can be used to generate any n-entry truth table, without any external compo- nents, by simply connecting its inputs to HIGH or LOW as required. For example, Figure 8.40 shows a circuit that tells if a 3-bit binary input is prime. data in I-- & Figure 8.40 the multiplexer, the output (as a function of the remaining input bit B) must be one of the four choices H,L, B, or B' ; the corresponding multiplexer input is therefore tied to logic HIGH, logic LOW, B or inverted B. month number Do.....- - - -.-...-. Figure 8.4 1 EXERCISE 8.23 Design of Figure 8.41. Make a table showing whether or not a given month has 31 days, with the month addressed in binary. Group the months in pairs, according to the most significant 3 bits of address. For each pair, figure out how Q ("31-ness") depends on the least significant address bit Ao. Compare with Figure8.41. Finally, verify (usingyour knuckles, or by recitingpoetry)that thecircuit doesindeed tell you if a given month has 31 days. Amusing postscript: It turns out that this truth table can be implemented with a single XOR gate, if you take advantage of Xs (don't care) for the months that don't exist! Try your hand at this challenge. It will give you a chance to exercise Karnaugh map skills. What is not so obvious is that an n- input multiplier can be used to generate Decoders as generalized truth tables any 2n-entry truth table, with at most one external inverter. For example, Figure 8.41 Decoders also provide a nice shortcut for shows a circuit that tells whether or not combinational logic, particularly in situa- a given month of the year has 31 days, tions where you need several simultaneous where the month (1 to 12) is specified by outputs. As an example, let's generate a a 4-bit input. The trick is to notice that circuit to convert BCD to excess-3. Here's for a given state of address bits applied to the truth table:
- 449. COMBINATIONAL LOGIC 8.15 Implementingarbitrary truth tables 501 Decimal BCD XS3 Decimal BCD XS3 how to generate equally timed consecutive 0 0000 0011 5 1 0001 0100 6 0101 loo' binary codes. The individual outputs 0110 1001 2 0010 0101 7 ol lolo from the decoder are known as minterms, 3 0011 0110 8 1000 1011 and they correspond to positions on a 4 0100 0111 9 1001 1100 Karnaugh map. We use the Cbit (BCD) input as an address to the decoder, then use the (negative-true) decoded outputs as inputs to several OR gates, one for each output bit, as shown in Figure 8.42. Note that with this scheme the output bits don't have to be mutually exclusive. You might use something like this as a cycle controller for a washing machine, in which you turn on several functions (pump out water, fill, spin, etc.) at each input state. You will see shortly BCD data in ROM and programmable logic These are ICs that let you program their internal connections, roughly speaking. In that sense they are really devices with memory and should probably be discussed later, along with flip-flops, registers, etc. However, once programmed they are strict- ly combinational (although there are also sequential programmable logic devices; excess~3 (XS3)out Figure 8.42. Minterm code conversion: BCD to "excess-3" (an obsoletecode, left over from the first edition).
- 450. DIGITAL ELECTRONICS 502 Chapter 8 see Section 8-27), and they are so useful that it would be unforgivable not to discuss them now. ROM. A ROM, or read-only memory, holds a bit pattern (typically 4 or 8 bits, parallel output) for each distinct address applied to its input. For example, a lKx8 ROM gives eight output bits for each of 1024 input states, specified by a 10-bit input address (Fig. 8.43). Any combinational truth table can therefore be programmed into a ROM, provided there are enough input (address) lines. For example, the 1Kx8 ROM above could be used to implement a Cbit by 4-bit multiplier; in this case the limitation is the "width" (8 bits), not the "depth" (10 bits). 8-bit data out (3-state) control Inputs "chip enable" enables 3-state outputs Figure 8.43 ROMs (and also programmable logic devices) are nonvolatile, meaning that the stored information is retained even when power is removed. There are several basic varieties, according to their method of programming: (a) "Mask-programmed ROMs" have their bit pattern built in at the time of manufacture. (b) "Program- mable ROMs" (PROMs) are programma- ble by the user: PROMs use tiny intercon- nections that can be blown (like fuses) by applying appropriate address and control signals; they tend to be very fast (25-50ns), of relatively high power (bipolar: 0.5-1W), and small to medium in size (32x8 up to 8Kx8). (c) "Erasable programmable ROMs" (EPROMs) store their bits as charge held on floating MOS gates, and hence can be erased by exposing them to intense ultraviolet (UV) light for some tens of minutes (they have a transparent quartz window); they are available in NMOS and CMOS varieties and are rather slow (200ns), of low power (particularly in standby mode), and large (8Kx8 to 128Kx8). Recent CMOS EPROMs are approaching bipolar speeds (3511s). A vari- ant known as "one-time-programmable" (OTP) is an identical chip, but omits the quartz window for economy and rugged- ness. (d) "Electrically erasable program- mable ROMs" (EEPROMs) behave like EPROMs, but can be programmed and erased electrically,while in the circuit, with standard supply voltages (+5V). ROMs find extensive use in computer and microprocessor applications, where they are used to store finished programs and data tables; we will see them again in Chapter 1I. However, you should keep the smaller ROMs in mind as replacements for complicated arrays of gates. Programmable logic. PALS (program- mable array logic; PAL is a trademark of Monolithic Memories Inc.) and PLAs(pro- grammable logic arrays) are the two basic kinds of programmable logic. They are ICs with many gates whose interconnec- tions can be programmed (like ROMs) to form the desired logic functions. They are available in both bipolar and CMOS con- struction, the former using fusible-link (one-time-programmable), and the lat- ter floating-gate MOS (UV or electri- cally erasable). You can't program any
- 451. SEQUENTIAL LOGIC 8.16 Devices with memory: flip-flops 503 13 12 11 10 I I I I fixed OR array programmable AND array A PAL legend =programmable connection connection programmable OR array programmable AND array B PLA 0 3 0 2 0 1 00 symbolic shorthand actual logic C Figure 8.44. Programmable logic. A. PAL B. PLA C. Detail of programmable connections to many-input AND gate; the circles are fusible links or other programmable connections.
- 452. DIGITAL ELECTRONICS 504 Chapter 8 interconnection you want - you're limited by the built-in structure. Figure 8.44 shows the basic design of combinational (no registers) PALs and PLAs. To keep this figure simple, the AND and OR gates, though drawn with a single input line, are actually multiple-input gates, with an input implied at every connected crossing. Each (three-state) output of a combina- tional PAL comes from an OR gate, each of whose inputs is prewired to an AND gate with dozens of inputs. For example, the 16L8 (Fig. 8.45) has eight 7-input OR gates; every possible signal is available at each AND gate, including the 10 dedicated input pins (and their inverts) and the 8 outputs (and their inverts). Each tristate enable is also derived from a 32-input AND gate. PLAs are similar to PALs, but with the added flexibility that the AND-gate outputs can be connected to the OR-gate inputs in any combination (i.e., program- mable), rather than being prewired as in a PAL. Note that the PALs and PLAs that we have described are combinational (i.e., gates only, no memory). Both kinds of programmable logic are also available as sequential logic, i.e., with memory (registers), a subject we will take up in the next section. To use PALs or PLAs, you get your- self a programmer, a piece of hardware that knows how to burn fuses (or other- wise program the device) and verify the finished product. All programmers con- nect via a serial port to a microcomputer (engineers have standardized on the IBM PC or compatible), on which you run some form of programmer software. Some of the fancier programmers include an on- board computer that runs its own soft- ware. The simplest kind of software sim- ply lets you select the fuses to burn; you figure that out by deciding what logic you want, at the gate level, then listing (or marking on a graphics display) those fuses. Figure 8.46 shows a trivial example, form- ing an exclusive-OR of two inputs as one of the outputs. Better programmers let you specify Boolean expressions (if you know them) or truth tables; the software does the rest, including minimization, simulation, and programming. . Although PLAs are more flexible, the overwhelming favorite in recent design has been the PAL. That is because they are faster (the signal passes through only one array of fuses) and cheaper and will usually do the job. As we'll see shortly, sophisticated new PALs using"macrocells" and "folded architecture" give you some additional flexibility within the fixed-OR PAL design. PALs provide a flexible and compact alternative to fixed-function ICs and should not be overlooked by the serious circuit designer. We'll show how (and when) to use programmable logic, along with useful tricks, in Section 8.27. SEQUENTIAL LOGIC 8.16 Devices with memory: flip-flops All our work with digital logic so far has been with combinational circuits (e.g., arrays of gates), for which the output is determined completely by the existing state of the inputs. There is no "memory," no history, in these circuits. Digital life gets really interesting when we add devices with memory. This makes it possible to construct counters, arithmetic accumulators, and circuits that generally do one interesting thing after another. The basic unit is the flip-flop, a colorful name to describe a device that, in its simplest form, looks as shown in Figure 8.47. Assume that both A and B are HIGH. What are X and Y? If X is HIGH, then both inputs of Gzare HIGH, making Y LOW. This is consistent with X being HIGH, so we're finished. Right? X = HIGH Y = LOW
- 453. Logic Diagram 16L8 Figure 8.45. The 16L8 combinational PAL@has 10 dedicated inputs, 2 dedicated outputs, and 505 6 bidirectional (three-state) inputloutput lines; "16L8" means 16 (max) inputs, 8 (max) outputs (LOW-true). (Diagrams courtesy of Advanced Micro Devices of Sunnyvale, California.)
- 454. DIGITAL ELECTRONICS 506 Chapter 8 Figure 8.46. PAL exclusive OR. Figure 8.47. Flip-flop ("set-reset"type). Wrong! The circuit is symmetrical, so an equally good state is X = LOW Y = HIGH The states X, Y both LOW and X,Y both HIGH are not possible (remember, A = B = HIGH). So the flip-flop has two stable states (it's sometimes called a "bistable"). Which state it is in depends on past history. It has memory! To write into the memory, just bring one of the inputs momentarily LOW. For instance, bringing A LOW momentarily guarantees that the flip-flop goes into the state X = HIGH Y = LOW no matter what state it was in previously. Switch debouncing This kind of flip-flop (with a SET and RE- SET input) is quite useful in many applications. Figure 8.48 shows a typical example. This circuit is supposed to en- able the gate and pass input pulses when the switch is opened. The switch is tied to ground (not +5V), because of a peculiar- ity of bipolar TTL (as opposed to CMOS): You must sink substantial current from an input in the LOW state (0.25mA for LS TTL), whereas in the HIGH state the in- put current is near zero. Besides, ground is generally available as a convenient re- turn for switches and other controls. The problem with this circuit is that switch contacts "bounce." When the switch is closed, the two contacts actually separate and reconnect, typically 10 to 100 times over a period of about lms. You would get waveforms as sketched; if there were a counter or shift register using the output, it would faithfully respond to all those extra "pulses" caused by the bounce. Figure 8.48. Switch "bounce." Figure 8.49 shows the cure. The flip- flop changes state when the contacts first close. Further bouncing against that contact makes no difference (SPDT switches never bounce all the way back to the opposite position), and the output is a "debounced" signal, as sketched. This debouncer circuit is widely used; the '279 "quad SR latch" lets you get four into one package. Incidentally, the preceding circuit has a minor flaw: The first pulse after the gate is enabled may be shortened, depending on when the switch is closed relative to the input pulse train; the same holds for the final pulse of a sequence (of course, a switch that is not debounced has the same problem). A "synchronizer"
- 455. SEQUENTIAL LOGIC 8.17 Clocked flip-flops 507 circuit (see Section 8.19) can be used to prevent this from happening, for applica- tions where it makes a difference. Figure 8.49. Switch debouncer. Multiple-input flip-flop Figure 8.50 shows another simple flip-flop. Here NOR gates have been used; a HIGH input forces the corresponding output LOW. Multiple inputs allow various signals to set or clear the flip-flop. In this circuit fragment, no pullups are used, since logic signals generated elsewhere (by standard active pullup outputs) are used as inputs. CLEAR MRnn%?- ERROR ALARM Figure 8.50 8.17 Clocked flip-flops Flip-flops made with two gates, as in Fig- ures 8.47 and 8.50, are known generically as SR (set-reset), or jam-loaded, flip-flops. You can force them into one state or the other whenever you want by just generat- ing the right input signal. They're handy for switch debouncing and many other ap- plications. But the most widely used form of flip-flop looks a little different. Instead of a pair of jam inputs, it has one or two "data" inputs and a single "clock" input. The outputs can change state or stay the same, depending on the levels at the data inputs when the clock pulse arrives. The simplest clocked flip-flop looks as shown in Figure 8.51. It's just our original flip-flop, with a pair of gates (controlled by the clock) to enable the SET and RESET inputs. It is easy to verify that the truth table is S R I Qn+l Figure 8.5 1. Clocked flip-flop. 0 0 0 1 1 0 1 1 where Qn+l is the Q output after the clock pulse and Q, is the output before the clock pulse. The basic difference between this and the previous flip-flops is that R and S should now be thought of as data inputs. What is present on R and S when a clock pulse comes along determines what happens to Q. This flip-flop has one awkward property, however. The output can change in re- sponse to the inputs during the time the Qn 0 1 indeterminate
- 456. DIGITAL ELECTRONICS 508 Chapter 8 clock is HIGH. In that sense it is still like the jam-loaded SR flip-flop (it's also known as a "transparent latch," since the output "sees through" to the input when the clock is HIGH). The full utility of clocked flip-flops comes with the introduc- tion of slightly different configurations, the master-slave flip-flop and the edge- triggered flip-flop. Master-slave and edge-triggered flip-flops These are by far the most popular flip- flops. The data present on the input lines just before a clock transition, or "edge," determines the output state after the clock has changed. These flip-flops are available as inexpensive packaged ICs and are always used in that form. But it is worth looking at their innards in order to understand what is going on. Figure 8.52 shows the schematics. Both are known as type D flip-flops. Data present at the D input will be transferred to the Q output after the clock pulse. The master- slave configuration is probably easier to understand. Here's how it works: master I I I Q CLK e Q slave Figure 8.52. Edge-triggered type D flip- flops.
- 457. SEQUENTIAL LOGIC 8.17 Clocked flip-flops 509 While the clock is HIGH, gates 1 and 2 are enabled, forcing the master flip-flop (gates 3 and 4) to the same state as the D input: M = D , M' = D'. Gates 5 and 6 are disabled, so the slave flip-flop (gates 7 and 8) retains its previous state. When the clock goes LOW, the inputs to the master are disconnected from the D input, while the inputs of the slave are simultaneously coupled to the outputs of the master. The master thus transfers its state to the slave. No further changes can occur at the output, because the master is now stuck. At the next rising edge of the clock, the slave will be decoupled from the master and will retain its state, while the master will once again follow the input. The edge-triggered circuit behaves the same externally, but the inner workings are different. It is not difficult to figure it out. The particular circuit shown happens to be the popular '74 positive-edge-triggered type D flip-flop. The preceding master- slave circuit transfers data to the output on the negative edge. Flip-flops are avail- able with either positive or negative edge triggering. In addition, most flip-flops also have SET and CLEAR jam-type inputs. They may be set and cleared on HIGH or on LOW, depending on the type of flip- flop. Figure 8.53 shows a few popular flip- flops. The wedge means "edge-triggered," and the little circles mean "negation," or complement. Thus, the '74 is a dual type D positive-edge-triggeredflip-flop with ac- tive LOW jam-type SET and CLEAR in- puts. The 4013 is a CMOS dual type D positive-edge-triggeredflip-flop with active HIGH jam-type SET and CLEAR inputs. The '112 is a dual JK master-slave flip- flop with data transfer on the negative edge and with active LOW jam-type SET and CLEAR inputs. The JK flip-flop. The JK flip-flop works on principles similar to those of the type D flip-flop, but it has two data inputs. Here's the truth table: Thus, if J and K are complements, Q will go to the value of the J input at the next clock edge. If J and K are both LOW, the output won't change. If J and K are both HIGH, the output will "toggle"(reverse its state after each clock pulse). Warning: Some older JK flip-flops are "ones-catching," a term you won't find in the data sheet, but an effect that can have dire consequences for the unsuspecting. This means that if either J or K (or both) changes state momentarily while the slave is enabled by the clock, then returns to its previous state before the clock makes its transition, the flip-flop will"remember" that momentary state and behave as if that state had persisted. Thus, the flip-flopmay change state at the next clock transition even if the J and K inputs existing at that transition should cause the flip-flop to remain in its current state. This can Figure 8.53. D-type and JK flip-flops.
- 458. DIGITAL ELECTRONICS 510 Chapter 8 lead to peculiar behavior, to put it mildly. The problem arises because such flip-flops were designed with short clock pulses in mind, whereas in common usage you clock flip-flops with just about anything. Be careful when using master-slave flip- flops, or avoid them altogether and use true edge-triggered flip-flops instead. Two good choices that employ true edge triggering are the '112 and the '109. Both are dual (two per package) JK flip- flops with (negative-true) SET and CLEAR jam-type inputs; the '1 12 clocks on the negative edge, the '109 on the positive edge. The '109 has an interesting quirk, namely the K input is complemented (it's sometimes called a "JK-bar" flip-flop). Thus, if you tie the J and K inputs together, you've got a D flip-flop; to make it toggle, you ground K' and tie J HIGH. Divide by 2 It is easy to make a divide-by-2 circuit by just exploiting the toggling capability of flip-flops. Figure 8.54 shows two ways. The JK flip-flop toggles when both inputs are HIGH, producing the output shown. The second circuit also toggles, since with the D input tied to its own Q' output, the D flip-flop always sees the complement of its existing output at its D input at the time of the clock pulse. The output signal in either case is at half the frequency of the input. Data and clock timing This last circuit raises an interesting ques- tion: Will the circuit fail to toggle, since the D input changes almost immediately after the clock pulse? In other words, will the circuit get confused, with such crazy things happening at its input? You could, instead, ask this question: Exactly when does the D flip-flop (or any other flip- flop) look at its input, relative to the clock pulse? The answer is that there is a spec- ified "setup time" t, and "hold time7 ' th for any clocked device. Input data must output +J--Lr-0 C Figure 8.54. Toggling flip-flops. be present and stable from at least t, be- fore the clock transition until at least th after it, for proper operation. For the 74HC74, for instance, t, = 20ns and th = 3ns (Fig. 8.55). So, for the preceding tog- gling connection, the setup-time require- ment is met if the output has been stable for at least 2011s before the next clock rising edge. It may look as if the hold-time re- quirement is violated, but that's OK, also. The minimum "propagation time" from clock to output is Ions, so a D flip-flop connected to toggle as described is guar- anteed to have its D input stable for at least lOns after the clock transition. Most devices nowadays have a zero hold-time requirement.
- 459. SEQUENTIAL LOGIC 8.17 Clocked flip-flops 511 data can data must b e stable data can change I /I change I t I CLK I I I 0 I i-44 I 20ns m i n 1 1 *I-'. 3ns mln Figure 8.55. Data setup and hold times. An interesting thing can happen if the level at the D input changes during the setup-time interval, namely a so-called metastablestate in which the flip-flop can't make up its mind which state to go into. We will have more to say about this shortly. Divide by more By cascading several toggling flip-flops (connect each Q output to the next clock input), it is easy to make a divide-by-2*, or binary, counter. Figure 8.56 shows a four- stage "ripple counter" and its waveforms. Note that flip-flops that clock on the falling edge (indicated by the negation circle) must be used if each Q output drives the next clock input. This circuit is a divide- by-16 counter: The output waveform from the last flip-flop is a square wave whose frequency is 1/16 of the circuit's input clock frequency. Such a circuit is called a counter because the data present at the four Q outputs, considered as a single 4- bit binary number, go through a binary sequence from 0 to 15, incrementing after each input pulse. The waveforms in Figure 8.56 demonstrate this fact. In the state LSB MSB Qo Q , Q 2 Q 3 B Figure 8.56. Four-bit counter. A. Schematic. B. Timing diagram. ++ Q 4 , 4 l - J + + n r u L J 0 Input Q ---c.,' clock t b-4, --C:> J 0 K- K -4l J A -
- 460. DIGITAL ELECTRONICS 512 Chapter8 figure the abbreviation MSB is used to mean "most significant bit," and LSB means "least significant bit"; the curved arrows are used to indicate what causes what, to aid in understanding. As you will see in Section 8.25, the counter is such a useful function that many versions are available integrated onto single chips, including 4-bit, BCD, and multidigit counting formats. By cascading several such counters and displaying the count on a numeric display device (e.g., an LED digital display) you can easily con- struct an event counter. If the input pulse train to such a counter is gated for exactly 1 second, you've got a frequency counter, which displays frequency (cycles per second) by actually counting the number of cycles in a second. Section 15.10 shows diagrams of this simple and highly use- ful scheme. In fact, single-chip frequency counters are available, complete with oscillator, counter, control, and display circuitry; see Figure 8.71 for an example. In practice, the simple scheme of cascading counters by connecting each Q output to the next clock input has some in- teresting problems related to the cascaded delays as the signal"ripples"down through the chain of flip-flops,and a "synchronous" scheme (in which all clock inputs see the same clocking signal) is usually better. Let's look into this question of synchro- nous clocked systems. 8.18 Combining memory and gates: sequential logic Having explored the properties of flip- flops, let's see what can be done when they are combined with the combinational (gate) logic we discussed earlier. Circuits made with gates and flip-flops constitute the most general form of digital logic. Synchronously clocked systems As we hinted in the last section, sequential logic circuits in which there is a common source of clock pulses driving all flip- flops have some very desirable properties. In such a synchronous system all action takes place just after each clocking pulse, based on the levels present just before each clock pulse. Figure 8.57 shows the general scheme. lnput output levels levels gates ID"c,T ;"Iu Figure 8.57. The classical sequential circuit: memory registers plus combinational logic. This scheme can be easily implemented with single-chip "registered PALS" (Section 8.27). The flip-flops have all been combined into a single register, which is nothing more than a set of type D flip-flops with their clock inputs all tied together and their individual D inputs and Q outputs brought out; i.e., each clock pulse causes the levels present at the D inputs to be transferred to the respective Q outputs. The box full of gates looks at both the Q outputs and whatever input levels are applied to the circuit and generates a new set of D inputs and logic outputs. This simple-looking scheme is extremely powerful. Let's look at an example.
- 461. SEQUENTIAL LOGIC 8.18 Combining memory and gates: sequential logic 513 Example: divide-by-3 Let's design a synchronous divide-by-3 circuit with two type D flip-flops, both clocked from the input signal. In this case, Dland D2 are the register inputs, Q1 and Q2are the outputs, and the common clock line is the master clocking input (Fig. 8.58). 1. Choose the three states. Let's use 0 1 1 0 0 0 (i.e.,first state) 2. Find the combinational logic network outputs necessaryto generate this sequence of states, i.e., figure out what the D inputs have to be to get those outputs: 3. Concoct suitable gating (combinational logic), using available outputs, to produce those D inputs. In general, you can use a Karnaugh map. In this simple case you can see by inspection that from which the circuit of Figure 8.59 follows. It is easy to verify that the circuit works as planned. Since it is a synchronous counter, all outputs change simultaneously (when you feed one output to the next clock, you've got a ripple counter instead). In general, synchronous (or"clocked")sys- tems are desirable, since susceptibility to noise is improved: Things have settled down by the time of the clock pulse, so circuits that only look at their inputs at clock edges aren't troubled by capacitively coupled interference from other flip-flops, etc. A further advantage of clocked sys- tems is that transient states (caused by mrn Figure 8.59. Divide-by-3. D2 Q, G - J'uuLr - Figure 8.58 Dl Q I - 0I -
- 462. DIGITAL ELECTRONICS 514 Chapter 8 delays, so that all outputs don't change simultaneously) don't produce false out- put, since the system is insensitive to what happens just after a clock pulse. You will see some examples later. Excluded states What happens to the divide-by-3 circuit if the flip-flops somehow get into the state (Q1,Q2) = (1,1)? This can easily happen when the circuit is first turned on, since the initial state of a flip-flop is anyone's guess. From the diagram, it is clear that the first clock pulse will cause it to go to the state (1,0), from which it will function as before. It is important to check the excluded states of a circuit like this, since it is possible to be unlucky and have it get stuck in one of those states. (Alternatively, the initial design procedure can include a specification of all possible states.) A useful diagnostic tool is the state diagram, which for this example looks like Figure 8.60. Usually you write the conditions for each transition next to the arrows, if other variables of the system are involved. Arrows may go in both directions between states, or from one state to several others. Figure 8.60. State diagram: divide-by-3. EXERCISE 8.24 Design a synchronous divide-by3 circuit using two JK flip-flops. It can be done (in 16 different ways!) without any gates or inverters. One hint: When you construct the table of required J1,K1and J2,K2inputs, keep in mind that there are two possibilities for J,K at each point. For instance, if a flip-flop output is to go from 0 to 1, J,K = 1,X( X = don't care). Finally, check to see if the circuit will get stuck in the excluded state (of the 16 distinct solutions to this problem, 4 will get stuck and12 won't). EXERCISE 8.25 Designa synchronous 2-bit UPIDOWNcounter: It has a clock input, and a control input (UID' ); the outputs are the two flip-flop outputs Q1 and Q2. If UIDf is HIGH, it goes through a normal binary counting sequence; if LOW, it counts backward - Q2Ql = 00,11,10,01,00. ... State diagrams as design tools The state diagram can be very useful when designing sequential logic, particularly if the states are connected together by several paths. In this design approach, you begin by selecting a set of unique states of the system, giving each a name (i.e., a binary address). You will need a minimum of n flip-flops, or bits, where n is the smallest integer for which 2n is equal to or greater than the number of distinct states in the system. Then you set down all the rules for moving between states, i.e., all possible conditions for entering and leaving each state. From there it is a straightforward (but perhaps tedious) job to generate the necessary combinational logic, since you have all possible sets of Qs and the set of Ds that each leads to. Thus you have converted a sequential design problem into a combinational design problem, always soluble through techniques such as the Karnaugh map. Figure 8.61 shows a real- world example. Note that there may be states that don't lead to others, e.g., "receive diploma."
- 463. SEQUENTIAL LOGIC 8.19 Synchronizer 515 Example: pulse synchronizer ' member school d~ploma out of school Figure 8.6I. State diagram: going to school. Registered PALs Programmable logic (PALs and PLAs, see Section 8.15) is available with both gates and synchronously clocked D flip-flops on the same chip; these are known as regis- tered PALs and PLAs, and they are ideal for implementing custom sequential cir- cuits. We'll show how in Section 8.27. 8.19 Synchronizer An interesting application of flip-flops in sequentialcircuits is their use in a synchro- nizer. Suppose you have some external control signal coming into a synchronous system that has clocks, flip-flops, etc., and you want to use the state of that input sig- nal to control some action. For example, a signal from an instrument or experiment might signify that data are ready to be sent to a computer. Since the experiment and the computer march to the beats of differ- ent drummers, so to speak (in fancy lan- guageyou would say they are asynchronous processes), you need a method to restore order between the two systems. As an example, let's reconsider the circuit in which a debouncer flip-flopgated a pulse train (Section 8.16). That circuit enables the gate whenever the switch is closed, regardless of the phase of the pulse train being gated, so that the first or last pulse may be shortened. The problem is that the switch closure is asynchronous with the pulse train. In some applications it is important to have only complete clock cycles, and that requires a synchronizer circuit like that in Figure 8.62. Pushing START brings the output of gate 1 HIGH, but Q stays LOW until the next falling edge of the input pulse train. In that way, only complete pulses are passed by NAND gate 3. Figure 8.62 shows some waveforms. The curved arrows are drawn to show exactly what causes what. You can see, for instance, that the transitions of Q occur slightly after the falling edges of the input. Logic races and glitches This example brings up a subtle but extremely important point: What would happen if a positive-edge-triggeredflip-flop were used instead? If you analyze it care- fully, you'll find that START still works OK, but if STOP is pushed while the input is LOW, a bad thing happens (Fig. 8.63). A short spike, or "glitch," gets through be- cause the final NAND gate isn't disabled until the flip-flop output has a chance to go LOW, a delay of about 20ns for HC or LS TTL. This is a classic example of a "logic race." With some care these situations can be avoided, as the example shows. Glitches are terrible things to have running through your circuits. Among other things, they're hard to see on an oscilloscope, and you may not know they are present. They can clock subsequent flip-flops erratically, and they may be widened -or narrowed to extinction - by passage through gates and inverters.
- 464. DIGITAL ELECTRONICS 516 Chapter 8 output - B Figure 8.62. Pulse-train synchronizer. + m = EXERCISE 8.26 Demonstrate that the preceding pulse syn- chronizer circuit (Fig. 8.62) does not generate glitches. input pulse train EXERCISE 8.27 Designacircuit thatlets exactly one fullnegative pulse (from an input train of pulses) pass through to the output, after a button is pushed. input s --0> A - 00 output 0 Q- Figure 8.63. A logic race can generate a "runt pulse." A few comments about synchronizers: The input to the D flip-flop can come from other logic circuitry, rather than from a debounced switch. There are applications in computer interfacing, etc., where an asynchronous signal must communicate with a clocked device; in such casesclocked flip-flops or synchronizers are ideal. In this circuit, as in all logic, unused inputs must be handled properly. For instance, SET and CLEAR must be connected so that they are not asserted (for a '74, tie them HIGH; for a 4013, they are grounded). Unused inputs that have no influence on the outputs can be left unconnected (e.g., inputs to unused gates), except in CMOS, where they should be grounded to pre- vent output-stage current (more on that in Chapter 9). A dual synchronizer is avail- able as the 74120, although it has not been widely used.
- 465. MONOSTABLE MULTIVIBRATORS 8.20 One-shot characteristics 517 MONOSTABLE MULTIVIBRATORS The monostable multivibrator, or "one- shot" (emphasis on the word "one"), is a variation of the flip-flop (which is sometimes called a bistable multivibrator) in which the output of one of the gates is capacitively coupled to the input of the other gate. The result is that the circuit sits in one state. If it is forced to the other state by a momentary input pulse, it will return to the original state after a delay time de- termined by the capacitor value and the circuit parameters (input current, etc.). It is very useful (some would say too useful!) for generating pulses of selectable width and polarity. Making one-shots with gates and RCs is tricky, and it depends on the details of the gate's input circuit, since, for instance, you wind up with voltage swings beyond the supply voltages. Rather than encourage bad habits by illustrating such circuits, we will just treat the one-shot as an available functional unit. In actual cir- cuits it is best to use a packaged one-shot; you construct your own only if absolutely necessary, e.g., if you have a gate available and no room for an additional IC package (even then, maybe you shouldn't). 8.20 One-shot characteristics Inputs One-shots are triggered by a rising or falling edge at the appropriate inputs. The only requirement on the triggering signal is that it have some minimum width, typically 25ns to 100ns. It can be shorter or longer than the output pulse. In general, several inputs are provided so that several signals can trigger the one-shot, some on positive edges and some on negative edges (remember, a negative edge means a HIGH-to-LOW transition, not a negative polarity). The extra inputs can also be used to inhibit triggering. Figure 8.64 shows four examples. Each horizontal row of the table rep- resents a valid input triggering transition. For example, the '1 21 will trigger when one of the A inputs makes a HIGH-to-LOW transition, if the B input and the other A input are both HIGH. The '4538 is a dual CMOS monostable with OR gating at the input; if only one input is used, the other must be disabled, as shown. The '121 has three inputs, with a combination of OR and AND gating (and triggering), as shown. Its B input is a Schmitt trigger, more forgiving with slowly rising or noisy input signals. This monostable also in- cludes a not-too-good internal timing resistor you can use instead of R, if you're feelinglazy. The '22 1 is a dual '121;CMOS users can get only the dual version. The popular '123 is a dual monostable with AND input gating; unused inputs must be enabled. Note particularly that it triggers when RESET is disabled if both trigger inputs are already asserted. This is not a universal property of monostables, and it may or may not be desirable in a given application (it's usually not). The '423 is the same as the '123, but without this "feature." When drawing monostables in a circuit diagram, the input gating is usually omitted, saving space and creating a bit of confusion. Retriggerability Most monostables, e.g., the 4538, '123, and '423 mentioned earlier, will begin a new timing cycle if the input triggers again during the duration of the output pulse. They are known as retriggerable mono- stables. The output pulse will be longer than usual if they are retriggered during the pulse, finally terminating one pulse width after the last trigger. The '12 1 and '22 1 are nonretriggerable; they ignore in- put transitions during the output pulse. Most retriggerable one-shots can be connected as nonretriggerable one-shots.
- 466. DIGITAL ELECTRONICS 518 Chapter 8 on these inputs: Figure 8.64. Four popular one-shots with their truth tables.
- 467. MONOSTABLE MULTIVIBRATORS 8.22 Cautionary notes about monostables 519 Figure 8.65 shows an example that's easy to understand. Resettability Most monostables have a jam RESET input that overrides all other functions. A momentary input to the RESET terminal terminates the output pulse. The RESET input can be used to prevent a pulse during power-up of the logic system; however, see the preceding comment about the '123. Pulse width Pulse widths from 40ns up to millisec- onds (or even seconds) are attainable with standard monostables, set by an external capacitor and (usually) resistor combina- tion. A device like the 555 (Section 5.14) can be used to generate longer pulses, but its input properties are sometimes inconvenient. Very long delays are best generated digitally (see Section 8.23). Table 8.8 at the end of the chapter lists most available monostables. 8.21 Monostable circuit example Figure 8.66 shows a square-wave generator with independently settable rate and duty cycle (ratio of HIGH to LOW) and an input that permits an external signal to "hold" the output following a negative edge. Current mirror Q1-Q3 generates a ramp at C1. When it reaches the threshold of the upper comparator at two-thirds V+, the one-shot is triggered and generates a 2ps positive pulse, putting n-channel VFET Qqinto conduction and discharging the capacitor. C1therefore has a sawtooth waveform going from ground to +8 volts, with rate set by potentiometer Ra.The lower comparator generates an output square wave from the sawtooth, with duty cycle adjustable linearly between 1% and 99% via R5. Both comparators have a few millivolts of hysteresis (Rs and R9) to prevent noise-induced multiple transi- tions. The LM393 is a low-power dual comparator with input common-mode range right down to ground and open- collector outputs. A feature of this circuit is its ability to synchronize (startlstop) to an externally applied control level. The HOLD input lets the driven circuit stop the oscillator at the next negative transition at the output. When HOLD is again brought LOW, the oscillator immediately resumes full cycles as if a falling edge had occurred at the time HOLD was released. The additional input to the 3-input NAND from the comparator output ensures that the circuit won't get stuck with C1 charged up. In this circuit the one-shot pulse width has been chosen long enough to ensure that C1 is fully discharged during the pulse. 8.22 Cautionary notes about monostables Monostables have some problems you don't see in other digital circuits. In ad- dition, there are some general principles involved in their use. First, a rundown on monostable pathology. Some problems with monostables Timing. One-shots involve a combina- tion of linear and digital techniques. Since
- 468. DIGITAL ELECTRONICS 520 Chapter 8 Figure 8.66. Autosynchronizing triggerable pulse generator. the linear circuits have the usual problems of VBEand hFE variation with tempera- ture, etc., one-shots tend to exhibit tem- perature and supply voltage sensitivity of output pulse width. A typical unit like the '4538 will show pulse-width variations of a few percent over a 0-50°C tempera- ture range and over a f5% supply voltage range. In addition, unit-to-unit variations give you a f10% prediction accuracy for any given circuit. When looking at temper- ature and voltage sensitivity, it is impor- tant to remember that the chip may exhibit self-heating effects and that supply volt- age variations during the pulse (e.g., small glitcheson the V+line) may affect the pulse width seriously. Long pulses. When generating long pulses, the capacitor value may be a few microfarads or more; in that case elec- trolytic capacitors are necessary. You have to worry about leakage current (which is insignificant with the smaller capacitor types), especially since most monostable types apply voltage of both polarities across the capacitor during the pulse. It may be necessary to add a diode or tran- sistor to prevent this problem, or to use a digital delay method instead (involving a clock and many cascaded flip-flop stages, as in Section 8.23). The use of an exter- nal diode or transistor will degrade tem- perature and voltage sensitivity and pulse- width predictability; it may also degrade retriggerable operation. Duty cycle. With some one-shots the pulse width is shortened at high duty cycle. A typical example is the TTL 9600-9602 series, which has constant pulse width up to 60% duty cycle, decreasing about 5% at 100% duty cycle. The otherwise admirable '121 is considerably worse in this respect, with erratic behavior at high duty cycles. Triggering. One-shots can produce sub- standard or jittery output pulses when trig- gered by too short an input pulse. There is
- 469. MONOSTABLE MULTIVIBRATORS 8.22 Cautionary notes about monostables 521 a minimum trigger pulse width specified, e.g., 50ns for the 'LS121, 14011s for the 4098 with +5 volt supply, and 40ns for the 4098 with +15volt supply (CMOSis faster and has more output drive capability when operated at higher supply voltages). Noise immunity. Because of the linear circuits in a monostable, the noise im- munity is generally poorer than in other digital circuits. One-shots are particularly susceptible to capacitive coupling near the external R and C used to set the pulse width. In addition, some one-shots are prone to false triggering from glitches on the V+line or ground. Specsmanship. Be aware that mono- stable performance (predictability of pulse width, temperature and voltage coeffi- cients, etc.) may degrade considerably at theextremesof its pulse-width range. Spec- ifications are usually given in the range of pulse widths where performance is good, which can be misleading. In addition, there can be a lot of difference from manufacturer to manufacturer in the per- formance of monostables of the same part number. Read the data sheets carefully! Output isolation. Finally, as with any digital device containing flip-flops, outputs should be buffered (by a gate, inverter, or perhaps an interface component like a line driver) before going through cables or to devices external to the instrument. If a device like a one-shot drives a cable directly, the load capacitance and cable reflections may cause erratic operation to occur. General considerations for using monostables Be careful, when using one-shots to gener- ate a train of pulses, that an extra pulse doesn't get generated at the "ends." That is, make sure that the signals that enable the one-shot inputs don't themselves trig- ger a pulse. This is easy to do by looking carefully at the one-shot truth table, if you take the time. Don't overuse one-shots. It is tempt- ing to put them everywhere, with pulses running all over the place. Circuits with lots of one-shots are the mark of the neo- phyte designer. Besides the sort of prob- lems just mentioned, you have the added complication that a circuit full of mono- stables doesn't allow much adjustment of the clock rate, since all the time delays are "tuned" to make things happen in the right order. In many cases there is a way to ac- complish the same job without a one-shot, and that is to be preferred. Figure 8.67 shows an example. The idea is to generate a pulse and then a second delayed pulse following the falling edge of an input signal. These might be used to set up and initiate operations that require that some previous operation be completed, as signaled by the input falling edge. Since the rest of the circuit is probably controlled by a "clock" square wave, let's assume that the signal at the D input falls synchronous with a clock rising edge. In the first circuit the input triggers the first one-shot, which then triggers the second one-shot at the end of its pulse. The second circuit does the same thing with type D flip-flops, generating output pulses with width equal to one clock cycle. This is a synchronous circuit, as opposed to the asynchronous circuit using cascaded flip-flops. The use of synchronous meth- ods is generally preferable from several standpoints, including noise immunity. If you wanted to generate shorter pulses, you could use the same kind of circuit, with the system clock divided down (via several toggling flip-flops) from a master clock of higher frequency. The master clock would then be used to clock the D flip-flops in this circuit. The use of several subdivided
- 470. DIGITAL ELECTRONICS 522 Chapter 8 Figure 8.67. A digital delay can replace one-shot delays. system clocks is common in synchronous also includes internal oscillator circuitry circuits. that can substitute for the external clock reference. Our experience is that the inter- 8.23 Timing with counters As we have just emphasized, there are many good reasons for avoiding the use of monostables in logic design. Figure 8.68 shows another case where flip-flops and counters (cascaded toggling flip-flops) can be used in place of a monostable to gener- ate a long output pulse. The '4060 is a 14- stage CMOS binary counter (14 cascaded flip-flops). A rising edge at the input brings Q HIGH, enabling the counter. After 2"-' clock pulses, Q, goes HIGH, clearing the flip-flop and the counter. This circuit gen- erates an accurate long pulse whose length may be varied by factors of 2. The '4060 nal oscillator has poor frequency tolerance and (in some HC versions) may malfunc- tion. You can get complete integrated circuits to implement timing with counters. The ICM7240/50/60 (Intersil, Maxim) have 8- bit or 2-digit internal counters and the necessary logic to make delays equal to an integral number of counts (1-255 or 1-99 counts); you can set the number either with "hardwired" connections or with external thumbwheel switches. The ICM7242 is similar, but with prewired divide-by-128 counter. Exar makes a close cousin, called the XR2243, which has a fixed divide-by- 1024 counter.
- 471. SEQUENTIAL FUNCTIONS AVAILABLE AS ICs 8.24 Latches and registers 523 -4 8192 clock l--L periods SEQUENTIAL FUNCTIONS AVAILABLE AS ICs As with the combinational functions we described earlier, it is possible to integrate various combinations of flip-flops and gates onto a single chip. In the follow- ing sections we will present a survey of the most useful types, listed according to func- tion. As with pure combinational logic, pro- grammable logic (PALSand GALSin par- ticular) provides an attractive alternative to the use of prewired sequential functions. We'll talk about them, also, after looking at the standard functions. 8.24 Latches and registers + b Latches and registers are used to "hold" a set of bits, even if the inputs change. A set of D flip-flops constitutes a register, but it has more inputs and outputs than necessary. Since you don't need separate clocks, or SET and CLEAR inputs, those lines can be tied together, requiring fewer pins and therefore allowing 8 flip-flops to fit in a 20-pin package. The popular '574 is an octal D register with positive clock edge and three-state outputs; the '273 is similar, but has a reset instead of three- state outputs. Figure 8.69 shows a quad D register with both true and complemented outputs. The term "latch" is usually reserved for a special kind of register: one in which the outputs follow the inputs when Figure 8.68. Digital generation of long pulses. output I I ... +-D 1-> start enabled, and hold the last value when disabled. Since the term "latch" has become ambiguous with use, the terms "transparent latch" and "type D register" are often used to distinguish these closely related devices. As an example, the '573 is the octal transparent-latch equivalent of the '574 D register. -4 clock latched- outputs Q4a5..a a,4 > 'HC4060 R 'HC74 Figure 8.69. '1 75 Cbit D register. 0 4 ) Some variations on the latchhegister are as follows: (a) random-access memories (RAMs), which let you write to, and read from, a (usually large) set of registers, but only one (or at most a few) at a time; RAMs come in sizes from a handful of bytes up to 1M bytes or more and are used primarily for memory in microprocessor systems (see Chapters 10 and 11); (b) ad- dressable latches, a multibit latch that lets you update individual bits while keeping the others unchanged; (c) a latch or regis- ter built into a larger chip, for example a
- 472. DIGITAL ELECTRONICS 524 Chapter 8 digital-to-analog converter; such a device only needs the input applied momentarily (with appropriate clocking edge), since an internal register can hold the data. Table 8.9 at the end of the chapter lists most of the useful registers and latches. Note features such as input enable, re- set, three-state outputs, and "broadside" pinout (inputs on one side of the chip, out- puts on the other); the latter is very con- venient when you are laying out a printed- circuit board. 8.25 Counters As we mentioned earlier, it is possible to make a "counter" by connecting flip-flops together. There is available an amazing variety of such devices as single chips. Here are some of the features to look for: Size You can get BCD (divide-by-10) and bi- nary (or hexadecimal, divide-by-16) coun- ters in the popular Qbit category. There are larger counters, up to 24 bits (not all available as outputs), and there are modulo- n counters that divide by an integer n, specified as an input. You can always cascade counters (including synchronous types) to get more stages. Clocking An important distinction is whether the counter is a "ripple" counter or a "syn- chronous" counter. The latter clocks all flip-flops simultaneously, whereas in a rip- ple counter each stage is clocked by the output of the previous stage. Ripple coun- ters generate transient states, since the ear- lier stages toggle slightly before the later ones. For instance, a ripple counter going from a count of 7 (0111) to 8 (1000) goes through the states 6,4, and 0 along the way. This doesn't cause trouble in well-designed circuits, but it would in a circuit that used gates to look for a particular state (this is a good place to use something like a D flip- flop, so that the state is examined only at the clock edge). Ripple counters are slower than synchronous counters, because of the accumulated propagation delays. Ripple counters clock on negative-going edges for easy expandability (by connecting the Q output of one counter directly to the clock input of the next); synchronous counters clock on the positive edge. We favor the '160-'163 family of 4- bit synchronous counters for most applica- tions that don't require some special fea- ture. The '590 and '592 are good 8-bit synchronous counters. Figure 8.70 shows the '390 dual BCD ripple counter. > CLK, > CLK, RESET -> CLK, RESET Figure 8.70. '390 dual BCD ripple counter. Some counters can count in either direc- tion, under control of some inputs. The two possibilities are (a) an UID' input that sets the direction of count and (b) a pair of clocking inputs, one for UP, one for DOWN. Examples are the '191 and '193, respectively. The '569 and '579 are useful 8-bit upldown counters. Load and clear Most counters have data inputs so that they can be preset to a given count. This
- 473. SEQUENTIAL FUNCTIONS AVAILABLE AS ICs 8.26 Shift registers 525 is handy if you want to make a modulo- n counter, for example. The load func- tion can be either synchronous or asyn- chronous: the '160-'163 have synchronous load, which means that data on the input lines are transferred to the counter coinci- dent with the next clock edge, if the LOAD' line is also asserted LOW; the '190-'193 are asynchronous, or jam-load, which means that input data are transferred to the counter when LOAD' is asserted, inde- pendent of the clock. The term "parallel load" is sometimes used, since all bits are loaded at the same time. The CLEAR (or RESET) function is a form of presetting. The majority of coun- ters have a jam-type CLEAR function, though some have synchronous CLEAR; for example, the '1601161are jam CLEAR, while the '1621163 are synchronous CLEAR. Other counter features Some counters feature latches on the out- put lines; these are always of the transpar- ent type, so the counter can be used as if no latch were present. (Keep in mind that any counter with parallel-load inputs can function as latch, but you can't count at the same time as data are held, as you can with a counter/latch chip.) The combi- nation of counter plus latch is sometimes very convenient, e.g., if you want to dis- play or output the previous count while beginning a new counting cycle. In a fre- quency counter this would allow a stable display, with updating after each counting cycle, rather than a display that repeatedly gets reset to zero and then counts up. There are counters with three-state out- puts. These are great for applications wherethe digits (or 4-bit groups) are multi- plexed onto a bus for display or transfer to some other device. An example is the '779, an 8-bit synchronous binary counter whose three-state outputs also serve as parallel inputs; by sharing inputloutput lines, the counter fits in a 16-pin package. The '593 is similar, but in a 20-pin package. If you want a counter to use with a display, there are several that combine counter, latch, 7-segment decoder, and driver on one chip. An example is the 74C925-74C928 series of 4-digit counters. Another amusing chip is the TIL30617, a counter with display on one chip: You just look at the IC, which lights up with a digit telling the count! Figure 8.71 shows a nice LSI (large-scale-integration)counter circuit that doesn't require a lot of support circuits. Table 8.10 at the end of the chapter lists most of the counter chips that you might want to use. Many of them are only available in one family (e.g., LS or F), so be sure to check the data books before you design with them. 8.26 Shift registers If you connect a series of flip-flops so that each Q output drives the next D input, and all clock inputs are driven simultaneously, you get what's called a "shift register." At each clock pulse the pattern of 0's and 1's in the register shifts to the right, with the data at the first D input entering from the left. As with flip- flops, the data present at the serial input just prior to the clock pulse are entered, and there is the usual propagation delay to the outputs. Thus they may be cascaded without fear of a logic race. Shift registers are very useful for conversion of parallel data (n bits present simultaneously, on n separate lines) to serial data (one bit after another, on a single data line), and vice versa. They're also handy as memories, particularly if the data are always read and written in order. As with counters and latches, shift registers come in a pleasant variety of prefab styles. The important things to look for are the following:
- 474. DIGITAL ELECTRONICS 526 Chapter 8 8 [-I I OMMDN CATHODE LED DISPLAY 8 H B H H B H E H ~ol 06 05 D1 D3 D2 01 o, LED II INDICATOR Figure 8.71. Intersil 7216 8-digit 1OMHz universal counter on a chip. (Courtesy of Intersil, Inc.) Size The 4-bit and 8-bit registers are standard, with some larger sizes available (up to 64 bits or more). There are even variable- length registers (e.g., the 4557: 1 to 64 stages, set by a 6-bit input). Organization Shift registers are usually 1 bit wide, but there are also dual-, quad-, and hex- width registers. Most shift registers only shift right, but there are bidirectional registers like the '194 and '323 that have a "direction" input (Fig. 8.72). Watch out for trickery like the "bidirectional" '95, which can shift left only by tying each output bit to the previous input, then doing a parallel load. Inputs and outputs i i I Small shift registers can provide parallel ' inputs or outputs, and usually do; an , example is the '395, a 4-bit parallel-in, parallel-out (PIIPO) shift register with , three-state outputs. Larger registers may I only provide serial input or output, i.e., only the input to the first flip-flop or the output from the last is accessible. In some cases a few selected intermediate taps are provided. One way to provide both par- I allel input and output in a small package is to share input and output (three-state) on the same pins, e.g., the '299, an 8- bit bidirectional PIIPO register in a 20- ,pin package. Some shift registers include a latch at the input or output, so shifting can go on while data are being loaded or unloaded. As with counters, parallel LOAD and I I
- 475. SEQUENTIAL FUNCTIONS AVAILABLE AS ICs 8.27 Sequential PALS 527 outputs & +CLK I RESET input 'Ig4 (shift left) Input (shift r~ght) tI So S, A B C D ] mode parallel-load inputs: inputs SHIFT R LOAD Figure 8.72. '194 4-bit bidirectional shift register. CLEAR can be either synchronous or jam- load; for example, the '323 is the same as the '299, but with synchronous clear. Table 8.11 at the end of the chapter lists the shift registers you're likely to use. As always, not all types are available in all logic families; be sure to check the data books. RAMSas shift registers A random-access memory can always be used as a shift register (but not vice versa) by using an external counter to generate successive addresses. Figure 8.73 shows the idea. An 8-bit synchronous upldown counter generates successive addresses for a 256-wordx4-bit CMOS RAM. The com- bination behaves like a quad 256-bit shift register, with leftfright direction of shift selected by the counter's UPIDOWN' con- trol line. The other inputs of the counter are shown enabled for counting. By choos- ing a fast counter and memory, we were able to achieve a maximum clocking rate of 30MHz (see timing diagram), which is the same as that of an integrated (but much smaller) HC-type shift register. This technique can be used to produce very large shift registers, if desired. EXERCISE 8.28 In the circuit of Figure 8.73, input data seem to go into the same location that output data are read from. Nevertheless, the circuit behaves identically to a classic 256-word shift register. Explain why. 8.27 Sequential PALs The combinational (gates-only) PALs we talked about in Section 8.15 belong to a larger family that includes devices with various numbers of on-chip D-type reg- isters (called "registered PALS"). Typical of these PALs is the 16R8, shown in Fig- ure 8.74. The programmable-ANDffixed- OR array typical of combinational PALS generates the input levels for 8 synchro- nously clocked D-type registers with three- state outputs; the register outputs (and their inverts) are available, along with the standard input pins, as inputs to the logic array. If you look back at Figure 8.57, you'll see that a registered PAL is a general- purpose sequential circuit element; within limits set by the number of registers and gates available, you can construct just about anything you want. For instance, yo