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20ME702 - MECHATRONICS
UNIT-II
8085 MICROPROCESSOR AND 8051
MICROCONTROLLER
Prepared by
S.Chandra Kumar
AP/MECHANICAL
Kongunadu College of
Engineering and Technology
MICROPROCESSOR
• It is a semiconductor component that
incorporates the functions of a central
processing unit (CPU) on a single integrated
circuit (IC) . i.e., the central processing unit
(CPU) built on a single IC is called
microprocessor.
MICROPROCESSOR
• It is multipurpose, programmable and clock
driven,
• Register based electronic device that reads
binary instructions from a storage device
called memory,
• Accept binary data as input, process the data
according to the instruction and provides results
as output.
Functional Block diagram of
Microprocessor
ALU
Register
Array
Control
Microprocessor
Functional Block diagram of
Microprocessor
• ALU (Arithmetic and Logic Unit)
– It carries out arithmetic and logic operations on
8 bit word.
– Arithmetic operation – addition, subtraction ,
multiplication , division etc.,
– Logic operation - AND,OR,EX-OR
– The content of accumulator and temporary register
are the input to the ALU.
– ALU output is stored in accumulator
Register array
– Register is a storage unit within the microprocessor
used to store the data, address of instruction of any
program.
– Microprocessor contained 6 general purpose register it
has 8- bit memory
– Registers are B,C,D,E,H and L
– To hold 16-bit data a combination of two 8-bit
registers can be used.
– The combination of two 8-bit registers is known as
Register Pair (BC, DE and HL).
– These Registers are used to store data temporarily
during execution of the program.
• Control Unit
– The timing and control unit acts as the brain of a
computer.
– It controls all operations of the CPU.
– It controls input, output and all other devices
connected to the CPU.
Evolution of Microprocessor
• First generation Microprocessor
– 1st Microprocessor, Intel 4004, a 4 bit PMOS
(transistor) Microprocessor introduced in 1971 by
the Intel corporation, USA.
– It has limited memory
– An enhanced version of Intel 4004 is Intel 4040.
– e.g., Toshiba’s 73472, Rockwell International’s
PPS-4 National IMP-4 etc.,
Evolution of Microprocessor
• Second generation Microprocessor
– In 1972, Intel introduced 8- bit Microprocessor
named as Intel 8008, which also uses PMOS
technology.
– But this technology was slow and not compatible
– In 1973, Intel introduced more powerful and fast
8- bit NMOS Microprocessor called Intel 8080
– Intel 8085 is the improved version of Intel 8080
• Third generation Microprocessor
– In 1978 Intel introduced a 16- bit Microprocessor
called Intel 8086.
– Other 16- bit Microprocessor are Intel 80186, Intel
80286, zilog’s z8000, Motorola’s 68000, 68010
etc.,
• Forth generation Microprocessor
– In 1985 Intel introduced a 32- bit
Microprocessor called Intel 60386
• Fifth generation Microprocessor
– Intel i860 is a 64 bit RISC microprocessor
TYPES OF COMPUTER
• DIGITAL COMPUTERS
• ANALOG COMPUTERS
– Digital computers main components
• CPU
• MEMORY
• INPUT AND OUTPUT DEVICES
Features of 8085
• Intel 8085 is an 8-bit general purpose
microprocessor
• 40 pins
• +5 V dc supply
• 3MHz single phase clock
• 8085 has
– SID(serial input data)
– SOD (serial output data)
Architecture of 8085
• Three main section
– ALU
– Timing and Control unit
– Set of register
ARCHITECTURE OF 8085
UNIT 2-8085 MICROPROCESSOR AND 8051 MICROCONTROLLER.pdf
• ALU
– Addition, Subtraction, Logical AND,OR…etc
• Timing and Control Unit
– Controls the entire operation of the microprocessor
• Register
– 1 8 bit register (A)- accumulator
– 6 8 bit general purpose register (B,C,D,E,H & L)
– 1 16 bit register –SP(Stack Pointer)
– 1 -16 bit –PC (Program Counter)
– Instruction register
– Temporary register
– Flag register
• ACCUMULATOR:
– 8 Bit register
– Holds one of the data processed by CPU
– It is connected in 8 bit data bus
– It has a bi directional arrow
– Its used to sends or receive data
• TEMPORARY REGISTER:
– Receives data processed by ALU from external
memory
– Other input for the temporary register
– Copied elements stored in the register
• GENERAL PURPOSE REGISTER:
– 8085 Six 8 Bit General PurposeRegister (B,C,D,E,H,L)
– Combination of TWO 8 bit register to give 16 bit is
known register pair
– Programmer cannot form REGISTER PAIR
– H-L pair act as a memory pointer for 16 bit address
• STACK POINTER:
– It is also 16 bit memory pointer, it maintains last
entered data in to stack( stack portion of RAM)
• PROGRAM COUNTER
– 16 bit special purpose register
– Holds the memory address of the next instruction
is executed
• INSTRUCTION REGISTER AND DECODER
– OPCODE instruction will be decoded and executed
– It follows by entire instruction and directs the
timing control unit accordingly.
• Flag register
– Carry flag (CY) – it is set, If carry or borrow occurs
during the arithmetic operation.
– Parity flag (P) – it is set, if the result has even number of
it otherwise made 0.
– Auxiliary carry flag (AC) – Binary coded decimal
operations (BCD)
– Zero flag (z) – is set if the result becomes 0
– Sign flag (S) – is set if the result becomes –ve, if +ve, it
is set to 0
• INTERRUPT CONTROL:
– Necessary input execution, main program to answer a
request from input device.
– Interrupt control indicates a data is ready for input.
– If data input takes place automatically the main
program returns to first step
– Example Reading of book when phone interrupts.
• SERIAL INPUT / OUTPUT:
– Input and output devices work in serial data rather
than parallel
Pin diagram
UNIT 2-8085 MICROPROCESSOR AND 8051 MICROCONTROLLER.pdf
Signals in 8085
• 6 group of signals
• Address bus (A15-A8)-
– unidirectional
• Data bus (AD7-AD0)
– bi-directional both data and
address
• Control and Status signals
– ALE (Address Latch Enable)
– RD,WR,IO/M,S0,S1
• Power supply and Clock
frequency
– VCC +5
– VSS-Ground
– X1,X2
– CLK
• The signals are classified in to six groups:
– Address bus
– Data bus
– Control and status signals
– Power supply and frequency signals
– External initated signals
– Serial I/O ports
ADDRESS BUS
• DATA BUS:
– AD7 – AD0 are bi directional
– During op code fetch operation clock cycle are lower
order address bus
• CONTROL AND STATUS SIGNAL:
– Two Control signals( read and write)
– Three status (input, S1, S2)
• POWER SUPPLY AND CLOCK FREQUENCY
SIGNALS:
– Vcc +5 volts power supply
– Vss Ground reference
• EXTERNALLY INITATED SIGNALS:
– INTR(INPUT) Interrupt signal
– TRAP (It has the highest priority among interrupts)
– RST5.5 and RST 6.5(restart inputs), RST 7.5(I/P)
– READY (Command is for transfer files)
– HOLD (other device for requesting for the use)
– RESET IN (Program counter to zero)
– RESET OUT (Entire device and micropro is reset)
ADRESSING MODES IN 8085
• Direct addressing
• Register addressing
• Register indirect addressing
• Immediate addressing
• Implicit addressing
• Direct addressing
– Stored in memory
– Exact memory location in the instruction as byte2
and byte 3
• Register addressing
– Data Stored in a register or register pair.
– MOV B, D
– INX H
• Register indirect addressing
– Data stored in memory , memory location stored in
register pair
– First register pair contains higher order pair(H-B)
– second register pair contains lower order pair(D-E)
–LXI H, 2500H
–MOV A, B
–HLT (halt)
• Immediate addressing
– Data stored along with instruction
–MVI A, 05
–3E, 05
• Implicit addressing
–There are certain instruction which operate
the content of the accumulator.
–Such instruction do not require the address of
the operand
–CMA ( complement the accumulator)
–RAL (rotate accumulator left)
–RAR (rotate accumulator right)
INSTRUCTION SETS 8085
• Data transfer group
• Arithmetic group
• Logical group
• Branch group
• Stack, I/O and Machine control group
Data transfer group
• MOV r1,r2 (move the content of Register to
register)
• MOV r, M (move the content of memory to
register)
• MOV M, r (move the content of Register to memory)
• MVI r1, data (Move immediate data to register)
• MVI M, data (Move immediate data to memory)
• LDA data (Load acclumator direct)
• STA addr (store accumulator direct)
• XCHG (exchange the content of H-L with D-E pair)
• LHLD addr (Load HL pair direct)
• SHLD addr (Store HL pair direct)
• STAX xp ( store accumulator Indirect)
Arithmetic group
• ADD r (Add register to accumulator)
• ADD M (Add memory to accumulator)
• ADI data (Add immediate data to accumulator)
• ADC M (Add memory with carry to acculamator)
• SUB r (Subtract register to accumulator)
• SUB M (Subtract memory from accumulator)
• SUI data (Subtract immediate data from accumulator)
• SBB r (Subtract register from accumulator with barrow)
• SBB M (Subtract memory from accumulator with
barrow)
• INR r (Increment to register content)
• INR M (Increment memory content)
• DCR r (Decrement to register content)
• DCR M (Decrement memory content)
Logical group
• ANA r ( AND register with Accumulator)
• ANA M ( AND memory with Accumulator)
• ANI data (AND immediate data with accumulator)
• ORA r (OR Register with Accumulator)
• ORA M ( OR memory with Accumulator)
• ORI data (OR immediate data with accumulator)
• XRA r (Exclusive OR register with accumulator)
• XRA m (Exclusive OR memory with accumulator)
• XRI data (Exclusive OR data with accumulator)
• CMA (complement the accumulator)
• CMC(complement carry)
• CMP r (Compare register with accumulator)
• CMP M (Compare memory with accumulator)
• CPI data (Compare immediate data with accum)
• RLC (rotate accumulator left)
• RRC (Rotate accumulator right)
• RAL (Rotate accumulator left through carry)
• RAR (Rotate accumulator Right through carry)
Branch group
• Two branch instruction
–Conditional
• The conditional branch instructions transfer
the program to the specified label when
certain condition is satisfied .
–Unconditional
• The Un conditional branch instructions
transfer the program to the specified label
Unconditionally.
• Conditional jumb addr (label)
– If the condition is true and the program jumps to the
specified label, the execution of a conditional jump
takes 3 machine cycles and 10 states
– If the condition is not true, only two machine cycles
and 7 states are required for the execution of the
instruction.
• CALL addr (label)
– Call the subroutine identified by the operand
– CC addr (call subroutine if carry status CS=1)
– CNC addr (call subroutine if carry status CS=0)
– CZ addr (call subroutine if result is zero)
– CNZ addr (call subroutine if result is not zero)
– CP addr (call subroutine if result is plus)
– CM addr (call subroutine if result is minus)
– CPE addr (call subroutine if even parity)
– CPOE addr (call subroutine if odd parity)
• Unconditional
– RET(Return from Subroutine)
– CALL addr
– RSTn (Restart)
Stack ,I/O and Machine control
Group
• PUSH rp [push the content of register pair to stack)
• PUSH PSW [push the program status to word]
• POP rp [pop the content of register pair which
was saved from the stack]
• IN PORT
• OUT PORT
• EI (enable interrupts)
• DI(disable interrupts)
• HLT (halt)
• NOP( not in operation)
• RIM(read interrupts mask)
• SIM (set interrupts mask)
SIM( Set Interrupts Mask)
RIM ( Read Interrupts Mask)
Timing diagram of 8085 (16 mark)
• Opcode fetch cycle (4T or 6T)
• Memory Read cycle (3T)
• Memory write cycle (3T)
• I/O read cycle (3T)
• I/O write cycle (3T)
• Interrupt acknowledge (6T or 12T)
• Bus idle cycle (2T or 3T)
– Processor execute the machine cycle is called T-state
Opcode fetch cycle
Opcode fetch cycle
• T1,T2,T3,T4 are consequtives Four clock cycles
• Microprocessor issues low input signals
indicates Communicate with the memory.
• S0,S1 signals indicate that peform fetch
operation
• During first clock cycle , Microprocessor sends
out address of memory location
• 16 bit address sends through Address bus A
Memory Read cycle
Microprocessor reads the content of the memory
location
MEMORY WRITE CYCLE
• Memory device CPU sends data from
accumulator
• Signal status S0,S1 are 1 and 0 respectively
• WR goes low in T2
Memory write cycle
I/O read cycle
I/O read cycle
• An I/O read cycle Data available in a input port
or input device
• Only difference between a memory read cycle
or input read cycle input signal goes for high.
I/O write cycle
I/O Write cycle
• An i/o write cycle , the cpu sends the data to an
input port or device from Accumulator
• Input write cycle is high indicating that address
sent out the cpu for input for i/o device.
• Two byte long instruction requires for 3 machine
cycles
Microcontroller
• A Microcontroller is a small computer on a
single integrated circuit containing a
processor core, memory and programmable
input/output peripherals.
• Micro controller are used in automatically
controlled products and devices such as
Automobile engine system, remote controls,
office machines, toys , etc.,
Features Microcontroller
• 8 bit CPU
• On chip oscillator
• 4Kb of ROM
• 128 bytes of RAM
• 21 special functions register
• 32 I/O lines
• 64 KB address space for external data memory
• 64 KB address space for program memory
• Two 16-bit timer/counter
Block diagram of 8051
128 byte RAM
• Micro controller 8051 has 256 byte ram,128 byte
RAM for data storage, it is non volatile
• RAM consists of temporary data register storage.
• It consists of special function register used for
Timer, Input/ output ports,
• Generally micro controllers have 256 bytes RAM,
128 For register banks, and 128 byte consists of
special function register.
4KB ROM
• In 8051 4KB ROM for permanent data storage
• This non-volatile memory
• We can interface up to 64 kb for large size
application
• Address change PC (Program counters)
instructions can be moved the locations and save
the program.
Timers and counters:
• Timers used to give the delay of particular time
between some events
• Hardware pins were can counting some external
events
• In8051 Two pins are available T0 and T1.
• Two special registers are available, 16 bit. 8Bit
data for lower bytes, another for higher bytes.
• TMOD and TCON registers used for
controlling timing operation
SERIAL PORTS
• Two pins are available, TDX and RDX
• TDX for transmitting the data
• RDX for receiving the data
• SCON register for controlling the operation
INPUT OUTPUT PORTS
• Four input ports available, P0,P1,P2,P3
• Each port 8 bit special function register
• Reset instrucion by SEBT for high and CLR for
low
• Port 0 for peform Dual functions
OSCILLATOR
• Providing the clock to 8051 it decides the speed
rate of Micro controller
• Frequency vary from 4 MHz TO 30 MHz
• Normally we use 11.059 MHZ
INTERRUPTS:
• Interrupts are requests because they refused
• INT0 and INT1 are interrupts
COMPARISON
MICROPROCESSOR
• Digital computer
• Its has IC only CPU
• It requires more hardware
• More flexible for design
• It operates 1GHz
• High cost
• It cannot be used stand
alone
MICRO CONTROLLER
• Special purpose digital
computers
• It has CPU, RAM, ROM
• Less hardware
• Less flexible for design
• It operate 30-50 MHz
• Low cost
• It can be used stand alone

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UNIT 2-8085 MICROPROCESSOR AND 8051 MICROCONTROLLER.pdf

  • 1. 20ME702 - MECHATRONICS UNIT-II 8085 MICROPROCESSOR AND 8051 MICROCONTROLLER Prepared by S.Chandra Kumar AP/MECHANICAL Kongunadu College of Engineering and Technology
  • 2. MICROPROCESSOR • It is a semiconductor component that incorporates the functions of a central processing unit (CPU) on a single integrated circuit (IC) . i.e., the central processing unit (CPU) built on a single IC is called microprocessor.
  • 3. MICROPROCESSOR • It is multipurpose, programmable and clock driven, • Register based electronic device that reads binary instructions from a storage device called memory, • Accept binary data as input, process the data according to the instruction and provides results as output.
  • 4. Functional Block diagram of Microprocessor ALU Register Array Control Microprocessor
  • 5. Functional Block diagram of Microprocessor • ALU (Arithmetic and Logic Unit) – It carries out arithmetic and logic operations on 8 bit word. – Arithmetic operation – addition, subtraction , multiplication , division etc., – Logic operation - AND,OR,EX-OR – The content of accumulator and temporary register are the input to the ALU. – ALU output is stored in accumulator
  • 6. Register array – Register is a storage unit within the microprocessor used to store the data, address of instruction of any program. – Microprocessor contained 6 general purpose register it has 8- bit memory – Registers are B,C,D,E,H and L – To hold 16-bit data a combination of two 8-bit registers can be used. – The combination of two 8-bit registers is known as Register Pair (BC, DE and HL). – These Registers are used to store data temporarily during execution of the program.
  • 7. • Control Unit – The timing and control unit acts as the brain of a computer. – It controls all operations of the CPU. – It controls input, output and all other devices connected to the CPU.
  • 8. Evolution of Microprocessor • First generation Microprocessor – 1st Microprocessor, Intel 4004, a 4 bit PMOS (transistor) Microprocessor introduced in 1971 by the Intel corporation, USA. – It has limited memory – An enhanced version of Intel 4004 is Intel 4040. – e.g., Toshiba’s 73472, Rockwell International’s PPS-4 National IMP-4 etc.,
  • 9. Evolution of Microprocessor • Second generation Microprocessor – In 1972, Intel introduced 8- bit Microprocessor named as Intel 8008, which also uses PMOS technology. – But this technology was slow and not compatible – In 1973, Intel introduced more powerful and fast 8- bit NMOS Microprocessor called Intel 8080 – Intel 8085 is the improved version of Intel 8080
  • 10. • Third generation Microprocessor – In 1978 Intel introduced a 16- bit Microprocessor called Intel 8086. – Other 16- bit Microprocessor are Intel 80186, Intel 80286, zilog’s z8000, Motorola’s 68000, 68010 etc., • Forth generation Microprocessor – In 1985 Intel introduced a 32- bit Microprocessor called Intel 60386 • Fifth generation Microprocessor – Intel i860 is a 64 bit RISC microprocessor
  • 11. TYPES OF COMPUTER • DIGITAL COMPUTERS • ANALOG COMPUTERS – Digital computers main components • CPU • MEMORY • INPUT AND OUTPUT DEVICES
  • 12. Features of 8085 • Intel 8085 is an 8-bit general purpose microprocessor • 40 pins • +5 V dc supply • 3MHz single phase clock • 8085 has – SID(serial input data) – SOD (serial output data)
  • 13. Architecture of 8085 • Three main section – ALU – Timing and Control unit – Set of register
  • 16. • ALU – Addition, Subtraction, Logical AND,OR…etc • Timing and Control Unit – Controls the entire operation of the microprocessor • Register – 1 8 bit register (A)- accumulator – 6 8 bit general purpose register (B,C,D,E,H & L) – 1 16 bit register –SP(Stack Pointer) – 1 -16 bit –PC (Program Counter) – Instruction register – Temporary register – Flag register
  • 17. • ACCUMULATOR: – 8 Bit register – Holds one of the data processed by CPU – It is connected in 8 bit data bus – It has a bi directional arrow – Its used to sends or receive data • TEMPORARY REGISTER: – Receives data processed by ALU from external memory – Other input for the temporary register – Copied elements stored in the register
  • 18. • GENERAL PURPOSE REGISTER: – 8085 Six 8 Bit General PurposeRegister (B,C,D,E,H,L) – Combination of TWO 8 bit register to give 16 bit is known register pair – Programmer cannot form REGISTER PAIR – H-L pair act as a memory pointer for 16 bit address
  • 19. • STACK POINTER: – It is also 16 bit memory pointer, it maintains last entered data in to stack( stack portion of RAM) • PROGRAM COUNTER – 16 bit special purpose register – Holds the memory address of the next instruction is executed • INSTRUCTION REGISTER AND DECODER – OPCODE instruction will be decoded and executed – It follows by entire instruction and directs the timing control unit accordingly.
  • 20. • Flag register – Carry flag (CY) – it is set, If carry or borrow occurs during the arithmetic operation. – Parity flag (P) – it is set, if the result has even number of it otherwise made 0. – Auxiliary carry flag (AC) – Binary coded decimal operations (BCD) – Zero flag (z) – is set if the result becomes 0 – Sign flag (S) – is set if the result becomes –ve, if +ve, it is set to 0
  • 21. • INTERRUPT CONTROL: – Necessary input execution, main program to answer a request from input device. – Interrupt control indicates a data is ready for input. – If data input takes place automatically the main program returns to first step – Example Reading of book when phone interrupts. • SERIAL INPUT / OUTPUT: – Input and output devices work in serial data rather than parallel
  • 24. Signals in 8085 • 6 group of signals • Address bus (A15-A8)- – unidirectional • Data bus (AD7-AD0) – bi-directional both data and address • Control and Status signals – ALE (Address Latch Enable) – RD,WR,IO/M,S0,S1 • Power supply and Clock frequency – VCC +5 – VSS-Ground – X1,X2 – CLK
  • 25. • The signals are classified in to six groups: – Address bus – Data bus – Control and status signals – Power supply and frequency signals – External initated signals – Serial I/O ports
  • 27. • DATA BUS: – AD7 – AD0 are bi directional – During op code fetch operation clock cycle are lower order address bus • CONTROL AND STATUS SIGNAL: – Two Control signals( read and write) – Three status (input, S1, S2)
  • 28. • POWER SUPPLY AND CLOCK FREQUENCY SIGNALS: – Vcc +5 volts power supply – Vss Ground reference • EXTERNALLY INITATED SIGNALS: – INTR(INPUT) Interrupt signal – TRAP (It has the highest priority among interrupts) – RST5.5 and RST 6.5(restart inputs), RST 7.5(I/P) – READY (Command is for transfer files) – HOLD (other device for requesting for the use) – RESET IN (Program counter to zero) – RESET OUT (Entire device and micropro is reset)
  • 29. ADRESSING MODES IN 8085 • Direct addressing • Register addressing • Register indirect addressing • Immediate addressing • Implicit addressing
  • 30. • Direct addressing – Stored in memory – Exact memory location in the instruction as byte2 and byte 3 • Register addressing – Data Stored in a register or register pair. – MOV B, D – INX H
  • 31. • Register indirect addressing – Data stored in memory , memory location stored in register pair – First register pair contains higher order pair(H-B) – second register pair contains lower order pair(D-E) –LXI H, 2500H –MOV A, B –HLT (halt) • Immediate addressing – Data stored along with instruction –MVI A, 05 –3E, 05
  • 32. • Implicit addressing –There are certain instruction which operate the content of the accumulator. –Such instruction do not require the address of the operand –CMA ( complement the accumulator) –RAL (rotate accumulator left) –RAR (rotate accumulator right)
  • 33. INSTRUCTION SETS 8085 • Data transfer group • Arithmetic group • Logical group • Branch group • Stack, I/O and Machine control group
  • 34. Data transfer group • MOV r1,r2 (move the content of Register to register) • MOV r, M (move the content of memory to register) • MOV M, r (move the content of Register to memory) • MVI r1, data (Move immediate data to register) • MVI M, data (Move immediate data to memory) • LDA data (Load acclumator direct) • STA addr (store accumulator direct) • XCHG (exchange the content of H-L with D-E pair)
  • 35. • LHLD addr (Load HL pair direct) • SHLD addr (Store HL pair direct) • STAX xp ( store accumulator Indirect)
  • 36. Arithmetic group • ADD r (Add register to accumulator) • ADD M (Add memory to accumulator) • ADI data (Add immediate data to accumulator) • ADC M (Add memory with carry to acculamator) • SUB r (Subtract register to accumulator) • SUB M (Subtract memory from accumulator) • SUI data (Subtract immediate data from accumulator) • SBB r (Subtract register from accumulator with barrow) • SBB M (Subtract memory from accumulator with barrow)
  • 37. • INR r (Increment to register content) • INR M (Increment memory content) • DCR r (Decrement to register content) • DCR M (Decrement memory content)
  • 38. Logical group • ANA r ( AND register with Accumulator) • ANA M ( AND memory with Accumulator) • ANI data (AND immediate data with accumulator) • ORA r (OR Register with Accumulator) • ORA M ( OR memory with Accumulator) • ORI data (OR immediate data with accumulator) • XRA r (Exclusive OR register with accumulator) • XRA m (Exclusive OR memory with accumulator) • XRI data (Exclusive OR data with accumulator)
  • 39. • CMA (complement the accumulator) • CMC(complement carry) • CMP r (Compare register with accumulator) • CMP M (Compare memory with accumulator) • CPI data (Compare immediate data with accum) • RLC (rotate accumulator left) • RRC (Rotate accumulator right) • RAL (Rotate accumulator left through carry) • RAR (Rotate accumulator Right through carry)
  • 40. Branch group • Two branch instruction –Conditional • The conditional branch instructions transfer the program to the specified label when certain condition is satisfied . –Unconditional • The Un conditional branch instructions transfer the program to the specified label Unconditionally.
  • 41. • Conditional jumb addr (label) – If the condition is true and the program jumps to the specified label, the execution of a conditional jump takes 3 machine cycles and 10 states – If the condition is not true, only two machine cycles and 7 states are required for the execution of the instruction.
  • 42. • CALL addr (label) – Call the subroutine identified by the operand – CC addr (call subroutine if carry status CS=1) – CNC addr (call subroutine if carry status CS=0) – CZ addr (call subroutine if result is zero) – CNZ addr (call subroutine if result is not zero) – CP addr (call subroutine if result is plus) – CM addr (call subroutine if result is minus) – CPE addr (call subroutine if even parity) – CPOE addr (call subroutine if odd parity)
  • 43. • Unconditional – RET(Return from Subroutine) – CALL addr – RSTn (Restart)
  • 44. Stack ,I/O and Machine control Group • PUSH rp [push the content of register pair to stack) • PUSH PSW [push the program status to word] • POP rp [pop the content of register pair which was saved from the stack] • IN PORT • OUT PORT • EI (enable interrupts)
  • 45. • DI(disable interrupts) • HLT (halt) • NOP( not in operation) • RIM(read interrupts mask) • SIM (set interrupts mask)
  • 47. RIM ( Read Interrupts Mask)
  • 48. Timing diagram of 8085 (16 mark) • Opcode fetch cycle (4T or 6T) • Memory Read cycle (3T) • Memory write cycle (3T) • I/O read cycle (3T) • I/O write cycle (3T) • Interrupt acknowledge (6T or 12T) • Bus idle cycle (2T or 3T) – Processor execute the machine cycle is called T-state
  • 50. Opcode fetch cycle • T1,T2,T3,T4 are consequtives Four clock cycles • Microprocessor issues low input signals indicates Communicate with the memory. • S0,S1 signals indicate that peform fetch operation • During first clock cycle , Microprocessor sends out address of memory location • 16 bit address sends through Address bus A
  • 51. Memory Read cycle Microprocessor reads the content of the memory location
  • 52. MEMORY WRITE CYCLE • Memory device CPU sends data from accumulator • Signal status S0,S1 are 1 and 0 respectively • WR goes low in T2
  • 55. I/O read cycle • An I/O read cycle Data available in a input port or input device • Only difference between a memory read cycle or input read cycle input signal goes for high.
  • 57. I/O Write cycle • An i/o write cycle , the cpu sends the data to an input port or device from Accumulator • Input write cycle is high indicating that address sent out the cpu for input for i/o device. • Two byte long instruction requires for 3 machine cycles
  • 58. Microcontroller • A Microcontroller is a small computer on a single integrated circuit containing a processor core, memory and programmable input/output peripherals.
  • 59. • Micro controller are used in automatically controlled products and devices such as Automobile engine system, remote controls, office machines, toys , etc.,
  • 60. Features Microcontroller • 8 bit CPU • On chip oscillator • 4Kb of ROM • 128 bytes of RAM • 21 special functions register • 32 I/O lines • 64 KB address space for external data memory • 64 KB address space for program memory • Two 16-bit timer/counter
  • 62. 128 byte RAM • Micro controller 8051 has 256 byte ram,128 byte RAM for data storage, it is non volatile • RAM consists of temporary data register storage. • It consists of special function register used for Timer, Input/ output ports, • Generally micro controllers have 256 bytes RAM, 128 For register banks, and 128 byte consists of special function register.
  • 63. 4KB ROM • In 8051 4KB ROM for permanent data storage • This non-volatile memory • We can interface up to 64 kb for large size application • Address change PC (Program counters) instructions can be moved the locations and save the program.
  • 64. Timers and counters: • Timers used to give the delay of particular time between some events • Hardware pins were can counting some external events • In8051 Two pins are available T0 and T1. • Two special registers are available, 16 bit. 8Bit data for lower bytes, another for higher bytes. • TMOD and TCON registers used for controlling timing operation
  • 65. SERIAL PORTS • Two pins are available, TDX and RDX • TDX for transmitting the data • RDX for receiving the data • SCON register for controlling the operation INPUT OUTPUT PORTS • Four input ports available, P0,P1,P2,P3 • Each port 8 bit special function register • Reset instrucion by SEBT for high and CLR for low • Port 0 for peform Dual functions
  • 66. OSCILLATOR • Providing the clock to 8051 it decides the speed rate of Micro controller • Frequency vary from 4 MHz TO 30 MHz • Normally we use 11.059 MHZ INTERRUPTS: • Interrupts are requests because they refused • INT0 and INT1 are interrupts
  • 67. COMPARISON MICROPROCESSOR • Digital computer • Its has IC only CPU • It requires more hardware • More flexible for design • It operates 1GHz • High cost • It cannot be used stand alone MICRO CONTROLLER • Special purpose digital computers • It has CPU, RAM, ROM • Less hardware • Less flexible for design • It operate 30-50 MHz • Low cost • It can be used stand alone