UNIT 3.pptx
- 1. UNIT 3 ARM Cortex Presented by, Amruta Ingle Assistant Professor, BVUCOEP
- 2. ARM Microcontroller INTRODUCTION: • The ARM stands for Advanced RISC Machine and basically it is available as a 32-bit RISC microcontroller. • It was first introduced by the Acron Computer’s Organization in 1987. • Like other microcontrollers, the ARM is also a family of microcontroller architecture and this patent has been brought by different microcontroller chip designers and they are manufacturing micro-controllers such as ST Microelectronics, Motorola, NXP, etc. • Basically the ARM comes with the different versions as each version has its own merit and demerit. • The ARM processor family maintains his own design from 1987 when they have started their ARM microcontroller basics design.
- 4. The ARM Architecture • The ARM is having different variants available in the commercial market, but the ARM Cortex family which developed by the ARMv7 architecture. This is again divided into 3 subfamilies as: • ARM-Cortex Ax-series. • ARM-Cortex Rx-series. • ARM-Cortex Mx-series. • Since this is famous and used in most of the Embedded devices.
- 5. ARM Cortex-M3 MCU Architecture • The Cortex-M3 processor is a high performance low- cost 32-bit processor. • The ARM is a “Harvard Architecture” based processor that offer’s the separate Data and instruction line for communicating with RAM, ROM, etc. • This is having consists 3-stage pipeline to fetch, decode, and execute the instructions sequentially. • The Cortex series processors are the cost-sensitive device which is used to reduce the processor area and has extensive NVIC interrupt handling, and system debugs capability.
- 7. ARM Cortex-M3 MCU Architecture The ARM Architecture • Arithmetic Logic Unit • Booth multiplier • Barrel shifter • Control unit • Register file
- 8. ARM Cortex-M3 MCU Architecture • The ARM processor conjointly has other components like the Program status register, which contains the processor flags (Z, S, V and C). The modes bits conjointly exist within the program standing register, in addition to the interrupt and quick interrupt disable bits; Some special registers: Some registers are used like the instruction, memory data read and write registers and memory address register. • Priority encoder: The encoder is used in the multiple load and store instruction to point which register within the register file to be loaded or kept . • Multiplexers: several multiplexers are accustomed to the management operation of the processor buses. Because of the restricted project time, we tend to implement these components in a very behavioural model. Each component is described with an entity. Every entity has its own architecture, which can be optimized for certain necessities depending on its application. This creates the design easier to construct and maintain.
- 9. ARM Cortex-M3 MCU Architecture
- 10. ARM Cortex-M3 MCU Architecture • Arithmetic Logic Unit (ALU) • The ALU has two 32-bits inputs. The primary comes from the register file, whereas the other comes from the shifter. Status registers flags modified by the ALU outputs. The V-bit output goes to the V flag as well as the Count goes to the C flag. Whereas the foremost significant bit really represents the S flag, the ALU output operation is done by NORed to get the Z flag. The ALU has a 4-bit function bus that permits up to 16 opcode to be implemented.
- 11. ARM Cortex-M3 MCU Architecture • Booth Multiplier Factor • The multiplier factor has 3 32-bit inputs and the inputs return from the register file. The multiplier output is barely 32-Least Significant Bits of the merchandise. The entity representation of the multiplier factor is shown in the above block diagram. The multiplication starts whenever the beginning 04 input goes active. Fin of the output goes high when finishing.
- 12. ARM Cortex-M3 MCU Architecture • Barrel Shifter • The barrel shifter features a 32-bit input to be shifted. This input is coming back from the register file or it might be immediate data. The shifter has different control inputs coming back from the instruction register. The Shift field within the instruction controls the operation of the barrel shifter. This field indicates the kind of shift to be performed (logical left or right, arithmetic right or rotate right). The quantity by which the register ought to be shifted is contained in an immediate field within the instruction or it might be the lower 6 bits of a register within the register file. • The shift_val input bus is 6-bits, permitting up to 32 bit shift. The shifttype indicates the needed shift sort of 00, 01, 10, 11 are corresponding to shift left, shift right, an arithmetic shift right and rotate right, respectively. The barrel shifter is especially created with multiplexers.
- 13. ARM Cortex-M3 MCU Architecture • Control Unit • For any microprocessor, control unit is the heart of the whole process and it is responsible for the system operation,so the control unit design is the most important part within the whole design. The control unit is sometimes a pure combinational circuit design. Here, the control unit is implemented by easy state machine. The processor timing is additionally included within the control unit. Signals from the control unit are connected to each component within the processor to supervise its operation.