Hot Interconnects

Registration to IEEE Hot Interconnects 2025 is open: https://lnkd.in/g43JjsVc This year at Hot Interconnects promises to be an eventful one! 🎤 Keynotes from industry leaders: * Amin Vahdat (Google) * Deepak Bansal (Microsoft / Microsoft Azure ) Invited talk from the Ultra Ethernet Consortium by Torsten Hoefler 🇨🇭(ETH Zürich, CSCS). One more impactful surprise talk - to be revealed soon 🧨 🔥 Don’t miss our always-lively panel discussion: “LLM Token Economy: How is networking going to play in the age of agents?” Our technical program features nine peer-reviewed papers across * Network Synchronization and Routing * Co-packaged Optics * Interconnect Software - Runtimes & Workloads * Scale-up Interconnects Plus, gain hands-on experience with four practical tutorials: * NCCL/NVSHMEM: GPU Communication Libraries For Accelerating HPC and AI Applications by NVIDIA * High-Performance and Smart Networking Technologies for HPC and AI by The Ohio State University * Libfabric by Intel Corporation * Principles and Practice of Scalable and Distributed Deep Neural Networks Training and Inference by The Ohio State University Lightmatter, Cornelis Networks, Cisco, Nubis Communications, Avicena Tech, Arista Networks, Ultra Accelerator Link Consortium, Celestial AI, Meta, GigaIO, Lenovo, Dell Technologies, IEEE Computer Society, HPCwire #conference #hoti #hoti25

Discover NVIDIA NVLink Fusion on Aug 21st! There was a lot of noise around NVLink Fusion recently. We are thrilled that on the 2nd day of the IEEE Hot Interconnects 2025, Krishnan Geeyarpuram, Senior Distinguished Engineer and Senior Director of Product Architecture at NVIDIA, will be giving an invited talk on "Building Custom AI Infrastructure with NVLink Fusion", diving into the details of this exciting technology. Abstract: Rack-scale infrastructure is essential for today’s large-scale AI deployments. As large language models (LLMs) grow in complexity, flexible systems must efficiently run both enormous individual models and coordinated sets of smaller models, such as Mixture of Experts (MoE) architectures. The NVIDIA NVL72 GB300 —built with NVLink for scale-up and high-performance networking for scale-out—has become an industry standard. In this talk, we introduce NVLink Fusion: a new technology empowering hyperscalers to tailor both AI and compute subsystems, optimizing infrastructure for diverse workloads. We will demonstrate how NVLink Fusion extends the advantages of NVLink scale-up while integrating seamlessly with a robust partner ecosystem at the rack scale, ensuring performance and versatility for future AI demands.
 Biography: Krishnan Geeyarpuram is a Senior Distinguished Engineer and Senior Director of Product Architecture at NVIDIA. He leads the product architecture for next-generation server processors and custom silicon solutions, driving innovation for high-performance computing and data center applications.  He was previously at senior positions at Apple, where he architected custom silicon and system architecture for the Apple Watch at Apple and Intel, where he was an architect for Xeon processors. Krishnan holds multiple patents and is known for his technical leadership and ability to deliver complex products from concept to production. In his current role at NVIDIA, he works at the intersection of hardware innovation and product strategy.  He holds a master’s degree in Computer Science from The University of Texas at Austin and a Bachelor’s degree in Computer Science from the Indian Institute of Technology, Madras. 
Stay tuned! NVIDIA Networking IEEE Computer Society #hoti #hoti25 #NVLinkFusion

Want to know about the innovation behind Meta’s AI Infrastructure? - On Aug 21, Wesley Bland, Research Scientist at Meta, will give a sponsor talk on “AI Infra at Meta” at IEEE Hot Interconnects 2025. Abstract: Meta is building AI infrastructure at enormous scale to handle a large breadth of workloads, from Generative AI to Machine Learning. These workloads require innovation in compute, storage, power, and of course, networking. Meta continue to take great strides to innovate in this space including creating our own custom silicon, MTIA, to improve both performance and cost. In this talk, we will take a quick tour of the work going on at Meta and see the direction it is moving. Bio:
 Wes Bland is a Research Scientist at Meta Platforms focusing primarily on HPC communication co-design. He has spent more than 15 years working in the HPC communication space including contributions to the MPI Standard as well as MPI implementations. He was previously the chair of the fault tolerance working group and has held the position of MPI Forum Secretary since 2017. Wesley received his PhD in Computer Science from the University of Tennessee, Knoxville. Stay tuned! IEEE Computer Society #hoti #hoti25 #Meta

Do not miss our always-lively panel discussion on August 20 – "LLM Token Economy: How is networking going to play in the age of agents?" at IEEE Hot Interconnects 2025. Link: https://lnkd.in/ges2-jSU Moderator: Peter Olcott, Principal at First Spark Ventures Panelists: * Phil Brown, AI Systems Engineer at Meta * Davor Capalija, Senior Fellow, AI Software and Architecture at Tenstorrent * Ethan Lockshin, AE, Commercial at Groq * Sid Sheth, Founder and CEO at d-Matrix Abstract: New business models in LLM workloads are reshaping the interconnect landscape. While ongoing challenges such as low latency, high bandwidth, and reliability persist, the emergence of scale-up networking creates new opportunities for performance with orders of magnitude more bandwidth. On the other end of the spectrum, applications are scaling across multiple data centers, trying to harness a million endpoints. The ability of software to deliver performance across the system holistically has become more challenging than ever, pushing the need for co-design. This HotI panel assembles experts from across the hardware and software stack to foster a discussion of these complex, multi-dimensional problems. The panel will explore the trade-offs between closed, and open AI models. Simultaneously, the panel will feature bleeding edge application developers, who will share their experiences leveraging current hardware, articulate their most pressing challenges, and envision the game-changing features that could revolutionize interconnect performance for their applications. IEEE Computer Society #hoti #hoti25

Curious about the energy efficiency of the optic interconnects? - On August 21st, Andreas “Andy” Bechtolsheim, Co-Founder and Chief Architect of Arista Networks, will deliver a sponsor talk on “Multiple Pathways to Energy Efficient Optics” at IEEE Hot Interconnects 2025. Abstract: Andy will discuss power efficiencies and implementation complexity for a wide range of optics interconnect solutions for 200G/lane, 400G/lane, and slow-and-wide optics. Bio: Andreas “Andy” Bechtolsheim is Co-Founder and Chief Architect of Arista Networks, a leading vendor of cloud networking solutions. Previously, Andy was a Co-Founder and Chief System Architect at Sun Microsystems, responsible for next generation server, storage, and network architectures. As a private venture investor, Andy has been involved in the funding of numerous companies including Google, VMware, Mellanox, and Brocade. He has served on the Board of Directors of over 25 companies, the majority of which went public or were acquired. Andy earned a M.S. in Computer Engineering from Carnegie Mellon University in 1976 and was a doctoral student in Computer Engineering at Stanford University from 1977 to 1982. He has been honored with a Fulbright scholarship, a Studienstiftung scholarship, the Stanford Entrepreneur Company of the year award, the Smithsonian Leadership Award for Innovation, and is a member of the National Academy of Engineering. Stay tuned! IEEE Computer Society #hoti #hoti25 #arista

On August 20, Will Eatherton, SVP, Data Center, Internet & Cloud Infrastructure Engineering at Cisco will deliver a sponsor talk on “Managing the fabrics underpinning AI infrastructure” at IEEE Hot Interconnects 2025. Abstract: As an industry we often oscillate between two extremes; loosely coupled, heterogeneous, robust infrastructure with limited failure domains on one end; tightly coupled, monolithic and homogenous infrastructure with a system wide blast radius on the other. This pattern has manifested in high-performance compute with today’s AI/ML infrastructure exhibiting homogeneity and a lack of robustness in the pursuit of maximized performance. The real-world implications on connectivity management for scale-up approaches in contrast with scale-out technology adds another dimension of consideration for operators. This talk will explore today’s embedded and management software approaches to these infrastructures and will discuss the evolution of this stack going forward to facilitate more robust heterogeneous architectures whilst preserving optimal performance and user experience. Bio:
 As the SVP of the Data Center, Internet & Cloud Infrastructure Engineering team, Will leads a wide-ranging group responsible for data center, web, and service provider solutions. This group encompasses cutting-edge technologies, longstanding Cisco product lines, and the recently launched Cisco 8000 series.  Will initially joined Cisco in 2000 with the acquisition of Growth Networks. During his early years at Cisco, Will expanded his expertise in routing systems architecture and co-authored several patents on packet processing. In 2013, Will co-founded Skyport Systems, a cloud technology pioneer addressing industry gaps in cloud-managed secure virtualized systems. In 2018, Will returned to Cisco with the acquisition of Skyport Systems. With his return, Will has led the Cisco Networking Engineering team, bringing with him a wealth of industry knowledge and experience.  Will is an active technology researcher, author, and speaker. His most recent speaking engagements include sessions on high-performance ethernet fabrics for AI infrastructure and enabling enterprise generative AI with ethernet AI networking.  Will has a master’s degree in Electric Engineering from Washington University in St. Louis, MO, and a Bachelor’s in Electric Engineering from the Missouri University of Science and Technology. IEEE Computer Society Cisco Networking 
#hoti #hoti25 #cisco

At IEEE Hot Interconnects, we know how critical it is to stay ahead of the curve in advanced computing architectures. That’s why we’re keeping a close eye on IEEE Quantum Week 2025: https://lnkd.in/eTvvWiSa Explore what's next in Quantum! Discover over 200 technical papers, 140 posters, and 40 workshops and tutorials, bridging the gap in quantum computing, at IEEE Quantum Week 2025 in Albuquerque, NM. IEEE Computer Society #hoti #hoti25 #QuantumWeek

On August 20, Matthew Williams, Field CTO at Cornelis Networks will deliver a sponsor talk on “Reimagining the Scale-Out Architecture for HPC and AI” at IEEE Hot Interconnects 2025. Abstract: High performance applications such as AI training, AI inference and HPC scientific modelling are all benefitting from the dramatic performance increases of CPUs, GPUs and other accelerators. These applications rely on massive parallelization, but in many cases, the scale-out, inter-node interconnect that parallelization relies upon is not up for the challenge, and becomes the primary bottleneck in the system. This leads to dramatic under-utilization of expensive assets, and is both a technical and business challenge. There are several key metrics that determine how an interconnect will impact the performance of challenging applications including message rate, latency, bandwidth and speed of congestion management. In this talk, Matthew will dive into the differentiated Omni-Path architecture that embraces open standards and delivers industry-leading performance to our open ecosystem. Bio: Matt brings almost 3 decades of deep technical and business expertise to the role of Field CTO at Cornelis, where he is engaging with strategic customers and partners, providing thought leadership to the AI, HPC and high-performance data center markets. Prior to joining Cornelis, Matt held various senior leadership roles at high-growth companies, including CTO, Field CTO, Corporate Evangelist, and Founder. He is an expert and energetic strategist, analyst and visionary who has delivered transformational product concepts across five generations of network architectures. Matt has been awarded 23 U.S. patents to date. Matt holds a B.Sc. in Electrical Engineering with First Class Honors from Queen’s University and is a registered P.Eng. Stay tuned!
 IEEE Computer Society #hoti #hoti25

Chris Pfistner, VP, Sales & Marketing at Avicena Tech will deliver a sponsor talk on “Paradigm Shift in AI Scale Up Clusters using microLED based Interconnects” at IEEE Hot Interconnects 2025. Abstract: Exponential growth in AI is driving demand for ultra-low power, high bandwidth connections in next gen data centers. Avicena’s µLED based optical interconnects enable AI compute clusters to Scale Up to thousands of GPUs at lower power, high reliability and lower cost than other optical link technologies. This talk will layout the details on how microLED interconnects work and why they achieve unmatched performance compared to other electrical and optical interconnects for AI networks. Bio: Chris Pfistner joined Avicena in September of 2021 as Vice President of Sales & Marketing. Chris has over 30 years of experience in Sales, Marketing, Product Line Management, and Business Development in the global fiber optic module and systems market. Prior to Avicena, Chris held executive positions with Jabil Photonics, Lumentum, Finisar/Coherent, NeoPhotonics, Terawave, Advanced Fibre and Pirelli Optical Systems. Chris holds Ph.D. and MS degrees in Applied Physics from the University of Berne, Switzerland. Stay tuned! IEEE Computer Society #hoti #hoti25

Intel Corporation is giving a tutorial on Libfabric at IEEE Hot Interconnects 2025! Presenters: Rajalaxmi A., Alexia Ingerson Abstract: Libfabric supports multiple communication semantics, is fabric and hardware implementation agnostic, and leverages and expands the existing RDMA open source community. Libfabric is designed to minimize the impedance mismatch between applications, including middleware such as MPI, SHMEM, CCL, etc. This tutorial focuses on new features like link provider bridging different providers, and the usage of this new link provider. It will also focus on updates with UltraEthernet and Libfabric. IEEE Computer Society OpenFabrics Alliance #libfabric #hoti #hoti25