airhdl -- A Web-Based Register File Generator for Xilinx ZYNQ, MicroBlaze, and any other AXI4-lite system.
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This document describes airhdl, a free web-based tool for generating register files for Xilinx ZYNQ, MicroBlaze, and other AXI4-lite systems. The tool allows users to define register maps in a web browser by adding registers and fields. It then generates VHDL, C code, documentation, and other files from the master register map definition, ensuring hardware and software definitions are consistent. The tool aims to simplify and standardize the process of managing register file definitions and changes.
airhdl -- A Web-Based Register File Generator for Xilinx ZYNQ, MicroBlaze, and any other AXI4-lite system.
- 1. A Web-Based Register File Generator for Xilinx ZYNQ, MicroBlaze, and any other AXI4-lite system. Guy Eschemann noasic GmbH
- 2. FPGA Kongress 2016 airhdl: a web-based register file generator 2 About me ● Electrical engineer (INSA-Lyon, France) ● 15+ years of experience in FPGA design ● Self-employed FPGA consultant since 2009 ● Xilinx Alliance Program associate partner since 2011 ● Current: – Self-employed FPGA consultant at noasic GmbH – FPGA design engineer/representative at Enclustra – Sales representative at Sigasi France ● Main focus: – VHDL design and verification – Embedded software development – Custom electronic design automation (EDA) tools
- 3. FPGA Kongress 2016 airhdl: a web-based register file generator 3 About airhdl ● Web-based register file generator ● Launched in 2015 ● About 200 registered users ● Free ● Probably one of the first web-based EDA tools
- 4. FPGA Kongress 2016 airhdl: a web-based register file generator 4 What's a register file ● Bus RD/WR logic ● Registers – fixed 32-bit wide – modes ● read-write ● write-only ● read-only ● interrupt (W1C) ● Fields ● User logic interface
- 5. FPGA Kongress 2016 airhdl: a web-based register file generator 5 Where do I need register files
- 6. FPGA Kongress 2016 airhdl: a web-based register file generator 6 Register files caveats ● Register files are the hardware/software interface – Register definitions are used by hardware and software engineers – Consistency is key: SW definitions must match the hardware implementation ● Register definitions change all the time – e.g. add/remove/rename register or field – Changes must be easy
- 7. FPGA Kongress 2016 airhdl: a web-based register file generator 7 The airhdl solution ● Create register map in your browser at https://airhdl.com ● Add registers and fields ● Download generated code – VHDL – C – Documentation – XML/ JSON ● Integrate in your project
- 8. FPGA Kongress 2016 airhdl: a web-based register file generator 8 Demo
- 9. FPGA Kongress 2016 airhdl: a web-based register file generator 9 Register map entry (1)
- 10. FPGA Kongress 2016 airhdl: a web-based register file generator 10 Register map entry (2)
- 11. FPGA Kongress 2016 airhdl: a web-based register file generator 11 Register map entry (3)
- 12. FPGA Kongress 2016 airhdl: a web-based register file generator 12 Generated products
- 13. FPGA Kongress 2016 airhdl: a web-based register file generator 13 airhdl benefits ● Saves time and trouble ● HW/SW files are consistent by design (generated from master register map) ● all register definitions in one place ● can be accessed from anywhere ● no need to install/license anything ● free
- 14. FPGA Kongress 2016 airhdl: a web-based register file generator 14 Try it out ● Register at https://airhdl.com ● Let me know what you think: guy@noasic.com
- 15. FPGA Kongress 2016 airhdl: a web-based register file generator 15 Roadmap / Ideas ● Add Verilog support ● Share register maps ● Register map revision ID ● Register value calculator ● Microsoft Word / PDF export ● Other generators – CRC – LFSR
- 16. FPGA Kongress 2016 airhdl: a web-based register file generator 16 Contact noasic GmbH Guy Eschemann Sundheimer Feld 6 77694 Kehl / Germany guy@noasic.com Follow me on twitter: @geschema