Seminar report of racetrack memory

A
SEMINAR REPORT
On
RACETRACK MEMORY
SUBMITTED TO
COCHIN UNIVERSITY OF SCIENCE AND TECHNOLOGY
BY
RAJEEB R V (13133811)
In partial fulfilment for the Award of Degree of
BACHELOR OF TECHNOLOGY
In
ELECTRONICS AND COMMUNICATION
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
COLLEGE OF ENGINEERING ATTINGAL
(Established by IHRD)
KERALA, INDIA
www.ceattingal.ac.in
SEPTEMBER 2015

DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
COLLEGE OF ENGINEERING
(Established by IHRD)
ATTINGAL
CERTIFICATE
Certified that this is a bonafied report of the seminar entitled “RACETRACK
MEMORY” submitted by RAJEEB R V of seventh semester Bachelor of
technology in Electronics and Communication Engineering towards the partial
fulfillment of requirement as part of curriculum for the award of the Degree of
Bachelor of Technology in Electronics and Communication Engineering by
Cochin University of Science and Technology.
Mr. SUNIL T T
Head of Department
AP Dept. of ECE
College of Engg. Attingal
Mrs. ANURADHA P V
Seminar Coordinator
AP Dept. of ECE
Mr. SENTHIL NIVAS
Guide
AP Dept. of ECE

ACKNOWLEDGEMENT
On submission of this seminar on ‘RACETRACK MEMORY’, I’m
greatly indebted to all those who helped us to make this seminar successful. First
of all, I would like to thank the Lord Almighty who helped me to finish this
seminar on time.
I express my sincere gratitude to Prof. Bhadran V, The Principal,
College of Engineering Attingal, for providing opportunity and the environment
to do this seminar in our college.
I would like to thank Mr Sunil T.T, Head of Department, Electronics
and Communication engineering, for his encouragement and support.
I offer our sincere thanks Mrs Anuradha P V for valuable guidance and
giving me timely instructions throughout the seminar.
I also wish to thank Mr Senthil Nivas for giving me technical advice
and support in making this seminar successful.
An excellent group of teaching and non-teaching staff had helped us this
Seminar. We owe much to the assistance they gave us while doing this seminar.
Last, but not the least I would like to thank my parents and friends for
all the moral support and help them have given to us.
RAJEEB R V

ABSTRACT
An overview of magnetic racetrack operation and components necessary
to successfully realize this memory technology is presented. Fundamental
physical concepts of adiabatic and non-adiabatic spin-torque transfer is presented
and used to explain how bits of information are read, written, and pushed through
ferromagnetic racetracks. Recent challenges associated with this technology are
current densities required to move domain walls and the reliability of domain wall
motion. Resonant amplification of spin-torque transfer via pulsed current
operation has been proposed to overcome issues with current density. In addition,
domain wall pinning via patterned racetracks has demonstrated limited success in
reliably controlling multiple domain walls in a single racetrack. Lastly, new
material structures such as highly efficient anisotropic heavy-
metal/ferromagnet/oxide layers are promising candidates for new racetrack
geometries. Future work in interfacial spintronics and topological effects show
promise in benefiting racetrack memory and the field of magnetic memory.

CONTENTS
1. INTRODUCTION…………………………………………………. 1
2. OPERATING PRINCIPLES……………………………………... 3
2.1 Reading information from the racetrack………………….. 4
2.2 Writing information to the racetrack……………………… 6
2.3 Shifting domain walls down the racetrack………………… 7
3. MATERIAL SELECTION……………………………………….. 8
4. DOMAIN WALL MOVEMENT………………………………… 9
5. THRESHOLD CURRENT……………………………………….. 11
6. FUTURE OUTLOOK…………………………………………….. 14
7. CONCLUSION……………………………………………………. 17
8. REFERENCES……………………………………………………. 18

LIST OF FIGURES
1. Racetrack Memory…………………………………………… 2
2. Conceptual Design of racetrack memory…………………… 2
3. TMR Junction………………………………………………… 4
3. Reading Mechanism………………………………………….. 5
4. Writing Mechanism…………………………………………... 6
5. Ferromagnetic nanowire……………………………………... 9
6. Current profile and domain wall motion……………………. 12
7. Racetrack memory prototype………………………………... 15
8. SIT-MRAM cell………………………………………………. 16

SEPTEMPTER 2015 RACETRACK MEMORY
Dept. Of ECE 1 College of Engineering Attingal
1. INTRODUCTION
Over the past decade, a rich new field combining materials science and physics has developed
around manipulating the spin of electrons in magnetic and semiconducting devices. This field, called
spintronics, has opened up the potential for a myriad of previously unimaginable new devices with
applications in memory storage and logic. Memory storage technologies in particular have received
increased attention due to the high energy consumption and volatility of static and dynamic random
access memory (RAM), the slow read and write times of hard disk drives (HDD), and the cost of flash
memory and solid-state drives (SSD). Among the most promising of the spintronic memory solutions
is the concept of magnetic race track memory, which stores bits of information in the magnetization
orientation of regions in a channel-shaped ferromagnetic structure.
The operation of racetrack memory is analogous to a solid-state, non-volatile shift register. On
one end of the racetrack, bits may be written into the racetrack via changing the magnetization direction
in the ferromagnetic material in the racetrack. From here, the bit is pushed along the racetrack and may
be read by magnetoresistive tunnel junctions farther down the track, see Figures 1 and 2. One of the
true advantages to racetrack memory lies in the ability to orient the racetrack upwards and store bits in
a larger 3-dimensional space. However, preliminary prototypes of this memory device operate in two
dimensions.
The proposed memory density, read/write speeds, and scalability of this device make it the
strongest candidate for a form of universal memory. However, the practicality is severely limited by
high current densities required to move domain walls and the reliability of domain wall motion through
the racetrack.
In addition, the exact contributions to spin-induced magnetic flipping and domain wall motion
are highly dependent on the materials used and structure of the device. Several solutions and models
have been proposed to alleviate these issues, including patterned notches along the ferromagnetic
racetrack, pulsed current to move the domain walls, and experimentation with different soft and hard
magnetic materials.

FIG. 1. Conceptual design of a magnetic racetrack memory structure. Blue and red colored regions indicate
domains of opposite magnetization to one another but in plane with the racetrack direction. This particular
structure uses the stray-field from a neighboring domain wall to change the magnetization of a bit in the racetrack.
Magnetization state is read from a magnetic tunnel junction.
In addition, anisotropic multilayer structures have recently demonstrated very efficient
movement of domain walls under the influence of a spin-polarized current. Examples of which are
heavy metal-ferromagnetoxide structures that form stable Neel-type domain walls and exhibit higher
than normal current-driven domain wall motion due to a number of physical phenomena and interfacial
effects.
FIG 2 (A) Bending of racetrack memory for higher storage density. (B) A horizontal race track memory.
(C) Reading information from racetrack. (D) Writing Information to racetrack. (E) Concept design of a
high-density magnetic racetrack array

2. OPERATING PRINCIPLES
Operation of magnetic racetrack memory requires three essential components: (1) reading
elements such as magnetoresistive tunnel junctions that detect the tunneling resistance across a
ferromagnetic region, (2) writing elements such as nearby wires that produce a local oersted field or
spin-torque transfer devices that change a bit by transferring angular momentum from spin polarized
currents, (3) a means by which domain walls may be pushed through the ferromagnet layer, typically
via pulsed spin-polarized currents [2], and (4) a method of reliably restricting the position of domain
walls to discrete distance intervals (ie. notched patterns along the racetrack). With each of these
requirements comes a unique set of constraints and limitations. Ideally, reading and writing elements
will require low current densities to write bits of information and not affect neighboring bits. The current
parallel to the racetrack must also push all the sequential domain walls along in a uniform, controlled
manner. Lastly, the domain walls must be pinned in discrete intervals by structures that do not
significantly increase the current density and have sufficient tolerance as to prevent multiple domain
walls from moving into the same bit area. The exact geometry of proposed racetrack memory models
is visualized in Figure 2.

2.1 Reading Information from the Racetrack
To read the state of a domain in the magnetic racetrack, a magnetoresistive tunnel junction
senses the resistance of spin-polarized current across the bit. A magnetoresistive tunnel (TMR) in Fig
3 junction is a device composed of two ferromagnetic layers separated by a thin oxide. In each
ferromagnetic material, the density of states is spin dependent because the internal magnetic field gives
rise to a Zeeman splitting of electron energy levels aligned with and against the field. As a result, a
larger number of states are available to electrons oriented along the field therefore allowing for lower
resistance. When the two ferromagnetic materials are aligned in the same direction, the resistance may
be described by two large resistors in series and also in parallel with two small resistors in series. When
the two ferromagnetic materials are aligned antiparallel, the equivalent resistance may be described by
a small and large resistor in series and also in parallel with another small and large resistor in series.
The second configuration results in a much larger total resistance than the first, and helps to account for
the total change in resistance between the two orientations.
FIG 3: Shows a TMR junction, red colour region is a thin insulation sandwiched between two
ferromagnet materials.
If the insulating layer is thin enough (typically a few nanometers), electrons can tunnel from
one ferromagnet into the other. The direction of the two magnetizations of the ferromagnetic films can
be switched individually by an external magnetic field. If the two ferromagnetic plates have direction
of magnetisation parallel then resistance is low, if antiparallel then high resistance. The magnetic tunnel
junction may be characterized by its tunneling magnetoresistance ratio (TMR) defined by

TMR =
𝑅𝑎𝑝 − 𝑅𝑝
𝑅𝑝
Where Rap is the resistance in the anti-parallel configuration and Rp is the resistance in the
parallel configuration. A high TMR makes it easier for on-chip electronics to accurately detect the state
of the bit.
The oxide tunneling layer is also a critical component of the tunnel junction. It both isolates the
two ferromagnetic regions and restricts the movement of carriers to quantum mechanical tunneling.
When a bias is applied to the junction in the parallel configuration, the probability of tunneling is much
larger than when the ferromagnets are perpendicularly configured, corresponding to a lower resistance
state. Recent work has demonstrated that marked improvements in spin-polarization efficiency have
been possible by replacing aluminium oxide (AlOx) tunnel junctions with MgO junctions due to
symmetry effects and that majority charge carrier states decay more slowly across the insulator than
the minority state [4]. In general, this effect is enhanced by choosing ferromagnetic materials whose
symmetries for spin up and spin-down electrons differ. The result is a small overlap between wave
functions on either side of the oxide when configured anti-parallel and larger overlap when configured
parallel, leading to a very large TMRs that increase with widening MgO layers. Tunneling
magnetoresistance ratios as large as 604% have been observed in magnetic tunnel junctions using MgO
as the insulator. Thus, with greatly changing values of resistance for both magnetization orientations,
it is easy to accurately detect the state of the domain on the racetrack.
FIG 4: A TMR junction is used for reading the information stored in the racetrack memory.

2.2 Writing Information to the Racetrack
Spin-torque transfer and stray-fields from neighboring domain walls are two methods that can
be used to write bits onto the racetrack. Using the induced magnetic field from current through a wire
is another option, but will not be discussed because it requires high current densities and can affect
neighboring domains. First, for writing elements using spin-torque transfer effects it is crucial to model
the magnetization of the material under different currents. The standard Landau-Lifshitz-Gilbert (LLG)
equation describes the behaviour of a magnetic moment under the influence of a field
Where γ is the gyromagnetic ratio, H~
eff is the effective field felt by the moments, and α is the damping
parameter. The effective field H~
eff contains contributions of the magnetic field from the external field,
the magneto static field, the anisotropy field, the field from exchange interaction, and the field generated
by the current. The first term on the right describes the precessional motion
FIG 4: Using magnetic domain wall injector data is written red and blue colour regions indicates
domain of opposite magnetisation. In domain wall injector current flows in one direction for writing
0 and in opposite direction for writing bit 1

2.3 Shifting Domain Walls Down the Racetrack
Perhaps the most challenging aspect of the device’s operation is efficiently moving domain
walls through the racetrack in a reliable and repeatable way. Ideally, domain walls move down the
racetrack at equal velocities. In addition, when the system is at equilibrium and no current is applied,
the domain walls should be confined to discrete intervals so that thermal energy and neighboring
magnetic fields cannot move them.
Movement of the domain walls can be achieved by sending spin-polarized current through the
racetrack. The magnetization orientation of the domains are either aligned with the direction of this
current or in the opposite direction of this current which results in head-to-head domain walls or tail-
to-tail domain walls. Both head to head domain walls and tail-to-tail domain walls will have moments
perpendicular to the motion of the spin polarized current and as a result experience a torque in the same
direction. Thus, spin-polarized currents make it possible to move both types of domain walls in the
same direction. In fact, a good physical description of domain wall motion in nanowires or films with
surface pinning may be accounted for with only one- or two dimensional Landau-Lifshitz-Gilbert
equations (equation 3) with spin-torque and accounting for thermal fluctuations [8]. These results, in
addition to work done by S. Parkin [2], indicate efficient defining and subsequent domain wall motion
through the use of short current pulses.
Restricting the domain walls to discrete spatial intervals is key to preserving the digital nature
of this memory storage device. One method of ensuring this is by fabricating pinning sites, or notches,
along the racetrack. Several factors must be appropriately taken into account through this approach.

3. MATERIAL SELECTION
Material selection for the ferromagnetic racetrack material plays a large role in determining the
dynamics of domain wall motion creation and movement. Both “soft” and “hard” magnetic materials
have been explored for racetrack applications. “Soft” magnetic materials have gained increased interest
due to the ability to manipulate the type of domain walls and the resulting domain wall widths. Typical
materials for this application are iron, cobalt, and/or nickel alloys due to their high saturation
magnetization values. “Hard” magnetic materials, typically crystalline cobalt iron materials have also
been explored. However, the magnetic properties tend to be governed by intrinsic properties the
material such as the magneto crystalline anisotropy fields.
Material selection for future prototypes of racetrack memory will be increasingly important,
since interfacial effects have demonstrated the ability to reduce the threshold current density for domain
wall motion. The exact nature of these effects is highly dependent both on the ferromagnetic materials
used, the materials surrounding the racetrack, the geometry of the channel, and the defects located at
these interfaces. Recent work has explored movement of domain walls through Ta/CoFe/MgO and
Pt/CoFe/MgO, which will be discussed in the Threshold Current section.
Materials for magnetic tunnel junctions and fixed ferromagnetic layers (for spin-polarization)
have received significant attention recently and are relatively well developed. As such, magnetic tunnel
junctions are typically made from CoFeB or CoFe fixed layers separated from the free layer (the
racetrack in this case) by an insulator which is typically MgO or AlOx. Fixed layers for spin-polarization
also tend to consist of crystalline cobalt alloys due to their large coercivity, high saturation
magnetization, and strong uniaxial magneto crystalline anisotropy.

4. DOMAIN WALL MOVEMENT
Different low-energy domain wall configurations have been shown to exist in ferromagnetic
racetracks. Both micro magnetic simulations and results from experiments have shown that transverse
and vortex domain wall structures are stable and common in nanowires with anisotropy along the
direction of the wire. A transverse domain wall occurs when the magnetic moments gradually begin to
change direction, but the changing angle occurs faster along one edge than the other. Vortex domain
walls, on the other hand, occur when the gradual change in magnetic moments happens on both walls.
As a result, when the two resulting transverse-like domain walls meet, a vortex shaped pattern is formed.
It is worth noting that both structures are chiral and exhibit correspondingly interesting symmetry
properties. Both transverse and vortex structures are stable domain walls, but vortex domain walls tend
to be lower in energy. Vortex domain walls are typically favoured in wider nanowire ferromagnets since
they minimize the amount of stray field emerging from the surfaces and minimize the magnetic charge
density. In practice, vortex domain walls can vary based on their chirality (the clockwise or anti-
clockwise orientation of the moments) and also the vortex core can be pointing in- or out-of-plane. The
dynamics of domain wall motion, such as the pinning strength, are highly dependent on the type of
domain wall that forms. A challenge associated with magnetic racetrack memory is the creation of
specific types of domain walls in the racetracks to ensure uniform motion and behaviour of bits.
Another important topic in the field of spintronics has been the relative importance and
magnitude of adiabatic and non-adiabatic spin-torque transfer. When an electron passes through a
magnetic material and changes its moment direction, there is an equivalent amount of angular
momentum transferred to the magnetic material.
FIG. 5. Top image shows the notched pattern in a ferromagnetic nanowire used to pin domain walls.
Bottom image shows three vortex shaped domain walls (black and white triangular shapes) pinned at
the notched locations.
This spin-torque is typically described as a combination of both adiabatic and non-adiabatic
torques. The adiabatic torque is in-plane with the electron’s initial direction and the material’s

magnetization, as shown by the red arrow in Figure 5. The non-adiabatic torque is the term
perpendicular to this plane (light blue arrow in Figure 5) and typically arises from a gradient
magnetization, such as in the presence of a domain wall. The relative magnitude of these two torques
depends strongly on the geometry of the device and materials chosen. The adiabatic term is given by
the third term in equation 3 and is historically well-understood. However, the LLG equations are
typically further modified to include the less-well understood non-adiabatic torque
where β characterizes the non-adiabicity, P is the spin polarization of the electric current, and J~ is the
electric current density.
In a completely adiabatic system, spin-polarized current would cause the magnet moments of
the material to process such that the adiabatic torque and Gilbert damping are equal and opposite. In
this situation, there would be no domain wall movement or magnetization reversal until the critical
current density (Ic in equation 4) is reached. However, many experiments have demonstrated scenarios
where Ic is much smaller than predicted, suggesting scenarios where the non-adiabatic term is dominant.
In fact, the non-adiabatic torque turns out to be an important parameter in describing systems with wide
domain walls and extrinsic defects. In these cases, domain wall movement is proportional to the non-
adiabicity β and decreases with increasing Gilbert damping. The critical current density also tends to
scale with the extrinsic pinning strength in alloys of cobalt, iron, nickel ferromagnets, which both
indicates the non-adiabatic behaviour of the interaction and provides motivation for the purposeful
fabrication of pinning sites along the racetrack to control domain wall motion.
Discretely spaced pinning sites allow for the control of the individual bit locations. Typical
pinning sites consist of horizontal notches patterned into the side of the racetrack, A pinning site
between domains allows the magnetization from one side of the site to the other to change more
abruptly. The result is a decrease in domain wall energy due to a reduction in the total exchange energy
[10]. Thus, the notch effectively creates a low-energy potential well that the domain wall prefers to
settle into. Movement of the domain wall from this position requires both a current density larger
enough to move the domain wall (i > Ic) and a current density large enough to excite the wall out of the
potential.

5. THRESHOLD CURRENT
To effectively integrate magnetic racetrack memory with CMOS ICs, it is important to make
sure the current densities required to move domain walls are sufficiently attainable. In addition, high
current densities can cause Joule heating and result in domain wall instability. Recent racetrack memory
prototypes developed at IBM have included heat sinks to account for this. In addition, the energy barrier
created by domain wall pinning sites (both the purposefully created sites discussed previously and the
pinning sites from racetrack imperfections) increases the complexity of this challenge.
One proposed solution to the problem of exciting the domain wall over the pinning potentials is
using resonantly tuned current-pulses. Each pulse, if the frequency is tuned to the resonant frequency
of the pinning potential, will increase the energy of the domain wall until it is no longer bound to the
potential. The total current density will still need to exceed the critical current density, but pulsed
operation allows for the movement of domain walls without increasing the current density proportional
to the depth of the potential. An illustration of this principle can be seen in fig 6.
Several challenges exist with the use of pulsed currents to excite domain walls from the pinning
sites. First, it is important for the pinning sites to be fabricated consistently enough that the resonant
frequency is not substantially altered between pinning sites. If even a single domain wall is unable to
be resonantly excited and moved to the next position, the performance of the entire racetrack is
compromised. Also, the depth of the pinning potential should be uniform such that the number of current
pulses required to excite the wall is consistent and that there is no unnecessary delay in bit movement.
If two 180o
domain walls become sufficiently close, they can form a 360o
domain wall. Such domain
walls have entirely different motional dynamics since they interact differently with spin-polarized
currents and pinning potentials.
Alternative structures have been receiving increased attention for the purpose of threshold
current reduction. Several methods of obtaining highly spin-polarized currents using anisotropic
structures and interesting surface phenomena are under investigation due to their ability to produce
larger spin-transfer torques than with traditional devices utilizing spin valves and tunnel junctions.

In structures with inversion asymmetry (i.e. the layers above and below the ferromagnet have
different physical properties resulting in interfacial asymmetry) the internal electric field of the material
can enhance spin-orbit coupling and give rise to additional spin-orbit torques. This phenomena is known
as the Rashba effect, and is believed to stabilize Bloch-type domain walls in addition to providing
additional torque on the materials. The spin polarized carriers arise from the spin-Hall effect, which is
the accumulation of spin-up and spin-down charge carriers on opposite surfaces of metallic and
semiconducting structures.
Another interesting phenomena, the DzyaloshinskiiMoriya interaction (DMI), has also been
under investigation due to its ability to stabilize chiral domain walls. These type of domain walls have
been demonstrated to move very efficiently under the influence of spin-polarized current. Several
heavy-metal/ferromagnet/oxide structures such as Pt/CoFe/MgO and Ta/CoFe/MgO stacks have been
fabricated to study these interfacial magnetic effects. Interestingly, these structures exhibit domain wall
motion against the flow of electrons (or along the flow of current), which may be accounted for if the
domain walls are of Neel-type. The results confirmed the existence of Neel-type domain walls which
are efficiently moved by spin-Hall currents injected from the heavy-metal region. This work provided
evidence that the DMI is ultimately responsible for efficient domain wall movement in these
FIG. 6. At the top is a graphical representation of the current profile and the corresponding domain wall
motion is visualized below it. As the current reverses polarity at the potential well’s resonant frequency,
the domain wall becomes increasingly excited until it is finally capable of exiting the potential and moving
in space.

asymmetric heavy-metal/ferromagnetic stacks. The high current densities associated with domain wall
movement in racetrack memory could be significantly reduced through engineering asymmetric
structures where interfacial effects such as the DMI are dominant.
Although these examples are highly specific to ferromagnetic films and nanowires, the
underlying physical mechanisms behind these interfacial magnetic interactions are typically dependent
on the materials used, the structure of the device, the types of symmetries that exist, spin-orbit coupling
and torque, internal electric and magnetic fields, domain wall type and chirality, and even relativistic
effects. The parameter space open for scientific exploration is large and suggests that improvements to
the threshold current for magnetic racetrack memory will be found in the realm of interfacial
spintronics.

6. FUTURE OUTLOOK
Magnetic racetrack memory technology has recently experienced a large push from academia
and industry due to its promise of energy efficient, non-volatile, high density memory and the potential
to advance our scientific understanding of spin-dependent electronics and magnetism. The future of
magnetic racetrack memory is bright, but there are several issues that need attention before this
promising technology becomes a reality. Either one of three situations is likely to occur in the near
future: (1) advances in engineering will improve domain wall reliability and the high current density
will be alleviated of with heat sinks and robust materials, (2) advances in interfacial spintronics will
enable controlled, efficient domain wall motion with novel heterostructures, or (3) an improved
understanding of magnetic interactions will motivate the discovery of more efficient, reliable, and
practical memory architectures.
Pioneering work has been done at IBM, led by S. Parkin, to develop several prototypes of small
but functional racetrack memory cells. For example, fully CMOS integrated prototypes of this memory
were reported and functioning with the assistance of magnetic fields. Magnetic tunnel junctions were
also incorporated to read the state of the bit. Images of these fabricated devices can be seen in Figure
7. This effort demonstrates both the feasibility of the current racetrack memory design and the need for
engineering developments to optimize the processing and repeatability issues associated with
fabrication.
Racetrack memory could also see a significant increase in performance if interfacial spintronic
effects may be properly utilized to decrease current densities. For example, depositing ferromagnetic
racetracks onto an oxide material and then using a heavy-metal such as Pt or Ta for the other side could
allow next-generation racetracks to take advantage of the DMI-assisted domain wall movement. Other
near-future advances in this field are likely to contribute to the materials selection and device geometry
for magnetic racetrack memory. Lastly, it is very likely that new developments in interfacial spintronics
will reveal other, more interesting physical phenomena that are not immediately applicable to this
technology. The study of these phenomena are likely to result in the development of better, more
practical memory solutions.

FIG. 7. The top-most image (a) depicts the schematic for a racetrack prototype recently fabricated at
IBM using CMOS processes, (b) shows a top-view of the ferromagnetic racetrack, (c) shows a single
memory cell, and (d) and (e) depict zoomed-out images of an array of 256 cells with contact pins for
testing
For example, the study of topological effects in ferromagnetic materials, which has gained an
especially large interest recently, has theoretically and experimentally demonstrated that dissipation
less pure spin-polarized currents can be found at the surface of certain materials. These materials,
typically topological insulators (materials with conductive surface states but an insulating bulk) are of
interest to understanding fundamental concepts in condensed matter physics. Their ability to generate
pure spin-polarized currents through the quantum spin-Hall effect, as described previously, has also
attracted interest from the field of spintronics. In these cases, a deep understanding of the underlying
physics will enable materials scientists and physicists to design novel devices for efficient memory
storage.
The future of magnetic racetracks for non-volatile memory is contingent upon the success of
materials processing and the understanding of physical concepts that describe the interactions between
electron spin and the lattice. Assuming a sufficient understanding of spin interactions is attained,

numerical methods may be used to design novel structures with optimized efficiency and good
processing bias. Already progress has been made in computation micro magnetics, with the
development of open-source software such as the Object Oriented Micro Magnetic Framework
(OOMMF) developed at the National Institute of Standards and Technology (NIST). Such software
enables scientists and engineers to model the behaviour magnetic moments under the influence of
different fields by numerically propagating the LLG equations of motion. As such, when new spin-
torque corrections must be made, the torque can be converted to an effective field and directly
calculated/visualized for a particular structure. Such software allows for the effective optimization and
design and is of critical importance to finding applications for interesting new physical phenomena.
The ultimate success of this specific magnetic racetrack architecture, as proposed in this report,
is currently unclear. Pioneering work is currently uncovering the mechanisms by which domain wall
movement via spin-torque interactions occur and will ultimately decide if this technology is practical.
In addition, the market success of racetrack memory depends on how well it fares against competing
memory solutions like spin torque transfer magnetic random access memory (STTMRAM), shown in
Figure 8. STT-MRAM suffers from a lower overall information density and is more expensive to scale,
but does not depend upon precision domain wall movement. Both technologies require high current
densities for bit manipulation, which is a disadvantage for spintronic memory competing against
conventional memories.
FIG. 8. Image of a basic STT-MRAM cell. In the above, “BL” corresponds to the bit line, “SL”
corresponds to the signal line, and “WL” corresponds to the write line.

7. CONCLUSION
Magnetic racetrack memory is an exciting new technology that has many fundamental
advantages over current RAM, HDDs, and SSDs. Its non-volatility, high read/write speeds, and
potential for scalable ultra-dense memory make it an attractive type of memory. If effectively
implemented, racetrack memory has the potential to become a universal memory (i.e. a memory device
that is fast enough to compete with RAM, cheap and non-volatile enough to compete with HDD, and
can serve as the sole unit of memory in a computer). Such memory has the potential to greatly simplify
computer architecture, effectively eliminating the need to cache data.
The potential of magnetic racetrack memory also has broad implications for society,
prominently in cutting down the world’s consumption of energy for computing. In 2006, data centers
in the US, excluding personal and business computers, required 6.9 Gigawatts of power, or the
equivalent of 98,000 barrels of oil per day. As the total power consumption from computing is
increasing yearly, it is important to develop greener technologies. A significant percentage of used
power is from RAM, which needs continuous power to maintain the charge on capacitors that store bits.
Magnetic random access memory technologies are fundamentally able to retain data while unpowered
and could pave the way towards faster, cleaner computing in the future.
The operation of racetrack memory relies on efficient read elements (such as magnetoresistive
tunnel junctions), low current density write elements (such as spin torque transfer elements from spin-
polarized currents), and a means by which domains storing the bit information, or magnetization state,
can be moved along the long, thin ferromagnetic racetrack. Read and write elements are relatively well
developed, but there is work to be done in researching domain wall dynamics. Specifically, reliable
control of domain walls through longer racetracks and current densities associated with moving domain
walls and writing bits are important issues facing this device.
Due to broad interest from both academia and industry, it is of critical importance to identify the
underlying physics behind the physics of new ferromagnetic heterostructures so that materials may be
engineered for improved memory storage applications. Development of practical applications using this
novel structure is expected to advance the computing industry in a direction unimagined by CMOS
roadmaps. Future work is invaluable for improving the operation and feasibility of racetrack memory
and understanding other applications of this exciting new technology.

8. REFERENCES
1. L. Thomas, S.-H. Yang, K.-S. Ryu, B. Hughes, C. Rettner, D.-S. Wang, C.-H. Tsai, K.-H.
Shen, and S. S. P. Parkin, IEEE International: Electron Devices Meeting 24.2.1 (2011).
2. W. H. Butler, X. G. Zhang, and T. C. Schulthess, Physical Review B 63 (2001).
3. https://en.wikipedia.org/wiki/Racetrack_memory
4. http://researcher.watson.ibm.com/researcher/view_group_subpage.php?id=3811
5. MIT Department of Physics

Seminar report of racetrack memory

More Related Content

Similar to Seminar report of racetrack memory (20)

Recently uploaded (20)

Seminar report of racetrack memory