SlideShare a Scribd company logo
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
1
Trasmission Line approximation using LC cells
This Application Note analyzes the effect of approximating with lumped LC
cells an ideal TL (Z0=50 ohm, TD=1ns) terminated at the ends to 50 ohm and
connected to a pulse generator of amplitude 2Volts and rise time 200ps
(linear rise). This kind of approximation is often used by traditional (Spice
)simulators to model an ideal TL. DWS doesn't need this approximation
because TLs are the most efficient circuit element of DWS set. In this AN
DWS has been also utilized to model the fully LC lumped circuits used in
Spice models.
Three different situations are analyzed using DWS:
1) Transmission Line modeled as a cascade of 10 equal LC cells :
The following is the DWS netlist of case 1. The circuit is described using the
.CELL and the .CHAIN statements of DWS for automatic generation of the
cascade of 10 cells.
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
2
2) Transmission Line modeled as a cascade of 100 equal LC cells
The following is the DWS netlist of case 2. The circuit is described using the
.CELL and the .CHAIN statements of DWS for automatic generation of the
cascade of 100 cells.
The values of parameters L and C of each cell are set 1/10 of the previous
case because the number of cells is higher of a factor of 10.
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
3
3) Transmission Line modeled as an ideal TL
The following is the DWS netlist of case 3. The circuit is described directly
using element T of DWS related to an ideal TL.
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
4
This can be also the reference case because TLs are modeled in DWS
without approximations (except delay quantization depending on the choice of
simulation TSTEP ). In all previous cases TSTEP is 1PS allowing an exact
modeling of the TL delay of 1ns. In all netlists a maximum number of points
(LIMPTS) is set to 10,000.
All sims run in few microseconds on a Pavilion PC with I7 quad core CPU
utilized at 12.5% of full load. Setting up a lower TSTEP (in the femtosecond
region, an inversely proportional increase of sim times is obtained,but there is
no significant variations of the result).
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
5
Results
In the following the simulation output plots are shown:
Case 1
Case 2
Case 3 (reference)
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
6
Comparative plots (1,2 and 3):
Detailed plots:
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
7
Worst Case Eye diagrams at 1Gbps
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
8
The followings are Worst Case Eye Diagram (WCED) contours derived from
the previous simulations , showing the distortion effects due to the
approximation of lumped LC model of TL. The exact model of TL (DWS)
generates the best contour without no distortion. These WCEDs are created
using the companion viewer of DWS (DWV) used to display the waveforms of
this AN.
1Gbps WCEDs
4 Gbps WCEDs
From the previous WCED plots it is evident that the 10-cell model has serious
distortion problems at 1Gbps and at 4Gbps the eye is practically closed.
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
9
The 100-cell model is good up to 4Gbps if the generator rise time is in the
order of hundred of picoseconds as in this case. The problem arise from the
complexity because 200 circuital elements are required to model a single TL.
To investigate the distortion due to 100-cell approximation, the following
situation has been simulated:
Here the pulse generator has a rise time of 10ps and the simulation time step
is set to 10femtoseconds on a window of 10ns (1 Million calculated points ).
In the following the results compared to the ideal case. With respect the
previous simulations, the ringing due to lumped circuit approximation is more
evident at both ends, as espected.
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
10
Generator rise time:10ps , ideal TL vs 100 LC cells
Comparison to Circuit Lab results
Piero Belforte April 18th 2012
Copyright Piero Belforte 2012
11
The following is a comparison of the plots from Circuit Lab and DWS with
similar settings of the input generator and for the 10 LC cells situation.
The comparison has to be made between the falling edge of CL and the rise
edge of DWS to get the same ISI (Inter Symbol Interference) amount due to
previous transitions.
In this case the simulation time of CL was about 2 minutes compared to 30
milliseconds of DWS.
Obviously DWS is far more efficient when dealing with ideal TL.

More Related Content

DOCX
Electronics i ii razavi
DOCX
EE 305 Project_1 The Effective External Defibrillators
PDF
Lab 4 EEL 3552 Amplitude Modulation with MATLAB Simulations
PDF
Electrostatic kick report
DOCX
Bipolar junction transistor characterstics biassing and amplification, lab 9
PPT
Lecture 14
PDF
Lab 4 Report Switching Voltage Regulators
Electronics i ii razavi
EE 305 Project_1 The Effective External Defibrillators
Lab 4 EEL 3552 Amplitude Modulation with MATLAB Simulations
Electrostatic kick report
Bipolar junction transistor characterstics biassing and amplification, lab 9
Lecture 14
Lab 4 Report Switching Voltage Regulators

What's hot (9)

PDF
Standards3
PPTX
Calculation of resistor
PDF
RC Circuit Transfer Functions with Bode Diagrams
DOCX
Exp no 3 setb118 Analog electronics
PDF
Operational Amplifiers I
PPT
L30 3 ph-ac
PPTX
Eel305 building blocks of op am ps
PDF
PPTX
Audio Amplifier Presentation
Standards3
Calculation of resistor
RC Circuit Transfer Functions with Bode Diagrams
Exp no 3 setb118 Analog electronics
Operational Amplifiers I
L30 3 ph-ac
Eel305 building blocks of op am ps
Audio Amplifier Presentation
Ad

Viewers also liked (20)

PDF
Spicy Schematics Facebook Post Collection_Nov. 2012- Feb. 2015
PDF
Cseltmuseum expanded post records from june 9 2015 to june 19 2015
PDF
DWS 8.5 USER MANUAL
PDF
1974 pb cselt_gs_short_circuit_issues_on_pds_manuscripts (1) (1)
PDF
DWS vs CST CABLE STUDIO SIMULATION SPEEDUP
PDF
2000 fm pb_easyscan_emission_maps_sim_vs_measure (1)
PDF
SWAN/DWS micro-behavioral power/gnd plane modelling.
PDF
VECTOR VS PIECEWISE-LINEAR FITTING FOR SIGNAL AND POWER INTEGRITY SIMULATION
PDF
TDR-BASED DWS MODELING OF PASSIVE COMPONENTS
PDF
1975 it new_method_for_electrical_simulation_using_digital_wave_filters(it)_a...
PDF
2007 biased reflectometry_international_zurich_congress_on_emc_september_2007
PDF
1990 pb historical_brochure_pcb_post_layout
PDF
2000 lvds dwn_thris_macromodels_pb_fm
PDF
1991 optical interconnects_piero_belforte
DOC
DVW (Digital Wave Viewer) user manual
PDF
2013 pb rg58 coax cable models and measurements
PDF
2012 pb vi trajectory plots for transmission line models evaluation
PDF
DWS MODELING OF MULTICONDUCTOR TRANSMISSION LINES
PDF
1990 pb historical_brochure_high_performance_systems
PDF
1991 pb historical_an_microwave_mixers_dwn
Spicy Schematics Facebook Post Collection_Nov. 2012- Feb. 2015
Cseltmuseum expanded post records from june 9 2015 to june 19 2015
DWS 8.5 USER MANUAL
1974 pb cselt_gs_short_circuit_issues_on_pds_manuscripts (1) (1)
DWS vs CST CABLE STUDIO SIMULATION SPEEDUP
2000 fm pb_easyscan_emission_maps_sim_vs_measure (1)
SWAN/DWS micro-behavioral power/gnd plane modelling.
VECTOR VS PIECEWISE-LINEAR FITTING FOR SIGNAL AND POWER INTEGRITY SIMULATION
TDR-BASED DWS MODELING OF PASSIVE COMPONENTS
1975 it new_method_for_electrical_simulation_using_digital_wave_filters(it)_a...
2007 biased reflectometry_international_zurich_congress_on_emc_september_2007
1990 pb historical_brochure_pcb_post_layout
2000 lvds dwn_thris_macromodels_pb_fm
1991 optical interconnects_piero_belforte
DVW (Digital Wave Viewer) user manual
2013 pb rg58 coax cable models and measurements
2012 pb vi trajectory plots for transmission line models evaluation
DWS MODELING OF MULTICONDUCTOR TRANSMISSION LINES
1990 pb historical_brochure_high_performance_systems
1991 pb historical_an_microwave_mixers_dwn
Ad

Similar to 2012 trasmission line approximation using lc cells pb_dws (6)

PDF
2013_pb_dws vs microcap 10 benchmark
PDF
2012 pb vi trajectory plots for transmission line models evaluation
PDF
PDF
2013 pb prediction of rise time errors of a cascade of equal behavioral cells.
PPT
2013 06 tdr measurement and simulation of rg58 coaxial cable s-parameters_final
PPTX
ASIC Design Fundamentals.pptx
2013_pb_dws vs microcap 10 benchmark
2012 pb vi trajectory plots for transmission line models evaluation
2013 pb prediction of rise time errors of a cascade of equal behavioral cells.
2013 06 tdr measurement and simulation of rg58 coaxial cable s-parameters_final
ASIC Design Fundamentals.pptx

More from Piero Belforte (20)

PDF
Simulation-modeling matrix
PDF
Frequency domain behavior of S-parameters piecewise-linear fitting in a digit...
PDF
3 experimental wideband_characterization_of_a parallel-plate_capacitor
PDF
Automated Piecewise-Linear Fitting of S-Parameters step-response (PWLFIT) for...
PDF
Cseltmuseum post records from September 2018 to January2019
PDF
Cseltmuseum post records August2018
PDF
Cseltmuseum post records July 2018
PDF
Multigigabit modeling of hi safe+ flying probe fp011
PDF
Cseltmuseum post records June 2018
PDF
CSELTMUSEUM POST RECORDS MAY 2018
PDF
CSELTMUSEUM POST RECORDS APRIL 2018
PDF
CSELTMUSEUM post records March_2018
PDF
CSELTMUSEUM POST RECORDS FEBRUARY 2018
PDF
CSELTMUSEUM POST RECORDS JANUARY 2018
PDF
CSELTMUSEUM expanded post records, December 2017
PDF
HDT (High Design Technology) related content on Cseltmuseum Dec. 13 2017
PDF
HiSAFE related content on Cseltmuseum Dec. 13 2017
PDF
CSELTMUSEUM post record August to December 2017
PDF
Piero Belforte related presentations on slideplayer.com july 12 2017
PDF
Collection of Cselt related presentations on slideplayer.com by_Piero_Belfort...
Simulation-modeling matrix
Frequency domain behavior of S-parameters piecewise-linear fitting in a digit...
3 experimental wideband_characterization_of_a parallel-plate_capacitor
Automated Piecewise-Linear Fitting of S-Parameters step-response (PWLFIT) for...
Cseltmuseum post records from September 2018 to January2019
Cseltmuseum post records August2018
Cseltmuseum post records July 2018
Multigigabit modeling of hi safe+ flying probe fp011
Cseltmuseum post records June 2018
CSELTMUSEUM POST RECORDS MAY 2018
CSELTMUSEUM POST RECORDS APRIL 2018
CSELTMUSEUM post records March_2018
CSELTMUSEUM POST RECORDS FEBRUARY 2018
CSELTMUSEUM POST RECORDS JANUARY 2018
CSELTMUSEUM expanded post records, December 2017
HDT (High Design Technology) related content on Cseltmuseum Dec. 13 2017
HiSAFE related content on Cseltmuseum Dec. 13 2017
CSELTMUSEUM post record August to December 2017
Piero Belforte related presentations on slideplayer.com july 12 2017
Collection of Cselt related presentations on slideplayer.com by_Piero_Belfort...

Recently uploaded (20)

PDF
TokAI - TikTok AI Agent : The First AI Application That Analyzes 10,000+ Vira...
PDF
Assigned Numbers - 2025 - Bluetooth® Document
PDF
Optimiser vos workloads AI/ML sur Amazon EC2 et AWS Graviton
PDF
Advanced methodologies resolving dimensionality complications for autism neur...
PPTX
Cloud computing and distributed systems.
PPTX
KOM of Painting work and Equipment Insulation REV00 update 25-dec.pptx
PDF
Profit Center Accounting in SAP S/4HANA, S4F28 Col11
PDF
A comparative analysis of optical character recognition models for extracting...
PPTX
20250228 LYD VKU AI Blended-Learning.pptx
PPT
“AI and Expert System Decision Support & Business Intelligence Systems”
PDF
Reach Out and Touch Someone: Haptics and Empathic Computing
PDF
NewMind AI Weekly Chronicles - August'25-Week II
PDF
Encapsulation_ Review paper, used for researhc scholars
PDF
Machine learning based COVID-19 study performance prediction
PDF
Diabetes mellitus diagnosis method based random forest with bat algorithm
PDF
Blue Purple Modern Animated Computer Science Presentation.pdf.pdf
PDF
Spectral efficient network and resource selection model in 5G networks
PDF
Building Integrated photovoltaic BIPV_UPV.pdf
PDF
Dropbox Q2 2025 Financial Results & Investor Presentation
PPTX
Big Data Technologies - Introduction.pptx
TokAI - TikTok AI Agent : The First AI Application That Analyzes 10,000+ Vira...
Assigned Numbers - 2025 - Bluetooth® Document
Optimiser vos workloads AI/ML sur Amazon EC2 et AWS Graviton
Advanced methodologies resolving dimensionality complications for autism neur...
Cloud computing and distributed systems.
KOM of Painting work and Equipment Insulation REV00 update 25-dec.pptx
Profit Center Accounting in SAP S/4HANA, S4F28 Col11
A comparative analysis of optical character recognition models for extracting...
20250228 LYD VKU AI Blended-Learning.pptx
“AI and Expert System Decision Support & Business Intelligence Systems”
Reach Out and Touch Someone: Haptics and Empathic Computing
NewMind AI Weekly Chronicles - August'25-Week II
Encapsulation_ Review paper, used for researhc scholars
Machine learning based COVID-19 study performance prediction
Diabetes mellitus diagnosis method based random forest with bat algorithm
Blue Purple Modern Animated Computer Science Presentation.pdf.pdf
Spectral efficient network and resource selection model in 5G networks
Building Integrated photovoltaic BIPV_UPV.pdf
Dropbox Q2 2025 Financial Results & Investor Presentation
Big Data Technologies - Introduction.pptx

2012 trasmission line approximation using lc cells pb_dws

  • 1. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 1 Trasmission Line approximation using LC cells This Application Note analyzes the effect of approximating with lumped LC cells an ideal TL (Z0=50 ohm, TD=1ns) terminated at the ends to 50 ohm and connected to a pulse generator of amplitude 2Volts and rise time 200ps (linear rise). This kind of approximation is often used by traditional (Spice )simulators to model an ideal TL. DWS doesn't need this approximation because TLs are the most efficient circuit element of DWS set. In this AN DWS has been also utilized to model the fully LC lumped circuits used in Spice models. Three different situations are analyzed using DWS: 1) Transmission Line modeled as a cascade of 10 equal LC cells : The following is the DWS netlist of case 1. The circuit is described using the .CELL and the .CHAIN statements of DWS for automatic generation of the cascade of 10 cells.
  • 2. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 2 2) Transmission Line modeled as a cascade of 100 equal LC cells The following is the DWS netlist of case 2. The circuit is described using the .CELL and the .CHAIN statements of DWS for automatic generation of the cascade of 100 cells. The values of parameters L and C of each cell are set 1/10 of the previous case because the number of cells is higher of a factor of 10.
  • 3. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 3 3) Transmission Line modeled as an ideal TL The following is the DWS netlist of case 3. The circuit is described directly using element T of DWS related to an ideal TL.
  • 4. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 4 This can be also the reference case because TLs are modeled in DWS without approximations (except delay quantization depending on the choice of simulation TSTEP ). In all previous cases TSTEP is 1PS allowing an exact modeling of the TL delay of 1ns. In all netlists a maximum number of points (LIMPTS) is set to 10,000. All sims run in few microseconds on a Pavilion PC with I7 quad core CPU utilized at 12.5% of full load. Setting up a lower TSTEP (in the femtosecond region, an inversely proportional increase of sim times is obtained,but there is no significant variations of the result).
  • 5. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 5 Results In the following the simulation output plots are shown: Case 1 Case 2 Case 3 (reference)
  • 6. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 6 Comparative plots (1,2 and 3): Detailed plots:
  • 7. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 7 Worst Case Eye diagrams at 1Gbps
  • 8. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 8 The followings are Worst Case Eye Diagram (WCED) contours derived from the previous simulations , showing the distortion effects due to the approximation of lumped LC model of TL. The exact model of TL (DWS) generates the best contour without no distortion. These WCEDs are created using the companion viewer of DWS (DWV) used to display the waveforms of this AN. 1Gbps WCEDs 4 Gbps WCEDs From the previous WCED plots it is evident that the 10-cell model has serious distortion problems at 1Gbps and at 4Gbps the eye is practically closed.
  • 9. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 9 The 100-cell model is good up to 4Gbps if the generator rise time is in the order of hundred of picoseconds as in this case. The problem arise from the complexity because 200 circuital elements are required to model a single TL. To investigate the distortion due to 100-cell approximation, the following situation has been simulated: Here the pulse generator has a rise time of 10ps and the simulation time step is set to 10femtoseconds on a window of 10ns (1 Million calculated points ). In the following the results compared to the ideal case. With respect the previous simulations, the ringing due to lumped circuit approximation is more evident at both ends, as espected.
  • 10. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 10 Generator rise time:10ps , ideal TL vs 100 LC cells Comparison to Circuit Lab results
  • 11. Piero Belforte April 18th 2012 Copyright Piero Belforte 2012 11 The following is a comparison of the plots from Circuit Lab and DWS with similar settings of the input generator and for the 10 LC cells situation. The comparison has to be made between the falling edge of CL and the rise edge of DWS to get the same ISI (Inter Symbol Interference) amount due to previous transitions. In this case the simulation time of CL was about 2 minutes compared to 30 milliseconds of DWS. Obviously DWS is far more efficient when dealing with ideal TL.