8 hw con-and_intel_hex_file

Home Automation, Networking, and Entertainment Lab
Dept. of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN
Chung-Ping Young
楊中平
HARDWARE CONNECTION
AND INTEL HEX FILE
The 8051 Microcontroller and Embedded
Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay
HARDWARE CONNECTION
AND
INTEL HEX FILE

Department of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN 2
HANEL
PIN
DESCRIPTION
8051 family members (e.g, 8751,
89C51, 89C52, DS89C4x0)
Have 40 pins dedicated for various
functions such as I/O, -RD, -WR, address,
data, and interrupts
Come in different packages, such as
DIP(dual in-line package),
QFP(quad flat package), and
LLC(leadless chip carrier)
Some companies provide a 20-pin version
of the 8051 with a reduced number of
I/O ports for less demanding applications

HANEL
PIN
DESCRIPTION
(cont’)
8051/52
(DS89C4x0
AT89C51
8031)
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(-INT0)P3.2
(-INT1)P3.3
(T0)P3.4
(T1)P3.5
(-WR)P3.6
(-RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/-PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051 pin diagram

HANEL
PIN
DESCRIPTION
(cont’)
8051/52
(DS89C4x0
AT89C51
8031)
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A total of 32
pins are set
aside for the
four ports P0,
P1, P2, P3,
where each port
takes 8 pins
Grond
-PSEN and ALE are used
mainly in 8031-baded systems
Vcc, GND, XTAL1,
XTAL2, RST, -EA
are used by all
members of 8051 and
8031 families
P1
P3
P2
P0
Provides +5V supply
voltage to the chip
Ground
s

HANEL
PIN
DESCRIPTION
XTAL1 and
XTAL2
The 8051 has an on-chip oscillator but
requires an external clock to run it
A quartz crystal oscillator is connected to
inputs XTAL1 (pin19) and XTAL2 (pin18)
The quartz crystal oscillator also needs two
capacitors of 30 pF value
XTAL2
XTAL1
GND
C2
C1
30pF
30pF
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
8051
(8031)
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

HANEL
PIN
DESCRIPTION
XTAL1 and
XTAL2
(cont’)
If you use a frequency source other
than a crystal oscillator, such as a TTL
oscillator
It will be connected to XTAL1
XTAL2 is left unconnected
XTAL2
XTAL1
GND
NC
EXTERNAL
OSCILLATOR
SIGNAL
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
XTAL1 and
XTAL2
(cont’)
The speed of 8051 refers to the
maximum oscillator frequency
connected to XTAL
ex. A 12-MHz chip must be connected to a
crystal with 12 MHz frequency or less
We can observe the frequency on the
XTAL2 pin using the oscilloscope
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
RST
RESET pin is an input and is active
high (normally low)
Upon applying a high pulse to this pin, the
microcontroller will reset and terminate all
activities
This is often referred to as a power-on reset
Activating a power-on reset will cause all values
in the registers to be lost
00B
P0-P3
SP
PSW
ACC
DPTR
PC
Register
FF
07
00
00
0000
0000
Reset Value
RESET value of some
8051 registers
we must place
the first line of
source code in
ROM location 0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
RST
(cont’)
In order for the RESET input to be
effective, it must have a minimum
duration of 2 machine cycles
In other words, the high pulse must be
high for a minimum of 2 machine cycles
before it is allowed to go low
Power-on RESET circuit Power-on RESET with debounce
8.2K
Vcc
30 pF
30 pF
11.0592 MHz
+
31
19
18
9
EA/Vpp
X1
X2
RST
10 uF
8.2K
Vcc
30 pF
30 pF
31
19
18
9
EA/Vpp
X1
X2
RST
10 uF
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
EA
EA, “external access’’, is an input pin
and must be connected to Vcc or GND
The 8051 family members all come with
on-chip ROM to store programs
-EA pin is connected to Vcc
The 8031 and 8032 family members do no
have on-chip ROM, so code is stored on
an external ROM and is fetched by
8031/32
-EA pin must be connected to GND to indicate
that the code is stored externally
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
PSEN And ALE
The following two pins are used mainly
in 8031-based systems
PSEN, “program store enable’’, is an
output pin
This pin is connected to the OE pin of the
ROM
ALE, “address latch enable”, is an
output pin and is active high
Port 0 provides both address and data
The 8031 multiplexes address and data through
port 0 to save pins
ALE pin is used for demultiplexing the address
and data by connecting to the G pin of the
74LS373 chip
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
I/O Port Pins
The four 8-bit I/O ports P0, P1, P2 and
P3 each uses 8 pins
All the ports upon RESET are
configured as output, ready to be used
as input ports
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
Port 0
Port 0 is also designated as AD0-AD7,
allowing it to be used for both address
and data
When connecting an 8051/31 to an
external memory, port 0 provides both
address and data
The 8051 multiplexes address and data
through port 0 to save pins
ALE indicates if P0 has address or data
When ALE=0, it provides data D0-D7
When ALE=1, it has address A0-A7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
Port 0
(cont’)
It can be used for input or output,
each pin must be connected externally
to a 10K ohm pull-up resistor
This is due to the fact that P0 is an open
drain, unlike P1, P2, and P3
Open drain is a term used for MOS chips in the
same way that open collector is used for TTL
chips
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Vcc
10 K
8051/52
Port0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
Port 1 and
Port 2
In 8051-based systems with no
external memory connection
Both P1 and P2 are used as simple I/O
In 8031/51-based systems with
external memory connections
Port 2 must be used along with P0 to
provide the 16-bit address for the external
memory
P0 provides the lower 8 bits via A0 – A7
P2 is used for the upper 8 bits of the 16-bit
address, designated as A8 – A15, and it cannot
be used for I/O
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)

HANEL
PIN
DESCRIPTION
Port 3
Port 3 can be used as input or output
Port 3 does not need any pull-up resistors
Port 3 has the additional function of
providing some extremely important
signals
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
-EA/VPP
ALE/PROG
-PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
8051
(8031)
RD
WR
T1
T0
INT1
INT0
TxD
RxD
Function
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
P3 Bit
15
16
17
14
13
12
11
10
Pin
Serial
communications
External
interrupts
Timers
Read/Write signals
of external memories

HANEL
EXPLAINING
INTEL HEX
FILE
Intel hex file is a widely used file
format
Designed to standardize the loading of
executable machine codes into a ROM chip
Loaders that come with every ROM
burner (programmer) support the Intel
hex file format
In many newer Windows-based
assemblers the Intel hex file is produced
automatically (by selecting the right
setting)
In DOS-based PC you need a utility called
OH (object-to-hex) to produce that

HANEL
EXPLAINING
INTEL HEX
FILE
(cont’)
In the DOS environment
The object file is fed into the linker
program to produce the abs file
The abs file is used by systems that have a
monitor program
Then the abs file is fed into the OH utility
to create the Intel hex file
The hex file is used only by the loader of an
EPROM programmer to load it into the ROM
chip

HANEL
EXPLAINING
INTEL HEX
FILE
(cont’)
LOC OBJ LINE
0000 1 ORG 0H
0000 758055 2 MAIN: MOV P0,#55H
0003 759055 3 MOV P1,#55H
0006 75A055 4 MOV P2,#55H
0009 7DFA 5 MOV R5,#250
000B 111C 6 ACALL MSDELAY
000D 7580AA 7 MOV P0,#0AAH
0010 7590AA 8 MOV P1,#0AAH
0013 75A0AA 9 MOV P2,#0AAH
0016 7DFA 10 MOV R5,#250
0018 111C 11 ACALL MSDELAY
001A 80E4 12 SJMP MAIN
13 ;--- THE 250 MILLISECOND DELAY.
14 MSDELAY:
001C 7C23 15 HERE3: MOV R4,#35
001E 7B4F 16 HERE2: MOV R3,#79
0020 DBFE 17 HERE1: DJNZ R3,HERE1
0022 DCFA 18 DJNZ R4,HERE2
0024 DDF6 19 DJNZ R5,HERE3
0026 22 20 RET
21 END
The location is the address where the
opcodes (object codes) are placed

HANEL
EXPLAINING
INTEL HEX
FILE
(cont’)
The hex file provides the following:
The number of bytes of information to be
loaded
The information itself
The starting address where the
information must be placed
:1000000075805575905575A0557DFA111C7580AA9F
:100010007590AA75A0AA7DFA111C80E47C237B4F01
:07002000DBFEDCFADDF62235
:00000001FF
:CC AAAA TT DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD SS
:10 0000 00 75805575905575A0557DFA111C7580AA 9F
:10 0010 00 7590AA75A0AA7DFA111C80E47C237B4F 01
:07 0020 00 DBFEDCFADDF622 35
:00 0000 01 FF

HANEL
EXPLAINING
INTEL HEX
FILE
(cont’)
:CC AAAA TT DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD SS
:10 0000 00 75805575905575A0557DFA111C7580AA 9F
:10 0010 00 7590AA75A0AA7DFA111C80E47C237B4F 01
:07 0020 00 DBFEDCFADDF622 35
:00 0000 01 FF
Each line starts with a colon
Count byte – how many bytes,
00 to 16, are in the line
16-bit address – The loader
places the first byte of data
into this memory address
Single byte – this last byte is the checksum
byte of everything in that line
Real information (data or code) – There is a maximum
of 16 bytes in this part. The loader places this
information into successive memory locations of ROM
Type –
00, there are more
lines to come after
this line
01, this is the last
line and the
loading should
stop after this line

HANEL
EXPLAINING
INTEL HEX
FILE
(cont’)
Example 8-4
Verify the checksum byte for line 3 of Figure 8-9. Verify also that
the information is not corrupted.
Solution:
:07 0020 00 DBFEDCFADDF622 35
07+00+20+00+DB+FE+DC+FA+DD+F6+22=5CBH
CBH
35H
If we add all the information including the checksum byte, and drop
the carries, we get 00.
5CBH + 35H = 600H
Dropping the carry 5
2’s complement
:07 0020 00 DBFEDCFADDF622 35

8 hw con-and_intel_hex_file

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8 hw con-and_intel_hex_file