8051 architecture and pin configuration
- 1. 8051 ARCHITECTURE AND PIN CONFIGURATION NAME – NITHIN KALLEPALLY MICRO PROCESSORS AND MICRO CONTROLLERS
- 2. General-purpose Microprocessors ◦ CPU ◦ NO RAM ◦ NO ROM ◦ NO I/O PORTS
- 3. General-purpose Microcontroller ◦ CPU (microprocessor) ◦ RAM ◦ ROM ◦ I/O ports ◦ Timer ◦ ADC and other peripherals CPU RAM ROM I/O Timer Serial COM Port MICRO CONTROLL ER
- 4. Features Of 8051 ◦ 128 bytes of RAM ◦ 4 K bytes of on-chip ROM ◦ Two timers ◦ One serial port ◦ Four I/O ports, each 8 bits wide(i.e. 32 I/O pins.) ◦ 6 interrupt sources ◦ Commercially available version of 8051 run on 12 MHz to 18 MHz
- 5. Architecture Of 8051 The block diagram of 8051 micro controller architecture shows that 8051 micro controller consists of a CPU, RAM, (SFRs and Data Memory), Flash (EEPROM), I/O ports and control logic for communication between the peripherals
- 7. Functional Description Block ◦ Accumulator ◦ SFR –special function registers ◦ It can be accessed through its SFR adder 0E0H. ◦ B Register ◦ Use as temporary register . ◦ store upper bit Result of MUL & DIV. ◦ access through SFR adder 0F0H. ◦ Stack Pointer ◦ Define anywhere on chip 128 byte RAM. ◦ It is Initialized to 07H address (after rest) . ◦ Data Pointer ◦ 16 bit register ◦ Access external memory up to 64KB.
- 8. ◦ Program Status Word ◦ Reflect status ALU performing operation. ◦ Port 0 to 3 ◦ Each latch and corresponding drivers of port 0 to 3 is allotted to the corresponding on chip I/O port. ◦ Serial Data Buffer ◦ Two Independent Register : TX Buffer (8bit) & RX Buffer(8bit). ◦ Program Counter ◦ 16 bit wide ◦ Point to address of next instruction to be executed . ◦ Timing & Control Unit ◦ Deriver signal required for Internal operation of circuit . ◦ Control signal required for controlling External System Bus.
- 9. ◦ Oscillator ◦ Generate basic timing control signal for operation of circuit using crystal oscillator. ◦ ALU ◦ Perform 8 bit operation. ◦ Through TMP1 and TMP2 (each 8 bit). ◦ Not access by User. ◦ SFR Register Bank ◦ lie in range of 80H to 0FFH . ◦ It can addressed using their respective address .
- 10. Pin Configuration OF 8051 • This is a 40 pin micro controller • VCC & VSS • RESET • ALE/PROG It is used for demultiplexing address and data . • It is valid only for External memory accesses. • EA/VPP • EA/VPP =0 : Execute program on external memory. • EA/VPP =1 : Execute program on internal memory. • Receives 21 v for programming of the on chip EPROM. • PSEN • Acts as a strobe to read the external program memory. • It is low during external program memory accesses.
- 11. ◦ Port 0 (P0.0-P0.7) ◦ 8 bit bidirectional bit addressable I/O port. ◦ Allotted an address in SFR ◦ address range. ◦ Act as Multiplexed A/D lines during external memory access. ◦ Port 1 (P1.0-P1.7) ◦ 8 bit bidirectional bit addressable port. ◦ Allotted an address in SFR address range. ◦ Port 2 (P2.0-P2.7) ◦ During external memory, It emits higher 8 bits of address when ALE =1 & EA=0 . ◦ Also receives higher order address bit during programming of on chip EPROM.
- 12. ◦ Port 3 (P3.0-P3.7) ◦ 8 bit bidirectional bit addressable port. ◦ Allotted an address in SFR address range. ◦ XTAL1 & XTAL2 ◦ A Crystal is to be connected externally between these two pins to complete the feedback path to start oscillations. ◦ Controller can be operated on external clock . ◦ GND This is ground pin
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