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YCCE, Nagpur MGI
8051 Microcontroller
Dr. P. T. Karule
Professor
Department of Electronics Engineering
Yeshwantrao Chavan College of Engineering, Nagpur (M. S.)
Email: ptkarule@gmail.com, 412@ycce.in
Website: www.ycce.edu
8051 Microcontroller
12/9/2024 2
Microprocessor Based System
• CPU is Microprocessor
• Memory (RAM, ROM), Input & Output Devices are
connected externally
8085
uP
D
C
A
Serial
Port
I / O
Ports
ROM Input Output
TxD RxD
RAM
12/9/2024 3
Inside Microcontroller
Microcontroller – all components of computer system in one integrated circuit (chip)
12/9/2024 4
Microprocessor Vs Microcontroller
• CPU is stand-alone,
RAM, ROM, I/O, timer
are separate
• General-purpose
• Used as CPU in
Computer
• Instruction sets focus on
processing-intensive
operations
• High processing power
• High power consumption
• Expensive
• CPU, RAM, ROM, I/O
ports and timer are all
on a single chip
• Single-purpose (control-
oriented)
• Used for applications in
which cost, power and
space are critical
• Bit-level operations
• Instruction sets focus on
control and bit-level
operations
• Low power consumption
12/9/2024 5
Interfaces with Microcontroller
89C51
3
2
1
6
5
4
9
8
7
#
0

Relay
Sensor
Stepper
Motor
12/9/2024 6
Where are microcontrollers used?
Microcontroller are used typically where processing
power is not critical.
• In household appliances like TV,DVD player, audio
system, washing machine,microwave etc.
• Micro controller applications are in office automation
industry
• In consumer electronics goods
• Used in communication and automobile market
• Wherever you need automation
• In hand held battery operated devices
12/9/2024 7
Advantages of using Microcontrollers
• Fast and effective
– The architecture correlates closely with the problem being solved
(control systems).
• Low cost / Low Power
– High level of system integration within one component only a
handful of components needed to create a working system.
• Compatibility
– Opcodes and binaries are the SAME for all 80x51 variants.
• Multi-sourced
– Over 12 manufacturers, hundreds of varieties.
• Constant improvement
– Improvements in silicon/design increase speed and power
annually.
• Good documentation
• Freely available development tools
12/9/2024 8
8051 Microcontroller
• The 8051 is 8 bit microcontroller originally
developed by Intel in 1980.
• It is 40 pin IC.
• The 8051 contains.
– CPU with Boolean processor.
– 5 interrupts (2 external & 3 internal).
– 2, 16 bit timer/counter.
– Serial port.
– 32 I/O lines ( four 8- bit ports).
– 128 x 8 bit internal RAM.
– 4K x 8 ROM.
12/9/2024 9
8051 Functional Blocks
12/9/2024 10
Different Internal Blocks Description
• I/O Ports
– Four 8 bit I/O ports (P0,P1,P2 & P3), i.e. 32 I/O lines
• Timers
– Two 16 bit up counters, Timer0 and Timer1
– Can be used as timers or event counters
– Can interrupt 8051 internally after timeout
• Serial I/O
– Serial port with TXD and RXD pins can be used with RS232 bus for
communication with PC
• Interrupts
– Total 5 hardware interrupts
– Two external active low / edge triggered interrupts (INT0 & INT1)
– Three internal interrupts (From Timers & Serial I/O)
12/9/2024 11
8051 Pins and Signals
12/9/2024 12
8051 Pin & Signals
• It is 40 pin IC
• Power Supply
Vcc = +5V
GND = 0V
12/9/2024 13
8051 Pins & Signals
Vcc GND
XTAL1 P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
XTAL2 P0.6
P0.7
P2.0
RST P2.1
EA P2.2
PSEN P2.3
ALE /PROG P2.4
P2.5
P2.6
P2.7
P3.0 P1.0
P3.1 P1.1
P3.2 P1.2
P3.3 P1.3
P3.4 P1.4
P3.5 P1.5
P3.6 P1.6
P3.7 P1.7
8051
Address / Data Bus
(AD0 – AD7)
Address Bus
(A8 – A15)
Port 1
R X D
T X D
INT0
INT1
T0
T1
WR
RD
Alternate
Function
Oscillator
CLK input
12/9/2024 14
Oscillator Connections
• Crystal connected to XTAL1 and
XTAL2.
• One machine cycle = 12 clock
cycles
• If Crystal frequency is 12 MHz.
• 12 MHz clock results in 1usec
machine cycle.
• Many instruction require only
one machine cycle. i.e. 1 usec
One Machine Cycle
18 (XTAL2)
19 (XTAL1)
33pF
33pF
12MHz
8051
State 1 State 2 State 6
State 5
State 4
State 3
12/9/2024 15
With Reset Circuit
(VCC) 40
9 (RST)
(EA) 31
18 (XTAL2)
19 (XTAL1)
20 (GND)
33pF
33pF
8K2
12MHz
10µF
8051
+5V
12/9/2024 16
Pin Description
Signal Name & Function
RST
Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device. Execute program from
0000H.
ALE/PROG
Address Latch Enable/Program Pulse: Output pulse for
latching the low byte of the address during an access to
external memory. This pin is also the program pulse input
(PROG) during EPROM programming.
PSEN
Program Store Enable: The read strobe to external program
memory. ( acts like RD for external EPROM)
EA/Vpp
External Access Enable/Programming Supply Voltage:
If EA is held high, the device executes from internal program
memory. If EA is held low, the device executes from external
program memory. This pin also receives the 12.75V
programming supply voltage (VPP) during EPROM
programming.
12/9/2024 17
I/O Ports (32 I/O Pins)
• All I/O pins are bidirectional, each pin can be used independently as
input or output
• Port 1, 2 & 3 have internal pull-ups.
• Port 0 has open drain outputs, hence it need external pull-ups.
• Port 0, 2 & 3 are dual purpose.
• Port 1 is dedicated I/O port.
Port
Primary
Function
Secondary Function
P0.7 – P0.0 I/O Lower Address / Data Bus (AD7 – AD0)
P1.7 – P1.0 I/O ----
P2.7 – P2.0 I/O
Higher Address Bus (A15 – A8)
P3.7 – P3.0 I/O RD, WR, T1, T0, INT1, INT0,TXD & RXD
12/9/2024 18
8051 Data Memory Space
External
RAM
64KB
FFFFH
0000H
AND
128 bytes RAM
(Direct
and Indirect
Addressing)
7FH
00H
Internal RAM
SFRs
(Direct
Addressing
only)
FFH
80H
12/9/2024 19
8051 Program Memory Space
AND
OR
Internal
4KB
EA = 1
0FFFH
0000H
EA = 0
External
64KB
FFFFH
0000H
External
60KB
FFFFH
1000H
12/9/2024 20
P0
ALE
P2
PSEN
EA
DATA
ADDR
OE
LATCH
8051 EPROM
Interfacing EPROM with 8051
D7 – D0
A7 – A0
A15 – A8
RD
12/9/2024 21
Interfacing RAM with 8051
P0
ALE
P2
RD
WR
EA
DATA
ADDR
OE
WE
LATCH
8051
with
internal ROM
RAM
Vcc
P3
D7 – D0
A7 – A0
A15 – A8
12/9/2024 22
Alternate Functions of Port 3
Port Pin Alternate Function
P3.0 RxD (Serial Input Port)
P3.1 TxD (Serial Output Port)
P3.2 INT0 ( External Interrupt 0)
P3.3 INT1 ( External Interrupt 1)
P3.4 T0 (Timer 0 External Input)
P3.5 T1 (Timer 1 External Input)
P3.6 WR ( External data memory write)
P3.7 RD ( External data memory read)
12/9/2024 23
Alternate Functions of Port 3 (Cont..)
• RD (P3.7) : External data memory read control signal
• WR (P3.6) : External data memory write control signal
RD(P3.7)
WR(P3.6)
8051
OE
WE
External
RAM
12/9/2024 24
Alternate Functions of Port 3 (Cont..)
• T0 (P3.4) : Timer 0 External input
• T1 (P3.5) : Timer 1 External input
T0(P3.4)
T1(P3.5)
8051
External CLK
12/9/2024 25
Alternate Functions of Port 3 (Cont..)
• RXD (P3.0) : Serial Input Port
• TXD (P3.1) : Serial Output Port
RXD(P3.0)
TXD(P3.1)
8051
Input data
D0 D1 D2 D3 . . .
Output data
. . . D3 D2 D1 D0
12/9/2024 26
Alternate Functions of Port 3 (Cont..)
• INT0 (P3.2) : External Interrupt 0
• INT1 (P3.3) : External Interrupt 1
INT0(P3.2)
INT1(P3.3)
8051
Level Triggered
Edge Triggered
OR
12/9/2024 27
Interrupt sources of 8051
• Total five Interrupt Sources
• Two external interrupt pins ( either low level or falling
edge triggered)
– INT0
– INT1
• Three internal ( Two of timer and one serial)
– Timer 0 overflow
– Timer 1 overflow
– Serial ( TI or RI )
12/9/2024 28
Interrupt Vector Table
Interrupt sources
Vector Location
Addresses
Priority
INT0 0003H 1st
Timer 0 overflow 000BH 2nd
INT1 0013H 3rd
Timer 1 overflow 001BH 4th
TI or RI 0023H 5th
YCCE, Nagpur MGI
8051 Microcontroller
Dr. P. T. Karule
Professor
Department of Electronics Engineering
Yeshwantrao Chavan College of Engineering, Nagpur (M. S.)
Email: ptkarule@gmail.com, 412@ycce.in
Website: www.ycce.edu
8051 Microcontroller
12/9/2024 30
8051 Architecture
12/9/2024 31
Port Drivers & Latches
12/9/2024 32
ALU
• ALU :-.
– 8 bit ALU used to perform addition, subtraction, increment,
decrement, multiplication & division.
– Logical operations like ANDing, Oring, XORing, Inverting, Rotating
& 1’s Complement.
– Boolean operations like bit Set, Reset, Complement,ANDing &
ORing.
• TMP1 & TMP2 :-.
– Temporary registers with ALU, can not be used by programmer.
• Accumulator (A) :–.
– 8 bit register used to perform arithmetic & logical operations. It is
also used transfer data to/from external memory.
• Register B :-.
– 8 bit register used for multiplication & division.
12/9/2024 33
PSW (Program status Word)
P
-
OV
RS0
RS1
F0
AC
CY
PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0
Flag Bit Name
CY PSW.7 Carry Flag
AC PSW.6 Auxiliary Carry Flag
F0 PSW.5 Flag 0 available for general purpose
RS1 PSW.4 Register Bank Selector Bit 1
RS0 PSW.3 Register Bank Selector Bit 0
OV PSW.2 Overflow Flag
P PSW.0 Parity Flag
12/9/2024 34
Register Bank Select Flags
The starting 32 locations of 128 bytes RAM are used as
register banks. The 32 locations are divided into 4 banks of
8 registers each R0 – R7. RS1 RS0 bits are used to select
any one out of 4 register banks.
RS1
(PSW.4)
RS0
(PSW.3)
Register Bank selected
0 0 Bank 0 (00H to 07H)
0 1 Bank 1 (08H to 0FH)
1 0 Bank 2 (10H to 17H)
1 1 Bank 3 (18H to 1FH)
On Reset 
12/9/2024 35
Internal Memory
• Internal Program Memory (ROM)
– 4K bytes of space on chip to store program
• Internal Data Memory (RAM)
– 128 Location RAM (128 bytes)
• Special Function Registers
– 21 Registers are used for different functions
Program
Memory
(4K)
0FFFH
0000H
Data
Memory
(128)
SFR
(21)
FFH
80H
7FH
00H
12/9/2024 36
Internal RAM (128 bytes)
Register
Banks
Bit
addressable
General
Purpose
7FH
30H
2FH
20H
1FH
00H
80 locations
16 locations
32 locations
12/9/2024 37
Register Banks (32 bytes)
Register
Banks
Bit
addressable
General
Purpose
7FH
30H
2FH
20H
1FH
00H
SETB PSW.3
CLR PSW.4
R0
R1
R2
R5
R4
R3
R6
R7
R0
R1
R2
R5
R4
R3
R6
R7
R0
R1
R2
R5
R4
R3
R6
R7
R0
R1
R2
R5
R4
R3
R6
R7
1FH
18H
17H
10H
0FH
08H
07H
00H
Bank 0
(default)
Bank 1
Bank 2
Bank 3
RS1,RS0=01
12/9/2024 38
Bit addressable locations
Register
Banks
Bit
addressable
General
Purpose
7FH
30H
2FH
20H
1FH
00H
2FH
2EH
2DH
2CH
2BH
2AH
29H
28H
27H
26H
25H
24H
23H
22H
21H
20H
Bit address
(7FH to 00H)
Byte
address
66
27
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
17
18
20
28
30
37
38
3F
40
47
48
4F
50
58
60
68
70
78
79
7A
7B
7C
7D
7E
7F
11
12
14
15
16
19
1A
1B
1C
1D
1E
1F
13
21
22
23
24
25
26
29
2A
2B
2C
2D
2E
2F
31
32
33
34
35
36
39
3A
3B
3C
3D
3E
41
42
43
44
45
46
49
4A
4B
4C
4D
4E
51
52
53
54
55
56
57
59
5A
5B
5C
5D
5E
5F
61
62
63
64
65
67
69
6A
6B
6C
6D
6E
6F
71
72
73
74
75
76
77
SETB 71H
CLR 2EH
12/9/2024 39
General purpose locations (80)
Register
Banks
Bit
addressable
General
Purpose
7FH
30H
2FH
20H
1FH
00H
7FH
7EH
7DH
7CH
7BH
7AH
79H
78H
33H
32H
31H
30H
12/9/2024 40
Special Function Registers (SFRs)
Internal
RAM
(128)
SFR
(21)
FFH
80H
7FH
00H
PCON
DPH
DPL
SP
P0
TH1
TH0
TL1
TL0
TMOD
TCON
P1
SBUF
SCON
P2
IE
P3
IP
PSW
ACC
B
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
FFH
F7H
EFH
E7H
DFH
D7H
CFH
C7H
BFH
B7H
AFH
A7H
9FH
97H
8FH
87H
Bit Addressable SFRs
8 bytes
Pink background
are control SFR
12/9/2024 41
Special Function Registers (SFRs)
There are different 8 bit registers for defining the operation of
timer, serial data transfer, interrupts etc. These registers are
called SFRs. The different 21 SFR are –
1. Accumulator
2. Reg. B
3. PSW
4. P0 (Port 0)
5. P1 (Port 1)
6. P2 (Port 2)
7. P3 (Port 3)
8. DPH & DPL (DPTR)
9. SP (Stack Pointer)
10. TH0 & TL0 (Timer0 reg.)
11. TH1 & TL1 (Timer1 reg.)
12. TMOD (Timer Mode reg.)
13. TCON (Timer Control reg.)
14. SCON (Serial Control reg.)
15. SBUF (Serial Buffer reg.)
16. PCON (Power Control reg.)
17. IE (Interrupt Enable reg.)
18. IP (Interrupt Priority reg.)
12/9/2024 42
Stack Pointer (SP)
• Stack Pointer
SP is 8 bit register. It holds address of top of the stack. Only internal
128 bytes RAM can be used as a stack memory for storing stack of
data. In 8051 the data is pushed into stack memory from lower
address towards higher address. (Opposite of 8085)
At power ON RESET 07H is stored in SP.
7FH
09H
08H
07H
00H
07H
SP
First data is
Pushed here
12/9/2024 43
Program Counter (PC)
• Program Counter (16 bit)
The Internal 4KB EPROM or external EPROM are used to store instruction
code of program, hence it is called program memory.
To execute any instruction, 8051 will fetch instruction code from program
memory and to select program memory location, the 16 bit address is
transferred from PC and it is automatically gets incremented by 1 to give
address of next instruction.
Using branching instruction JMP/CALL, new address can be stored in PC.
0000H
PC OPCODE
0000H
0001H
0002H
0FFFH
(Instruction
Codes)
Program
Memory (4K)
Fetch
instruction code
& then
PC = PC + 1
12/9/2024 44
Data Pointer (DPTR)
• DPTR
DPTR is 16 bit register, which consist of two 8 bit registers DPH and
DPL.
DPH and DPL can be used to store 8 bit data each.
DPTR is used to store 16 bit address of memory.
data
0000H
0001H
9000H
FFFFH
External
data memory
(64K)
9000H
DPTR
Data transfer
to 8051
12/9/2024 45
Thank You

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8051 Architecture, System Bus, Advantages

  • 1. YCCE, Nagpur MGI 8051 Microcontroller Dr. P. T. Karule Professor Department of Electronics Engineering Yeshwantrao Chavan College of Engineering, Nagpur (M. S.) Email: ptkarule@gmail.com, 412@ycce.in Website: www.ycce.edu 8051 Microcontroller
  • 2. 12/9/2024 2 Microprocessor Based System • CPU is Microprocessor • Memory (RAM, ROM), Input & Output Devices are connected externally 8085 uP D C A Serial Port I / O Ports ROM Input Output TxD RxD RAM
  • 3. 12/9/2024 3 Inside Microcontroller Microcontroller – all components of computer system in one integrated circuit (chip)
  • 4. 12/9/2024 4 Microprocessor Vs Microcontroller • CPU is stand-alone, RAM, ROM, I/O, timer are separate • General-purpose • Used as CPU in Computer • Instruction sets focus on processing-intensive operations • High processing power • High power consumption • Expensive • CPU, RAM, ROM, I/O ports and timer are all on a single chip • Single-purpose (control- oriented) • Used for applications in which cost, power and space are critical • Bit-level operations • Instruction sets focus on control and bit-level operations • Low power consumption
  • 5. 12/9/2024 5 Interfaces with Microcontroller 89C51 3 2 1 6 5 4 9 8 7 # 0  Relay Sensor Stepper Motor
  • 6. 12/9/2024 6 Where are microcontrollers used? Microcontroller are used typically where processing power is not critical. • In household appliances like TV,DVD player, audio system, washing machine,microwave etc. • Micro controller applications are in office automation industry • In consumer electronics goods • Used in communication and automobile market • Wherever you need automation • In hand held battery operated devices
  • 7. 12/9/2024 7 Advantages of using Microcontrollers • Fast and effective – The architecture correlates closely with the problem being solved (control systems). • Low cost / Low Power – High level of system integration within one component only a handful of components needed to create a working system. • Compatibility – Opcodes and binaries are the SAME for all 80x51 variants. • Multi-sourced – Over 12 manufacturers, hundreds of varieties. • Constant improvement – Improvements in silicon/design increase speed and power annually. • Good documentation • Freely available development tools
  • 8. 12/9/2024 8 8051 Microcontroller • The 8051 is 8 bit microcontroller originally developed by Intel in 1980. • It is 40 pin IC. • The 8051 contains. – CPU with Boolean processor. – 5 interrupts (2 external & 3 internal). – 2, 16 bit timer/counter. – Serial port. – 32 I/O lines ( four 8- bit ports). – 128 x 8 bit internal RAM. – 4K x 8 ROM.
  • 10. 12/9/2024 10 Different Internal Blocks Description • I/O Ports – Four 8 bit I/O ports (P0,P1,P2 & P3), i.e. 32 I/O lines • Timers – Two 16 bit up counters, Timer0 and Timer1 – Can be used as timers or event counters – Can interrupt 8051 internally after timeout • Serial I/O – Serial port with TXD and RXD pins can be used with RS232 bus for communication with PC • Interrupts – Total 5 hardware interrupts – Two external active low / edge triggered interrupts (INT0 & INT1) – Three internal interrupts (From Timers & Serial I/O)
  • 11. 12/9/2024 11 8051 Pins and Signals
  • 12. 12/9/2024 12 8051 Pin & Signals • It is 40 pin IC • Power Supply Vcc = +5V GND = 0V
  • 13. 12/9/2024 13 8051 Pins & Signals Vcc GND XTAL1 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 XTAL2 P0.6 P0.7 P2.0 RST P2.1 EA P2.2 PSEN P2.3 ALE /PROG P2.4 P2.5 P2.6 P2.7 P3.0 P1.0 P3.1 P1.1 P3.2 P1.2 P3.3 P1.3 P3.4 P1.4 P3.5 P1.5 P3.6 P1.6 P3.7 P1.7 8051 Address / Data Bus (AD0 – AD7) Address Bus (A8 – A15) Port 1 R X D T X D INT0 INT1 T0 T1 WR RD Alternate Function Oscillator CLK input
  • 14. 12/9/2024 14 Oscillator Connections • Crystal connected to XTAL1 and XTAL2. • One machine cycle = 12 clock cycles • If Crystal frequency is 12 MHz. • 12 MHz clock results in 1usec machine cycle. • Many instruction require only one machine cycle. i.e. 1 usec One Machine Cycle 18 (XTAL2) 19 (XTAL1) 33pF 33pF 12MHz 8051 State 1 State 2 State 6 State 5 State 4 State 3
  • 15. 12/9/2024 15 With Reset Circuit (VCC) 40 9 (RST) (EA) 31 18 (XTAL2) 19 (XTAL1) 20 (GND) 33pF 33pF 8K2 12MHz 10µF 8051 +5V
  • 16. 12/9/2024 16 Pin Description Signal Name & Function RST Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. Execute program from 0000H. ALE/PROG Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address during an access to external memory. This pin is also the program pulse input (PROG) during EPROM programming. PSEN Program Store Enable: The read strobe to external program memory. ( acts like RD for external EPROM) EA/Vpp External Access Enable/Programming Supply Voltage: If EA is held high, the device executes from internal program memory. If EA is held low, the device executes from external program memory. This pin also receives the 12.75V programming supply voltage (VPP) during EPROM programming.
  • 17. 12/9/2024 17 I/O Ports (32 I/O Pins) • All I/O pins are bidirectional, each pin can be used independently as input or output • Port 1, 2 & 3 have internal pull-ups. • Port 0 has open drain outputs, hence it need external pull-ups. • Port 0, 2 & 3 are dual purpose. • Port 1 is dedicated I/O port. Port Primary Function Secondary Function P0.7 – P0.0 I/O Lower Address / Data Bus (AD7 – AD0) P1.7 – P1.0 I/O ---- P2.7 – P2.0 I/O Higher Address Bus (A15 – A8) P3.7 – P3.0 I/O RD, WR, T1, T0, INT1, INT0,TXD & RXD
  • 18. 12/9/2024 18 8051 Data Memory Space External RAM 64KB FFFFH 0000H AND 128 bytes RAM (Direct and Indirect Addressing) 7FH 00H Internal RAM SFRs (Direct Addressing only) FFH 80H
  • 19. 12/9/2024 19 8051 Program Memory Space AND OR Internal 4KB EA = 1 0FFFH 0000H EA = 0 External 64KB FFFFH 0000H External 60KB FFFFH 1000H
  • 20. 12/9/2024 20 P0 ALE P2 PSEN EA DATA ADDR OE LATCH 8051 EPROM Interfacing EPROM with 8051 D7 – D0 A7 – A0 A15 – A8 RD
  • 21. 12/9/2024 21 Interfacing RAM with 8051 P0 ALE P2 RD WR EA DATA ADDR OE WE LATCH 8051 with internal ROM RAM Vcc P3 D7 – D0 A7 – A0 A15 – A8
  • 22. 12/9/2024 22 Alternate Functions of Port 3 Port Pin Alternate Function P3.0 RxD (Serial Input Port) P3.1 TxD (Serial Output Port) P3.2 INT0 ( External Interrupt 0) P3.3 INT1 ( External Interrupt 1) P3.4 T0 (Timer 0 External Input) P3.5 T1 (Timer 1 External Input) P3.6 WR ( External data memory write) P3.7 RD ( External data memory read)
  • 23. 12/9/2024 23 Alternate Functions of Port 3 (Cont..) • RD (P3.7) : External data memory read control signal • WR (P3.6) : External data memory write control signal RD(P3.7) WR(P3.6) 8051 OE WE External RAM
  • 24. 12/9/2024 24 Alternate Functions of Port 3 (Cont..) • T0 (P3.4) : Timer 0 External input • T1 (P3.5) : Timer 1 External input T0(P3.4) T1(P3.5) 8051 External CLK
  • 25. 12/9/2024 25 Alternate Functions of Port 3 (Cont..) • RXD (P3.0) : Serial Input Port • TXD (P3.1) : Serial Output Port RXD(P3.0) TXD(P3.1) 8051 Input data D0 D1 D2 D3 . . . Output data . . . D3 D2 D1 D0
  • 26. 12/9/2024 26 Alternate Functions of Port 3 (Cont..) • INT0 (P3.2) : External Interrupt 0 • INT1 (P3.3) : External Interrupt 1 INT0(P3.2) INT1(P3.3) 8051 Level Triggered Edge Triggered OR
  • 27. 12/9/2024 27 Interrupt sources of 8051 • Total five Interrupt Sources • Two external interrupt pins ( either low level or falling edge triggered) – INT0 – INT1 • Three internal ( Two of timer and one serial) – Timer 0 overflow – Timer 1 overflow – Serial ( TI or RI )
  • 28. 12/9/2024 28 Interrupt Vector Table Interrupt sources Vector Location Addresses Priority INT0 0003H 1st Timer 0 overflow 000BH 2nd INT1 0013H 3rd Timer 1 overflow 001BH 4th TI or RI 0023H 5th
  • 29. YCCE, Nagpur MGI 8051 Microcontroller Dr. P. T. Karule Professor Department of Electronics Engineering Yeshwantrao Chavan College of Engineering, Nagpur (M. S.) Email: ptkarule@gmail.com, 412@ycce.in Website: www.ycce.edu 8051 Microcontroller
  • 32. 12/9/2024 32 ALU • ALU :-. – 8 bit ALU used to perform addition, subtraction, increment, decrement, multiplication & division. – Logical operations like ANDing, Oring, XORing, Inverting, Rotating & 1’s Complement. – Boolean operations like bit Set, Reset, Complement,ANDing & ORing. • TMP1 & TMP2 :-. – Temporary registers with ALU, can not be used by programmer. • Accumulator (A) :–. – 8 bit register used to perform arithmetic & logical operations. It is also used transfer data to/from external memory. • Register B :-. – 8 bit register used for multiplication & division.
  • 33. 12/9/2024 33 PSW (Program status Word) P - OV RS0 RS1 F0 AC CY PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 Flag Bit Name CY PSW.7 Carry Flag AC PSW.6 Auxiliary Carry Flag F0 PSW.5 Flag 0 available for general purpose RS1 PSW.4 Register Bank Selector Bit 1 RS0 PSW.3 Register Bank Selector Bit 0 OV PSW.2 Overflow Flag P PSW.0 Parity Flag
  • 34. 12/9/2024 34 Register Bank Select Flags The starting 32 locations of 128 bytes RAM are used as register banks. The 32 locations are divided into 4 banks of 8 registers each R0 – R7. RS1 RS0 bits are used to select any one out of 4 register banks. RS1 (PSW.4) RS0 (PSW.3) Register Bank selected 0 0 Bank 0 (00H to 07H) 0 1 Bank 1 (08H to 0FH) 1 0 Bank 2 (10H to 17H) 1 1 Bank 3 (18H to 1FH) On Reset 
  • 35. 12/9/2024 35 Internal Memory • Internal Program Memory (ROM) – 4K bytes of space on chip to store program • Internal Data Memory (RAM) – 128 Location RAM (128 bytes) • Special Function Registers – 21 Registers are used for different functions Program Memory (4K) 0FFFH 0000H Data Memory (128) SFR (21) FFH 80H 7FH 00H
  • 36. 12/9/2024 36 Internal RAM (128 bytes) Register Banks Bit addressable General Purpose 7FH 30H 2FH 20H 1FH 00H 80 locations 16 locations 32 locations
  • 37. 12/9/2024 37 Register Banks (32 bytes) Register Banks Bit addressable General Purpose 7FH 30H 2FH 20H 1FH 00H SETB PSW.3 CLR PSW.4 R0 R1 R2 R5 R4 R3 R6 R7 R0 R1 R2 R5 R4 R3 R6 R7 R0 R1 R2 R5 R4 R3 R6 R7 R0 R1 R2 R5 R4 R3 R6 R7 1FH 18H 17H 10H 0FH 08H 07H 00H Bank 0 (default) Bank 1 Bank 2 Bank 3 RS1,RS0=01
  • 38. 12/9/2024 38 Bit addressable locations Register Banks Bit addressable General Purpose 7FH 30H 2FH 20H 1FH 00H 2FH 2EH 2DH 2CH 2BH 2AH 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H Bit address (7FH to 00H) Byte address 66 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 17 18 20 28 30 37 38 3F 40 47 48 4F 50 58 60 68 70 78 79 7A 7B 7C 7D 7E 7F 11 12 14 15 16 19 1A 1B 1C 1D 1E 1F 13 21 22 23 24 25 26 29 2A 2B 2C 2D 2E 2F 31 32 33 34 35 36 39 3A 3B 3C 3D 3E 41 42 43 44 45 46 49 4A 4B 4C 4D 4E 51 52 53 54 55 56 57 59 5A 5B 5C 5D 5E 5F 61 62 63 64 65 67 69 6A 6B 6C 6D 6E 6F 71 72 73 74 75 76 77 SETB 71H CLR 2EH
  • 39. 12/9/2024 39 General purpose locations (80) Register Banks Bit addressable General Purpose 7FH 30H 2FH 20H 1FH 00H 7FH 7EH 7DH 7CH 7BH 7AH 79H 78H 33H 32H 31H 30H
  • 40. 12/9/2024 40 Special Function Registers (SFRs) Internal RAM (128) SFR (21) FFH 80H 7FH 00H PCON DPH DPL SP P0 TH1 TH0 TL1 TL0 TMOD TCON P1 SBUF SCON P2 IE P3 IP PSW ACC B F8H F0H E8H E0H D8H D0H C8H C0H B8H B0H A8H A0H 98H 90H 88H 80H FFH F7H EFH E7H DFH D7H CFH C7H BFH B7H AFH A7H 9FH 97H 8FH 87H Bit Addressable SFRs 8 bytes Pink background are control SFR
  • 41. 12/9/2024 41 Special Function Registers (SFRs) There are different 8 bit registers for defining the operation of timer, serial data transfer, interrupts etc. These registers are called SFRs. The different 21 SFR are – 1. Accumulator 2. Reg. B 3. PSW 4. P0 (Port 0) 5. P1 (Port 1) 6. P2 (Port 2) 7. P3 (Port 3) 8. DPH & DPL (DPTR) 9. SP (Stack Pointer) 10. TH0 & TL0 (Timer0 reg.) 11. TH1 & TL1 (Timer1 reg.) 12. TMOD (Timer Mode reg.) 13. TCON (Timer Control reg.) 14. SCON (Serial Control reg.) 15. SBUF (Serial Buffer reg.) 16. PCON (Power Control reg.) 17. IE (Interrupt Enable reg.) 18. IP (Interrupt Priority reg.)
  • 42. 12/9/2024 42 Stack Pointer (SP) • Stack Pointer SP is 8 bit register. It holds address of top of the stack. Only internal 128 bytes RAM can be used as a stack memory for storing stack of data. In 8051 the data is pushed into stack memory from lower address towards higher address. (Opposite of 8085) At power ON RESET 07H is stored in SP. 7FH 09H 08H 07H 00H 07H SP First data is Pushed here
  • 43. 12/9/2024 43 Program Counter (PC) • Program Counter (16 bit) The Internal 4KB EPROM or external EPROM are used to store instruction code of program, hence it is called program memory. To execute any instruction, 8051 will fetch instruction code from program memory and to select program memory location, the 16 bit address is transferred from PC and it is automatically gets incremented by 1 to give address of next instruction. Using branching instruction JMP/CALL, new address can be stored in PC. 0000H PC OPCODE 0000H 0001H 0002H 0FFFH (Instruction Codes) Program Memory (4K) Fetch instruction code & then PC = PC + 1
  • 44. 12/9/2024 44 Data Pointer (DPTR) • DPTR DPTR is 16 bit register, which consist of two 8 bit registers DPH and DPL. DPH and DPL can be used to store 8 bit data each. DPTR is used to store 16 bit address of memory. data 0000H 0001H 9000H FFFFH External data memory (64K) 9000H DPTR Data transfer to 8051