computer architecture and micro controllers

Module II
8051 Architecture
Ms. Ancy Joy
Department of Electronics and Communication Engineering,
MITS
1

Module-II : Contents
•Microcontrollers and Embedded Processors and Applications
•8051 Architecture :-
• Block diagram of 8051
• Pin configuration
•Registers
•Internal Memory
•Timers
•Port Structures
•Interrupts
•Assembly Language Programming :-
•Addressing Modes
•Instruction set (Detailed study of 8051 instruction set is required)
Department of Electronics and Communication Engineering,
MITS
2

Department of Electronics and Communication Engineering, MI
TS
3
Microcontrollers and Embedded Processors and Applications

TS
4

TS
5
 They are everywhere

TS
6

TS
7
General Architectures of Microcontrollers
and Microprocessors
(a) MICROPROCESSOR
Single Chip
ALU
Control
Unit
Registers
Single Chip

TS
8
Applications General Computing
(i.e, Laptops ,Tablets) Appliances, Specialized
Devices
Speed
External parts
Cost
Energy usage
High Low
Many Few
Very fast Relatively slow
Medium to high Very low to low
Vendors

TS
9
Microprocessor
16-bit processors
• Intel’s 8086 and 8088
• Motorola’s 68000
32-bit processors
• Intel’s 80186, 80286, 80386
• Motorola’s 68030.
Microcontroller
• Intel’s 8031, 8051, 8096
• Motorola’s 68HC11

TS
10
Feature 8051 8031 8052
On-Chip
ROM(Program
Memory)
4K bytes
ROMless version
of 8051
8K bytes
On-Chip
RAM(Data
Memory)
128 bytes 128 bytes 256 bytes
Number of 16-bit
Timers
2 2 3
Number of
interrupt
sources(interrupt
Vector Addresses)
6(5) 6(5) 8(6)
Number of port
bits
32(four 8-bit
ports)
32(four 8-bit
ports)
32(four 8-bit
ports)
Number of serial
ports
1(Tx & Rx) 1(Tx & Rx) 1(Tx & Rx)
Comparison of 8051, 8031, 8052
(variants of 8051)

TS
11
Overview of the 8051 family
• In 1981 Intel corporation introduced an 8 bit microcontroller called
8051
 8 bit CPU
4K bytes of ROM (0000H to 0FFFH)
128 Bytes of on chip RAM
2- Timers
 1-Serial port
4- Ports(each 8 bit wide)
All on a Single chip called “System on Chip”

TS
12
Architecture/Block diagram of 8051
Address/Data Bus

TS
13
• Contains Control Unit and ALU
• It monitors and controls all operations
• ALU performs all arithmetic and logic operations of 8 bit data.
• It decodes the program written in ROM and execute
CPU
• ROM : Permanent memory, stores programs/instructions to perform
defined task
• RAM : Temporary Memory, stores operands/data on temporary
basis
Memory
• A group of wire act as medium for transfer of data
• Data Bus : 8 bit data bus, used to carry data, Bidirectional
• Address Bus : 16 bit address bus, used to carry address locations from CPU
to memory, Unidirectional
• Control Bus : Provide control signals.
Bus

TS
14
• Connects the Microcontroller to the peripheral devices.
• Four 8 bit I/O Ports(P0, P1, P2, P3)
• Enables parallel communication.
I/O Ports
• Used to create Delay or time gap between events
• Timer 0 & Timer 1 : 16 bit timers, can use as counter(to
count the external clock pulses)
Timers/
Counters
• Enables synchronized work of all parts of the
microcontroller
• Crystal oscillator generates clock for all subunits.So all
will work synchronizely. The crystal frequency of 8051
is 12 MHz.
Oscillator
• Enables serial transmission & reception of data.
• used for long distance communication
• TxD : to transmit data
• RxD : to receive data
• Cost effective method
Serial Port

TS
15
• It is a subroutine that interrupts the microcontroller main program and
causes it to execute any other program which is more important
• It temporarily suspend the on going main program
• Pass the control to the subroutine
• Executes the subroutine
• Resumes to on going main program
Interrupts
8051 has five interrupts
 INT0 :- External hardware interrupt
 INT1 :- External hardware interrupt
 TF0 :- Timer 0 overflow interrupt(internal interrupt)
 TF1 :- Timer 1 overflow interrupt(internal interrupt)
 R1/T1 :- Serial communication interupt(internal interrupt)

TS
16
Pin description of
8051
Vcc

TS
17
Vcc & Gnd
• To power up the Microcontroller
XTAL 1 &
XTAL 2
• A crystal oscillator is connected between Pin 18 & Pin 19
• Usually the oscillator is 11.0592MHz
Port 0
• Pin 39 to Pin 32 are P0.0 to P0.7 ( 8 pins )
• Input port/Output port
• AD0 to AD7
• Bidirectional
Can communicate to external memory
• Dual function/Multiplexing: It can handle both data bus and address bus(lower byte).

TS
18
Port 1
• Pin 1 to Pin 8 (P1.0 to P1.7)
• Bi-directional port
• which is used as general purpose Input/Output Port
Port 2
• Pin 21 to Pin 28 (P2.0 to P2.7)
• Bi-directional I/O port designed to operate in two different modes
• Acts as general purpose I/O port in normal operational mode (Data Bus)
• Dual function : acts as higher order address bus in external data memory/program memory
operations
Port 3
• Pin 10 to Pin 17 (P3.0 to P3.7)
• P3.0 & P3.1 : Serial communication
• P3.2 & P3.3 : External interrupts(INT0 ,INT1)-active low
• P3.4 & P3.5 : Internal interrupts(T0 ,T1)
• P3.6 & P3.7 : WR’ ,RD’ (control pins) – to write/read data from external RAM

TS
19
RST
• Input pin, Active high pin (Pin 9)
• The Microcontroller gets reset and terminate all activities.
• It will execute from the 1st
instruction wrote in the program memory.
PSEN’
• Program Store Enable Pin
• Active low output pin (Pin 29)
• 0 : use external memory to read data or instruction through Port 0 or Port 2 .
ALE/PROG
• Active high output pin (Pin 30)
• Address Latch Enable : It is used to demultiplex address or data bus
• Port 0 is multiplexed with lower 8 bits address and data bus
• 0 : referring to data
• 1: referring to lower 8 bit address
EA’ / VPP
• Pin 31 : External Access Pin
• Input pin must connect to either VCC or GND
• 0 : indicate that program code is stored in external memory
• 1 : indicate that program code is stored in on chip ROM memory

TS
20

TS
21
Registers in 8051 Microcontroller
General
Purpose
Registers
Special
Function
Registers
Registers
General
Purpose
Register
(128 bytes)
SFR (128
Bytes)
Divided by
Register
 used to store data or o/p of ALU operations
 It can contain address of memory location
Byte/Bit
addressable
register
B
y
t
e
/
B
i
t
a
d
d
r
e
s
s
a
b
l
e
r
e
g
i
s
t
e
r
General purpose registers

TS
22
General Purpose Register
• RAM: 128 byte
• 00H to 7FH
128 byte
00H
7FH
32 byte
1FH
Register Bank & Stack
20H
2FH
Bit addressable
Read/Write memory
Read/Write storage
Scratch pad
(general purpose stack)
30H
16 byte
80 byte

TS
23
Register Bank 0
Register Bank 2
Register Bank 3
Register
Bank
&
Stack
Register Bank 1(stack)
32 byte
8 byte
00H
07H
0FH
08H
10H
17H
18H
1FH
8 byte
8 byte
8 byte
R0
R1
R2
R3
R4
R5
R6
R7
Default : Register bank 0 is selected when 8051 is powered up
Major problem : Bank 1 uses same RAM space as the stack
(either not use Register bank 1 or allocate some other area for
stack)

TS
24

TS
25
How to switch Register Bank
Program Status Word

TS
26
Special Function Register(SFR)
Other SFRs
Control SFR
I/O Port SFR
• Upper part of RAM
• 128 bytes : from 80H to FFH
• 21 SFR defined

TS
27
ACCUMULATOR(A Register)
• 8 bit register.
• It holds the data and receives the results of arithmetic instructions.
• Accumulator is usually accessed by direct addressing and its physical address is
E0H.
• Accumulator is both byte and bit addressable.
• If you want to access second bit(i.e, bit 1) you may use E1H and for third bit E2H
and so on.

TS
28
B Register
• 8 bit register.
• It is both byte and bit addressable.
• The B register is only used for multiplication and division arithmetic
operations.
• You can access all 8 bits by the physical address F0H. Suppose to
access bit 1, we have to use F1H

TS
29
Program Status Word Register(PSW)

TS
30
Bit Description
Carry flag(CY) Affected after an 8 bit addition/subtraction
1 : whenever there is carry out from the D7 bit
0 :no carry
Auxiliary carry(AC) If there is a carry from D3 to D4 after an 8 bit addition/subtraction
User-defined flag(F0) Available to the user for general purpose
Register bank selection
(RS1,RS0)
Register bank selection bits
Overflow flag(OV) Used to detect errors in signed arithmetic operations
1 : whenever the result of signed number operation is too large
Parity flag(p) Reflects the number of one’s in A(accumulator) register only.
1 : Register contains odd number of one’s
0 : Register contains even number of one’s

TS
31

TS
32
8 bit registers
16 bit registers

TS
33
PC (Program Counter)
• 16 bit program counter
• It is used to hold the address of the memory location from which the
next instruction is to be fetched.

TS
34
DPTR(Data Pointer Register)
• DPTR is a 16 bit register used to hold 16 bit address of the data memory
• This can be also used as 8 bit data pointers namely DPL and DPH
• The 8 bit data pointers can be used to access internal RAM and SFR
• The 16 bit data pointer can be used to access external memory
• The contents of the data pointer are programmable using instructions.

TS
35

8051 Stack
• The stack is a section of RAM used by the CPU to store information
temporarily.
• This information could be data or an address
• The register used to access the stack is called the SP (stack pointer)
register
• The stack pointer in the 8051 is only 8 bit wide, which means that it can
take value of 00 to FFH
• When the 8051 is powered up, the SP register contains value 07
• RAM location 08 is the first location being used for the stack by the 8051

TS
37
SP ( Stack Pointer)
• Stack pointer points to the top of the stack and it indicates the next data to be
accessed.
• Stack pointer is an 8 bit register.
• It uses the instructions : PUSH, POP, CALL, RET
• When writing a data into the stack, the stack pointer automatically
incremented by 1 and the new data is written at an address SP+1
• When reading a data from stack data is retrieved from the address in SP and
after that SP is decremented by 1(SP-1)

8051 Stack
• The storing of a CPU register in the stack is called a PUSH
• SP is pointing to the last used location of the stack
• As we push data onto the stack, the SP is incremented by one
• This is different from many microprocessors
• Loading the contents of the stack back into a CPU register
is called a POP
• With every pop, the top byte of the stack is copied to the
register specified by the instruction and the stack pointer is
decremented once

Stack and Direct Addressing Mode
• Only direct addressing mode is allowed for pushing or
popping the stack.
• PUSH A is invalid.
• Pushing the accumulator onto the stack must be coded as
PUSH 0E0H.

Stack and Direct Addressing Mode
5

TS
45
8051 Programming in Assembly Language
• The assembly language is a fully hardware related programming language.
• The embedded designers must have sufficient knowledge on hardware of particular
processor or controllers before writing the program.
• The assembly language is developed by mnemonics; therefore, users cannot understand
it easily to modify the program.

TS
46
• Assembly programming language is developed by various compilers and the “keiluvison” is best
suitable for microcontroller programming development.
• Microcontrollers or processors can understand only binary language in the form of ‘0s or 1s’;
• An assembler converts the assembly language to binary language, and then stores it in
the microcontroller memory to perform the specific task.

TS
47
Addressing Modes
1. Immediate Addressing
Source operand(data) is a constant and is provided within the
instruction, # is used
MOV A, #35H
MOV DPTR, #4500H
2. Direct Addressing
Source or destination Address is given as part of the instruction
( Internal RAM memory used)
MOV A, 35H
ADD A, 40H
MOV 80H, Ri
The way by which we specify the data sources or addresses in the instructions

TS
48
3. Register Addressing
Involves the use of working registers to hold the data to be
manipulated
MOV A, Ri
ADD A, Ri
MOV Ri, A
 MOV Ri, Rj : not allowed
4. Indirect Addressing
Register is used as a pointer to the data ( source or destination
address is given in a register)
Symbol : @
MOV A, @R0
Only R0 & R1 used, not R2-R7
ADD A, @R1

TS
49
Addressing Modes (contd.)
5. Indexed Addressing
 Used to access data from a look-up table
 Only program memory can be accessed(only RAM)
 Destination is always A register
MOVC A, @A+DPTR
MOVC A, @A+PC
MOVC refers to accessing data from code area
MOVX refers to accessing data from/to data area

TS
50
Interpretation
1. MOV A, #35H
(A) = 35H
2. MOV A, 35H
(A) = 58H
3. MOV A, R0
If (R0) = 37H
then (A) = 37H
4. MOV A, @R0
(A) = 21H
38H 2CH
37H 21H
36H 7DH
35H 58H
34H 92H
33H 00H
32H 12H
Address Content

TS
51
Instruction Classification
1. Arithmetic
8-bit Add, Subtract, Multiply and Divide
Instructions
ADD, ADDC
SUBB
MUL AB
DIV AB
Increment and Decrement Instructions
INC
DEC
Decimal Adjust for addition
DA A

TS
52
2. Logic Operations
Logic Instructions
AND, XOR, OR Operation Instructions
Byte Manipulation
Clear, Complement, or swap and
Rotate, Instructions
ANL A, #35H ; logical AND
ORL A, #24H ; logical OR
XRL A, # 15H ; logical XOR
CPL A ; complement A

TS
53

TS
54
3. Data Transfer
Move byte between accumulator (an SFR) and
register at a register bank
MOV A, R0
Move byte from an SFR/Internal RAM to
another direct
MOV 40H, A
Move indirect
MOV @40H, A
Move immediate, MOV immediate DPTR
MOV A, #55H
MOV DPTR, #4100H

TS
55
3. Data Transfer (contd.)
MOVC and MOVX indirect
MOVC A,@DPTR
MOVX A,@DPTR
Exchange or Push or Pop direct
XCH A, R0
XCHD A, R0
SWAP A : swap the nibbles of the aacumulator
PUSH R0
POP R0

TS
56
4. Boolean Operations
Bit Manipulation
Set, Complement, AND or OR or MOV the bit
MOV C, P1.7 ; port bit to carry
MOV 05, C ; carry bit to location bit 05
MOV C, ACC.7 ; accumulator bit 7 to carry
SETB P1.3 ; set bit p1.3
CLR 07 ; clear bit 07

TS
57
4. Boolean Operations (contd.)
CPL P1.5 ; complement bit p1.5
ANL C, ACC.7 ; and bit C with msb of A

TS
58
5. Branch and Machine Control
Branch instructions
JMP, AJMP, LJMP, SJMP
Conditional jumps
JZ, JNZ
Decrement and Jump conditional
DJNZ
Compare and then conditional jump
CJNE
Subroutine Call Instructions
ACALL, LCALL, RET, RETI

TS
59
Tutorial : Write simple ALPs
1.Different ways of adding numbers(immediate, register, direct and register indirect addressing modes)
Answer
i. MOV A, #05H ; Immediate addressing
ADD A, #21H ; Immediate addressing, After execution 26H in A
ii.

TS
60
2.Multiply two 8-bit numbers stored in memory 40H and 41H

TS
61
3.Example to show rotating content of A four times left is same as SWAPA

TS
62

TS
63

TS
64

computer architecture and micro controllers

More Related Content

Similar to computer architecture and micro controllers (20)

Recently uploaded (20)

computer architecture and micro controllers