8051 Architecture

MODULE 2
8051 Architecture
Microcontrollers and Embedded Processors. Architecture –
Block diagram of 8051, Pin configuration, Registers, Internal
Memory, Timers, Port Structures, Interrupts. Assembly
Language Programming - Addressing Modes, Instruction set of
8051, Simple programming examples in assembly language.

Microprocessors and Microcontroller

• Microprocessor is a single chip CPU,
microcontroller contains, a CPU and much of
the remaining circuitry of a complete
microcomputer system in a single chip.
• Microcontroller includes RAM, ROM, serial
and parallel interface, timer, interrupt
schedule circuitry (in addition to CPU) in a
single chip.
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AET305 - MODULE 2

1. Computer System Vs Embedded System:
 Microprocessor widely used in the computer system.
 And microcontroller is used in embedded system.
 If the microprocessor is the heart of computer system then
microcontroller is the heart of the embedded system.
2. Architecture:
 The microprocessor uses Von Neumann architecture where data
and program present in the same memory module .
 The microcontroller uses Harvard architecture. In this module, data
and program get stored in separate memory.
 The microcontroller can access data and program at the same time
as it is in a separate memory. This is one of the reasons
microcontrollers is faster than the microprocessor.
3. Memory and I/O Components:
 The microprocessor can not operate without peripheral components.
It has only processing unit and have to attach all the required
components externally to operate.
 Whereas micro control has small processing unit along with internal
memory to store and I/O components to give input. So it can work
independently.
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4. Circuit Size and its Complexity:
 As we have to connect components externally, microprocessor circuit
becomes large and complex.
 In microcontroller all the components are internally connected, its circuit
becomes too small.
5. Efficient Techniques to use in Compact System:
 The microcontroller can be used in the compact system as it has a small
size.
 So microcontroller is better and efficient technique in the compact
system than the microprocessor.
6. Power consumption:
 Microprocessor requires external components and its circuits also
complex. It requires more power consumption. So it is difficult to operate
microprocessor using battery power.
 The microcontroller has very low external components. it manages all its
operation inside the single chip. So it consumes very low power supply as
compared to the microprocessor.
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6. Cost:
 Microprocessor requires external components to operate. So the Cost of
the microprocessor is higher than the microcontroller.
7. Power saving feature:
 The microcontroller can have multiple modes of operation such as higher
performance, balance, idle or power saving mode.
 So if we operate microcontroller in power saving mode, the power
consumption re reduce even more. Most of the Microprocessor does not
have this power saving feature.
9. Processing Speed:
 The microprocessor has very less internal registers. It has to rely on
external storage. So all the memory operations are carried out using
memory based external commands. Results in high processing time.
 The microcontroller have many registers for instruction execution. Fetching
data and storing data require internal commands. So its execution and
processing time are lower than the microprocessor.
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8
Microprocessor
• CPU is stand-alone, RAM,
ROM, I/O, timer are separate
• Designer can decide on the
amount of ROM, RAM and
I/O ports.
• Expensive
• Versatility
• General-purpose
• High processing power
• High power consumption
• Instruction sets focus on
processing-intensive
operations
• Typically 32/64 – bit
• Typically deep pipeline (5-20
stages)
Microcontroller
• CPU, RAM, ROM, I/O and timer
are all on a single chip
• Dixed amount of on-chip ROM,
RAM, I/O ports
• For applications in which cost,
power and space are critical
• Single-purpose (control-oriented)
• Low processing power
• Low power consumption
• Bit-level operations
• Instruction sets focus on control
and bit-level operations
• Typically 8/16 bit
• Typically single-cycle/two-stage
pipeline
Microprocessor vs. Microcontroller

Embedded Processor Vs Microcontroller
• Embedded System is a system that is used to create any automation
device or to control any machines using Micro Controller
• The microController is a Circuit that has a processor, Memory,
Timer. It can be programmed with any dedicated task.
• The main difference between the microcontrollers and embedded
processors is makeup and integration
• Embedded processors, while in a sense controlling the system they
are a part of, however, they require external resources such as RAM
and registers in order to do so.
• Microcontrollers contain everything required to control a system in
every single chip.
• A microcontroller might contain an embedded processor as part of
its makeup, but most importantly it also combines other computer
parts, such as memory and signal registers, in a single chip.
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Overview OF 8051
• In 1981, Intel introduced an 8-bit microcontroller called
the 8051.
• The Intel 8051 is a very popular general purpose
microcontroller widely used for small scale embedded
systems.
• The 8051 is an 8-bit microcontroller with 8 bit data bus and
16-bit address bus.
• The 16 bit address bus can address a 64K( 216) byte code
memory space and a separate 64K byte of data memory
space.
• The 8051 has 4K on-chip read only code memory and 128
bytes of internal Random Access Memory (RAM)
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• Besides internal RAM, the 8051 has various
– Special Function Registers (SFR) such as the Accumulator,
the B register, and many other control registers.
– 34 8-bit general purpose registers in total. The ALU
performs one 8-bit operation at a time. They are register
A,B and 32 working registers
• Two 16 bit /Counter timer
• Three internal interrupts (one serial), 2 external interrupts.
• Four 8-bit I/O ports (3 of them are dual purposed). One of
them used for serial port, Some 8051 chips come with UART
for serial communication and ADC for analog to digital
conversion
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Pin configuration 8051
 8051 microcontroller is a 40 pin Dual Inline
Package (DIP).
 These 40 pins serve different functions like read,
write, I/O operations, interrupts etc.
 8051 has four I/O ports wherein each port has 8
pins which can be configured as input or output
depending upon the logic state of the pins.
 Therefore, 32 out of these 40 pins are dedicated
to I/O ports.
 The rest of the pins are dedicated to VCC, GND,
XTAL1, XTAL2, RST, ALE, EA’ and PSEN’.

 Pins 1 to 8 (PORT 1)− These pins are known as
Port 1. This port doesn’t serve any other
functions. It is internally pulled up, bi-directional
I/O port.
 Pin 9 (RST):− It is a RESET pin, which is used to
reset the microcontroller to its initial values.
 It is an active HIGH Pin i.e. if the RST Pin is HIGH
for a minimum of two machine cycles, the
microcontroller will be reset.
 Pins 10 – 17 (PORT 3): Pins 10 to 17 form the
PORT 3 pins of the 8051 Microcontroller.
 PORT 3 also acts as a bidirectional Input / Output
PORT with internal pull-ups.
 Additionally, all the PORT 3 Pins have special
functions.
 The following table gives the details of the
additional functions of PORT 3 Pins.

 Pins 18 & 19: Pins 18 and 19 i.e. XTAL 2 and
XTAL 1 are the pins for connecting external
oscillator. Generally, a Quartz Crystal Oscillator is
connected here.
 Pin 20 (GND): Pin 20 is the Ground Pin of the
8051 Microcontroller. It represents 0V and is
connected to the negative terminal (0V) of the
Power Supply.
 Pins 21 – 28 (PORT 2): These are the PORT 2
Pins of the 8051 Microcontroller.
 PORT 2 is also a Bidirectional Port i.e. all the PORT
2 pins act as Input or Output.
 Additionally, when external memory is interfaced,
PORT 2 pins act as the higher order address byte.
 PORT 2 Pins have internal pull-ups.

 Pin 29 (PSEN): Pin 29 is the Program Store
Enable Pin (PSEN). Using this pins, external
Program Memory can be read.
 Pin 30 (ALE/PROG): Pin 30 is the Address Latch
Enable Pin. Using this Pins, external address can
be separated from data (as they are multiplexed
by 8051).
 During Flash Programming, this pin acts as
program pulse input (PROG)
 Pin 31 (EA/VPP): Pin 31 is the External Access
Enable Pin i.e. allows external Program Memory.
Code from external program memory can be
fetched only if this pin is LOW. For normal
operations, this pins is pulled HIGH.
 During Flash Programming, this Pin receives 12V
Programming Enable Voltage (VPP).

 Pins 32 – 39 (PORT 0): Pins 32 to 39 are PORT
0 Pins. They are also bidirectional Input / Output
Pins but without any internal pull-ups. Hence, we
need external pull-ups in order to use PORT 0
pins as I/O PORT.
 In addition to acting as I/O PORT, PORT 0 also acts
as lower order address/data bus when external
memory is accessed.
 Pin 40 (VCC): Pin 40 is the power supply pin to
which the supply voltage is given (+5V).

8051 Internal Architecture
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• CPU (Central Processing Unit):-It is the heart of the
Microcontroller that mainly comprises of an Arithmetic
Logic Unit (ALU) and a Control Unit (CU)
– ALU or Arithmetic Logic Unit:- Performs 8 bit arithmetic
and logical operations over the operands held by the
temporary registers TMP1 and TMP2.
– Users cannot access temporary registers.
– CU or Control Unit is responsible for timing of the
communication process between the CPU and its
peripherals.
• Accumulator:
– It is an 8-bit register.
– It holds a source operand and receives the result of the
arithmetic instructions (addition, subtraction,
multiplication, and division).
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• B Register:-8-bit B-register is available as a general purpose
register when it is not being used for the hardware
multiply/divide operation.
• This register is used to store one of the operands for
multiply and divide instructions (MUL AB and DIV AB)
• Ports in 8051 (P0,P1,P2 and P3)
– Ports (0-3): There are 4 bidirectional input/ output ports of
8 bits each.
– P0 and P2 can be used as I/O ports or address lines for
external memory
– P1 can be used as I/O ports
– P3 can be used as I/O ports and other alternate functions
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 Program Status Word (PSW):- This set of flags
contains the status information and is considered as
one of the special function registers

 General-purpose flag (F0)
 This is a user-programmable flag; the user can program and
store any bit of their choice in this flag, using the bit address.
 Parity bit (P)
 It is set to 1 if the accumulator contains an odd number of 1s,
after an arithmetic or logical operation.
 Overflow flag (OV)
 This flag is set during ALU operations, to indicate overflow in
the result. It is set to 1 if there is a carry out of either the D7
bit or the D6 bit of the accumulator.
 Auxiliary carry flag (AC)
 This flag is set when there is a carry out of the D3 bit of the
accumulator.
 Carry flag (CY)
 This flag is used to indicate the carry generated after
arithmetic operations.
 Register bank Select Bits (RS0 & RS1)
 These bits are user-programmable. The register bank can be

 Stack and Stack pointer
 The stack refers to an area in internal RAM to store and
retrieve data quickly.
 The 8bit stack pointer (SP) register is used by the 8051 to
hold internal RAM address that is called top of the stack.
 This 8-bit wide register is incremented before the data is
stored onto the stack using push or call instructions.
 This register contains 8-bit stack top address.
 The stack may be defined anywhere in the on-chip 128-
byte RAM.
 After reset, the SP register is initialized to 07.
 After each write to stack operation, the 8-bit contents of
the operand are stored onto the stack, after incrementing
the SP register by one.
 Thus if SP contains 07 H, the forthcoming PUSH
operation will store the data at address 08H in the internal
RAM.
 The SP content will be incremented to 08.

 PC (program Counter)
 16 bit register
 It’s value shows the address of the next instruction to
be executed
 It can access address from 0000 H to FFFF H
 When each instruction is being executed. the PC
increments to point to the address of next instruction
 Data Pointer (DPTR)
 16 bit resister which has two 8 bit resisters (DPH,DPL)
 used to access/ store data into external memory (16
bit address)
PCON REGISTER
 It is an 8 bit register which is an SFR (Special
Fuiction Register)
 It has 2 functions - to control the data transfer rate
baud rate) and for power control capability.
SCON Register

 Serial Data buffer(SBUF)
 The serial port data buffer internally consists of two
independent register such as transmit buffer and
receive buffer at the same location.
 The transmit buffer is parallel in serial out register.
 The serial data receive buffer is a serial in parallel out
register.
 The serial data buffer is identified as SBUF and is one
of the special function register
 Timers registers
 Two 16 bit registers can be accessed as their lower and
upper bytes.
 TL0 and TH0 represent the lower byte and higher byte
of the timing register 0.
 TL1 and TH1 represents the lower byte and higher byte
of the timing register 1.

Control Registers
•Special function registers IP, IE, TMOD, TCON, SCON
and PCON contain control and status information for
interrupts, timers/ counters and serial port.

 Instruction register
 This register decodes the opcode of an instruction
to be executed and gives the information to the
timing and control unit to generate necessary
signals for the execution of an instruction.
 8051 Clock and Instruction Cycle
 In 8051, one instruction cycle consists of twelve
(12) clock cycles. Instruction cycle is sometimes
called as Machine cycle.
 In 8051, each instruction cycle has six states (S1 –
S6).
 Each state has two pulses (P1 and P2).


 Timing and control unit
 This unit derives all the necessary timing and control
signals required for the internal operation of the circuit.
 Oscillator
 This circuit generates the basic timing clock signal for
the operation of the circuit using crystal oscillator.
 SFR Register bank :- this is a set of special function
register , which can be addressed using their
respective addresses which lie in the range of 80H to
FFH

Registers in 8051
 Registers are used in the CPU to store information
on temporarily basis which could be data to be
processed, or an address pointing to the data which
is to be fetched.
 In 8051, there is one data type is of 8-bits, from the
MSB (most significant bit) D7 to the LSB (least
significant bit) D0.
 With 8-bit data type, any data type larger than 8-bits
must be broken into 8-bit chunks before it is
processed.
 The most widely used registers of the 8051 are A
(accumulator), B, R0-R7, DPTR (data pointer), and
PC (program counter).
 All these registers are of 8-bits, except DPTR and

 We will discuss the following types of storage registers
here −
• Accumulator
• R register
• B register
• Data Pointer (DPTR)
• Program Counter (PC)
• Stack Pointer (SP)
 Accumulator
 The accumulator, register A, is used for all arithmetic and
logic operations.
 If the accumulator is not present, then every result of each
calculation (addition, multiplication, shift, etc.) is to be stored
into the main memory.
 Access to main memory is slower than access to a register
like the accumulator because the technology used for the
large main memory is slower (but cheaper) than that used for

 The "R" Registers(8 bit)
 The "R" registers are a set of eight registers,
namely, R0, R1 to R7.
 These registers function as auxiliary or
temporary storage registers in many operations.
 Consider an example of the sum of 10 and 20.
Store a variable 10 in an accumulator and
another variable 20 in, say, register R4.
 To process the addition operation, execute the
following command − ADD A,R4
 After executing this instruction, the accumulator
will contain the value 30.
 Thus "R" registers are very important auxiliary
or helper registers.

 The "B" Register
 The "B" register is very similar to the
Accumulator in the sense that it may hold an 8-
bit (1-byte) value.
 The "B" register is used only by two 8051
instructions: MUL AB and DIV AB.
 To quickly and easily multiply or divide A by
another number, you may store the other
number in "B" and make use of these two
instructions. Apart from using MUL and DIV
instructions, the "B" register is often used as yet
another temporary storage register, much like a
ninth R register.

 The Data Pointer (DPTR)
 The Data Pointer (DPTR) is the 8051’s only
user-accessible 16-bit (2-byte) register.
 The Accumulator, R0–R7 registers and B
register are 1-byte value registers.
 DPTR is meant for pointing to data. It is used by
the 8051 to access external memory using the
address indicated by DPTR.
 DPTR is the only 16-bit register available and is
often used to store 2-byte values.

 The Stack Pointer (SP)
 The Stack Pointer, like all registers except DPTR and
PC, may hold an 8-bit (1-byte) value.
 The Stack Pointer tells the location from where the next
value is to be removed from the stack.
 When a value is pushed onto the stack, the value of SP
is incremented and then the value is stored at the
resulting memory location.
 When a value is popped off the stack, the value is
returned from the memory location indicated by SP, and
then the value of SP is decremented.
 SP is modified directly by the 8051 by six instructions:
PUSH, POP, ACALL, LCALL, RET, and RETI.

 The Program Counter
 The Program Counter (PC) is a 2-byte address which tells
the 8051 where the next instruction to execute can be found
in the memory.
 The program counter points to the address of the next
instruction to be executed.
 As the CPU fetches the opcode from the program ROM, the
program counter is incremented to point to the next
instruction.
 The program counter in the 8051 is 16 bits wide. This means
that the 8051 can access program addresses 0000 to
FFFFH, a total of 64K bytes of code.
 PC starts at 0000h when the 8051 initializes and is
incremented every time after an instruction is executed.
 PC is not always incremented by 1. Some instructions may
require 2 or 3 bytes; in such cases, the PC will be
incremented by 2 or 3.
 Branch, jump, and interrupt operations load the Program
Counter with an address other than the next sequential
location.

Internal Memory
 Program Memory (ROM) of 8051
Microcontroller
 In 8051 Microcontroller, the code or instructions to be
executed are stored in the Program Memory, which is
also called as the ROM of the Microcontroller.
 The original 8051 Microcontroller by Intel has 4KB of
internal ROM.
 In case of 4KB of Internal ROM, the address space is
0000H to 0FFFH.
 If the address space i.e., the program addresses
exceed this value, then the CPU will automatically fetch
the code from the external Program Memory.

For this, the External Access Pin (EA Pin) must be pulled HIGH
i.e., when the EA Pin is high, the CPU first fetches instructions
from the Internal Program Memory in the address range of
0000H to 0FFFFH and if the memory addresses exceed the
limit, then the instructions are fetched from the external ROM in
the address range of 1000H to FFFFH.

 There is another way to fetch the instructions:
ignore the Internal ROM and fetch all the
instructions only from the External Program
Memory (External ROM). For this scenario, the
EA Pin must be connected to GND. In this case,
the memory addresses of the external ROM will
be from 0000H to FFFFH.

 Data Memory (RAM) of 8051 Microcontroller
 The Data Memory or RAM of the 8051 Microcontroller
stores temporary data and intermediate results that
are generated and used during the normal operation of
the microcontroller.
 Original Intel’s 8051 Microcontroller had 128B of
internal RAM.
 But almost all modern variants of 8051 Microcontroller
have 256B of RAM.
 In this 256B, the first 128B i.e., memory addresses
from 00H to 7FH is divided in to Working Registers
(organized as Register Banks), Bit – Addressable Area
and General Purpose RAM (also known as Scratchpad
area).
 In the first 128B of RAM (from 00H to 7FH), the first
32B i.e., memory from addresses 00H to 1FH consists
of 32 Working Registers that are organized as four
banks with 8 Registers in each Bank.

 The 4 banks are named as Bank0, Bank1, Bank2 and
Bank3.
 Each Bank consists of 8 registers named as R0 – R7.
 Each Register can be addressed in two ways: either by
name or by address.
 To address the register by name, first the
corresponding Bank must be selected.
 In order to select the bank, we have to use the RS0
and RS1 bits of the Program Status Word (PSW)
Register (RS0 and RS1 are 3rd and 4th bits in the
PSW Register).
 When addressing the Register using its address i.e.,
12H for example, the corresponding Bank may or may
not be selected. (12H corresponds to R2 in Bank2).

 The next 16B of the RAM i.e., from 20H to 2FH are Bit –
Addressable memory locations. There are totally 128 bits
that can be addressed individually using 00H to 7FH or
the entire byte can be addressed as 20H to 2FH.
 For example 32H is the bit 2 of the internal RAM location
26H.
 The final 80B of the internal RAM i.e., addresses from
30H to 7FH, is the general purpose RAM area which are
byte addressable.
 These lower 128B of RAM can be addressed directly or
indirectly.
 The upper 128B of the RAM i.e., memory addresses from
80H to FFH is allocated for Special Function Registers
(SFRs). SFRs control specific functions of the 8051
Microcontroller. Some of the SFRs are I/O Port Registers
(P0, P1, P2 and P3), PSW (Program Status Word), A

 In connecting a memory chip to the CPU, note
the following points:
 The data bus of the CPU is connected directly to the
data pins of the memory chip.
 Control signals RD (read) and WR (memory write)
from the CPU are connected to the OE (output enable)
and WE (write enable) pins of the memory chip.
 In the case of the address buses, while the lower bits
of the address from the CPU go directly to the memory
chip address pins, the upper ones are used to activate
the CS/CE pin of the memory chip via an additional
decoding circuitry. The latter is known as Chip Select
Logic.

Addressing modes
 Addressing mode is a way to address an
operand. Operand means the data we are operating
upon (in most cases source data).
 In 8051 There are six types of addressing modes.
 Immediate AddressingMode
 Register AddressingMode
 Direct AddressingMode
 Register IndirectAddressing Mode
 Indexed AddressingMode
 Implied AddressingMode

Immediate addressing mode
 In this Immediate Addressing Mode, the data is provided
in the instruction itself.
 The data is provided immediately after the opcode.
 Data could be HEX, Decimal or binary
 These are some examples of Immediate Addressing
Mode.
 MOVA, #0AFH;
 MOVR3, #45H;
 MOVDPTR, #FE00H;
 In these instructions, the # symbol is used for immediate
data.
 In the last instruction, there is DPTR. The DPTR stands
for Data Pointer. Using this, it points the external data
memory location.
 In the first instruction, the immediate data is AFH, but one
0 is added at the beginning. So when the data is starting
with A to F, the data should be preceded by 0.

Register addressing mode
 In the register addressing mode the source or destination
data should be present in a register (R0 to R7).
 Move data between two register
 One of the register in the instruction is accumulator.
 These are some examples of Register Addressing Mode.
 MOV A, R5;
 MOV R0, A;
 It is important to select the appropriate Bank with the help
of PSW Register. Let us see a example of Register
Addressing assuming that Bank0 is selected.
 Example: MOV A, R5
 Here, the 8-bit content of the Register R5 of Bank0 is
moved to the Accumulator.

Direct Addressing Mode
 In the Direct Addressing Mode, the source or destination
address is specified by using 8-bit data in the instruction.
 Only the internal data memory can be used in this mode.
 It is used to move data between an internal RAM
location and register
 Here some of the examples of direct Addressing Mode.
 MOV 80H, R6;
 MOV R2, 45H;
 MOV R0,05H;
 The first instruction will send the content of register R6 to
port P0 (Address of Port 0 is 80H).
 The second one is forgetting content from 45H to R2.
 The third one is used to get data from Register R5 (When
register bank RB0 is selected) to register R5.

Register indirect addressing Mode
 In this mode, the source or destination address is
given in the register.
 By using register indirect addressing mode, the
internal or external addresses can be accessed.
 The R0 and R1 are used for 8-bit addresses, and
DPTR is used for 16-bit addresses, no other registers
can be used for addressing purposes.
 Let us see some examples of this mode.
 MOV 0E5H, @R0;
 MOV @R1, 80H

 In the instructions, the @ symbol is used for register
indirect addressing.
 In the first instruction, it is showing that theR0 register is
used.
 If the content of R0 is 40H, then that instruction will take
the data which is located at location 40H of the internal
RAM.
 In the second one, if the content of R1 is 30H, then it
indicates that the content of port P0 will be stored at
location 30H in the internal RAM.
 MOVXA, @R1;
 MOV@DPTR, A;
 In these two instructions, the X in MOVX indicates the
external data memory.
 The external data memory can only be accessed in
register indirect mode.
 In the first instruction if the R0 is holding 40H, then A will
get the content of external RAM location40H.
 And in the second one, the content of A is overwritten in

Indexed addressing mode
 In the indexed addressing mode, the source memory
can only be accessed from program memory only.
 The destination operand is always the register A.
 These are some examples of Indexed addressing
mode.
 MOVCA, @A+PC;
 MOVCA, @A+DPTR;
 The C in MOVC instruction refers to code byte. For the
first instruction, let us consider A holds 30H. And the
PC value is1125H. The contents of program memory
location 1155H (30H + 1125H) are moved to register
A.

Implied Addressing Mode
 In the implied addressing mode, there will be a single
operand.
 These types of instruction can work on specific
registers only.
 These types of instructions are also known as register
specific instruction.
 Here are some examples of Implied Addressing Mode.
 RLA;
 SWAPA;
 These are 1- byte instruction. The first one is used to
rotate the A register content to the Left.
 The second one is used to swap the nibbles in A.

Instruction Set of 8051
 Structure of Assembly Language
[ label: ] mnemonic [operands] [ ;comment ]
Example:
MOV R1, #25H ; load data 25H into R1

 Based on the operation they perform, all the
instructions in the 8051 Microcontroller Instruction Set
are divided into five groups. They are:
 Data Transfer Instructions
 Arithmetic Instructions
 Logical Instructions
 Boolean or Bit Manipulation Instructions
 Program Branching Instructions

 Data Transfer Instructions
 The Data Transfer Instructions are associated with
transfer of data between registers or external program
memory or external data memory.

a) MOV instructions 1. MO1. MOMov data 5h to A
 MOV A, R3; Mov data in R3 to A
 MOV 08h, A; Mov data in A to memory location 08h
 MOV @R0, A ; Mov data in A to memory location pointed by
R0
 MOV R7, #33h ; Move the data 33h to R7
 MOV R5, 53h; Move Move
 MOV 35h, 55h; Move data in 55h to 35 h
 MOV P1.2, C; Moves only 1 bit data from carry bit to 3rd bit of
port1
 MOV DPTR, #456Fh ; Loads 16 bit address to DPTR
 MOVC A, @A+DPTR ; Moves a byte from the code Moves a
byte from the code
 MOVX @DPTR, A ; To move 8 bit data from A to the 16 bit
address specified by DPTR
 Direct MOV between two registers are not allowed;
eg: MOV R0, R1 is not allowed

 POP OPERATION
 It is opposite action of PUSH
 With every pop instruction, the SP is decremented
 POP 3; POP stack into R3
 POP 5; Pop stack into R5
 POP 2; PoP Stack in R2

 Arithmetic Instructions
 Using Arithmetic Instructions, you can perform
addition, subtraction, multiplication and division.
 The arithmetic instructions also include increment
by one, decrement by one and a special instruction
called Decimal Adjust Accumulator.
 The arithmetic instructions have no knowledge
about the data format i.e., signed, unsigned, ASCII,
BCD, etc.
 Also, the operations performed by the arithmetic
instructions affect flags like carry, overflow, zero,
etc. in the PSW Register.

 ADD
 8-bit addition between the accumulator (A) and a second
operand.
 The result is always in the accumulator.
 The CY flag is set/reset appropriately.
 Eg: ADD A, R5
 ADDC
 8-bit addition between the accumulator, a second
operand and the previous value of the CY flag.
 Useful for 16-bit addition in two steps.
 Eg:- ADDC A,#02h
 DA
 Decimal adjust the accumulator.
 Format the accumulator into a proper 2 digit packed
BCD number.
 Operates only on the accumulator.
 Works only after the ADD instruction.
 Eg:- DA A

 SUBB
 Subtract with Borrow.
 Subtract an operand and the previous value of the borrow
(carry) flag from the accumulator.
 A  A - <operand> - CY.
 The result is always saved in the accumulator.
 Eg:- SUBB A, R1
 INC
 Increment the operand by one.
 The operand can be a register, a direct address, an indirect
address, the data pointer. ( Eg:- INC A ; Increments
Accumulator by 1)
 DEC
 Decrement the operand by one.
 The operand can be a register, a direct address, an indirect
address.
 MUL AB / DIV AB
 Multiply A by B and place result in A:B.
 The instruction performs A/B. and the quotient The instruction
performs A/B. and the quotient
 Divide A by B and place result in A:B.

Example program
 16 bit
addition
 BCD addition

 Logical Instructions
 The next group of instructions are the Logical
Instructions, which perform logical operations like
AND, OR, XOR, NOT, Rotate, Clear and Swap.
 Logical Instruction are performed on Bytes of data
on a bit-by-bit basis.

10) RLC A
 This rotates accumulator left through carry.. This rotates
the bits of accumulator left. The bits rotated out of A is
moved into CY and CY is rotated into opposite end of A
 CLR C; CY =0
 MOV A, #99h; A= 10011001
 RLC A ; A = 00110010 ; CY =1
 RLC A; A = 01100101 ; CY =0
11) RR
 Rotate accumulator left. This rotates the bits of
register A right and the bits are rotated back into the
opposite end.
 MOV A, #66h ; A=01100110
 RR A; A=00110011
 RR A; A=10011001
12) RRC
 Rotate bits of accumulator right through CY. The
bits rotated right are rotated back into A at the other
end through CY

Boolean or Bit Manipulation Instructions
 As the name suggests, Boolean or Bit
Manipulation Instructions deal with bit variables.
 We know that there is a special bit-addressable
area in the RAM and some of the Special
Function Registers (SFRs) are also bit
addressable.
 These instructions can perform set, clear, and, or,
complement etc. at bit level.

 CLR
 Clear a bit or the CY flag.
 CLR P1.1
 CLR C
 SETB
 Set a bit or the CY flag.
 SETB A.2
 SETB C
 CPL
 Complement a bit or the CY flag.
 CPL 40H ; Complement bit 40 of the bit
addressable memory
 ORL / ANL
 OR / AND a bit with the CY flag.
 ORLC, 20H ; OR bit 20 of bit addressable ;
memory with the CY flag
 ANLC, /34H ; AND complement of bit 34 of bit
addressable memory with CY flag.

 MOV
 Data transfer between a bit and the CY flag.
 MOVC, 3FH; Copy the CY flag to bit 3F of the bit addressable
memory.
 MOV P1.2, C ; Copy the CY flag to bit 2 of P1.
 JC / JNC
 Jump to a relative address if CY is set / cleared.
 JB / JNB
 Jump to a relative address if a bit is set / cleared.
 JB ACC.2, <label>
 JBC
 Jump to a relative address if a bit is set and clear the bit.

Program Branching Instructions
 The last group of instructions in the 8051
Microcontroller Instruction Set are the Program
Branching Instructions.
 These instructions control the flow of program
logic.
 All these instructions, except the NOP (No
Operation) affect the Program Counter (PC) in one
way or other.
 Some of these instructions has decision making
capability before transferring control to other part of
the program.

 The 8051 provides four different types of
unconditional jump instructions:
 Short Jump – SJMP
 Uses an 8-bit signed offset relative to the 1st byte of the next
instruction.
 Long Jump – LJMP
 Uses a 16-bit address.
 3 byte instruction capable of referencing any location in the
entire 64K of program memory.
 Absolute Jump – AJMP
 Uses an 11-bit address.
 2 byte instruction
 The upper 3-bits of the address combine with the 5-bit opcode
to form the 1st byte and the lower 8-bits of the address form
the 2nd byte.
 The 11-bit address is substituted for the lower 11-bits of the PC
to calculate the 16-bit address of the target.
 The location referenced must be within the 2K Byte memory
page containing the AJMP instruction.

 Indirect Jump – JMP
 JMP @A + DPTR
 The 8051 provides 2 forms for the CALL instruction:
 Absolute Call – ACALL
 Uses an 11-bit address similar to AJMP
 The subroutine must be within the same 2K page.
 Long Call – LCALL
 Uses a 16-bit address similar to LJMP
 The subroutine can be anywhere.
 Both forms push the 16-bit address of the next instruction on
the stack and update the stack pointer.

 The 8051 provides 2 forms for the return instruction:
 Return from subroutine – RET
 Pop the return address from the stack and continue
execution there.
 Return from ISV – RETI
 Pop the return address from the stack.
 Restore the interrupt logic to accept additional interrupts
at the same priority level as the one just processed.
 Continue execution at the address retrieved from the
stack.
 The PSW is not automatically restored.

 The 8051 supports 5 different conditional jump instructions.
 ALL conditional jump instructions use an 8-bit signed offset.
 Jump on Zero – JZ / JNZ
 Jump if the A == 0 / A != 0
 The check is done at the time of the instruction
execution.
 Jump on Carry – JC / JNC
 Jump if the C flag is set / cleared.
 Jump on Bit – JB / JNB
 Jump if the specified bit is set / cleared.
 Any addressable bit can be specified.
 Jump if the Bit is set then Clear the bit – JBC
 Jump if the specified bit is set.
 Then clear the bit.

 Compare and Jump if Not Equal – CJNE
 Compare the magnitude of the two operands and
jump if they are not equal.
 The values are considered to be unsigned.
 The Carry flag is set / cleared appropriately.
 CJNE A, direct, rel
 CJNE A, #data, rel
 CJNE Rn, #data, rel
 CJNE @Ri, #data, rel

8051 TIMERS
 8051 has two 16 bit timers -Timer0 and Timer1
 The timers could be used for timing operation or for
counting some events
 Timer 0
 The 16 bit register has two 8 bit registers - TH0 and
TLO i.e. upper and lower byte
 These registers can be accessed like any other
registers
 Each of the registers can be loaded with any 8 bit
value
 MOV TL0, #4Fh ; It moves the value 4Fh to the
timer0 lower byte register

 Timer 1
 The 16 bit register has two 8 bit registers - TH1
and TL1 i.e. upper and lower byte
 These registers can be accessed like any other
registers
 Each of the registers can be loaded with any 8
bit value
 MOV TH1, #4Fh ; It moves the value 4Fh to the
timer1 higher byte register

Timer 0 and Timer 1 registers
TMOD register
 Timer Mode register
 the lower 4 bits are used to set Timer 0 and the
upper 4 bits are used to set Timer1

 Ml, MO
 MO and M1 select the timer mode. As shown in
Figure 9-3, there are three modes: 0, 1, and 2.
Mode 0 is a 13-bit timer, mode 1 is a 16-bit timer,
and mode 2 is an 8-bit timer.
 We will concentrate on modes 1 and 2 since they
are the ones used most widely.

 C/T (clock/timer)
 This bit in the TMOD register is used to decide
whether the timer is used as a delay generator or
an event counter.
 if C/T =0, it is used as a timer for time delay
generation.
 The clock source for the time delay is the crystal
frequency of the 8051.

 Clock source for timer
 As you know, every timer needs a clock pulse to
tick.
 If C/T =0, the crystal frequency attached to the
8051 is the source of the clock for the timer.
 This means that the size of the crystal frequency
attached to the 8051 also decides the speed at
which the 8051 timer ticks.
 The frequency for the timer is always 1/12th the
frequency of the crystal attached to the 8051. See
Example 9-2.

 GATE
 The other bit of the TMOD register is the GATE bit.
 Notice in the TMOD register of Figure 9-3 that both
Timers 0 and 1 have the GATE bit.
 Every timer has a means of starting and stopping.
Some timers do this by software, some by hardware,
and some have both software and hardware controls.
 The timers in the 8051 have both.
 The start and stop of the timer are controlled by way of
software by the TR (timer start) bits TRO and TR1.
 This is achieved by the instruction “SETB TR1” and
“CLR TR1" for Timer 1, and “SETB TRO” and “CIR
TRO” for Timer 0.
 GATE =0, meaning that no external hardware is
needed to start and stop the timers.

PORT 0
 Each port of 8051 has bidirectional capability.
 Port 0 is called 'true bidirectional port' as it floats
(tristated) when configured as input.
 Port-1, 2, 3 are called 'quasi bidirectional port'.
 Port-0 Pin Structure Port -0 has 8 pins (P0.0-
P0.7).
 Port-0 can be configured as a normal bidirectional
I/O port or it can be used for address/data
interfacing for accessing external memory.
 When control is '1', the port is used for
address/data interfacing. When the control is '0',
the port can be used as a normal bidirectional I/O
port.

 Let us assume that control is '0'. When the port is
used as an input port, '1' is written to the latch.
 In this situation both the output MOSFETs are 'off'.
Hence the output pin floats.
 This high impedance pin can be pulled up or low by
an external source.
 When the port is used as an output port, a '1' written
to the latch again turns 'off' both the output MOSFETs
and causes the output pin to float.
 An external pull-up is required to output a '1'. But
when '0' is written to the latch, the pin is pulled down
by the lower MOSFET. Hence the output becomes
zero.
 When the control is '1', address/data bus controls the
output driver MOSFETs.

 If the address/data bus (internal) is '0', the upper
MOSFET is 'off' and the lower MOSFET is 'on'.
 The output becomes '0'. If the address/data bus is
'1', the upper transistor is 'on' and the lower
transistor is 'off'.
 Hence the output is '1'. Hence for normal
address/data interfacing (for external memory
access) no pull-up resistors are required.
 Port-0 latch is written to with 1's when used for
external memory access.

PORT 1
 Port-1 Pin Structure Port-1 has 8 pins (P1.1-P1.7)
.The structure of a port-1 pin is shown in fig
below.

 Port-1 does not have any alternate function i.e. it
is dedicated solely for I/O interfacing.
 When used as output port, the pin is pulled up or
down through internal pull-up.
 To use port-1 as input port, '1' has to be written to
the latch.
 In this input mode when '1' is written to the pin by
the external device then it read fine.
 But when '0' is written to the pin by the external
device then the external source must sink current
due to internal pull-up.
 If the external device is not able to sink the
current the pin voltage may rise, leading to a
possible wrong reading.

PORT 2
 PORT 2 Pin Structure Port-2 has 8-pins (P2.0-
P2.7) . The structure of a port-2 pin is shown in
figure below:

 Port-2 is used for higher external address byte or
a normal input/output port. The I/O operation is
similar to Port-1.
 Port-2 latch remains stable when Port-2 pin are
used for external memory access.
 Here again due to internal pull-up there is limited
current driving capability.

 Port-3 has 8 pin (P3.0-P3.7). Port-3 pins have
alternate functions. The structure of a port-3 pin is
shown in figure
 Each pin of Port-3 can be individually
programmed for I/O operation or for alternate
function.
 The alternate function can be activated only if the
corresponding latch has been written to '1'.
 To use the port as input port, '1' should be written
to the latch. This port also has internal pull-up and
limited current driving capability.
 REF:
 https://www.youtube.com/watch?v=6BjHlYgbkuQ
 https://www.youtube.com/watch?v=YMo4a5MufN
U

8051 Interrupts
 Interrupts are the events that temporarily suspend the
main program, pass the control to the external sources
and execute their task.
 It then passes the control to the main program where it
had left off.
 For every interrupt, there must be an interrupt service
routine (ISR), or interrupt handler.
 When an interrupt is invoked, the microcontroller runs the
interrupt service routine.
 For every interrupt, there is a fixed location in memory
that holds the address of its ISR.
 The group of memory locations set aside to hold the
addresses of ISRs is called the interrupt vector

Step in executing an Interrupt:
1) It finish the instruction it is executing
and saves the address of the next
instruction (PC) on the stack.
2) It also saves the current status of all the
interrupt internally.
3) It Jumps to a fixed location in memory
called the interrupt vector table that holds
the address of the interrupt service routine.
4) The microcontroller gets the address of
the ISR from the interrupt vector and jumps
to it. It starts to execute the interrupt
service subroutine until it reaches the last
instruction of the subroutine.
5) Upon executing the RETI instruction
,the microcontroller returns to the Place
where it was interrupt.

SIX INTERRUPTS IN THE 8051
 The 8051 controller has six hardware interrupts of
which five are available to the programmer. These
are as follows

 1. RESET interrupt – This is also known as Power on
Reset (POR). When the RESET interrupt is received, the
controller restarts executing code from 0000H location.
This is an interrupt which is not available to or, better to
say, need not be available to the programmer.
 2. Timer interrupts – Each Timer is associated with a
Timer interrupt. A timer interrupt notifies the
microcontroller that the corresponding Timer has finished
counting.
 3. External interrupts – There are two external interrupts
EX0 and EX1 to serve external devices. Both these
interrupts are active low. In AT89C51, P3.2 (INT0) and
P3.3 (INT1) pins are available for external interrupts 0
and 1 respectively. An external interrupt notifies the
microcontroller that an external device needs its service.
 4. Serial interrupt – This interrupt is used for serial

 IE (Interrupt Enable) Register
 This register is responsible for enabling and
disabling the interrupt.
 EA register is set to one for enabling interrupts and
set to 0 for disabling the interrupts. Its bit sequence
and their meanings are shown in the following
figure.

 IP (Interrupt Priority) Register
 We can change the priority levels of the interrupts
by changing the corresponding bit in the Interrupt
Priority (IP) register as shown in the following figure.
 A low priority interrupt can only be interrupted by the
high priority interrupt, but not interrupted by another
low priority interrupt.
 If two interrupts of different priority levels are
received simultaneously, the request of higher
priority level is served.
 If the requests of the same priority levels are
received simultaneously, then the internal polling
sequence determines which request is to be
serviced.

 TCON Register
 TCON register specifies the type of external
interrupt to the microcontroller.

To write an assembly language program to perform the
data transfer operation using 8051

8051 Architecture

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