8086 Architecture

ASSEMBLY LANGUAGE PROGRAMMING

8086 Architecture
BY: PUSKA SUWAL
USKAR

1

INTRODUCTION TO 16 BIT MICROPROCESSOR
ARCHITECTURE
¢ Intel 8086 – 16 bit microprocessor (arithmetic logic
unit, internal registers, most of instructions are

8086 Architecture
designed to work with 16 bit binary words).
¢ Data bus : 16 bit (read data from or write data to
memory and ports either 16 bits or 8 bits at a time.
¢ Address bus : 20 bit (can address any one of 210 =
1048576 = 1MB memory locations).
— Address range : 00000H to FFFFFH

2

¢ 16 bit words will be stored in two consecutive
memory locations.

8086 Architecture
¢ If first byte of the data is stored at an even
address, 8086 can read the entire word in one
,
operation.
— For example if the 16 bit data is stored at even address
00520H is 2607,
MOV BX, [00520]
8086 reads the first byte and stores the data in BL and
reads the second byte and stores the data in BH.
BL ß (00520) 3

BH ß (00521)

¢ If the first byte of data is stored at an odd address, 8086
needs two operation to read the 16 bit data.
— For example if the 16 bit data is stored at even address

8086 Architecture
00521H is F520,
MOV BX, [00521]
In first operation, 8086 reads the 16 bit data from the
00520 location and stores the data of 00521 location
in register BL and discards the data of 00520 location.
In second operation, 8086 reads the 16 bit data from
the 00522 location and stores the data of 00522
location in register BH and discards the data of 00523
location. 4

BLOCK DIAGRAM OF INTEL 8086

8086 Architecture
5

¢ 8086 microprocessor is divided internally into two separate
units:
¢ Bus Interface Unit (BIU)

8086 Architecture
¢ Execution Unit (EU)

¢ The two units functions independently.
¢ The is responsible for decoding and executing instructions.
¢ It contains arithmetic logic unit (ALU), status and control
flags, general-purpose register, and temporary
temporary-operand
registers.
¢ Maintain the microprocessor status and control flags,
manipulates the general registers and instruction operands. 6

¢ The BIU is responsible for performing all external bus
operations, such as instruction fetching, reading and
writing of data operands for memory, address generating,

8086 Architecture
and inputting or outputting data for input/output
peripherals.
¢ These operations are take place over the system bus. This
bus includes 16-bit bidirectional data bus, a 20
bit 20-bit address
bus, and the signals needed to control transfer over the
bus.
¢ The BIU uses a mechanism known as instruction queue.
This queue permits the 8086 to pre
pre-fetch up to 6 bytes of
instruction code.
7

THE EXECUTION UNIT
¢ The EU decodes and executes the instructions.
¢ A decoder in the EU control system translates

8086 Architecture
instructions.
¢ The EU has 16 bit ALU for performing arithmetic and
logic operations.
¢ The EU has nine 16 bit registers (AX, BX, CX, DX, SP,
BP, SI, DI and Flag registers).
— AX, BX, CX, DX (general purpose registers) can be used as
eight 8 bit registers (AH, AL, BH, BL, CH, CL, DH, DL).

8

GENERAL PURPOSE REGISTERS
¢ general purpose registers (AH, AL, BH, BL, CH, CL,
DH, DL).

8086 Architecture
¢ These registers can be used as 88-bit registers
individually or can be used as 16
16-bit in pair to have AX,
BX, CX, and DX.
¢ The AL register is also called the accumulator It has
accumulator.
some features that the other general purpose registers
do not have.

9

8086 Architecture
10

¢ AX
— AX à 16 bit accumulator AL à 8 bit
accumulator;
accumulator

8086 Architecture
— Used for operations involving input/output and
most arithmetic.
— For example: multiply, divide, and translate
instructions assume the use of AX.
— Also, some instructions generate more efficient
machine code if they reference AX rather than
another register.

11

¢ BX
— BX is known as the Base register
register.

8086 Architecture
— This is only general purpose register whose
contents can be used for addressing 8086
memory.
— All memory reference utilizing this register
content for addressing uses the DS as the default
segment register.
— BX can also be combined with DI or SI as a base
register for special addressing.
— BX register is similar to the 8085 HL register. 12
(BHàH; BLàL)

¢ CX
— CX is known as the counter register
register.
It may contain a value to control the number of

8086 Architecture
—
times a loop is repeated or a value to shift bits
left or right.

¢ DX
— DX is known as a data register
register.
— Used to hold 16 bit result (data).
— Some I/O operations require its use, and multiply
and divide operations that involve large values
assume the use of DX and AX together as a pair. 13

POINTER & INDEX REGISTERS
¢ The 8086 has four other general
general-purpose
registers, two pointer registers SP and BP, and

8086 Architecture
two index registers DI and SI. These are used
to store what are called offset addresses
addresses.
¢ An offset address represents the displacement
of a storage location in memory from the
segment base address in a segment register.
¢ Unlike the general-purpose data registers, the
purpose
pointer and index registers are only accessed as
words (16 bits).
14

POINTER REGISTERS
¢ The two pointer registers (16 bits), stack pointer (SP)
and base pointer (BP) are used to access data in the
stack segment.

8086 Architecture
¢ The 16 bit SP register provides an offset value, which,
when associated with the SS register (SP:SS), refers to
the current word being processed in the stack.
¢
¢ The SP contents are automatically updated during the
execution of a POP and PUSH instruction.

15

¢ The 16 bit BP facilitates referencing parameters, which
are data and addresses that a program passes via the
stack.

8086 Architecture
¢ The processor combines the address in SS with the
offset in BP.

¢ BP can also be combined with DI and with SI as a base
register for special addressing.

16

INDEX REGISTERS
¢ The two 16 bit index registers, Source Index (SI and
Destination Index (DI) are used in indexed addressing.

8086 Architecture
¢ SI register: is required for some string (character)
handling operations. In this context, SI is associated
with the DS register.

¢ DI register: is also required for some string operations.
In this context, DI is associated with the ES register.

17

FLAG REGISTERS
¢ A flag is a flip-flop that indicates some condition
flop
produced by the execution of an instruction or controls
certain operations of the EU.

8086 Architecture
¢ A 16 bit flag register in the EU contains nine active
flags. Six of them are used to indicate some condition
produced by an instruction and remaining flags are
used to control certain operations of the processor.

18

¢ The six conditional flags are Carry flag (CF),
Parity flag (PF), Auxiliary carry flag (AF), Zero
flag (ZF), Sign flag (SF) and Overflow flag (OF).

8086 Architecture
¢ The carry flag (CF): CF is set if there is a
carry-out or a borrow-in for the most significant
in
bit of the result during the execution of an
instruction. Otherwise it is reset.
¢ The parity flag (PF): PF is set if the result
produced by the instruction has even parity
parity-
that is, if it contains an even number of bits at
the 1 logic level. If parity is odd, PF is reset. 19

¢ The auxiliary flag (AF): AF is set if there is a carry-out from
the low nibble into the high nibble or a borrow-in from the high
nibble into the low nibble of the lower byte in a 16-bit word.
Otherwise, AF is reset.

¢ The zero flag (ZF): ZF is set if the result produced by an

8086 Architecture
instruction is zero. Otherwise, ZF is reset.

¢ The sign flag (SF): The MSB of the result is copied into SF.
Thus, SF is set if the result is a negative number of reset if it is
positive.

¢ The overflow flag (OF): When OF is set, it indicates that the
signed result is out of range. If the result is not out of range, OF
remains reset.

20

¢ The three control flags are Trap flag (TF), Interrupt flag (IF) and
Direction flag (DF).

¢ The trap flag (TF): if TF is set, the 8086 goes into the single
single-step
mode of operation. When in the single
single-step mode, it executes an
instruction and then jumps to a special service routine that may
determine the effect of executing the instruction. This type of

8086 Architecture
operation is very useful for debugging programs.

¢ The interrupt flag (IF): For the 8086 to recognize maskable
interrupt requests at its interrupt (INT) input, the IF flag must be set.
When IF is reset, requests at INT are ignored and the maskable
interrupt interface is disabled.

¢ The direction flag (DF): The logic level of DF determines the
direction in which string operations will occur. When set, the string
instructions automatically decrement the address; therefore the string
data transfers proceed from high address to low address.
21

BUS INTERFACE UNIT (BIU)
¢ BIU delivers instruction and data to EU.
¢ It manage the bus control unit, segment registers and
instruction queue. BIU controls the buses that transfer

8086 Architecture
data to the EU, to memory, and to I/O devices, whereas
the segment registers control memory addressing.
¢ Another function of BIU is to provide access to
instructions. Because the instructions for a program
that is executing are in memory, the BIU must access
instructions form memory and place them in an
instruction queue.
¢ The Instruction Queue is a FIFO group of register in
which upto 6 bytes of instruction code are pre
pre-fetched 22
instructions.

¢ The EU and BIU work in parallel, with the BIU keeping
one step ahead.
¢ When the EU is ready for its next instruction, it simply

8086 Architecture
reads the instruction byte(s) for the instruction from the
queue in the BIU.
¢ The top instruction is the currently executable one and,
while the EU is occupied executing an instruction, the
BIU fetches another instruction from memory. This
fetching overlaps with execution and speeds up
processing.
¢ Fetching the next instruction while the current
instruction executes is called pipelining
pipelining. 23

SEGMENTS AND ADDRESSING
¢ Segments are special areas defined in a program for containing
the code, the data and the stack
stack.

A segment begins on a paragraph boundary, that is, at a

8086 Architecture
¢
location evenly divisible by 16, or hex 10.

¢ The 8086 BIU sends out 20 bit addresses, so it can address any
of 220 bytes (1MB) in memory. However, at any given time the
8086 works with only four 65,536 byte (64Kbyte) segments with
536
this 1M range.

¢ Four segment registers in the BIU are used to hold the upper
16 bits of the starting addresses of four memory segments that
the 8086 is working with at a particular time.
24

¢ Three segments are:
— Code segment (CS) : contains the machine
instructions that are to execute Typically, the first
execute.

8086 Architecture
executable instruction is at the start of this segment.
CS register addresses the code segment.

— Data segment (DS) : contains a program’s defined
data, constants, and work areas. DS register
addresses the data segment.

— Stack segment (SS) : contains any data and
addresses that the program needs to save 25
temporarily or for use by subroutine
subroutine.

64K

64K

8086 Architecture
64K

64K

4 segments can be The registers and
separated or overlap segments are not
necessarily in the
(in small program which order shown.
do not need 64K) 26

SEGMENT BOUNDARIES
¢A segment register is 16 bits in size and
contains the starting address of a segment.

8086 Architecture
¢ A segment begins on a paragraph boundary,
which is an address evenly divisible by decimal
16, or hex 10.
¢ The BIU inserts zeros (0) for the lowest 4 bits
(nibble) of the 20 bit starting address for a
segment.
¢ If the code segment register contains 348AH,
for example, then the code segment will start at
address 348A0H. 27

SEGMENT OFFSETS
¢ Within a program, all memory locations within a
segment are relative to the segment’s starting address.

8086 Architecture
¢ The distance in bytes from the segment address to
another location within the segment is expressed as an
offset (or displacement).
¢ 2-byte (16 bit) offset can range from 0000H through
byte
FFFFH.
¢ To reference any memory location in a segment, the
processor combines the segment address in a segment
register with the offset value of that location, that is, its
distance in bytes from the start of the segment. 28

¢ Consider the data segment that begins at location 038E0H.
The DS register contains the segment address of the data
segment, 038E[0], and an instruction references a location
],

8086 Architecture
with an offset of 0032H bytes from the start of the data
H
segment.

¢ To reference the required location, the processor combines
the address of the data segment with the offset:
DS segment address 038E0H
Offset +0032H
Actual address 03912H à physical address

29

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30

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31

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32

SEGMENT REGISTER
¢A segment register provides for addressing
an area of memory known as the current

8086 Architecture
segment.
¢ Segment register is used to hold the upper 16 bits
of the starting address for each of the segments.
¢ The four segment registers are:
— Code segment (CS) register
— Data segment (DS) register
— Stack segment (SS) register
— Extra segment (ES) register
33

¢ CS register: contains the starting address of a
program’s code segment. This segment address,
plus an offset value in the Instruction Pointer

8086 Architecture
(IP) register (CS:IP), indicates the address of an
instruction to be fetched for execution.

¢ DS register: contains the starting address of a
program’s data segment. Instructions use this
address to locate data; this address, plus an offset
value in an instruction, causes a reference to a
specific byte location in the data segment.
34

¢ SS register: permits the implementation of a stack in
memory, which a program uses for temporary storage of
addresses and data. The system stores the starting

8086 Architecture
address of a program’s stack segment in SS register.
This segment address, plus an offset value in the Stack
Pointer (SP) register (SS:SP) indicates the current word
SP),
in the stack being addressed.
.

¢ ES register: used by some string operations to handle
memory addressing. In this context, ES register is
associated with the DI register
register.
35

INTRODUCTION TO PROGRAMMING THE
8086
¢ Thereare three language levels that can be
used to write a program for a microcomputer.

8086 Architecture
¢ Machine language
¢ Assembly language

¢ High level language

36

MACHINE LANGUAGE
¢ Binary form of the program is referred to as machine
language because it is the form required by the
machine.

8086 Architecture
¢ It is difficult for a programmer to memorize the
thousands of binary instruction codes.

¢ Very easy for an error to occur when working with long
series of 1’s and 0’s.

¢ Using hexadecimal representation for the binary codes
might help some, but there are still thousands of
instruction codes to cope with.
37

B82301 MOV AX, 0123

8086 Architecture
Machine instructions
Machine code may be one, two, or
three bytes in length.
First byte is the actual
operation, and any other
bytes that are present
are operands - reference
to an immediate value, a
register, or a memory
38
location.

ASSEMBLY LANGUAGE
¢ Much more readable form of machine language, called
assembly language, uses mnemonic codes to refer to
machine code instructions, rather than simply using
the instructions’ numeric values.
¢ Translate to machine language so that it can be loaded
into memory and run.
¢ Assembly language uses two, three or four letter
mnemonics to represent each instruction type.
¢ Assembly language statements are usually written in
a standard form that has four fields.
Label Op-code Operand comment
NEXT: ADD AL, 07H ;Add 07 and content of AL

¢ A label is a symbol or group of symbols used to
represent an address which is not specifically known
at the time the statement is written. Labels are

8086 Architecture
usually followed by a colon.
¢ The op-code field of the instruction contains the
mnemonic for the instruction to be performed.
Instruction mnemonics are also called operation code
(op-code).
¢ The operand field of the statement contains the data,
memory address, port address, or the name of the
register on which the instruction is to be performed.
¢ Comment field starts with semicolon and contain the
information about the instruction but are not part of 40
the program.

HIGH LEVEL LANGUAGE
¢ High level language use program statements
which are even more English
English-like than those of

8086 Architecture
assembly language.
¢ Compiler translate high-level language statement
level
to machine code which can be loaded into memory
and executed.
¢ Programs can usually be written faster than in
assembly language because it works with bigger
building blocks.
¢ Execute slowly and require more memory than
41
the same program written in assembly language.

TRANSLATION TO MACHINE CODE
¢ Microprocessor only understand the binary
numbers and hence a translator must be used to
convert assembly/high-level language programs into
level

8086 Architecture
binary machine language so that the
microprocessor can execute the program.
¢ An assembler translates the program written in
assembly language into machine language program
(object code).
¢ Assembly language program à source codes
¢ Machine language program à object codes.

42

o Translator converts source codes to object codes and then into
executable formats.
o Source code à object code …………. Assembler
o Object code à executable format ……. linker

8086 Architecture
Assembler Linker

Assembly Executable file
language Object code
(Source code) *.OBJ *.EXE or
*.ASM *.COM 43

¢ There are two ways of converting an assembly language
program into machine language:
Manual assembly

8086 Architecture
—
— Using assembly

¢ With manual assembly, the programmer is the assembler;
programmer translates each mnemonic into its numerical
machine language representation by looking up a table of
the microprocessor’s instruction set.

¢ Manual assembly is acceptable for short programs but
becomes very inconvenient for large programs
44

¢ When an assembler is used, the assembler reads each
assembly instruction of a program as ASCII characters
and translates them into respective binary op
op-codes.

8086 Architecture
¢ Address computation is the advantage of the assembler.
(assembler computes the actual address for the
programmer and fills it in automatically).

45

TYPES OF ASSEMBLER
¢ One pass assembler
— Assembler goes through the assembly language

8086 Architecture
program once and translates the assembly language
program.

— Can not resolve the forward referencing.

— Either all labels used in forward references are
defined in the source program before they are
referenced, or forward references to data items are
prohibited. 46

¢ Two pass assembler

8086 Architecture
— More efficient & easy to use.
— Performs two sequential scans over the source code.
— Pass 1:
¢ Scans the code.

¢ Validates the tokens.

¢ Creates a symbol table.

— Pass 2:
¢ Solves forward referencing.
47
¢ Converts the code to the machine code.

8086 Architecture
48

8086 Architecture
49

ASSEMBLY LANGUAGE FEATURES
¢ Program comment:
— The use of comments throughout a program can

8086 Architecture
improve its clarity, especially in assembly language,
where the purpose of a set of instructions is often
unclear.

— A comment begins with a semicolon (;), and wherever
it is coded, the assembler assumes that all characters
on the line to its right are comments.

— A comment may contain any printable character, 50
including blank.
MOV AX, BX ; move the content of BX to AX.

¢ Reserved words
— Certain names in assembly language are reserved for
their own purposes, to be used only under special

8086 Architecture
conditions.

— Reserved words, by category, include:
¢ Instructions, such as MOV and ADD, which are
,
operations that the computer can execute;
¢ Directives, such as END or SEGMENT, which is used to
,
provide information to the assembler.
¢ Operators, such as FAR and SIZE, which is used in
,
expressions.
¢ Predefined symbols, such as @Data and @Model, which
, 51
return information to the program during the assembly.

¢ Identifiers:
— An identifier (or symbol) is a name apply to an item in the
program for reference.

8086 Architecture
— Two types of identifier:
¢ Name: refers to the address of a data item, such as
:
COUNTER in
COUNTER DB 0

¢ Label: refers to the address of an instruction, procedure, or
:
segment, such as MAIN and B30 in the following statements.
30
MAIN PROC FAR
B30: ADD BL, 25 52

¢ Identifier can use the following characters:
¢ CATEGORY ALLOWABLE CHARACTER

8086 Architecture
Alphabetic letters: A – Z and a – z
Digit: 0 – 9 (not the first character)
Special characters: question mark(?)
underline( _ )
dollar ($)
at (@)
dot ( . ) not first character

¢ The maximum length of an identifier is 31 character up 53
to MASM 6.0 and 247 since.

¢ Statements
— An assembly program consists of a set of

8086 Architecture
statements.
— Two types of statements:
¢ Instructions: such as MOV and ADD, which the
assembler translates to object code; and
¢ Directives: which tell the assembler to perform a

specific action, such as define a data item.
— Format of a statement:
54
[identifier] operation [operand (s)] [;comment]

¢ An identifier (if any), operation, and operand (if any) are
separated by at least one blank or tab character.

8086 Architecture
¢ There is maximum of 132 characters on a line up to MASM 6.0
and 512 since.

¢ Examples:
IDENTIFIER OPERATION OPERAND COMMENT
Directive: COUNT DB 1 ;Name, operation, operand
Instruction: L30: MOV AX,0 ;label, operation, operand
55

¢ Directives:
— Assembly language support a number of statements

8086 Architecture
that enable to control the way in which a source
program assembles and lists
lists.

— Describe the way according to which the
microprocessor is directed to perform a specific task.

— Act only during the assembly of a program and
generate no machine executable code.
56

MOST COMMON DIRECTIVES
¢ PAGE and TITLE Listing Directives:
— The PAGE and TITLE directives help to control the

8086 Architecture
format of a listing of an assembled program.
— They have no effect on subsequent execution of the
program.

— At the start of the program, the PAGE directive
designates the maximum number of lines to list on a
page and the maximum number of characters on a
line.
— Its format is 57
PAGE [length] [, width]

¢ PAGE 60, 132 à length is 60 lines per page and width
is 132 character per line.

8086 Architecture
¢ The number of lines per page may range from 10
through 255, and the number of characters per line may
range from 60 through 132.

¢ Omission of a PAGE statement causes the assembler to
default to PAGE 50, 80.

58

¢ The TITLE directive to cause a title for a program to
print on line 2 of each page of the program listing.

8086 Architecture
¢ Format of TITLE directive is

TITLE text [comment]
¢ For text, a common practice is to use the name of the
program as cataloged on disk.

TITLE ASMSORT Assembly program to sort CD titles

Directive text Comment ( ‘;’ is not required) 59

¢ SEGMENT and ENDS Directives:
— An assembly language program in .EXE format consist of one
or more segments.

8086 Architecture
— The directives for defining a segment, SEGMENT and
ENDS, have the following format:
,

segment_name SEGMENT
MOV AX, BX
ADD AX, BX
……………..
segment_name ENDS
60

— The SEGMENT statement defines the start of a segment.
— The segment_name must be present, must be unique, and
must follow assembly naming conventions.

8086 Architecture
— The ENDS statement indicates the end of the segment and
contains the same name as the SEGMENT statement.
— The maximum size of a segment is 64K.

ARRAY1 SEGMENT
MOV AX, BX
ADD AX, BX
ARRAY1 ENDS
61

— Segment_name à ARRAY1
— The assembler will assign a numeric value to ARRAY1
corresponding to the base value of the Data segment.

8086 Architecture
— The programmer can load ARRAY1 into the DS using the
following instruction:
MOV AX, @ARRAY1
MOV DS, AX
— The segment register like DS, CS etc must be loaded via 16
bit register such as AX or by the contents of a memory
location.
— A data array or an instruction sequence between the
SEGMENT and ENDS directives is called a logical segment.
62

¢ ASSUME Directive:
— An 8086 program may have several logical segments that
contain code and several that contain data.

8086 Architecture
— However, at ay given time the 8086 works directly with only
four physical segments: CS, DS, SS and ES.
— The ASSUME directive tells the assembler which logical
segment to use for each of these physical segments at a given
time.
— The format is:
ASSUME ss:stackname, DS:datasegname, CS:codesegname

63

— The above statement tells the assembler that the logical
segment named codesegname contains the instruction
statements for the program and should be treated as a code

8086 Architecture
segment. It also tells the assembler that it should treat the
logical segment datasegname as the data segment. In order
words, the DS:datasegnament part of the statement tells the
assembler that for any instruction which refers to data in the
data segment, data will be found in the logical segment
datasegname.
— ASSUME may also contain an entry for the ES register, such
as ES:datasegname; if the program does not use ES, its
reference is omitted or code ES:NOTHING.

64

¢ PROC Directive
— The code segment contains the executable code for a program
which consists of one or more procedures, defined initially

8086 Architecture
with the PROC directive and ended with the ENDP directive.

— The format is

NAME OPERATION OPERAND COMMENT
procedure_name PROC FAR ; Begin proc
……………………
procedure_name ENDP ; End proc
65

— The procedure_name must be present, must be unique, and
must follow assembly language naming conventions.
The operand FAR in this case, is related to program

8086 Architecture
—
execution.
— The ENDP directive indicates the end of a procedure and
contains the same name as the PROC statement to enable
the assembler to relate the end to the start.
— Because a procedure must be fully contained within a
segment, ENDP defines the end of the procedure before
ENDS defines the end of the segment.
— The code segment may contain any number of procedures
used as subroutines, each with its own set of matching PROC
and ENDP statements. 66
— Each additional PROC is usually coded with (or default to)
the NEAR operad.

¢ END Directive
— An END directive ends the entire program and appears as
the last statement.

8086 Architecture
— Its format is:

END [entry-point]
point]

— Entry-point (procedure_name) tells the assembler and linker
point
where the program will begin execution.

67

¢ MODEL Directive
— The MODEL directive selects a standard memory model for
the program.

8086 Architecture
— It determines the way segments are linked together, as well
as the maximum size of each segment.
— Its format is

.MODEL memory_model

— The memory_model may be Tiny, Medium, Compact, Large,
Huge, or Flat.
68

MODEL Description
Tiny Code & data together may not be greater than 64K

8086 Architecture
Small Neither code nor data may be greater than 64K
Medium Only the code may be greater than 64K
Compact Only the data may be greater than 64K
Large Both code & data may be greater than 64K
Huge All available memory may be used for code & data

69

¢ The formats (including the leading dot) for the directives that
define the stack, data, and code segments are:
.STACK [size]

8086 Architecture
.DATA
.CODE [segment_name]
¢ Each of these directives causes the assembler to generate the
required SEGMENT statement and its matching ENDS.
¢ The default stack size is 1024 bytes, which ca be override.
¢ The instruction used to initialize the address of the data segment
in DS are:
MOV AX,@data ;initialize DS with
MOV DS,AX ;address of data segment
70

DEFINING TYPE OF DATA
¢ The data segment in an .EXE program contains
constants, work areas, and input/output areas.

8086 Architecture
¢ The assembler provides a set of directives that permits
definitions of items by various types and lengths; for
example, DB defines byte and DW defines word.
¢ A data item may contain an undefined (uninitialized)
value, or it may contain an initialized constant, defined
either as a character string or as a numeric value.
¢ Format for data defining:
[name] Dn expression

71

¢ Name:
— a program that reference a data item does so by means of a
name, as indicated by the square brackets.

8086 Architecture
¢ Directive (Dn):
— the directives that define data items are DB (byte), DW
(word), DD (doubleword), DF (farword), DQ (quadword), and
DT (tenbytes), each of which explicitly indicates the length of
the defined item.

72

¢ Expression:
— the expression in an operand may specify an uninitialized
value or a constant value. To indicate an uninitialized item,

8086 Architecture
define the operand with a question mark, such as
DATAX DB ? ;uninitialized item
— When program begins execution, the initial value of DATAX
is unknown.

— The operand can be used to define a constant, such as
DATAY DB 25 ;initialized item
— Use this initialized value 25 throughout the program and can
even change the value. 73

— An expression may contain multiple constants separated by
commas and limited only by the length of the line, as follows:
DATAZ DB 21, 22, 23, 24, 35, 26, ……

8086 Architecture
— The assembler defines these constants in adjacent bytes,
from left to right.
DATAZ + 0 à 21
DATAZ + 1 à 22
DATAZ + 2 à 23 …..

— The instruction MOV AL, DATAZ+3 loads the value 24 (18H)
into the AL register. 74

— The expression also permits duplication of constants in a
statement of the format

8086 Architecture
[name] Dn repeat-count DUP (expression) ……
count

— The following examples illustrate duplication
DW 10 DUP(?) ; ten words, uninitialized
DB 5 DUP(12) ;five bytes containing hex ocococococ
DB 3 DUP(5 CUP(4)) ;fifteen 4s

— An expression may define and initialized a character string
or a numeric constant. 75

¢ Character string
— Character string are used for descriptive data such as
people’s names and product descriptions.

8086 Architecture
— The string is defined within single quotes, such as ‘PC’, or
within double quotes, such as “PC”.
— The assembler stores the contents of the quotes as object
code in normal ASCII format, without the apostrophes.
— DB is the only format that defines a character string
exceeding two characters with the characters stored as left
adjusted ad in normal left-to-right sequences.
right
DB ‘Computer city’
DB “crazy sam’s CD emporium”
76

DIRECTIVE FOR DEFINING DATA
¢ DB or BYTE: Define Byte
— A DB (or BYTE) numeric expression may define one or more
1 byte constants, each consisting of two hex digits.

8086 Architecture
— For unsigned data, the range of values is 0 to 255; for signed
data, the range of values is -128 to +127.
128
— The assembler converts numeric constants to binary object
code (represented in hex).

BYTE1 DB ?
BYTE2 DB 48
BYTE3 DB 30H
BYTE4 DB 01111010B
77
BYTE5 DB 10 DUP(0)

¢ DW or WORD : Define Word
— The DW directive defines items that are one word (two bytes)
in length.

8086 Architecture
— A DW numeric expression may define one or more one word
constants.
— For unsigned numeric data, the range of values is 0 to 65535;
for signed data, the range of value is -32768 to +32767.
— The assembler converts DW numeric constants to binary
object code (represented in hex), but stores the bytes in
reverse sequence.
— Consequently, a decimal value defined as 12345 converts to
hex 3039, but is stored as 3930.
78

8086 Architecture
WORD1 DW 0FFF0H
WORD2 DW 01111010B
WORD3 DW 2, 4, 6, 7, 8
WORD4 DW 8 DUP(0)

79

¢ DD or DWORD: Define Doubleword
— The DD directive defines items that are a doubleword (four
byte) in length.

8086 Architecture
— A DD numeric expression may define one or more constants,
each with a maximum of four bytes ( 8 hex digit).
— For unsigned numeric data, the range of values is 0 to
4294967295; for signed data, the range is -2147483648 to
+2147483647.
— The assembler converts DD numeric constants to binary
object code (represented in hex), but stores the bytes in
reverse sequence.
— Consequently, the assembler converts a decimal value
defined as 12345678 to 00BC614EH and stores it as 80

4E61BC00H.

DWORD1 DD ?

8086 Architecture
DWORD2 DD 41562
DWORD3 DD 24, 48
DWORD4 DD BYTE3 - BYTE2
3

81

¢ EQU Directive
— The EQU directive (short form of equivalent) an be used to
assign a name to constant.

8086 Architecture
— PROD EQU 55H directs the assembler to assign the value
H
55H every time it finds PROD in the program.
H
— MOV BX, PROD moves 55H in BX.
H

82

SAMPLE ASSEMBLY LANGUAGE
PROGRAM

8086 Architecture
83

1 Page 60, 132
2 TITLE A 05ASM1 move and add operations
3 ; -----------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------
4 0000 STACK SEGMENT
5 0000 0020[0000] DW 32 DUP (0)
6 0040 STACK ENDS
7 ; ……………………………………………………………………………………………………….
8 0000 DATASEG SEGMENT
9 0000 00D7 FLDD DW 215
0002 007D FLDE DW 125

8086 Architecture
10

11 0004 0000 FLDF DW ?
12 0006 DATASEG ENDS
13 ; …………………………………………………………………………………………………………
14 0000 CODESEG SEGMENT
15 0000 MAIN PROC FAR
16 ASSUME SS:STACK, DS:DATASEG, CS:CODESEG
17 0000 B8 ---- R MOV AX, DATASEG ;set address of data segment
18 0003 8E D8 MOV DS, AX ; in DS
19 0005 A1 0000 R MOV AX, FLDD ;move 0215 to AX
20 0008 03 06 0002 R ADD AX, FLDE ;add 0125 to AX
21 000C A3 0004 R MOV FLDF, AX ;store sum in FLDF
22 000F B8 4C00 MOV AX, 4C
C00H ;end processing
23 0012 CD 21 INT 21H
84
24 0014 MAIN ENDP ;end of procedure
25 0014 CODESEG ENDS ;end of segment
26 END MAIN

1 PAGE 60,132
2 TITLE A05ASM3 Move and add operation
3 ; ------------------------------------------------------------------------------------
4 .MODEL SMALL
5 .STACK 64 ;define stack
6 .DATA ;define data
7 0000 00D7 FLDD DW 215
8 0002 007D FLDE DW 125

8086 Architecture
9 0004 0000 FLDF DW ?
10 ; ---------------------------------------------------------------------------------------
11 .CODE ;define code segment
12 0000 MAIN PROC FAR
13 0000 B8 ---- R MOV AX, @data ;set address of data segment in DS
14 0003 8E D8 MOV DS, AX
15
16 0005 A1 0000 R MOV AX, FLDD ;move 0215 to AX
17 0008 03 06 0002 R ADD AX, FLDE ;add 0125 to AX
18 000C A3 0004 R MOV FLDF, AX ;store sum in FLDF
19
20 000F B8 4C00 MOV AX, 4C00H ;End processing
21 0012 CD 21 INT 21H 85
22 0014 MAIN ENDP ;End of procedure
23 END MAIN ;End of program

MACRO ASSEMBLER
¢ Translate a program written in macro language into the
machine language.

8086 Architecture
¢ A macro language is the one in which all the instruction
sequence can be defined using macros.
¢ A macro is an instruction sequence that appears
repeatedly in a program assigned with a specific name.
¢ The macro assembler replaces a macro name with the
appropriate instruction sequence each time it
encounters a macro name.
¢ The main difference between a macro and a procedure is
that in the macro the passage of parameters is possible 86
and in the procedure it is not.

¢ Syntax of macro:
— Declaration of the macro

8086 Architecture
— Code of the macro
— Macro termination directive
¢ The declaration of the macro is done the following way:
NameMacro MACRO [parameter1, parameter2...]
¢ The directive for the termination of the macro is: ENDM

87

Addition MACRO
IN AX, PORT

8086 Architecture
ADD AX, BX
OUT PORT, AX
ENDM

¢ When above instruction sequence is to be executed
repeatedly macro assembler allow the macro name only
to be typed instead of all instructions, provided the
macro is defined.

88

¢ There exist difference between a macro program and a
subroutine program.

8086 Architecture
¢ A specific subroutine occurs once in a program. A
subroutine is executed by calling it from a main
program. The program execution jumps out of the main
program and then executes the subroutine. At the end
of the subroutine, a RET instruction is used to resume
program execution following the CALL SUBROUTINE
instruction in the main program

89

¢ A macro does not cause the program execution to
branch out of the main program. Each time a macro
occurs, it is replaced with the appropriate sequence in

8086 Architecture
the main program. The advantages of using macros are
that the source programs become shorter and program
documentation becomes better.
¢ Conditional macro assembler is very useful in
determining whether or not an instruction sequence
shall be included in the assembly depending on a
condition that is true or false.
¢ Based on each condition, a particular program is
assembled. 90

DESCRIPTION OF ASSEMBLY PROCESS
IN MACRO ASSEMBLER (MASM)
¢ MASM is two pass assembler.
¢ The complete process of assembling, linking, and

8086 Architecture
executing an assembly language program using a macro
assembler is similar as mentioned previous.
Assembler Linker

Assembly Executable file
language Object code
(Source code) *.OBJ *.EXE or
*.ASM *.COM 91

¢ The assembly step involves translating the source code
into object code and generating an intermediate .OBJ
file, or module. One of the assembler’s tasks is to

8086 Architecture
calculate the offsets for every data item in the data
segment and for every instruction in the code segment.
¢ The link step involves converting the .OBJ module to an
.EXE machine code module. The linker’s tasks include
completing any address left open by the assembler and
combining separately assembled programs into one
executable module.
¢ The last step is to load the program for execution.
92

ASSEMBLING THE SOURCE PROGRAM
¢ The assembler converts the source statements into
machine code and displays any error messages on the
screen.

8086 Architecture
¢ Typical errors include a name that violates naming
conventions, an operation that is spelled incorrectly
(such as MOVE instead of MOV), and an operand
containing a name that is not defined.
¢ The assembler attempts to correct some errors but, in
any event, reload the editor, correct the .ASM source
program, and reassemble it.
¢ Optional output files from the assembly step are object
(.OBJ), listing (.LST) and cross reference (.CRF or
.SBR). 93

LINKING AN OBJECT PROGRAM
¢ When the program is free of error messages, the next step is to link
the object module that was produced by the assembler and that
contains only machine code.

8086 Architecture
¢ The linker performs the following functions:
— Combines, if requested, more than one separately assembled
module into one executable program, such as two or more assembly
programs or an assembly program with a C program.
— Generates an .EXE module and initialize it with special instruction
to facilitate its subsequent loading for execution.
¢ Once one or more .OBJ modules are linked into an .EXE module,
.EXE module can execute any number of times.
¢ But the source program needs correction: correct source program,
assemble again into an .OBJ module, and link .OBJ module into an
.EXE module. 94

EXECUTING A PROGRAM
¢ Having assembled and linked a program, the program
can now execute.

8086 Architecture
¢ If the .EXE file is in the default drive, ask the loader to
read it into memory for execution by typing
A05ASM1.EXE or A05ASM (without .EXE extension)
ASM1
¢ However, since this program produces no visible output,
it is suggested that you run it under DEBUG and use
Trace commands to step through its execution. DEBUG
load the .EXE program module and displays its hyphen
prompt.
95

16 BIT MICROPROCESSOR ADDRESSING
MODE
¢ The 8086 provides various addressing modes to access instruction
operands.
Operands may be contained in registers, in memory or in I/O ports.

8086 Architecture
¢

¢ The three basic modes of addressing are register, immediate, and
memory; memory addressing consists of six types, for eight modes
in all.
— Register addressing
— Immediate addressing
— Direct memory addressing
— Direct-offset addressing
— Indirect memory addressing
— Base displacement addressing
— Base index addressing 96

— Base-index with displacement addressing
index

REGISTER ADDRESSING
¢ For this mode, a register provides the name of any of
the 8, or16 bit register. Depending on the instruction,
the register may appear in the first operand, the second

8086 Architecture
operand or both, as the following examples illustrate:

MOV DX, WORD_MEM
MOV WORD_MEM, CX
MOV DX, BX

97

IMMEDIATE ADDRESSING
¢ An immediate operand contains a constant value or an
expression.

8086 Architecture
¢ For many instructions with two operands, the first
operand may be a register or memory location, and the
second may be an immediate constant. The destination
field (first operand) defines the length of the data.

byte_val DB 150 ;define byte
word_val DW 300 ;define word

MOV word_val, 40H 98

MOV AX, 0245H

DIRECT MEMORY ADDRESSING
¢ In this format, one of the operands references a memory
location and the other operand references a register.

8086 Architecture
ADD BYTE_VAL, DL
MOV BX, WORD_VAL

99

DIRECT OFFSET ADDRESSING
¢ This addressing mode, a variation of direct addressing, uses
arithmetic operators to modify an address.
The following examples use these definitions of tables:

8086 Architecture
¢

BYTE_TBL DB 12, 15, 16 22, ……..
16,
WORD_TBL DB 163, 227 435, ……..
227,
DBWD_TBL DB 465, 563 897, ……..
563,
¢ Byte operations: these instructions access bytes from BYTE_TBL:
MOV CL, BYTE_TBL[2]
MOV CL, BYTE_TBL+2
¢ Word operation: these instruction access words from WORD_TBL:
MOV CX, WORD_TBL[4] 100
MOV CX, WORD_TBL+4

INDIRECT MEMORY ADDRESSING
¢ Indirect addressing takes advantage of the computer’s capability
for segment:offset addressing.
The registers used for this purpose are base registers (BX and BP)

8086 Architecture
¢
and index registers (DI and SI), coded within square brackets,
which indicate a reference to memory.
¢ An indirect address such as [DI] tells the assembler that the
memory address to use will be in DI when the program
subsequently executes.
¢ BX, DI, and SI are associated with DS as DS:BX, DS:DI, and DS:SI,
for processing data in the data segment.
¢ BP is associated with SS as SS:BP, for handling data in the stack.
¢ When the first operand contains an indirect address, the second
operand reference a register or immediate value; when the second 101
operand contains an indirect address, the first operand references a
register.

¢ A reference in square brackets to BP, BX, DI or SI implies an
indirect operand, and the processor treats the contents of the
register as an offset address when the program is executing.

8086 Architecture
— DATA_VAL DB 50
……..
LEA BX, DATA_VAL
MOV [BX], CL

— ADD CL, [BX]
ADD [BP], CL
102

BASE DISPLACEMENT ADDRESSING
¢ This addressing mode also uses base register (BX and
BP) and index registers (DI and SI), but combined with
a displacement (a number or offset value) to form an

8086 Architecture
effective address.
¢ The following MOV instruction moves zero to a location
two bytes immediately following the start of
DATA_TBL;

DATA_TBL DB 365 DUP(?)
………
ADD CL, [DI+12]
103
SUB DATA_TBL, DL
MOV DATA_TBL[DI], DL

BASE INDEX ADDRESSING
¢ This addressing mode combines a base register (BX or
BP) with an index register (DI or SI) to form an effective
address; for example, [BX+DI] means the address in BX

8086 Architecture
plus the address in DI.
¢ A common use for this mode is in addressing a 2 2-
dimensional array, where, say, BX references the row
and SI the column.

MOV AX, [BX+SI]
ADD [BX+DI], CL

104

BASE INDEX WITH DISPLACEMENT ADDRESSING

¢ This addressing mode, a variation on base index,
combines a base register, an index register, and a
displacement to form an effective address.

8086 Architecture
MOV AX, [BX+DI+10]
MOV CL, DATA_TBL[BX+DI]

105

INSTRUCTIONS

— Data Transfer Instructions

8086 Architecture
— Arithmetic Instructions
— Bit Manipulation Instructions
— String Instructions
— Program Execution Transfer Instructions
— Processor Control Instructions

106

DATA TRANSFER INSTRUCTIONS
¢ General purpose byte or word transfer instructions
instructions:
MOV copy byte or word from specified source to specified destination

8086 Architecture
PUSH Copy specified word to top of stack
POP Copy word from top of stack to specified location
XCHG Exchange bytes or exchange words
XLAT Translate a byte in AL using a table in memory

¢ Simple input and output port transfer instructions
instructions:

IN Copy a byte or word from specified port to accumulator
OUT Copy a byte or word from accumulator to specified port
107

¢ Special address transfer instructions:

LEA Load effective address of operand into specified register

8086 Architecture
LDS Load DS register and other specified register from memory
LES Load ES register and other specified register from memory

¢ Flag transfer instructions

LAHF Load (copy to ) AH with the low byte of the flag register
SAHF Store (copy) AH register to low byte of flag register
PUSHF Copy flag register to top of stack
POPF Copy word at top of stack to flag register 108

ARITHMETIC INSTRUCTIONS
¢ Addition instructions:
ADD Add specified byte to byte or specified word to word

8086 Architecture
ADC Add byte + byte + carry flag or word + word + carry flag
INC Increment specified byte or specified word by 1
AAA ASCII adjust after addition
DAA Decimal (BCD) adjust after addition

¢ Multiplication instructions

MUL Multiply unsigned byte by byte or unsigned word by word
IMUL Multiply signed byte by byte or signed word by word
AAM ASCII adjust after multiplication 109

¢ Subtraction instructions:

SUB Subtract byte from byte or word for word
SBB Subtract byte and carry flag from byte or word ad carry
flag from word.
DEC Decrement specified byte or specified word by 1
NEG Negate – invert each bit of a specified byte or word and

8086 Architecture
add 1. (form 2’s complement)
CMP Compare two specified bytes or two specified words
AAS ASCII adjust after subtraction
DAS Decimal (BCD) adjust after subtraction

¢ Division instructions:
DIV Divide unsigned word by byte or unsigned DW by word
IDIV Divide signed word by byte or signed DW by word
AAD ASCII adjust before division 110
CBW Fill upper byte of word with copies of sign bit of lower byte
CWD Fill upper word of DW with sign bit of lower word

BIT MANIPULATION INSTRUCTION
¢ Logical instructions:

NOT Invert each bit of a byte or word

8086 Architecture
AND AND each bit in a byte or word with the corresponding bit
in another byte or word
OR OR each bit in a byte or word with the corresponding bit
in another byte or word
XOR Exclusive OR each bit in a byte or word with the
corresponding bit in another byte or word
TEST AND operands to update flags, but don’t change operands

111

¢ Shift instruction

SHL/SAL Shift bits of byte or word left, put zero(s) in LSB(s).
SHR Shift bits of byte or word right, put zero(s) in MSB(s).
SAR Shift bits of word or byte right, copy old MSB into new MSB

8086 Architecture
¢ Rotate instructions:

ROL Rotate bits of byte or word left, MSB to LSB and to CF
ROR Rotate bits of byte or word right, LSB to MSB and to CF
RCL Rotate bits of byte or word left, MSB to CF and CF to LSB
RCR Rotate bits of byte or word right, LSB to CF and CF to MSB

112

STRING INSTRUCTIONS
REP An instruction prefix Repeat following
instruction until CX=0
REPE/REPZ Repeat while equal/zero

8086 Architecture
REPNE/REPNZ Repeat while not equal/zero
MOVX/MOVSB/MOVSW Move byte or word from one string to another
COMPS/COMPSB/COMPSW Compare two string bytes or two string words
SCAS/SCASB/SCASW Scan a string. Compare a string byte with a
byte in AL or a string word with a word in AX
LODS/LODSB/LODSW Load string byte into AL or string word into AX
STOS/STOSB/STOSW Store byte from AL or word from AX into string
113

PROGRAM EXECUTION TRANSFER
INSTRUCTIONS
¢ Unconditional transfer instructions:

CALL Call a procedure (subprogram), save return address on stack

8086 Architecture
RET Return from procedure to calling program
JMP Go to specified address to get next instruction
¢ Conditional transfer instructions:

JA/JNBE Jump if above/ jump if not below or equal
JAE/JNB Jump if above or equal/ jump if not below
JB/JNAE Jump if below/ jump if not above or equal
JBE/JNA Jump if below or equal/ jump if not above
JC Jump if carry =1
114
JE/JZ Jump if equal/ jump if zero
JG/JNLE Jump if greater/ jump if not less than or equal

JGE/JNL Jump if greater than or equal/ jump if not less than
JL/JNGE Jump if less than/ jump if not greater than or equal
JLE/JNG Jump if less than or equal/ jump if not greater than

8086 Architecture
JNC Jump if no carry
JNE/JNZ Jump if not equal/ jump if not zero
JNO Jump if no overflow
JNP/JPO Jump if not parity/ jump if parity odd (PF = 0)
JNS Jump if not sign
JO Jump if overflow
JP/JPE Jump if parity/ jump if parity even
115
JS Jump if sign

¢ Iteration control instructions:

LOOP Loop through a sequence of instructions
until CX=0
LOOPE/LOOPZ Loop through a sequence of instruction
while ZF=1 and CX !=0

8086 Architecture
LOOPNE/LOOPNZ Loop through a sequence of instruction
while ZF=0 and CX!=0.
JCXZ Jump to specified address if CX=0.

¢ Interrupt instructions:

INT Interrupt program execution, call service procedure
INTO Interrupt program execution if OF=1 116
IRET Return from interrupt service procedure to main program

PROCESSOR CONTROL INSTRUCTIONS
¢ Flag set/clear instruction:

8086 Architecture
STC Set carry flag
CLC Clear carry flag
CMC Complement the status of carry flag
STD Set direction flag
CLD Clear direction flag
STI Set interrupt enable flag (enable INTR)
CLI Clear interrupt enable flag (disable INTR)

117

¢ External hardware synchronization instructions:

HLT Halt until interrupt or reset

8086 Architecture
WAIT Wait until signal on the TEST pin is low
LOCK An instruction prefix. Prevents another processor from
taking the bus while the adjacent instruction executes

¢ No operation instructions:
NOP No action except fetch and decode

118

THE MOV INSTRUCTION
¢ MOV transfer (copy) data Destination Source
referenced by the address Memory accumulator
of the second operand to

8086 Architecture
the address of the first Accumulator Memory
operand. The sending Register Register
field is unchanged. Register Memory
¢ The operands that Memory Register
reference memory or
Register Immediate
registers must agree in
size. Memory Immediate
Seg-reg
Seg Reg_16
MOV destination, source Seg-reg
Seg Memory_16
Reg_16 Seg_-reg
119
Memory_16 Seg-reg

¢ MOV SP, BX
— Copy a word from the BX register to the SP register

8086 Architecture
¢ MOV CL, [BX]
— Copy a byte to CL from the memory location whose effective
address is contained in BX. The effective address will be added to
the data segment base in DS to produce the physical address.

¢ MOV 43H[SI], DH
— Copy a byte from the DH register to a memory location. The BIU
will compute the effective address of the memory location by adding
the indicated displacement of 43H to the contents of the SI register.
The BIU then produces the actual physical address by adding this
effective address to the data segment base represented by the 16 bit
number in the DS register. 120

¢ MOV CX, [434AH]
— Copy the contents of two memory locations into the CX register.
The direct address or displacement of the first memory location

8086 Architecture
from the start of the data segment is 437AH. The BIU will produce
the physical memory address by adding this displacement to the
data segment base represented by the 16 bit number in the DS
register.

¢ MOV CS:[BX], DL
— Copy a byte from the DL register to a memory location. The
effective address for the memory location is contained in the BX
register. Normally an effective address in BX will be added to the
data segment base in DS to produce the physical memory address.
In this instruction, the CS: in front of [BX] indicates that we want
the BIU to add the effective address to the code segment base in CS
to produce the physical address. This CS: is called a segment 121
override prefix.

¢ MOV AX, 0010H
— Load the immediate word 0010H into the AX register.

8086 Architecture
¢ MOV [0000], AL
— Copy the contents of the AL register to a memory location.
The direct address or displacement of the memory location
from the start of the data segment is 0000H.

122

THE LEA, LDS, LES INSTRUCTION
¢ useful for initializing a register with an offset address.
¢ A common use for LEA is to initialize an offset in BX,

8086 Architecture
DI, or SI for indexing an address in memory.

DATATBL DB 25 DUP (?)
BYTEFLD DB ?
…………
LEA BX, DATATBL
MOV BYTEFLD, [BX]

123

¢ For the figure below, what is the result of executing the
following instruction?

8086 Architecture
LEA SI, [DI + BX + 2H]

DS 0100 DS 0100
SI F002 SI 0042
DI 0020 DI 0020
AX 0003 AX 0003
BX 0040 BX 0040
before after
124

¢ For these three instructions (LEA, LDS, LES) the effective
address could be formed of all or any various combinations
of the three elements:

8086 Architecture
¢ What is the result of executing the following instruction?
LDS SI, [DI + BX + 2H]

125

8086 Architecture
126

THE ADD INTRUCTION
¢ Add a number from some source to a number from some
destination and put the result in the specified
destination.

8086 Architecture
¢ The source may be an immediate number, a register, or
a memory location.
¢ The destination may be a register, or a memory
location.
¢ The source and the destination in an instruction cannot
both be memory locations.
¢ The source and the destination must be of the same
type. 127
¢ Flags affected: AF, CF, OF, PF, SF, ZF.

¢ EXAMPLES:

8086 Architecture
— ADD AL, 74H
— ADC CL, BL
— ADD DX, BX
— ADD DX, [SI]
— ADD PRICES[BX], AL
— ADC AL, PRICES[BX]
— ADD AX, [SI + DI + 2H]

128

8086 Architecture
129

THE SUB INSTRUCTION
¢ Subtract the number in the indicated source from the
number in the indicated destination and put the result
in the indicated destination.

8086 Architecture
¢ For subtraction, the carry flag (CF) functions as a
borrow flags.
¢ The carry flag will be set after a subtraction if the
number in the specified source is larger than the
number in the specified destination.
¢ Source/destination à same as addition.

¢ Flags affected: AF, CF, OF, PF, SF and ZF

130

¢ EXAMPLES:
— SUB CX, BX
SBB CH, AL

8086 Architecture
—
— SUB AX, 3481H
— SBB BX, [3427H]
— SUB PRICES[BX], 04H ; subtract 04 from byte at effective
address PRICE[BX] if PRICES
declared with DB. Subtract 04 from
word at effective address
PRICES[BX} if PRICES declared
with DW
— SBB CX, TABLE[BX]
— SBB TABLE[BX], CX
131

THE MUL INSTRUCTION
¢ Multiplies an unsigned byte from some source times an
unsigned byte in the AL register or an unsigned word
from some source times an unsigned word in the AX

8086 Architecture
register.
¢ The source can be a register or a memory location.

¢ When a byte is multiplied by the content of AL, the
result is put in AX.
¢ A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
as large as 16 bit.
¢ The most significant byte of the result is put in AH, and
132
the least significant byte of the result is put in AL.

¢ When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.

8086 Architecture
¢ The most significant word of the result is put in DX
register, and the least significant word of the result is
put in the AX register.

¢ EXAMPLES:
— MUL BH
— MUL CX
— MUL CONVERSION[BX]
133

THE IMUL INSTRUCTION
¢ Multiplies a signed byte from some source times a
signed byte in AL or a signed word from some source
times a signed word in AX.

8086 Architecture
¢ The source can be a register or a memory location.

¢ When a byte is multiplied by the content of AL, the
result is put in AX.
¢ A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
as large as 16 bit.
¢ The most significant byte of the result is put in AH, and
the least significant byte of the result is put in AL. 134

¢ When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.

8086 Architecture
¢ The most significant word of the result is put in DX
register, and the least significant word of the result is
put in the AX register.
¢ If the magnitude of the product does not require all the
bits of the destination, the unused bits will be filled
with copies of the sign bit.

¢ EXAMPLES:
— IMUL BH 135
— IMUL AX

8086 Architecture
136

8086 Architecture

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